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Merge branch 'devel'
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@lerwys
lerwys committed Jun 8, 2018
2 parents c00c28d + 0fbdadf commit 5c28f96
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion hdl/ip_cores/dsp-cores
Submodule dsp-cores updated 50 files
+36 −0 .gitignore
+2 −2 hdl/modules/cic/cic_decim.v
+59 −38 hdl/modules/cic/cic_dual.vhd
+214 −20 hdl/modules/cic/cic_dyn.vhd
+18 −18 hdl/modules/cic/decimation_strober.vhd
+4 −4 hdl/modules/daphine/daphine.vhd
+3 −3 hdl/modules/delta_sigma/delta_sigma.vhd
+9 −9 hdl/modules/downconv/downconv.vhd
+88 −51 hdl/modules/dsp_cores_pkg.vhd
+12 −12 hdl/modules/fixed_dds/fixed_dds.vhd
+5 −5 hdl/modules/fixed_dds/lut_sweep.vhd
+6 −6 hdl/modules/input_gen/input_gen.vhd
+2 −2 hdl/modules/machine/pbpm_fmcpico1M/machine_pkg.vhd
+4 −4 hdl/modules/machine/sirius_bo_250M/machine_pkg.vhd
+4 −4 hdl/modules/machine/sirius_sr_130M/machine_pkg.vhd
+4 −4 hdl/modules/machine/sirius_sr_250M/machine_pkg.vhd
+4 −4 hdl/modules/machine/uvx_sr_130M/machine_pkg.vhd
+4 −4 hdl/modules/machine/uvx_sr_250M/machine_pkg.vhd
+26 −16 hdl/modules/mixer/mixer.vhd
+30 −2 hdl/modules/multiplier/generic_multiplier.vhd
+3 −3 hdl/modules/part_delta_sigma/part_delta_sigma.vhd
+6 −6 hdl/modules/position_calc/cicordic.vhd
+131 −80 hdl/modules/position_calc/position_calc.vhd
+7 −7 hdl/modules/strobe_gen/strobe_gen.vhd
+2 −2 hdl/modules/sw_windowing/counter.vhd
+7 −7 hdl/modules/sw_windowing/input_conditioner.vhd
+9 −0 hdl/modules/wb_bpm_swap/bpm_swap/bpm_swap.vhd
+3 −0 hdl/modules/wb_bpm_swap/bpm_swap/deswap_channels.vhd
+2 −0 hdl/modules/wb_bpm_swap/wb_bpm_swap.vhd
+2 −0 hdl/modules/wb_bpm_swap/xwb_bpm_swap.vhd
+21 −0 hdl/modules/wb_position_calc/wb_position_calc_core.vhd
+818 −137 hdl/modules/wb_position_calc/wbgen/doc/pos_calc_regs_wb.html
+25 −0 hdl/modules/wb_position_calc/wbgen/pos_calc_regs.h
+138 −0 hdl/modules/wb_position_calc/wbgen/wb_pos_calc_regs.vhd
+51 −0 hdl/modules/wb_position_calc/wbgen/wb_pos_calc_regs.wb
+8 −2 hdl/modules/wb_position_calc/wbgen/wb_pos_calc_regs_pkg.vhd
+2 −0 hdl/modules/wb_position_calc/xwb_position_calc_core.vhd
+8 −0 hdl/sim/regs/wb_pos_calc_regs.vh
+96 −40 hdl/testbench/cic/cic_bench.vhd
+91 −37 hdl/testbench/cic/wave.do
+8 −8 hdl/testbench/cordic/cordic_bench.vhd
+4 −4 hdl/testbench/ddc_chain/ddc_bench.vhd
+6 −6 hdl/testbench/downconversion/downconv_bench.vhd
+8 −8 hdl/testbench/fixed_dds/dds_bench.vhd
+2 −2 hdl/testbench/input_conditioner/conditioner_bench.vhd
+4 −4 hdl/testbench/mixer/mixer_bench.vhd
+2 −2 hdl/testbench/multiplier/multiplier_bench.vhd
+3 −3 hdl/top/ml605/bpm_dsp_example/signal_gen.vhd
+3 −3 hdl/top/ml605/ddc_chain/counter.vhd
+4 −4 hdl/top/ml605/ddc_chain/input_conditioner.vhd

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