wip

taiki-e · Feb 23, 2025 · e9d2dc6 · e9d2dc6
1 parent 49ed558
commit e9d2dc6
Showing 1 changed file with 10 additions and 4 deletions.
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -568,13 +568,19 @@ jobs:
           RUSTFLAGS: ${{ env.RUSTFLAGS }} -C target-feature=+zabha
           QEMU_CPU: max
         if: startsWith(matrix.target, 'riscv')
-      # riscv +zabha,+zacas
+      # riscv +zacas
       - run: tools/test.sh -vv --tests ${TARGET:-} ${BUILD_STD:-} ${RELEASE:-}
         env:
-          RUSTDOCFLAGS: ${{ env.RUSTDOCFLAGS }} -C target-feature=+zabha,+zacas
-          RUSTFLAGS: ${{ env.RUSTFLAGS }} -C target-feature=+zabha,+zacas
-          QEMU_CPU: max
+          RUSTDOCFLAGS: ${{ env.RUSTDOCFLAGS }} -C target-feature=+zacas
+          RUSTFLAGS: ${{ env.RUSTFLAGS }} -C target-feature=+zacas
         if: startsWith(matrix.target, 'riscv')
+      # # riscv +zabha,+zacas
+      # - run: tools/test.sh -vv --tests ${TARGET:-} ${BUILD_STD:-} ${RELEASE:-}
+      #   env:
+      #     RUSTDOCFLAGS: ${{ env.RUSTDOCFLAGS }} -C target-feature=+zabha,+zacas
+      #     RUSTFLAGS: ${{ env.RUSTFLAGS }} -C target-feature=+zabha,+zacas
+      #     QEMU_CPU: max
+      #   if: startsWith(matrix.target, 'riscv')
       # riscv zalrsc-based RMW ({32,64}-bit swap with Zalrsc without Zaamo)
       - run: tools/test.sh -vv --tests ${TARGET:-} ${BUILD_STD:-} ${RELEASE:-}
         env: