syncing to 1GbE-RUDP-example branch

slaclab · Dec 20, 2023 · 75012d3 · 75012d3
1 parent ea762be
commit 75012d3
Showing 1 changed file with 4 additions and 1 deletion.
diff --git a/firmware/common/rtl/Rudp.vhd b/firmware/common/rtl/Rudp.vhd
@@ -121,6 +121,7 @@ architecture mapping of Rudp is
    signal ethClk   : sl;
    signal ethRst   : sl;
    signal extReset : sl;
+   signal refClk   : sl;
 
 begin
 
@@ -172,7 +173,7 @@ begin
          DURATION_G => 156250000)
       port map (
          arst   => extRst,
-         clk    => ethClk,
+         clk    => refClk,
          rstOut => extReset);
 
    GEN_10G : if (BUILD_10G_G = true) generate
@@ -215,6 +216,7 @@ begin
             gtTxN(0)               => ethTxN,
             gtRxP(0)               => ethRxP,
             gtRxN(0)               => ethRxN);
+      refClk <= ethClk;
    end generate;
 
    GEN_1G : if (BUILD_10G_G = false) generate
@@ -255,6 +257,7 @@ begin
             phyClk                 => ethClk,
             phyRst                 => ethRst,
             phyReady(0)            => phyReady,
+            refClkOut              => refClk,
             -- MGT Clock Port
             gtClkP                 => ethClkP,
             gtClkN                 => ethClkN,