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Example Projects for RA/FSP.
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ra-fsp-systems committed Nov 27, 2024
1 parent b619fce commit ada2881
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#
#Wed Oct 23 09:31:52 UTC 2024
#Thu Oct 31 23:57:59 ICT 2024
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Expand Up @@ -5,7 +5,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-456334887616851180" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-834121703378532684" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
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/* generated memory regions file - do not edit */
RAM_START = 0x20000000;
RAM_LENGTH = 0x20000;
FLASH_START = 0x00000000;
FLASH_LENGTH = 0x80000;
DATA_FLASH_START = 0x08000000;
DATA_FLASH_LENGTH = 0x2000;
OPTION_SETTING_START = 0x0100A100;
OPTION_SETTING_LENGTH = 0x100;
OPTION_SETTING_S_START = 0x0100A200;
OPTION_SETTING_S_LENGTH = 0x100;
ID_CODE_START = 0x00000000;
ID_CODE_LENGTH = 0x0;
SDRAM_START = 0x80010000;
SDRAM_LENGTH = 0x0;
QSPI_FLASH_START = 0x60000000;
QSPI_FLASH_LENGTH = 0x4000000;
OSPI_DEVICE_0_START = 0x80020000;
OSPI_DEVICE_0_LENGTH = 0x0;
OSPI_DEVICE_1_START = 0x80030000;
OSPI_DEVICE_1_LENGTH = 0x0;
/* generated memory regions file - do not edit */
RAM_START = 0x20000000;
RAM_LENGTH = 0x20000;
FLASH_START = 0x00000000;
FLASH_LENGTH = 0x80000;
DATA_FLASH_START = 0x08000000;
DATA_FLASH_LENGTH = 0x2000;
OPTION_SETTING_START = 0x0100A100;
OPTION_SETTING_LENGTH = 0x100;
OPTION_SETTING_S_START = 0x0100A200;
OPTION_SETTING_S_LENGTH = 0x100;
ID_CODE_START = 0x00000000;
ID_CODE_LENGTH = 0x0;
SDRAM_START = 0x80010000;
SDRAM_LENGTH = 0x0;
QSPI_FLASH_START = 0x60000000;
QSPI_FLASH_LENGTH = 0x4000000;
OSPI_DEVICE_0_START = 0x80020000;
OSPI_DEVICE_0_LENGTH = 0x0;
OSPI_DEVICE_1_START = 0x80030000;
OSPI_DEVICE_1_LENGTH = 0x0;
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Expand Up @@ -13,7 +13,6 @@

/* Undefining the usb_pmsc driver related macros.*/
#undef STRG_SECTSIZE
#undef USB_MEDIA_ADDRESS
#undef STRG_MEDIASIZE
#undef STRG_TOTALSECT
#undef RAMDISK_MEDIATYPE
Expand All @@ -23,7 +22,6 @@

/* macro definitions */
#define STRG_SECTSIZE (0x0200UL) /* 512 bytes per sector */
#define USB_MEDIA_ADDRESS (0x20008000UL) /* Media Head Address */
#define STRG_MEDIASIZE (32UL * 1024UL) /* Media size */
#define STRG_TOTALSECT (STRG_MEDIASIZE / STRG_SECTSIZE)
#define RAMDISK_MEDIATYPE (0xF8u) /* Fixed media */
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Expand Up @@ -47,6 +47,7 @@ extern const uint8_t g_usb_pmsc_table1[];
extern const uint8_t g_usb_pmsc_tablefat1[];
extern const uint8_t g_usb_pmsc_tablefat2[];
extern const uint8_t g_usb_pmsc_rootdir[];
uint32_t g_ram_disk_base_address;

const rm_block_media_api_t g_rm_block_media_on_user_media =
{
Expand All @@ -60,7 +61,7 @@ const rm_block_media_api_t g_rm_block_media_on_user_media =
.close = RM_BLOCK_MEDIA_RAM_Close,
};
extern uint32_t __RAM_segment_used_end__;
#define ALIGN_4K 4096
#define ALIGN_4K (4096)
/*******************************************************************************************************************//**
* Opens the module.
*
Expand All @@ -76,9 +77,10 @@ fsp_err_t RM_BLOCK_MEDIA_RAM_Open (rm_block_media_ctrl_t * const p_ctrl, rm_bloc
uint32_t adr = RESET_VALUE;

/* update the SRAM media address and copy the boot sector data to it.*/
adr = (uint32_t)&(__RAM_segment_used_end__);
adr = (adr + (ALIGN_4K -1)) & (uint32_t)~(ALIGN_4K - 1);

g_ram_disk_base_address = (uint32_t)&(__RAM_segment_used_end__);
g_ram_disk_base_address = (g_ram_disk_base_address + (ALIGN_4K - 1)) & (uint32_t)~(ALIGN_4K - 1);
adr= g_ram_disk_base_address;
memcpy((void *)adr, (void *)&g_ram_disk_boot_sector, STRG_SECTSIZE);

/* update the SRAM media address and copy the usb_pmsc table data to it.*/
Expand Down Expand Up @@ -130,7 +132,7 @@ fsp_err_t RM_BLOCK_MEDIA_RAM_Read (rm_block_media_ctrl_t * const p_ctrl,
FSP_PARAMETER_NOT_USED(p_ctrl);

/* Copy block from specified ram disk block address to read_buffer. */
memcpy(p_dest_address, (void *)(USB_MEDIA_ADDRESS + (block_address * STRG_SECTSIZE)), (STRG_SECTSIZE * num_blocks));
memcpy(p_dest_address, (void *)(g_ram_disk_base_address + (block_address * STRG_SECTSIZE)), (STRG_SECTSIZE * num_blocks));

/* set the block media complete event flag.*/
g_blockmedia_complete_event = true;
Expand All @@ -152,7 +154,7 @@ fsp_err_t RM_BLOCK_MEDIA_RAM_Write (rm_block_media_ctrl_t * const p_ctrl,
FSP_PARAMETER_NOT_USED(p_ctrl);

/* Copy block from write_buffer to appropriate block address in ram disk. */
memcpy((void *)(USB_MEDIA_ADDRESS + (block_address * STRG_SECTSIZE)), p_src_address, (STRG_SECTSIZE * num_blocks));
memcpy((void *)(g_ram_disk_base_address + (block_address * STRG_SECTSIZE)), p_src_address, (STRG_SECTSIZE * num_blocks));

/* set the block media complete event flag.*/
g_blockmedia_complete_event = true;
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@@ -1,7 +1,7 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
EnableFlashBP = 1
BPDuringExecution = 0
[CFI]
CFISize = 0x00
Expand All @@ -15,18 +15,21 @@ OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
RMWThreshold = 0x200
Loaders=""
EraseType = 0x00
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
AllowCaching = 0
EnableFlashDL = 2
Override = 0
Device="ARM7"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
WorkRAMSize = 0x3000
WorkRAMAddr = 0x2000D000
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
Expand All @@ -37,3 +40,8 @@ RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
[RAM]
VerifyDownload = 0x00
[MEM_MAP]
[DYN_MEM_MAP]
NumUserRegion = 0x00
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Expand Up @@ -13,7 +13,7 @@
<booleanAttribute key="com.renesas.cdt.core.setResume" value="true"/>
<stringAttribute key="com.renesas.cdt.core.targetDevice" value="R7FA4M2AD"/>
<booleanAttribute key="com.renesas.cdt.core.useRemoteTarget" value="true"/>
<stringAttribute key="com.renesas.cdt.debug.ioview.dsf.registerSelection0" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;selectedRegisterList ioFilePath=&quot;C:\Users\mayank.gupta\.eclipse\com.renesas.platform_1476787444\DebugComp\RA\IoFiles\R7FA4M2AD.sfrx&quot;/&gt;&#13;&#10;"/>
<stringAttribute key="com.renesas.cdt.debug.ioview.dsf.registerSelection0" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;selectedRegisterList ioFilePath=&quot;C:\Users\lam.pham-ngoc\.eclipse\com.renesas.platform_766387387\DebugComp\RA\IoFiles\R7FA4M2AD.svd&quot;/&gt;&#13;&#10;"/>
<stringAttribute key="com.renesas.cdt.launch.dsf.IO_MAP" value="${support_area_loc}"/>
<booleanAttribute key="com.renesas.cdt.launch.dsf.USE_DEFAULT_IO_MAP" value="true"/>
<stringAttribute key="com.renesas.cdt.launch.dsf.launchSeqType" value="com.renesas.cdt.launch.dsf.launchSequence.e2GdbServer"/>
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