Remove 'v1' version specifier from Aludel Elixir board

Signed-off-by: Chris Wilson <chris@cgnd.dev>
golioth · Mar 15, 2024 · bfb70c2 · bfb70c2
1 parent 35a8ab9
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diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -8,6 +8,12 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
+## [1.1.1] - 2024-03-15
+
+### Fixed
+
+- Remove `v1` version specifier from Aludel Elixir board (`aludel_elixir_v1` → `aludel_elixir`).
+
 ## [1.1.0] - 2024-03-15
 
 ### Added

diff --git a/boards/arm/aludel_elixir_v1/CMakeLists.txt → boards/arm/aludel_elixir/CMakeLists.txt b/boards/arm/aludel_elixir_v1/CMakeLists.txt → boards/arm/aludel_elixir/CMakeLists.txt
@@ -2,5 +2,5 @@
 # SPDX-License-Identifier: Apache-2.0
 
 set(mcuboot_OVERLAY_CONFIG
-    "${CMAKE_CURRENT_LIST_DIR}/aludel_elixir_v1_mcuboot.conf"
+    "${CMAKE_CURRENT_LIST_DIR}/aludel_elixir_mcuboot.conf"
     CACHE STRING "MCUBOOT configuration")
diff --git a/boards/arm/aludel_elixir_v1/Kconfig.board → boards/arm/aludel_elixir/Kconfig.board b/boards/arm/aludel_elixir_v1/Kconfig.board → boards/arm/aludel_elixir/Kconfig.board
@@ -4,10 +4,10 @@
 
 if SOC_NRF9160_SICA
 
-config BOARD_ALUDEL_ELIXIR_V1
-	bool "Golioth Aludel Elixir v1"
+config BOARD_ALUDEL_ELIXIR
+	bool "Golioth Aludel Elixir"
 
-config BOARD_ALUDEL_ELIXIR_V1_NS
-	bool "Golioth Aludel Elixir v1 non-secure"
+config BOARD_ALUDEL_ELIXIR_NS
+	bool "Golioth Aludel Elixir non-secure"
 
 endif # SOC_NRF9160_SICA
diff --git a/...ds/arm/aludel_elixir_v1/Kconfig.defconfig → boards/arm/aludel_elixir/Kconfig.defconfig b/...ds/arm/aludel_elixir_v1/Kconfig.defconfig → boards/arm/aludel_elixir/Kconfig.defconfig
@@ -2,15 +2,15 @@
 # Copyright (c) 2023 Golioth, Inc.
 # SPDX-License-Identifier: Apache-2.0
 
-if BOARD_ALUDEL_ELIXIR_V1 || BOARD_ALUDEL_ELIXIR_V1_NS
+if BOARD_ALUDEL_ELIXIR || BOARD_ALUDEL_ELIXIR_NS
 
 config BOARD
-	default "aludel_elixir_v1"
+	default "aludel_elixir"
 
 # By default, if we build for a Non-Secure version of the board,
 # enable building with TF-M as the Secure Execution Environment.
 config BUILD_WITH_TFM
-	default y if BOARD_ALUDEL_ELIXIR_V1_NS
+	default y if BOARD_ALUDEL_ELIXIR_NS
 
 if BUILD_WITH_TFM
 
@@ -37,16 +37,16 @@ DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
 
 config FLASH_LOAD_SIZE
 	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
-	depends on BOARD_ALUDEL_ELIXIR_V1 && TRUSTED_EXECUTION_SECURE
+	depends on BOARD_ALUDEL_ELIXIR && TRUSTED_EXECUTION_SECURE
 
-if BOARD_ALUDEL_ELIXIR_V1_NS
+if BOARD_ALUDEL_ELIXIR_NS
 
 config FLASH_LOAD_OFFSET
 	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
 
 config FLASH_LOAD_SIZE
 	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
 
-endif # BOARD_ALUDEL_ELIXIR_V1_NS
+endif # BOARD_ALUDEL_ELIXIR_NS
 
-endif # BOARD_ALUDEL_ELIXIR_V1 || BOARD_ALUDEL_ELIXIR_V1_NS
+endif # BOARD_ALUDEL_ELIXIR || BOARD_ALUDEL_ELIXIR_NS
diff --git a/...arm/aludel_elixir_v1/aludel_elixir_v1.dts → boards/arm/aludel_elixir/aludel_elixir.dts b/...arm/aludel_elixir_v1/aludel_elixir_v1.dts → boards/arm/aludel_elixir/aludel_elixir.dts
@@ -7,7 +7,7 @@
 
 /dts-v1/;
 #include <nordic/nrf9160_sica.dtsi>
-#include "aludel_elixir_v1_common.dtsi"
+#include "aludel_elixir_common.dtsi"
 
 / {
 	chosen {

diff --git a/...rm/aludel_elixir_v1/aludel_elixir_v1.yaml → boards/arm/aludel_elixir/aludel_elixir.yaml b/...rm/aludel_elixir_v1/aludel_elixir_v1.yaml → boards/arm/aludel_elixir/aludel_elixir.yaml
@@ -1,7 +1,7 @@
 # Copyright (c) 2023 Golioth, Inc.
 # SPDX-License-Identifier: Apache-2.0
 
-identifier: aludel_elixir_v1
+identifier: aludel_elixir
 name: Golioth-Aludel-Elixir-v1
 type: mcu
 arch: arm

diff --git a/.../aludel_elixir_v1/aludel_elixir_v1_A.conf → ...ds/arm/aludel_elixir/aludel_elixir_A.conf b/.../aludel_elixir_v1/aludel_elixir_v1_A.conf → ...ds/arm/aludel_elixir/aludel_elixir_A.conf
diff --git a/...l_elixir_v1/aludel_elixir_v1_ns_B.overlay → ...arm/aludel_elixir/aludel_elixir_A.overlay b/...l_elixir_v1/aludel_elixir_v1_ns_B.overlay → ...arm/aludel_elixir/aludel_elixir_A.overlay
@@ -4,4 +4,4 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "aludel_elixir_v1_common_B.dtsi"
+#include "aludel_elixir_common_A.dtsi"
diff --git a/...udel_elixir_v1/aludel_elixir_v1_A.overlay → ...arm/aludel_elixir/aludel_elixir_B.overlay b/...udel_elixir_v1/aludel_elixir_v1_A.overlay → ...arm/aludel_elixir/aludel_elixir_B.overlay
@@ -4,4 +4,4 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "aludel_elixir_v1_common_A.dtsi"
+#include "aludel_elixir_common_B.dtsi"
diff --git a/...r_v1/aludel_elixir_v1_common-pinctrl.dtsi → ..._elixir/aludel_elixir_common-pinctrl.dtsi b/...r_v1/aludel_elixir_v1_common-pinctrl.dtsi → ..._elixir/aludel_elixir_common-pinctrl.dtsi
diff --git a/...el_elixir_v1/aludel_elixir_v1_common.dtsi → ...m/aludel_elixir/aludel_elixir_common.dtsi b/...el_elixir_v1/aludel_elixir_v1_common.dtsi → ...m/aludel_elixir/aludel_elixir_common.dtsi
@@ -5,11 +5,11 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "aludel_elixir_v1_common-pinctrl.dtsi"
+#include "aludel_elixir_common-pinctrl.dtsi"
 
 / {
-	model = "Golioth Aludel Elixir v1";
-	compatible = "golioth,aludel-elixir-v1";
+	model = "Golioth Aludel Elixir";
+	compatible = "golioth,aludel-elixir";
 
 	chosen {
 		zephyr,console = &uart0;
@@ -185,4 +185,4 @@ qwiic_i2c: &i2c2 {};
 };
 
 /* Include partition configuration file */
-#include "aludel_elixir_v1_partition_conf.dtsi"
+#include "aludel_elixir_partition_conf.dtsi"
diff --git a/...v1/aludel_elixir_v1_common_A-pinctrl.dtsi → ...lixir/aludel_elixir_common_A-pinctrl.dtsi b/...v1/aludel_elixir_v1_common_A-pinctrl.dtsi → ...lixir/aludel_elixir_common_A-pinctrl.dtsi
diff --git a/..._elixir_v1/aludel_elixir_v1_common_A.dtsi → ...aludel_elixir/aludel_elixir_common_A.dtsi b/..._elixir_v1/aludel_elixir_v1_common_A.dtsi → ...aludel_elixir/aludel_elixir_common_A.dtsi
@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "aludel_elixir_v1_common_A-pinctrl.dtsi"
+#include "aludel_elixir_common_A-pinctrl.dtsi"
 
 / {
 	mikrobus_header_1: mikrobus-connector-1 {

diff --git a/...v1/aludel_elixir_v1_common_B-pinctrl.dtsi → ...lixir/aludel_elixir_common_B-pinctrl.dtsi b/...v1/aludel_elixir_v1_common_B-pinctrl.dtsi → ...lixir/aludel_elixir_common_B-pinctrl.dtsi
diff --git a/..._elixir_v1/aludel_elixir_v1_common_B.dtsi → ...aludel_elixir/aludel_elixir_common_B.dtsi b/..._elixir_v1/aludel_elixir_v1_common_B.dtsi → ...aludel_elixir/aludel_elixir_common_B.dtsi
@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "aludel_elixir_v1_common_B-pinctrl.dtsi"
+#include "aludel_elixir_common_B-pinctrl.dtsi"
 
 / {
 	mikrobus_header_1: mikrobus-connector-1 {

diff --git a/...udel_elixir_v1/aludel_elixir_v1_defconfig → ...arm/aludel_elixir/aludel_elixir_defconfig b/...udel_elixir_v1/aludel_elixir_v1_defconfig → ...arm/aludel_elixir/aludel_elixir_defconfig
@@ -3,7 +3,7 @@
 
 CONFIG_SOC_SERIES_NRF91X=y
 CONFIG_SOC_NRF9160_SICA=y
-CONFIG_BOARD_ALUDEL_ELIXIR_V1=y
+CONFIG_BOARD_ALUDEL_ELIXIR=y
 
 # Enable MPU
 CONFIG_ARM_MPU=y

diff --git a/...l_elixir_v1/aludel_elixir_v1_mcuboot.conf → .../aludel_elixir/aludel_elixir_mcuboot.conf b/...l_elixir_v1/aludel_elixir_v1_mcuboot.conf → .../aludel_elixir/aludel_elixir_mcuboot.conf
@@ -23,11 +23,11 @@ CONFIG_SIZE_OPTIMIZATIONS=y
 # This disables the external NOR flash in mcuboot.
 #
 # On ncs >= v2.4.0, the w25q32jv node in the the devicetree for the
-# aludel_elixir_v1 board automatically enables SPI_NOR (due to
+# aludel_elixir board automatically enables SPI_NOR (due to
 # compatible = "jedec,spi-nor") which uses the SPI3 peripheral.
 #
 # Some reference designs (such as the CAN Asset Tracker) remap the SPI3
-# peripheral to the Click headers on the the aludel_elixir_v1 board.
+# peripheral to the Click headers on the the aludel_elixir board.
 # If CONFIG_SPI_NOR is enabled, it breaks the SPI3 functionality in the app.
 #
 # Since we're not currently using the external NOR flash in mcuboot, we'll

diff --git a/.../aludel_elixir_v1/aludel_elixir_v1_ns.dts → ...ds/arm/aludel_elixir/aludel_elixir_ns.dts b/.../aludel_elixir_v1/aludel_elixir_v1_ns.dts → ...ds/arm/aludel_elixir/aludel_elixir_ns.dts
@@ -7,7 +7,7 @@
 
 /dts-v1/;
 #include <nordic/nrf9160ns_sica.dtsi>
-#include "aludel_elixir_v1_common.dtsi"
+#include "aludel_elixir_common.dtsi"
 
 / {
 	chosen {

diff --git a/...udel_elixir_v1/aludel_elixir_v1_ns_A.conf → ...arm/aludel_elixir/aludel_elixir_ns_A.conf b/...udel_elixir_v1/aludel_elixir_v1_ns_A.conf → ...arm/aludel_elixir/aludel_elixir_ns_A.conf
diff --git a/...udel_elixir_v1/aludel_elixir_v1_B.overlay → .../aludel_elixir/aludel_elixir_ns_A.overlay b/...udel_elixir_v1/aludel_elixir_v1_B.overlay → .../aludel_elixir/aludel_elixir_ns_A.overlay
@@ -4,4 +4,4 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "aludel_elixir_v1_common_B.dtsi"
+#include "aludel_elixir_common_A.dtsi"
diff --git a/...l_elixir_v1/aludel_elixir_v1_ns_A.overlay → .../aludel_elixir/aludel_elixir_ns_B.overlay b/...l_elixir_v1/aludel_elixir_v1_ns_A.overlay → .../aludel_elixir/aludel_elixir_ns_B.overlay
@@ -4,4 +4,4 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "aludel_elixir_v1_common_A.dtsi"
+#include "aludel_elixir_common_B.dtsi"
diff --git a/...l_elixir_v1/aludel_elixir_v1_ns_defconfig → .../aludel_elixir/aludel_elixir_ns_defconfig b/...l_elixir_v1/aludel_elixir_v1_ns_defconfig → .../aludel_elixir/aludel_elixir_ns_defconfig
@@ -3,7 +3,7 @@
 
 CONFIG_SOC_SERIES_NRF91X=y
 CONFIG_SOC_NRF9160_SICA=y
-CONFIG_BOARD_ALUDEL_ELIXIR_V1_NS=y
+CONFIG_BOARD_ALUDEL_ELIXIR_NS=y
 
 # Enable MPU
 CONFIG_ARM_MPU=y

diff --git a/...r_v1/aludel_elixir_v1_partition_conf.dtsi → ..._elixir/aludel_elixir_partition_conf.dtsi b/...r_v1/aludel_elixir_v1_partition_conf.dtsi → ..._elixir/aludel_elixir_partition_conf.dtsi
@@ -6,24 +6,24 @@
  */
 
 /*
- * Default Flash planning for aludel_elixir_v1.
+ * Default Flash planning for aludel_elixir.
  *
  * Zephyr build for nRF9160 with ARM TrustZone-M support,
- * implies building Secure and Non-Secure Zephyr images.
- *
- * Secure image will be placed, by default, in flash0
- * (or in slot0, if MCUboot is present).
- * Secure image will use sram0 for system memory.
- *
- * Non-Secure image will be placed in slot0_ns, and use
- * sram0_ns for system memory.
- *
- * Note that the Secure image only requires knowledge of
- * the beginning of the Non-Secure image (not its size).
- */
-
-&slot0_partition {
-	reg = <0x00010000 0x40000>;
+  * implies building Secure and Non-Secure Zephyr images.
+  *
+  * Secure image will be placed, by default, in flash0
+  * (or in slot0, if MCUboot is present).
+  * Secure image will use sram0 for system memory.
+  *
+  * Non-Secure image will be placed in slot0_ns, and use
+  * sram0_ns for system memory.
+  *
+  * Note that the Secure image only requires knowledge of
+  * the beginning of the Non-Secure image (not its size).
+  */
+
+ &slot0_partition {
+	 reg = <0x00010000 0x40000>;
 };
 
 &slot0_ns_partition {

diff --git a/boards/arm/aludel_elixir_v1/board.cmake → boards/arm/aludel_elixir/board.cmake b/boards/arm/aludel_elixir_v1/board.cmake → boards/arm/aludel_elixir/board.cmake
@@ -2,7 +2,7 @@
 # Copyright (c) 2023 Golioth, Inc.
 # SPDX-License-Identifier: Apache-2.0
 
-if(CONFIG_BOARD_ALUDEL_ELIXIR_V1_NS)
+if(CONFIG_BOARD_ALUDEL_ELIXIR_NS)
   set(TFM_PUBLIC_KEY_FORMAT "full")
 endif()
 

diff --git a/...s/arm/aludel_elixir_v1/pre_dt_board.cmake → boards/arm/aludel_elixir/pre_dt_board.cmake b/...s/arm/aludel_elixir_v1/pre_dt_board.cmake → boards/arm/aludel_elixir/pre_dt_board.cmake
diff --git a/boards/arm/aludel_elixir_v1/revision.cmake → boards/arm/aludel_elixir/revision.cmake b/boards/arm/aludel_elixir_v1/revision.cmake → boards/arm/aludel_elixir/revision.cmake