ARC: Accommodate AUX register accessors of MetaWare's ccac compiler

ARC proprietary MetaWare ccac compiler uses its own built-ins, and so
we need to respect them.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

libgloss/arc/arc-specific.h

@@ -0,0 +1,30 @@
+/*
+ * arc-specific.h -- provide ARC-specific definitions
+ *
+ * Copyright (c) 2023 Synopsys Inc.
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ */
+
+#ifndef _ARC_SPECIFIC_H
+#define _ARC_SPECIFIC_H
+
+#ifdef __CCAC__
+#define read_aux_reg(r)		_lr(r)
+#define write_aux_reg(r, v)	_sr((unsigned int)(v), r)
+#else
+#define read_aux_reg(r)		__builtin_arc_lr(r)
+/* gcc builtin sr needs reg param to be long immediate */
+#define write_aux_reg(r, v)	__builtin_arc_sr((unsigned int)(v), r)
+#endif
+
+#endif /* _ARC_SPECIFIC_H */

libgloss/arc/arc-timer.c

@@ -15,6 +15,8 @@
  *
  */
 
+#include "arc-specific.h"
+
 #define ARC_TIM_BUILD		0x75
 #define ARC_TIM_BUILD_VER_MASK	0x00FF
 #define ARC_TIM_BUILD_TIM0_FL	0x0100
@@ -37,7 +39,7 @@ const unsigned int arc_timer_default = 0;
 static int
 _arc_timer_present (unsigned int tim)
 {
-  unsigned int bcr = __builtin_arc_lr (ARC_TIM_BUILD);
+  unsigned int bcr = read_aux_reg (ARC_TIM_BUILD);
   unsigned int ver = bcr & ARC_TIM_BUILD_VER_MASK;
 
   if (ver == 0)
@@ -59,9 +61,9 @@ _arc_timer_read (unsigned int tim)
   if (_arc_timer_present (tim))
     {
       if (tim == 0)
-	return __builtin_arc_lr (ARC_TIM_COUNT0);
+	return read_aux_reg (ARC_TIM_COUNT0);
       else if (tim == 1)
-	return __builtin_arc_lr (ARC_TIM_COUNT1);
+	return read_aux_reg (ARC_TIM_COUNT1);
     }
 
   return 0;
@@ -95,14 +97,14 @@ _arc_timer_reset (unsigned int tim)
 	  return;
 	}
 
-      ctrl = __builtin_arc_lr (tim_control);
+      ctrl = read_aux_reg (tim_control);
       /* Disable timer interrupt when programming.  */
-      __builtin_arc_sr (0, tim_control);
+      write_aux_reg (0, tim_control);
       /* Default limit is 24-bit, increase it to 32-bit.  */
-      __builtin_arc_sr (0xFFFFFFFF, tim_limit);
+      write_aux_reg (0xFFFFFFFF, tim_limit);
       /* Set NH bit to count only when processor is running.  */
-      __builtin_arc_sr (ctrl | ARC_TIM_CONTROL_NH_FL, tim_control);
-      __builtin_arc_sr (0, tim_count);
+      write_aux_reg (ctrl | ARC_TIM_CONTROL_NH_FL, tim_control);
+      write_aux_reg (0, tim_count);
     }
 }
 

libgloss/arc/emsk-uart-setup.c

@@ -15,14 +15,15 @@
  *
  */
 
+#include "arc-specific.h"
 #include "uart-8250.h"
 
 /* Setup UART parameters.  */
 int
 _setup_low_level (void)
 {
   const uint32_t aux_dmp_per = 0x20a;
-  void * const uart_base = (char *)__builtin_arc_lr(aux_dmp_per) + 0x00009000;
+  void * const uart_base = (char *)read_aux_reg(aux_dmp_per) + 0x00009000;
   const int uart_aux_mapped = 0;
   const uint32_t uart_clock = 50000000;
   const uint32_t uart_baud = 115200;

libgloss/arc/iotdk-uart-setup.c

@@ -15,6 +15,7 @@
  *
  */
 
+#include "arc-specific.h"
 #include "uart-8250.h"
 
 /* Setup UART parameters.  */
@@ -28,7 +29,7 @@ _setup_low_level (void)
   const uint32_t uart_baud = 115200;
 
   /* For this platform we have to enable UART clock before configuring it.   */
-  __builtin_arc_sr (0x01, (uint32_t) uart_base + uart_clk_ena);
+  write_aux_reg (0x01, (uint32_t) uart_base + uart_clk_ena);
 
   _uart_8250_setup (uart_base, uart_aux_mapped, uart_clock, uart_baud);
 

libgloss/arc/uart-8250.c

@@ -22,6 +22,8 @@
 #include <stdio.h>
 #include <errno.h>
 
+#include "arc-specific.h"
+
 /* Transmit Holding Register.  WO, LCR_DLAB == 0.  */
 #define	THR		0x00
 /* Receive Buffer Register.  RO, LCR_DLAB == 0.  */
@@ -118,7 +120,7 @@ _uart_8250_write_reg (const struct _uart_8250 *uart, uint32_t reg,
 		      uint32_t value)
 {
   if (uart->aux_mapped)
-    __builtin_arc_sr (value, (uint32_t) uart->base + reg);
+    write_aux_reg (value, (uint32_t) uart->base + reg);
   else
     *(volatile uint32_t *)(uart->base + reg) = value;
 }
@@ -128,7 +130,7 @@ static inline uint32_t
 _uart_8250_read_reg (const struct _uart_8250 *uart, uint32_t reg)
 {
   if (uart->aux_mapped)
-    return __builtin_arc_lr ((uint32_t) uart->base + reg);
+    return read_aux_reg ((uint32_t) uart->base + reg);
   else
     return *(volatile uint32_t *)(uart->base + reg);
 }