Skip to content

Commit

Permalink
arm64: implement AES-CTR in assembly
Browse files Browse the repository at this point in the history
Signed-off-by: Eric Lagergren <eric@ericlagergren.com>
  • Loading branch information
ericlagergren committed Apr 18, 2022
1 parent d0bf8db commit 0a3d662
Show file tree
Hide file tree
Showing 9 changed files with 709 additions and 30 deletions.
14 changes: 1 addition & 13 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -16,19 +16,7 @@ go get github.com/ericlagergren/siv@latest

## Performance

The performance of HCTR2 is determined by two things: AES-CTR and
POLYVAL. This module provides ARMv8 and x86-64 assembly AES-CTR
implementations and uses a hardware-accelerated POLYVAL
implementation (see [github.com/ericlagergren/polyval](https://pkg.go.dev/github.com/ericlagergren/polyval)).

The ARMv8 assembly implementation of AES-CTR-256 with
hardware-accelerated POLYVAL runs at about X cycle per byte.

The x86-64 assembly implementation of AES-CTR-256 with
hardware-accelerated POLYVAL runs at about X cycles per byte.

The `crypto/aes` implementation of AES-CTR-256 with
hardware-accelerated POLYVAL runs at about X cycles per byte.
TBD

## Security

Expand Down
File renamed without changes.
File renamed without changes.
Loading

0 comments on commit 0a3d662

Please sign in to comment.