userclk: separate device independent from Agilex 7 configuration #3159
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
|
How does this PR differ from #3158? Would it be possible to split this up into two commits, one commit with the extraction of existing code into a new file only, and a second commit that adds the more rigorous check? |
michael-adler
force-pushed
the
mcadler/uclk_cleanup
branch
4 times, most recently
from
14bc09c to
6363b01
Compare
Pull Request Test Coverage Report for Build 13189270128Details
💛 - Coveralls |
The user clock frequency configuration protocol varies across devices. Move the Agilex 7 and Stratix 10 configuration sequences out of fpga_user_clk.c and into a new protocol-specific file. Signed-off-by: Michael Adler <michael.adler@altera.com>
michael-adler
force-pushed
the
mcadler/uclk_cleanup
branch
from
6363b01 to
4578c43
Compare
pcolberg
approved these changes
Feb 7, 2025
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
The user clock frequency configuration protocol varies across devices. Move the Agilex 7 and Stratix 10 configuration sequences out of fpga_user_clk.c and into a new protocol-specific file.
There is almost no new logic here -- just cleanup before adding a new module to manage the Agilex 5 sequence. The only significant functional change in the PR is addition of a more rigorous check that the FPGA family is supported by the configuration tables.
Checked on Agilex 7 HW.