Reuse marble_features.yaml from test_marble_family

projects/cmoc_top/marblemini/Makefile

@@ -52,7 +52,7 @@ $(APP_NAME)_regmap.json: $(AUTOGEN_DIR)/regmap_cryomodule.json $(OSCOPE_COMMON_D
 	$(PYTHON) $(OSCOPE_COMMON_DIR)/shorten_names.py -o $@ -i $(APP_NAME)_regmap_long.json
 
 # actual file output is marble_features_(defs/params).vh
-marble_features_defs.vh marble_features_params.vh: $(BUILD_DIR)/gen_features.py marble_features.yaml
+marble_features_defs.vh marble_features_params.vh: $(BUILD_DIR)/gen_features.py $(TEST_MARBLE_FAMILY)/marble_features.yaml
 	$(PYTHON) $< -i $(filter %.yaml, $^) -c $(HARDWARE) --split
 
 include $(BUILD_DIR)/bottom_rules.mk

projects/test_marble_family/Makefile

@@ -66,10 +66,10 @@ config_romx.v: marble_regmap.json $(filter-out config_romx.v, $(MARBLE_SYNTH_SOU
 # gen_features.py rules (note the use of PHONY targets)
 # actual file outputs are marble_features_params.vh and marble_features_defs.vh
 marble1_features: $(BUILD_DIR)/gen_features.py marble_features.yaml
-	$(PYTHON) $< -i $(filter %.yaml, $^) -c marble_mini --split
+	$(PYTHON) $< -i $(filter %.yaml, $^) -c marblemini --split
 
 marble2_features: $(BUILD_DIR)/gen_features.py marble_features.yaml
-	$(PYTHON) $< -i $(filter %.yaml, $^) -c marble_v2 --split
+	$(PYTHON) $< -i $(filter %.yaml, $^) -c marble --split
 .PHONY: marble1_features marble2_features
 
 # ====

projects/test_marble_family/marble_features.yaml

@@ -1,7 +1,7 @@
 # Defs are made available as Verilog defines
 # Params are made available as Verilog localparams and included in ROM metadata
 
-marble_mini:
+marblemini:
     defs:
         MARBLE_MINI: 1
         USE_SI570: 0
@@ -18,7 +18,7 @@ marble_mini:
         # sys_clk is only usable if use_rgmii_idelay: 0
         sysclk_src: "gtp_ref_clk"
 
-marble_v2:
+marble:
     defs:
         MARBLE_V2: 1
         USE_SI570: 1