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Hardware implementation of the protocol for ROS2

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AXE-jp/ros2rapper

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ros2rapper

ROS2 communicating protocol hardware IP for FPGA/ASIC

Prerequisites

ROS2rapper is mainly written in C++ and supports following high-level synthesis softwares.

  • AMD Vitis HLS 2023.2
  • NEC CyberWorkBench 10.1

Try

There are example projects under examples directory.

License

ROS2rapper is licensed under the GNU General Public License v3.0 or later.

This repository contains files from alexforencich/verilog-ethernet. They are licensed under the MIT license.

See file header for license information.