psram_controller.gprj

<?xml version="1" encoding="UTF-8"?>
<!DOCTYPE gowin-fpga-project>
<Project>
    <Template>FPGA</Template>
    <Version>5</Version>
    <Device name="GW1NR-9C" pn="GW1NR-LV9QN88PC6/I5">gw1nr9c-004</Device>
    <FileList>
        <File path="src/gowin_rpll/gowin_rpll.v" type="file.verilog" enable="1"/>
        <File path="src/psram_controller.v" type="file.verilog" enable="1"/>
        <File path="src/psram_test_top.v" type="file.verilog" enable="1"/>
        <File path="src/uart_tx.v" type="file.verilog" enable="1"/>
        <File path="src/tang9k.cst" type="file.cst" enable="1"/>
        <File path="src/psram_controller.gao" type="file.gao" enable="0"/>
    </FileList>
</Project>