boards: st: add initial support for the stm32h757i eval board

boards/shields/st_b_lcd40_dsi1_mb1166/boards/st_b_lcd40_dsi1_mb1166/stm32h757i_eval_stm32h757xx_m7.conf

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 bytes at work AG
+# Copyright (c) 2024 Erik Andersson <erian747@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+# Initialize after LTDC and MIPI-DSI
+CONFIG_DISPLAY_OTM8009A_INIT_PRIORITY=87

boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h757i_eval_stm32h757xx_m7.conf

@@ -0,0 +1,10 @@
+# Copyright (c) 2023 bytes at work AG
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_MEMC=y
+CONFIG_STM32_LTDC_ARGB8888=y
+CONFIG_HEAP_MEM_POOL_SIZE=65536
+CONFIG_MAIN_STACK_SIZE=4096
+
+CONFIG_INPUT_FT5336=y
+CONFIG_LV_Z_POINTER_INPUT=y

boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h757i_eval_stm32h757xx_m7.defconfig

@@ -0,0 +1,21 @@
+# Copyright (c) 2024 Linumiz
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_STM32H757I_EVAL_STM32H757XX_M7
+if LVGL
+
+# Double frame buffer maintained by lvgl.
+config STM32_LTDC_FB_NUM
+	default 0
+
+config LV_Z_DOUBLE_VDB
+	default y
+
+config LV_Z_VDB_CUSTOM_SECTION
+	default y
+
+config LV_Z_FULL_REFRESH
+	default y
+
+endif #LVGL
+endif # BOARD_STM32H757I_EVAL_STM32H757XX_M7

boards/shields/st_b_lcd40_dsi1_mb1166/boards/stm32h757i_eval_stm32h757xx_m7.overlay

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2023 bytes at work AG
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&sdram2 {
+	/* Frame buffer memory when cached causes screen flickering. */
+	zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
+};
+
+&zephyr_lcd_controller {
+	status = "okay";
+	ext-sdram = <&sdram2>;
+	def-back-color-red = <0>;
+	def-back-color-green = <0>;
+	def-back-color-blue = <0>;
+};
+
+/* ltdc uses pll3_r as pixel clock */
+&pll3 {
+	status = "okay";
+	clocks = <&clk_hse>;
+	div-m = <5>;
+	mul-n = <132>;
+	div-p = <2>;
+	div-q = <2>;
+	div-r = <24>; /* 27.5 MHz */
+};
+
+&zephyr_mipi_dsi {
+	status = "okay";
+
+	/* DSI HOST dedicated PLL
+	 * F_VCO = CLK_IN / pll-idf * 2 * pll-ndiv
+	 * PHI = F_VCO / 2 / (1 << pll-odf) = lane_byte_clk
+	 *     = 25 MHz / 5 * 2 * 100 / 2 / (1<<0) / 8 = 62.5 MHz
+	 */
+	pll-ndiv = <100>;
+	pll-idf = <5>;
+	pll-odf = <0>;
+
+	vs-active-high;
+	hs-active-high;
+	de-active-high;
+};

boards/st/stm32h757i_eval/CMakeLists.txt

@@ -0,0 +1,9 @@
+#
+# Copyright 2023 BrainCo Inc.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+# Add custom linker section to relocate framebuffers to PSRAM
+zephyr_linker_sources_ifdef(CONFIG_LV_Z_VDB_CUSTOM_SECTION
+  SECTIONS dc_ram.ld)

boards/st/stm32h757i_eval/Kconfig.defconfig

@@ -0,0 +1,18 @@
+# STM32H757I EVAL board configuration
+
+# Copyright (c) 2019 Linaro Limited
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_STM32H757I_EVAL
+
+if NETWORKING
+
+config NET_L2_ETHERNET
+	default y
+
+endif # NETWORKING
+
+config DISK_DRIVER_SDMMC
+	default y if DISK_DRIVERS
+
+endif # BOARD_STM32H757I_EVAL

boards/st/stm32h757i_eval/Kconfig.stm32h757i_eval

@@ -0,0 +1,8 @@
+# STM32H757I EVAL board configuration
+
+# Copyright (c) 2019 Linaro Limited
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_STM32H757I_EVAL
+	select SOC_STM32H757XX_M7 if BOARD_STM32H757I_EVAL_STM32H757XX_M7
+	select SOC_STM32H757XX_M4 if BOARD_STM32H757I_EVAL_STM32H757XX_M4

boards/st/stm32h757i_eval/board.cmake

@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright (c) 2019 STMicroelectronics
+
+# keep first
+if(CONFIG_STM32_MEMMAP)
+board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
+# not supported for STM32H757I-EVAL (?)
+#board_runner_args(stm32cubeprogrammer "--extload=MT25TL01G_STM32H757I-EVAL.stldr")
+else()
+board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
+endif()
+
+if(CONFIG_BOARD_STM32H757I_EVAL_STM32H757XX_M7)
+  board_runner_args(jlink "--device=STM32H757XI")
+  board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd_stm32h757i_eval_m7.cfg")
+  board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
+elseif(CONFIG_BOARD_STM32H757I_EVAL_STM32H757XX_M4)
+  board_runner_args(jlink "--device=STM32H757XI_M4")
+  board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd_stm32h757i_eval_m4.cfg")
+  board_runner_args(openocd --target-handle=_CHIPNAME.cpu1)
+endif()
+
+# keep first
+include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/st/stm32h757i_eval/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: stm32h757i_eval
+  full_name: STM32H757I Eval
+  vendor: st
+  socs:
+    - name: stm32h757xx

boards/st/stm32h757i_eval/dc_ram.ld

@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2023 BrainCo Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram2), okay)
+GROUP_START(SDRAM2)
+
+	SECTION_PROLOGUE(_STM32_SDRAM2_SECTION_NAME, (NOLOAD),)
+	{
+		*(.lvgl_buf)
+	} GROUP_LINK_IN(SDRAM2)
+
+GROUP_END(SDRAM2)
+#endif