hwmv2: Native targets covert to HW model v2

boards/boards_legacy/posix/nrf_bsim/CMakeLists.txt → boards/native/nrf_bsim/CMakeLists.txt

@@ -73,7 +73,7 @@ set_property(TARGET native_simulator APPEND PROPERTY RUNNER_LINK_LIBRARIES
 target_compile_options(native_simulator INTERFACE
                        "-DNSI_PRIMARY_MCU_N=${CONFIG_NATIVE_SIMULATOR_PRIMARY_MCU_INDEX}")
 
-add_subdirectory(${ZEPHYR_BASE}/boards/boards_legacy/${ARCH}/common/extra_args/
+add_subdirectory(${ZEPHYR_BASE}/boards/native/common/extra_args/
 	${CMAKE_CURRENT_BINARY_DIR}/extra_args
 )
 

boards/boards_legacy/posix/nrf_bsim/Kconfig → boards/native/nrf_bsim/Kconfig

@@ -1,5 +1,40 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+config BOARD_NRF52_BSIM
+	bool
+	select SOC_SERIES_BSIM_NRF52X
+	select SOC_COMPATIBLE_NRF52833
+	select NRF_RTC_TIMER
+	select CLOCK_CONTROL
+	help
+	  NRF52 simulation model
+	  Will produce a console Linux process which can be executed natively.
+	  It needs the BabbleSim simulator both in compile time and to execute
+
+config BOARD_NRF5340BSIM_NRF5340_CPUNET
+	bool
+	select SOC_SERIES_BSIM_NRF53X
+	select SOC_COMPATIBLE_NRF5340_CPUNET
+	select NRF_RTC_TIMER
+	select CLOCK_CONTROL
+	help
+	  Simulated NRF53 Network core
+	  Will produce a console Linux process which can be executed natively.
+	  It needs the BabbleSim simulator both in compile time and to execute
+
+config BOARD_NRF5340BSIM_NRF5340_CPUAPP
+	bool
+	select SOC_SERIES_BSIM_NRF53X
+	select SOC_COMPATIBLE_NRF5340_CPUAPP
+	select NRF_RTC_TIMER
+	select CLOCK_CONTROL
+	help
+	  Simulated NRF53 Application core
+	  Will produce a console Linux process which can be executed natively.
+	  It needs the BabbleSim simulator both in compile time and to execute
+
+
 if SOC_SERIES_BSIM_NRFXX
 
 # The following file is normally parsed only for the ARM architecture, which is
@@ -8,7 +43,7 @@ if SOC_SERIES_BSIM_NRFXX
 # must be read also from here.
 source "soc/nordic_nrf/common/Kconfig.peripherals"
 
-source "boards/boards_legacy/$(ARCH)/common/extra_args/Kconfig"
+source "boards/native/common/extra_args/Kconfig"
 
 endif # SOC_SERIES_BSIM_NRFXX
 

boards/native/nrf_bsim/Kconfig.nrf52_bsim

@@ -0,0 +1,5 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_NRF52_BSIM
+	select SOC_POSIX

boards/native/nrf_bsim/Kconfig.nrf5340bsim_nrf5340_cpuapp

@@ -0,0 +1,5 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_NRF5340BSIM_NRF5340_CPUAPP
+	select SOC_POSIX

boards/native/nrf_bsim/Kconfig.nrf5340bsim_nrf5340_cpunet

@@ -0,0 +1,5 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_NRF5340BSIM_NRF5340_CPUNET
+	select SOC_POSIX

boards/native/nrf_bsim/board.yml

@@ -0,0 +1,13 @@
+boards:
+- name: nrf52_bsim
+  vendor: Zephyr
+  socs:
+  - name: native
+- name: nrf5340bsim_nrf5340_cpuapp
+  vendor: Zephyr
+  socs:
+  - name: native
+- name: nrf5340bsim_nrf5340_cpunet
+  vendor: Zephyr
+  socs:
+  - name: native

boards/boards_legacy/posix/nrf_bsim/nrf52_bsim.dts → boards/native/nrf_bsim/nrf52_bsim.dts

@@ -10,7 +10,7 @@
 #include <mem.h>
 #include <arm/nordic/nrf52833.dtsi>
 /* We resuse the pinctrl definitions directly from the real board : */
-#include <../boards/boards_legacy/arm/nrf52833dk_nrf52833/nrf52833dk_nrf52833-pinctrl.dtsi>
+#include <../boards/nordic_nrf/nrf52833dk/nrf52833dk_nrf52833-pinctrl.dtsi>
 
 / {
 	model = "nrf52 bsim";

boards/boards_legacy/posix/nrf_bsim/nrf52_bsim_defconfig → boards/native/nrf_bsim/nrf52_bsim_defconfig

@@ -1,7 +1,6 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SOC_POSIX=y
-CONFIG_BOARD_NRF52_BSIM=y
 CONFIG_CONSOLE=y
 CONFIG_NO_OPTIMIZATIONS=y
 CONFIG_LOG_BACKEND_UART=n

boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.dts → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.dts

@@ -115,4 +115,4 @@
 /* We re-use the IPC shared buffer definition from the real HW. But note the start address of the
  * buffer won't be used.
  */
-#include <../boards/board_legacy/arm/nrf5340dk_nrf5340/nrf5340_shared_sram_planning_conf.dtsi>
+#include <../boards/nordic_nrf/nrf5340dk/nrf5340_shared_sram_planning_conf.dtsi>

boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpuapp_defconfig → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp_defconfig

@@ -1,6 +1,4 @@
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SOC_POSIX=y
-CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUAPP=y
 CONFIG_CONSOLE=y
 CONFIG_NO_OPTIMIZATIONS=y

boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpunet.dts → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.dts

@@ -77,4 +77,4 @@
 /* We re-use the IPC shared buffer definition from the real HW. But note the start address of the
  * buffer won't be used.
  */
-#include <../boards/boards_legacy/arm/nrf5340dk_nrf5340/nrf5340_shared_sram_planning_conf.dtsi>
+#include <../boards/nordic_nrf/nrf5340dk/nrf5340_shared_sram_planning_conf.dtsi>

boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpunet_defconfig → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet_defconfig

@@ -1,6 +1,4 @@
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SOC_POSIX=y
-CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUNET=y
 CONFIG_CONSOLE=y
 CONFIG_NO_OPTIMIZATIONS=y