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[VCS] Xilinx glbl is mandatory for all modules using Xilinx primitive…

pgardratzamapushed 1 commit to zama • 3955e8a…37bf661 • 
on Jan 16

VCS: use tee to dump the analysis & build log in vcs_build.log, renam…

pgardratzamapushed 1 commit to zama • 00a39f7…3955e8a • 
on Oct 2, 2024

property STEPS.WRITE_BITSTREAM.ARGS.BIN_FILE does not exist in Versal…

pgardratzamapushed 1 commit to zama • 1e17a9b…00a39f7 • 
on Sep 12, 2024

Questa: parameters set at vopt time do not need (and cannot) to be re…

pgardratzamapushed 2 commits to zama • 9b70a04…1e17a9b • 
on Sep 5, 2024

Questa: use -G instead of -g on parameters and only for tb as adviced…

pgardratzamapushed 1 commit to zama • 5c846a6…9b70a04 • 
on Aug 9, 2024

VCS: pass parameters from edalize to vcs compilation of tb

pgardratzamapushed 1 commit to zama • d820fc6…5c846a6 • 
on Aug 9, 2024

VCS 3-step flow using vlogan or vhdlan in 1st step, vcs for compilati…

pgardratzamapushed 1 commit to zama • 4cac245…d820fc6 • 
on Aug 9, 2024

VCS: allow possibility to define a part of the run cmd that is placed…

pgardratzamapushed 1 commit to zama • 1aeb963…4cac245 • 
on Jul 17, 2024

initial work to enable questa usage during evaluation and especially …

pgardratzamapushed 1 commit to zama • e913b2e…1aeb963 • 
on Jul 10, 2024

[TB] adding library unisim for microblaze simulation

lsainatipushed 1 commit to zama • f6c5f78…e913b2e • 
on Nov 3, 2023

[Flow] adding timescale precision for elaboration

lsainatipushed 1 commit to zama • c259b18…f6c5f78 • 
on Jul 28, 2023

[FLOW] adding glbl file for simulation and linking up xpm library for…

lsainatipushed 1 commit to zama • 771d289…c259b18 • 
on Jul 26, 2023