diff --git a/src/can/clc.rs b/src/can/clc.rs
index e6403ee5..eca25dd4 100644
--- a/src/can/clc.rs
+++ b/src/can/clc.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Module Disable Request Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn disr(&mut self) -> DISR_W<CLC_SPEC> {
         DISR_W::new(self, 0)
     }
     #[doc = "Bit 3 - Sleep Mode Enable Control"]
     #[inline(always)]
-    #[must_use]
     pub fn edis(&mut self) -> EDIS_W<CLC_SPEC> {
         EDIS_W::new(self, 3)
     }
     #[doc = "Bit 4 - Module Suspend Bit Write Enable for OCDS"]
     #[inline(always)]
-    #[must_use]
     pub fn sbwe(&mut self) -> SBWE_W<CLC_SPEC> {
         SBWE_W::new(self, 4)
     }
diff --git a/src/can/fdr.rs b/src/can/fdr.rs
index dca278d6..c38a4ee7 100644
--- a/src/can/fdr.rs
+++ b/src/can/fdr.rs
@@ -82,37 +82,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:9 - Step Value"]
     #[inline(always)]
-    #[must_use]
     pub fn step(&mut self) -> STEP_W<FDR_SPEC> {
         STEP_W::new(self, 0)
     }
     #[doc = "Bit 11 - Suspend Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn sm(&mut self) -> SM_W<FDR_SPEC> {
         SM_W::new(self, 11)
     }
     #[doc = "Bits 12:13 - Suspend Control"]
     #[inline(always)]
-    #[must_use]
     pub fn sc(&mut self) -> SC_W<FDR_SPEC> {
         SC_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Divider Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn dm(&mut self) -> DM_W<FDR_SPEC> {
         DM_W::new(self, 14)
     }
     #[doc = "Bit 30 - Enable Hardware Clock Control"]
     #[inline(always)]
-    #[must_use]
     pub fn enhw(&mut self) -> ENHW_W<FDR_SPEC> {
         ENHW_W::new(self, 30)
     }
     #[doc = "Bit 31 - Disable Clock"]
     #[inline(always)]
-    #[must_use]
     pub fn disclk(&mut self) -> DISCLK_W<FDR_SPEC> {
         DISCLK_W::new(self, 31)
     }
diff --git a/src/can/mcr.rs b/src/can/mcr.rs
index 7e0876b5..56ee12db 100644
--- a/src/can/mcr.rs
+++ b/src/can/mcr.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 12:15 - Message Pending Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn mpsel(&mut self) -> MPSEL_W<MCR_SPEC> {
         MPSEL_W::new(self, 12)
     }
diff --git a/src/can/mitr.rs b/src/can/mitr.rs
index a93d4063..3a2db121 100644
--- a/src/can/mitr.rs
+++ b/src/can/mitr.rs
@@ -5,7 +5,6 @@ pub type IT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
 impl W {
     #[doc = "Bits 0:7 - Interrupt Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn it(&mut self) -> IT_W<MITR_SPEC> {
         IT_W::new(self, 0)
     }
diff --git a/src/can/msimask.rs b/src/can/msimask.rs
index c2af20c6..fe233299 100644
--- a/src/can/msimask.rs
+++ b/src/can/msimask.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Message Index Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn im(&mut self) -> IM_W<MSIMASK_SPEC> {
         IM_W::new(self, 0)
     }
diff --git a/src/can/mspnd.rs b/src/can/mspnd.rs
index 242d26f3..ec6a5272 100644
--- a/src/can/mspnd.rs
+++ b/src/can/mspnd.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Message Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn pnd(&mut self) -> PND_W<MSPND_SPEC> {
         PND_W::new(self, 0)
     }
diff --git a/src/can/panctr.rs b/src/can/panctr.rs
index eb80f6eb..2dc229e0 100644
--- a/src/can/panctr.rs
+++ b/src/can/panctr.rs
@@ -116,19 +116,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Panel Command"]
     #[inline(always)]
-    #[must_use]
     pub fn pancmd(&mut self) -> PANCMD_W<PANCTR_SPEC> {
         PANCMD_W::new(self, 0)
     }
     #[doc = "Bits 16:23 - Panel Argument 1"]
     #[inline(always)]
-    #[must_use]
     pub fn panar1(&mut self) -> PANAR1_W<PANCTR_SPEC> {
         PANAR1_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Panel Argument 2"]
     #[inline(always)]
-    #[must_use]
     pub fn panar2(&mut self) -> PANAR2_W<PANCTR_SPEC> {
         PANAR2_W::new(self, 24)
     }
diff --git a/src/can_mo0.rs b/src/can_mo0.rs
index 4da07b08..71ccc5ce 100644
--- a/src/can_mo0.rs
+++ b/src/can_mo0.rs
@@ -49,12 +49,12 @@ impl RegisterBlock {
     #[doc = "0x1c - Message Object Status Register"]
     #[inline(always)]
     pub const fn mostat(&self) -> &MOSTAT {
-        unsafe { &*(self as *const Self).cast::<u8>().add(28).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(28).cast() }
     }
     #[doc = "0x1c - Message Object Control Register"]
     #[inline(always)]
     pub const fn moctr(&self) -> &MOCTR {
-        unsafe { &*(self as *const Self).cast::<u8>().add(28).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(28).cast() }
     }
 }
 #[doc = "MOFCR (rw) register accessor: Message Object Function Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mofcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mofcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofcr`]
diff --git a/src/can_mo0/moamr.rs b/src/can_mo0/moamr.rs
index 6f86bc6d..b1917386 100644
--- a/src/can_mo0/moamr.rs
+++ b/src/can_mo0/moamr.rs
@@ -74,13 +74,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:28 - Acceptance Mask for Message Identifier"]
     #[inline(always)]
-    #[must_use]
     pub fn am(&mut self) -> AM_W<MOAMR_SPEC> {
         AM_W::new(self, 0)
     }
     #[doc = "Bit 29 - Acceptance Mask Bit for Message IDE Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn mide(&mut self) -> MIDE_W<MOAMR_SPEC> {
         MIDE_W::new(self, 29)
     }
diff --git a/src/can_mo0/moar.rs b/src/can_mo0/moar.rs
index 57d2db69..d380fb72 100644
--- a/src/can_mo0/moar.rs
+++ b/src/can_mo0/moar.rs
@@ -65,7 +65,7 @@ where
 pub enum PRI_A {
     #[doc = "0: Applicable only if TTCAN is available."]
     VALUE1 = 0,
-    #[doc = "1: Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL &amp; TXEN0 &amp; TXEN1 = 1) somewhere before this object in the list."]
+    #[doc = "1: Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."]
     VALUE2 = 1,
     #[doc = "2: Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see )."]
     VALUE3 = 2,
@@ -101,7 +101,7 @@ impl PRI_R {
     pub fn is_value1(&self) -> bool {
         *self == PRI_A::VALUE1
     }
-    #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL &amp; TXEN0 &amp; TXEN1 = 1) somewhere before this object in the list."]
+    #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."]
     #[inline(always)]
     pub fn is_value2(&self) -> bool {
         *self == PRI_A::VALUE2
@@ -129,7 +129,7 @@ where
     pub fn value1(self) -> &'a mut crate::W<REG> {
         self.variant(PRI_A::VALUE1)
     }
-    #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL &amp; TXEN0 &amp; TXEN1 = 1) somewhere before this object in the list."]
+    #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."]
     #[inline(always)]
     pub fn value2(self) -> &'a mut crate::W<REG> {
         self.variant(PRI_A::VALUE2)
@@ -165,19 +165,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:28 - CAN Identifier of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn id(&mut self) -> ID_W<MOAR_SPEC> {
         ID_W::new(self, 0)
     }
     #[doc = "Bit 29 - Identifier Extension Bit of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn ide(&mut self) -> IDE_W<MOAR_SPEC> {
         IDE_W::new(self, 29)
     }
     #[doc = "Bits 30:31 - Priority Class"]
     #[inline(always)]
-    #[must_use]
     pub fn pri(&mut self) -> PRI_W<MOAR_SPEC> {
         PRI_W::new(self, 30)
     }
diff --git a/src/can_mo0/moctr.rs b/src/can_mo0/moctr.rs
index 205ed740..a0d07339 100644
--- a/src/can_mo0/moctr.rs
+++ b/src/can_mo0/moctr.rs
@@ -51,145 +51,121 @@ pub type SETDIR_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Reset/Set Receive Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn resrxpnd(&mut self) -> RESRXPND_W<MOCTR_SPEC> {
         RESRXPND_W::new(self, 0)
     }
     #[doc = "Bit 1 - Reset/Set Transmit Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn restxpnd(&mut self) -> RESTXPND_W<MOCTR_SPEC> {
         RESTXPND_W::new(self, 1)
     }
     #[doc = "Bit 2 - Reset/Set Receive Updating"]
     #[inline(always)]
-    #[must_use]
     pub fn resrxupd(&mut self) -> RESRXUPD_W<MOCTR_SPEC> {
         RESRXUPD_W::new(self, 2)
     }
     #[doc = "Bit 3 - Reset/Set New Data"]
     #[inline(always)]
-    #[must_use]
     pub fn resnewdat(&mut self) -> RESNEWDAT_W<MOCTR_SPEC> {
         RESNEWDAT_W::new(self, 3)
     }
     #[doc = "Bit 4 - Reset/Set Message Lost"]
     #[inline(always)]
-    #[must_use]
     pub fn resmsglst(&mut self) -> RESMSGLST_W<MOCTR_SPEC> {
         RESMSGLST_W::new(self, 4)
     }
     #[doc = "Bit 5 - Reset/Set Message Valid"]
     #[inline(always)]
-    #[must_use]
     pub fn resmsgval(&mut self) -> RESMSGVAL_W<MOCTR_SPEC> {
         RESMSGVAL_W::new(self, 5)
     }
     #[doc = "Bit 6 - Reset/Set Receive/Transmit Selected"]
     #[inline(always)]
-    #[must_use]
     pub fn resrtsel(&mut self) -> RESRTSEL_W<MOCTR_SPEC> {
         RESRTSEL_W::new(self, 6)
     }
     #[doc = "Bit 7 - Reset/Set Receive Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn resrxen(&mut self) -> RESRXEN_W<MOCTR_SPEC> {
         RESRXEN_W::new(self, 7)
     }
     #[doc = "Bit 8 - Reset/Set Transmit Request"]
     #[inline(always)]
-    #[must_use]
     pub fn restxrq(&mut self) -> RESTXRQ_W<MOCTR_SPEC> {
         RESTXRQ_W::new(self, 8)
     }
     #[doc = "Bit 9 - Reset/Set Transmit Enable 0"]
     #[inline(always)]
-    #[must_use]
     pub fn restxen0(&mut self) -> RESTXEN0_W<MOCTR_SPEC> {
         RESTXEN0_W::new(self, 9)
     }
     #[doc = "Bit 10 - Reset/Set Transmit Enable 1"]
     #[inline(always)]
-    #[must_use]
     pub fn restxen1(&mut self) -> RESTXEN1_W<MOCTR_SPEC> {
         RESTXEN1_W::new(self, 10)
     }
     #[doc = "Bit 11 - Reset/Set Message Direction"]
     #[inline(always)]
-    #[must_use]
     pub fn resdir(&mut self) -> RESDIR_W<MOCTR_SPEC> {
         RESDIR_W::new(self, 11)
     }
     #[doc = "Bit 16 - Reset/Set Receive Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn setrxpnd(&mut self) -> SETRXPND_W<MOCTR_SPEC> {
         SETRXPND_W::new(self, 16)
     }
     #[doc = "Bit 17 - Reset/Set Transmit Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn settxpnd(&mut self) -> SETTXPND_W<MOCTR_SPEC> {
         SETTXPND_W::new(self, 17)
     }
     #[doc = "Bit 18 - Reset/Set Receive Updating"]
     #[inline(always)]
-    #[must_use]
     pub fn setrxupd(&mut self) -> SETRXUPD_W<MOCTR_SPEC> {
         SETRXUPD_W::new(self, 18)
     }
     #[doc = "Bit 19 - Reset/Set New Data"]
     #[inline(always)]
-    #[must_use]
     pub fn setnewdat(&mut self) -> SETNEWDAT_W<MOCTR_SPEC> {
         SETNEWDAT_W::new(self, 19)
     }
     #[doc = "Bit 20 - Reset/Set Message Lost"]
     #[inline(always)]
-    #[must_use]
     pub fn setmsglst(&mut self) -> SETMSGLST_W<MOCTR_SPEC> {
         SETMSGLST_W::new(self, 20)
     }
     #[doc = "Bit 21 - Reset/Set Message Valid"]
     #[inline(always)]
-    #[must_use]
     pub fn setmsgval(&mut self) -> SETMSGVAL_W<MOCTR_SPEC> {
         SETMSGVAL_W::new(self, 21)
     }
     #[doc = "Bit 22 - Reset/Set Receive/Transmit Selected"]
     #[inline(always)]
-    #[must_use]
     pub fn setrtsel(&mut self) -> SETRTSEL_W<MOCTR_SPEC> {
         SETRTSEL_W::new(self, 22)
     }
     #[doc = "Bit 23 - Reset/Set Receive Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn setrxen(&mut self) -> SETRXEN_W<MOCTR_SPEC> {
         SETRXEN_W::new(self, 23)
     }
     #[doc = "Bit 24 - Reset/Set Transmit Request"]
     #[inline(always)]
-    #[must_use]
     pub fn settxrq(&mut self) -> SETTXRQ_W<MOCTR_SPEC> {
         SETTXRQ_W::new(self, 24)
     }
     #[doc = "Bit 25 - Reset/Set Transmit Enable 0"]
     #[inline(always)]
-    #[must_use]
     pub fn settxen0(&mut self) -> SETTXEN0_W<MOCTR_SPEC> {
         SETTXEN0_W::new(self, 25)
     }
     #[doc = "Bit 26 - Reset/Set Transmit Enable 1"]
     #[inline(always)]
-    #[must_use]
     pub fn settxen1(&mut self) -> SETTXEN1_W<MOCTR_SPEC> {
         SETTXEN1_W::new(self, 26)
     }
     #[doc = "Bit 27 - Reset/Set Message Direction"]
     #[inline(always)]
-    #[must_use]
     pub fn setdir(&mut self) -> SETDIR_W<MOCTR_SPEC> {
         SETDIR_W::new(self, 27)
     }
diff --git a/src/can_mo0/modatah.rs b/src/can_mo0/modatah.rs
index e29226aa..b73ecae4 100644
--- a/src/can_mo0/modatah.rs
+++ b/src/can_mo0/modatah.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 4 of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn db4(&mut self) -> DB4_W<MODATAH_SPEC> {
         DB4_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 5 of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn db5(&mut self) -> DB5_W<MODATAH_SPEC> {
         DB5_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Data Byte 6 of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn db6(&mut self) -> DB6_W<MODATAH_SPEC> {
         DB6_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Data Byte 7 of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn db7(&mut self) -> DB7_W<MODATAH_SPEC> {
         DB7_W::new(self, 24)
     }
diff --git a/src/can_mo0/modatal.rs b/src/can_mo0/modatal.rs
index 9abb2c4e..14de5a2f 100644
--- a/src/can_mo0/modatal.rs
+++ b/src/can_mo0/modatal.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Data Byte 0 of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn db0(&mut self) -> DB0_W<MODATAL_SPEC> {
         DB0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Data Byte 1 of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn db1(&mut self) -> DB1_W<MODATAL_SPEC> {
         DB1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Data Byte 2 of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn db2(&mut self) -> DB2_W<MODATAL_SPEC> {
         DB2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Data Byte 3 of Message Object n"]
     #[inline(always)]
-    #[must_use]
     pub fn db3(&mut self) -> DB3_W<MODATAL_SPEC> {
         DB3_W::new(self, 24)
     }
diff --git a/src/can_mo0/mofcr.rs b/src/can_mo0/mofcr.rs
index b28e43d9..db14d38e 100644
--- a/src/can_mo0/mofcr.rs
+++ b/src/can_mo0/mofcr.rs
@@ -660,79 +660,66 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Message Mode Control"]
     #[inline(always)]
-    #[must_use]
     pub fn mmc(&mut self) -> MMC_W<MOFCR_SPEC> {
         MMC_W::new(self, 0)
     }
     #[doc = "Bit 8 - Gateway Data Frame Send"]
     #[inline(always)]
-    #[must_use]
     pub fn gdfs(&mut self) -> GDFS_W<MOFCR_SPEC> {
         GDFS_W::new(self, 8)
     }
     #[doc = "Bit 9 - Identifier Copy"]
     #[inline(always)]
-    #[must_use]
     pub fn idc(&mut self) -> IDC_W<MOFCR_SPEC> {
         IDC_W::new(self, 9)
     }
     #[doc = "Bit 10 - Data Length Code Copy"]
     #[inline(always)]
-    #[must_use]
     pub fn dlcc(&mut self) -> DLCC_W<MOFCR_SPEC> {
         DLCC_W::new(self, 10)
     }
     #[doc = "Bit 11 - Data Copy"]
     #[inline(always)]
-    #[must_use]
     pub fn datc(&mut self) -> DATC_W<MOFCR_SPEC> {
         DATC_W::new(self, 11)
     }
     #[doc = "Bit 16 - Receive Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rxie(&mut self) -> RXIE_W<MOFCR_SPEC> {
         RXIE_W::new(self, 16)
     }
     #[doc = "Bit 17 - Transmit Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn txie(&mut self) -> TXIE_W<MOFCR_SPEC> {
         TXIE_W::new(self, 17)
     }
     #[doc = "Bit 18 - Overflow Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ovie(&mut self) -> OVIE_W<MOFCR_SPEC> {
         OVIE_W::new(self, 18)
     }
     #[doc = "Bit 20 - Foreign Remote Request Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn frren(&mut self) -> FRREN_W<MOFCR_SPEC> {
         FRREN_W::new(self, 20)
     }
     #[doc = "Bit 21 - Transmit Object Remote Monitoring"]
     #[inline(always)]
-    #[must_use]
     pub fn rmm(&mut self) -> RMM_W<MOFCR_SPEC> {
         RMM_W::new(self, 21)
     }
     #[doc = "Bit 22 - Single Data Transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn sdt(&mut self) -> SDT_W<MOFCR_SPEC> {
         SDT_W::new(self, 22)
     }
     #[doc = "Bit 23 - Single Transmit Trial"]
     #[inline(always)]
-    #[must_use]
     pub fn stt(&mut self) -> STT_W<MOFCR_SPEC> {
         STT_W::new(self, 23)
     }
     #[doc = "Bits 24:27 - Data Length Code"]
     #[inline(always)]
-    #[must_use]
     pub fn dlc(&mut self) -> DLC_W<MOFCR_SPEC> {
         DLC_W::new(self, 24)
     }
diff --git a/src/can_mo0/mofgpr.rs b/src/can_mo0/mofgpr.rs
index 8856aaf1..eeb82f62 100644
--- a/src/can_mo0/mofgpr.rs
+++ b/src/can_mo0/mofgpr.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Bottom Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn bot(&mut self) -> BOT_W<MOFGPR_SPEC> {
         BOT_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Top Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn top(&mut self) -> TOP_W<MOFGPR_SPEC> {
         TOP_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Current Object Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn cur(&mut self) -> CUR_W<MOFGPR_SPEC> {
         CUR_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Object Select Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn sel(&mut self) -> SEL_W<MOFGPR_SPEC> {
         SEL_W::new(self, 24)
     }
diff --git a/src/can_mo0/moipr.rs b/src/can_mo0/moipr.rs
index 253b795d..6244131e 100644
--- a/src/can_mo0/moipr.rs
+++ b/src/can_mo0/moipr.rs
@@ -181,25 +181,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Receive Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn rxinp(&mut self) -> RXINP_W<MOIPR_SPEC> {
         RXINP_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Transmit Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn txinp(&mut self) -> TXINP_W<MOIPR_SPEC> {
         TXINP_W::new(self, 4)
     }
     #[doc = "Bits 8:15 - Message Pending Number"]
     #[inline(always)]
-    #[must_use]
     pub fn mpn(&mut self) -> MPN_W<MOIPR_SPEC> {
         MPN_W::new(self, 8)
     }
     #[doc = "Bits 16:31 - CAN Frame Counter Value"]
     #[inline(always)]
-    #[must_use]
     pub fn cfcval(&mut self) -> CFCVAL_W<MOIPR_SPEC> {
         CFCVAL_W::new(self, 16)
     }
diff --git a/src/can_node0/nbtr.rs b/src/can_node0/nbtr.rs
index e4fe6382..7b1c0b00 100644
--- a/src/can_node0/nbtr.rs
+++ b/src/can_node0/nbtr.rs
@@ -101,31 +101,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Baud Rate Prescaler"]
     #[inline(always)]
-    #[must_use]
     pub fn brp(&mut self) -> BRP_W<NBTR_SPEC> {
         BRP_W::new(self, 0)
     }
     #[doc = "Bits 6:7 - (Re) Synchronization Jump Width"]
     #[inline(always)]
-    #[must_use]
     pub fn sjw(&mut self) -> SJW_W<NBTR_SPEC> {
         SJW_W::new(self, 6)
     }
     #[doc = "Bits 8:11 - Time Segment Before Sample Point"]
     #[inline(always)]
-    #[must_use]
     pub fn tseg1(&mut self) -> TSEG1_W<NBTR_SPEC> {
         TSEG1_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Time Segment After Sample Point"]
     #[inline(always)]
-    #[must_use]
     pub fn tseg2(&mut self) -> TSEG2_W<NBTR_SPEC> {
         TSEG2_W::new(self, 12)
     }
     #[doc = "Bit 15 - Divide Prescaler Clock by 8"]
     #[inline(always)]
-    #[must_use]
     pub fn div8(&mut self) -> DIV8_W<NBTR_SPEC> {
         DIV8_W::new(self, 15)
     }
diff --git a/src/can_node0/ncr.rs b/src/can_node0/ncr.rs
index c6b276a2..e96353b0 100644
--- a/src/can_node0/ncr.rs
+++ b/src/can_node0/ncr.rs
@@ -373,49 +373,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Node Initialization"]
     #[inline(always)]
-    #[must_use]
     pub fn init(&mut self) -> INIT_W<NCR_SPEC> {
         INIT_W::new(self, 0)
     }
     #[doc = "Bit 1 - Transfer Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn trie(&mut self) -> TRIE_W<NCR_SPEC> {
         TRIE_W::new(self, 1)
     }
     #[doc = "Bit 2 - LEC Indicated Error Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn lecie(&mut self) -> LECIE_W<NCR_SPEC> {
         LECIE_W::new(self, 2)
     }
     #[doc = "Bit 3 - Alert Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn alie(&mut self) -> ALIE_W<NCR_SPEC> {
         ALIE_W::new(self, 3)
     }
     #[doc = "Bit 4 - CAN Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn candis(&mut self) -> CANDIS_W<NCR_SPEC> {
         CANDIS_W::new(self, 4)
     }
     #[doc = "Bit 6 - Configuration Change Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cce(&mut self) -> CCE_W<NCR_SPEC> {
         CCE_W::new(self, 6)
     }
     #[doc = "Bit 7 - CAN Analyzer Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn calm(&mut self) -> CALM_W<NCR_SPEC> {
         CALM_W::new(self, 7)
     }
     #[doc = "Bit 8 - Suspend Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn susen(&mut self) -> SUSEN_W<NCR_SPEC> {
         SUSEN_W::new(self, 8)
     }
diff --git a/src/can_node0/necnt.rs b/src/can_node0/necnt.rs
index 34259f28..61129811 100644
--- a/src/can_node0/necnt.rs
+++ b/src/can_node0/necnt.rs
@@ -116,19 +116,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Receive Error Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn rec(&mut self) -> REC_W<NECNT_SPEC> {
         REC_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Transmit Error Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn tec(&mut self) -> TEC_W<NECNT_SPEC> {
         TEC_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Error Warning Level"]
     #[inline(always)]
-    #[must_use]
     pub fn ewrnlvl(&mut self) -> EWRNLVL_W<NECNT_SPEC> {
         EWRNLVL_W::new(self, 16)
     }
diff --git a/src/can_node0/nfcr.rs b/src/can_node0/nfcr.rs
index ae162729..beab3c9a 100644
--- a/src/can_node0/nfcr.rs
+++ b/src/can_node0/nfcr.rs
@@ -262,31 +262,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - CAN Frame Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn cfc(&mut self) -> CFC_W<NFCR_SPEC> {
         CFC_W::new(self, 0)
     }
     #[doc = "Bits 16:18 - CAN Frame Count Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn cfsel(&mut self) -> CFSEL_W<NFCR_SPEC> {
         CFSEL_W::new(self, 16)
     }
     #[doc = "Bits 19:20 - CAN Frame Counter Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn cfmod(&mut self) -> CFMOD_W<NFCR_SPEC> {
         CFMOD_W::new(self, 19)
     }
     #[doc = "Bit 22 - CAN Frame Count Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cfcie(&mut self) -> CFCIE_W<NFCR_SPEC> {
         CFCIE_W::new(self, 22)
     }
     #[doc = "Bit 23 - CAN Frame Counter Overflow Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn cfcov(&mut self) -> CFCOV_W<NFCR_SPEC> {
         CFCOV_W::new(self, 23)
     }
diff --git a/src/can_node0/nipr.rs b/src/can_node0/nipr.rs
index c939b13e..1e97f59f 100644
--- a/src/can_node0/nipr.rs
+++ b/src/can_node0/nipr.rs
@@ -319,25 +319,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Alert Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn alinp(&mut self) -> ALINP_W<NIPR_SPEC> {
         ALINP_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Last Error Code Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn lecinp(&mut self) -> LECINP_W<NIPR_SPEC> {
         LECINP_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Transfer OK Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn trinp(&mut self) -> TRINP_W<NIPR_SPEC> {
         TRINP_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Frame Counter Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn cfcinp(&mut self) -> CFCINP_W<NIPR_SPEC> {
         CFCINP_W::new(self, 12)
     }
diff --git a/src/can_node0/npcr.rs b/src/can_node0/npcr.rs
index 3408526d..28716a41 100644
--- a/src/can_node0/npcr.rs
+++ b/src/can_node0/npcr.rs
@@ -74,13 +74,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Receive Select"]
     #[inline(always)]
-    #[must_use]
     pub fn rxsel(&mut self) -> RXSEL_W<NPCR_SPEC> {
         RXSEL_W::new(self, 0)
     }
     #[doc = "Bit 8 - Loop-Back Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn lbm(&mut self) -> LBM_W<NPCR_SPEC> {
         LBM_W::new(self, 8)
     }
diff --git a/src/can_node0/nsr.rs b/src/can_node0/nsr.rs
index b20c0ed2..8df50617 100644
--- a/src/can_node0/nsr.rs
+++ b/src/can_node0/nsr.rs
@@ -380,37 +380,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Last Error Code"]
     #[inline(always)]
-    #[must_use]
     pub fn lec(&mut self) -> LEC_W<NSR_SPEC> {
         LEC_W::new(self, 0)
     }
     #[doc = "Bit 3 - Message Transmitted Successfully"]
     #[inline(always)]
-    #[must_use]
     pub fn txok(&mut self) -> TXOK_W<NSR_SPEC> {
         TXOK_W::new(self, 3)
     }
     #[doc = "Bit 4 - Message Received Successfully"]
     #[inline(always)]
-    #[must_use]
     pub fn rxok(&mut self) -> RXOK_W<NSR_SPEC> {
         RXOK_W::new(self, 4)
     }
     #[doc = "Bit 5 - Alert Warning"]
     #[inline(always)]
-    #[must_use]
     pub fn alert(&mut self) -> ALERT_W<NSR_SPEC> {
         ALERT_W::new(self, 5)
     }
     #[doc = "Bit 8 - List Length Error"]
     #[inline(always)]
-    #[must_use]
     pub fn lle(&mut self) -> LLE_W<NSR_SPEC> {
         LLE_W::new(self, 8)
     }
     #[doc = "Bit 9 - List Object Error"]
     #[inline(always)]
-    #[must_use]
     pub fn loe(&mut self) -> LOE_W<NSR_SPEC> {
         LOE_W::new(self, 9)
     }
diff --git a/src/ccu40/gcsc.rs b/src/ccu40/gcsc.rs
index 09fb22a6..f362d1f7 100644
--- a/src/ccu40/gcsc.rs
+++ b/src/ccu40/gcsc.rs
@@ -35,97 +35,81 @@ pub type S3STC_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Slice 0 shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0sc(&mut self) -> S0SC_W<GCSC_SPEC> {
         S0SC_W::new(self, 0)
     }
     #[doc = "Bit 1 - Slice 0 Dither shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0dsc(&mut self) -> S0DSC_W<GCSC_SPEC> {
         S0DSC_W::new(self, 1)
     }
     #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0psc(&mut self) -> S0PSC_W<GCSC_SPEC> {
         S0PSC_W::new(self, 2)
     }
     #[doc = "Bit 4 - Slice 1 shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1sc(&mut self) -> S1SC_W<GCSC_SPEC> {
         S1SC_W::new(self, 4)
     }
     #[doc = "Bit 5 - Slice 1 Dither shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1dsc(&mut self) -> S1DSC_W<GCSC_SPEC> {
         S1DSC_W::new(self, 5)
     }
     #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1psc(&mut self) -> S1PSC_W<GCSC_SPEC> {
         S1PSC_W::new(self, 6)
     }
     #[doc = "Bit 8 - Slice 2 shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2sc(&mut self) -> S2SC_W<GCSC_SPEC> {
         S2SC_W::new(self, 8)
     }
     #[doc = "Bit 9 - Slice 2 Dither shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2dsc(&mut self) -> S2DSC_W<GCSC_SPEC> {
         S2DSC_W::new(self, 9)
     }
     #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2psc(&mut self) -> S2PSC_W<GCSC_SPEC> {
         S2PSC_W::new(self, 10)
     }
     #[doc = "Bit 12 - Slice 3 shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3sc(&mut self) -> S3SC_W<GCSC_SPEC> {
         S3SC_W::new(self, 12)
     }
     #[doc = "Bit 13 - Slice 3 Dither shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3dsc(&mut self) -> S3DSC_W<GCSC_SPEC> {
         S3DSC_W::new(self, 13)
     }
     #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3psc(&mut self) -> S3PSC_W<GCSC_SPEC> {
         S3PSC_W::new(self, 14)
     }
     #[doc = "Bit 16 - Slice 0 status bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0stc(&mut self) -> S0STC_W<GCSC_SPEC> {
         S0STC_W::new(self, 16)
     }
     #[doc = "Bit 17 - Slice 1 status bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1stc(&mut self) -> S1STC_W<GCSC_SPEC> {
         S1STC_W::new(self, 17)
     }
     #[doc = "Bit 18 - Slice 2 status bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2stc(&mut self) -> S2STC_W<GCSC_SPEC> {
         S2STC_W::new(self, 18)
     }
     #[doc = "Bit 19 - Slice 3 status bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3stc(&mut self) -> S3STC_W<GCSC_SPEC> {
         S3STC_W::new(self, 19)
     }
diff --git a/src/ccu40/gcss.rs b/src/ccu40/gcss.rs
index 3b1ed572..9c9bfe6c 100644
--- a/src/ccu40/gcss.rs
+++ b/src/ccu40/gcss.rs
@@ -35,97 +35,81 @@ pub type S3STS_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Slice 0 shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s0se(&mut self) -> S0SE_W<GCSS_SPEC> {
         S0SE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s0dse(&mut self) -> S0DSE_W<GCSS_SPEC> {
         S0DSE_W::new(self, 1)
     }
     #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s0pse(&mut self) -> S0PSE_W<GCSS_SPEC> {
         S0PSE_W::new(self, 2)
     }
     #[doc = "Bit 4 - Slice 1 shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s1se(&mut self) -> S1SE_W<GCSS_SPEC> {
         S1SE_W::new(self, 4)
     }
     #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s1dse(&mut self) -> S1DSE_W<GCSS_SPEC> {
         S1DSE_W::new(self, 5)
     }
     #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s1pse(&mut self) -> S1PSE_W<GCSS_SPEC> {
         S1PSE_W::new(self, 6)
     }
     #[doc = "Bit 8 - Slice 2 shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s2se(&mut self) -> S2SE_W<GCSS_SPEC> {
         S2SE_W::new(self, 8)
     }
     #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s2dse(&mut self) -> S2DSE_W<GCSS_SPEC> {
         S2DSE_W::new(self, 9)
     }
     #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s2pse(&mut self) -> S2PSE_W<GCSS_SPEC> {
         S2PSE_W::new(self, 10)
     }
     #[doc = "Bit 12 - Slice 3 shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s3se(&mut self) -> S3SE_W<GCSS_SPEC> {
         S3SE_W::new(self, 12)
     }
     #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s3dse(&mut self) -> S3DSE_W<GCSS_SPEC> {
         S3DSE_W::new(self, 13)
     }
     #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s3pse(&mut self) -> S3PSE_W<GCSS_SPEC> {
         S3PSE_W::new(self, 14)
     }
     #[doc = "Bit 16 - Slice 0 status bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn s0sts(&mut self) -> S0STS_W<GCSS_SPEC> {
         S0STS_W::new(self, 16)
     }
     #[doc = "Bit 17 - Slice 1 status bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn s1sts(&mut self) -> S1STS_W<GCSS_SPEC> {
         S1STS_W::new(self, 17)
     }
     #[doc = "Bit 18 - Slice 2 status bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn s2sts(&mut self) -> S2STS_W<GCSS_SPEC> {
         S2STS_W::new(self, 18)
     }
     #[doc = "Bit 19 - Slice 3 status bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn s3sts(&mut self) -> S3STS_W<GCSS_SPEC> {
         S3STS_W::new(self, 19)
     }
diff --git a/src/ccu40/gctrl.rs b/src/ccu40/gctrl.rs
index d0a62ebd..b2f22ff1 100644
--- a/src/ccu40/gctrl.rs
+++ b/src/ccu40/gctrl.rs
@@ -603,49 +603,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Prescaler Clear Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn prbc(&mut self) -> PRBC_W<GCTRL_SPEC> {
         PRBC_W::new(self, 0)
     }
     #[doc = "Bits 4:5 - Prescaler Input Clock Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn pcis(&mut self) -> PCIS_W<GCTRL_SPEC> {
         PCIS_W::new(self, 4)
     }
     #[doc = "Bits 8:9 - Suspend Mode Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn suscfg(&mut self) -> SUSCFG_W<GCTRL_SPEC> {
         SUSCFG_W::new(self, 8)
     }
     #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mse0(&mut self) -> MSE0_W<GCTRL_SPEC> {
         MSE0_W::new(self, 10)
     }
     #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mse1(&mut self) -> MSE1_W<GCTRL_SPEC> {
         MSE1_W::new(self, 11)
     }
     #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mse2(&mut self) -> MSE2_W<GCTRL_SPEC> {
         MSE2_W::new(self, 12)
     }
     #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mse3(&mut self) -> MSE3_W<GCTRL_SPEC> {
         MSE3_W::new(self, 13)
     }
     #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn msde(&mut self) -> MSDE_W<GCTRL_SPEC> {
         MSDE_W::new(self, 14)
     }
diff --git a/src/ccu40/gidlc.rs b/src/ccu40/gidlc.rs
index 4fdfa4f5..5f419898 100644
--- a/src/ccu40/gidlc.rs
+++ b/src/ccu40/gidlc.rs
@@ -13,31 +13,26 @@ pub type SPRB_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - CC40 IDLE mode clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cs0i(&mut self) -> CS0I_W<GIDLC_SPEC> {
         CS0I_W::new(self, 0)
     }
     #[doc = "Bit 1 - CC41 IDLE mode clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cs1i(&mut self) -> CS1I_W<GIDLC_SPEC> {
         CS1I_W::new(self, 1)
     }
     #[doc = "Bit 2 - CC42 IDLE mode clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cs2i(&mut self) -> CS2I_W<GIDLC_SPEC> {
         CS2I_W::new(self, 2)
     }
     #[doc = "Bit 3 - CC43 IDLE mode clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cs3i(&mut self) -> CS3I_W<GIDLC_SPEC> {
         CS3I_W::new(self, 3)
     }
     #[doc = "Bit 8 - Prescaler Run Bit Set"]
     #[inline(always)]
-    #[must_use]
     pub fn sprb(&mut self) -> SPRB_W<GIDLC_SPEC> {
         SPRB_W::new(self, 8)
     }
diff --git a/src/ccu40/gidls.rs b/src/ccu40/gidls.rs
index 8461de49..1908ddf9 100644
--- a/src/ccu40/gidls.rs
+++ b/src/ccu40/gidls.rs
@@ -15,37 +15,31 @@ pub type PSIC_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - CC40 IDLE mode set"]
     #[inline(always)]
-    #[must_use]
     pub fn ss0i(&mut self) -> SS0I_W<GIDLS_SPEC> {
         SS0I_W::new(self, 0)
     }
     #[doc = "Bit 1 - CC41 IDLE mode set"]
     #[inline(always)]
-    #[must_use]
     pub fn ss1i(&mut self) -> SS1I_W<GIDLS_SPEC> {
         SS1I_W::new(self, 1)
     }
     #[doc = "Bit 2 - CC42 IDLE mode set"]
     #[inline(always)]
-    #[must_use]
     pub fn ss2i(&mut self) -> SS2I_W<GIDLS_SPEC> {
         SS2I_W::new(self, 2)
     }
     #[doc = "Bit 3 - CC43 IDLE mode set"]
     #[inline(always)]
-    #[must_use]
     pub fn ss3i(&mut self) -> SS3I_W<GIDLS_SPEC> {
         SS3I_W::new(self, 3)
     }
     #[doc = "Bit 8 - Prescaler Run Bit Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cprb(&mut self) -> CPRB_W<GIDLS_SPEC> {
         CPRB_W::new(self, 8)
     }
     #[doc = "Bit 9 - Prescaler clear"]
     #[inline(always)]
-    #[must_use]
     pub fn psic(&mut self) -> PSIC_W<GIDLS_SPEC> {
         PSIC_W::new(self, 9)
     }
diff --git a/src/ccu40_cc40/cmc.rs b/src/ccu40_cc40/cmc.rs
index 84109e27..509ca3bf 100644
--- a/src/ccu40_cc40/cmc.rs
+++ b/src/ccu40_cc40/cmc.rs
@@ -836,73 +836,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - External Start Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn strts(&mut self) -> STRTS_W<CMC_SPEC> {
         STRTS_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - External Stop Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ends(&mut self) -> ENDS_W<CMC_SPEC> {
         ENDS_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cap0s(&mut self) -> CAP0S_W<CMC_SPEC> {
         CAP0S_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cap1s(&mut self) -> CAP1S_W<CMC_SPEC> {
         CAP1S_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - External Gate Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn gates(&mut self) -> GATES_W<CMC_SPEC> {
         GATES_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - External Up/Down Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn uds(&mut self) -> UDS_W<CMC_SPEC> {
         UDS_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - External Timer Load Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn lds(&mut self) -> LDS_W<CMC_SPEC> {
         LDS_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - External Count Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cnts(&mut self) -> CNTS_W<CMC_SPEC> {
         CNTS_W::new(self, 14)
     }
     #[doc = "Bit 16 - Override Function Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ofs(&mut self) -> OFS_W<CMC_SPEC> {
         OFS_W::new(self, 16)
     }
     #[doc = "Bit 17 - Trap Function Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ts(&mut self) -> TS_W<CMC_SPEC> {
         TS_W::new(self, 17)
     }
     #[doc = "Bits 18:19 - External Modulation Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn mos(&mut self) -> MOS_W<CMC_SPEC> {
         MOS_W::new(self, 18)
     }
     #[doc = "Bit 20 - Timer Concatenation Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tce(&mut self) -> TCE_W<CMC_SPEC> {
         TCE_W::new(self, 20)
     }
diff --git a/src/ccu40_cc40/crs.rs b/src/ccu40_cc40/crs.rs
index ca7ef15b..91d037c4 100644
--- a/src/ccu40_cc40/crs.rs
+++ b/src/ccu40_cc40/crs.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Compare Register"]
     #[inline(always)]
-    #[must_use]
     pub fn crs(&mut self) -> CRS_W<CRS_SPEC> {
         CRS_W::new(self, 0)
     }
diff --git a/src/ccu40_cc40/dits.rs b/src/ccu40_cc40/dits.rs
index 0457d48f..e01add6a 100644
--- a/src/ccu40_cc40/dits.rs
+++ b/src/ccu40_cc40/dits.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Dither Shadow Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn dcvs(&mut self) -> DCVS_W<DITS_SPEC> {
         DCVS_W::new(self, 0)
     }
diff --git a/src/ccu40_cc40/fpc.rs b/src/ccu40_cc40/fpc.rs
index 77c4d241..ccab00bd 100644
--- a/src/ccu40_cc40/fpc.rs
+++ b/src/ccu40_cc40/fpc.rs
@@ -23,7 +23,6 @@ impl R {
 impl W {
     #[doc = "Bits 8:11 - Actual Prescaler Value"]
     #[inline(always)]
-    #[must_use]
     pub fn pval(&mut self) -> PVAL_W<FPC_SPEC> {
         PVAL_W::new(self, 8)
     }
diff --git a/src/ccu40_cc40/fpcs.rs b/src/ccu40_cc40/fpcs.rs
index 7ebabe62..4e7af348 100644
--- a/src/ccu40_cc40/fpcs.rs
+++ b/src/ccu40_cc40/fpcs.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn pcmp(&mut self) -> PCMP_W<FPCS_SPEC> {
         PCMP_W::new(self, 0)
     }
diff --git a/src/ccu40_cc40/ins.rs b/src/ccu40_cc40/ins.rs
index 9e16e3ba..de3f0f44 100644
--- a/src/ccu40_cc40/ins.rs
+++ b/src/ccu40_cc40/ins.rs
@@ -1468,73 +1468,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Event 0 signal selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev0is(&mut self) -> EV0IS_W<INS_SPEC> {
         EV0IS_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Event 1 signal selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev1is(&mut self) -> EV1IS_W<INS_SPEC> {
         EV1IS_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Event 2 signal selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev2is(&mut self) -> EV2IS_W<INS_SPEC> {
         EV2IS_W::new(self, 8)
     }
     #[doc = "Bits 16:17 - Event 0 Edge Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev0em(&mut self) -> EV0EM_W<INS_SPEC> {
         EV0EM_W::new(self, 16)
     }
     #[doc = "Bits 18:19 - Event 1 Edge Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev1em(&mut self) -> EV1EM_W<INS_SPEC> {
         EV1EM_W::new(self, 18)
     }
     #[doc = "Bits 20:21 - Event 2 Edge Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev2em(&mut self) -> EV2EM_W<INS_SPEC> {
         EV2EM_W::new(self, 20)
     }
     #[doc = "Bit 22 - Event 0 Level Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev0lm(&mut self) -> EV0LM_W<INS_SPEC> {
         EV0LM_W::new(self, 22)
     }
     #[doc = "Bit 23 - Event 1 Level Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev1lm(&mut self) -> EV1LM_W<INS_SPEC> {
         EV1LM_W::new(self, 23)
     }
     #[doc = "Bit 24 - Event 2 Level Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev2lm(&mut self) -> EV2LM_W<INS_SPEC> {
         EV2LM_W::new(self, 24)
     }
     #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn lpf0m(&mut self) -> LPF0M_W<INS_SPEC> {
         LPF0M_W::new(self, 25)
     }
     #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn lpf1m(&mut self) -> LPF1M_W<INS_SPEC> {
         LPF1M_W::new(self, 27)
     }
     #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn lpf2m(&mut self) -> LPF2M_W<INS_SPEC> {
         LPF2M_W::new(self, 29)
     }
diff --git a/src/ccu40_cc40/inte.rs b/src/ccu40_cc40/inte.rs
index 3bd17c45..4759bda1 100644
--- a/src/ccu40_cc40/inte.rs
+++ b/src/ccu40_cc40/inte.rs
@@ -413,43 +413,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Period match while counting up enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pme(&mut self) -> PME_W<INTE_SPEC> {
         PME_W::new(self, 0)
     }
     #[doc = "Bit 1 - One match while counting down enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ome(&mut self) -> OME_W<INTE_SPEC> {
         OME_W::new(self, 1)
     }
     #[doc = "Bit 2 - Compare match while counting up enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cmue(&mut self) -> CMUE_W<INTE_SPEC> {
         CMUE_W::new(self, 2)
     }
     #[doc = "Bit 3 - Compare match while counting down enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cmde(&mut self) -> CMDE_W<INTE_SPEC> {
         CMDE_W::new(self, 3)
     }
     #[doc = "Bit 8 - Event 0 interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn e0ae(&mut self) -> E0AE_W<INTE_SPEC> {
         E0AE_W::new(self, 8)
     }
     #[doc = "Bit 9 - Event 1 interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn e1ae(&mut self) -> E1AE_W<INTE_SPEC> {
         E1AE_W::new(self, 9)
     }
     #[doc = "Bit 10 - Event 2 interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn e2ae(&mut self) -> E2AE_W<INTE_SPEC> {
         E2AE_W::new(self, 10)
     }
diff --git a/src/ccu40_cc40/prs.rs b/src/ccu40_cc40/prs.rs
index 7a8e25be..33023479 100644
--- a/src/ccu40_cc40/prs.rs
+++ b/src/ccu40_cc40/prs.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Period Register"]
     #[inline(always)]
-    #[must_use]
     pub fn prs(&mut self) -> PRS_W<PRS_SPEC> {
         PRS_W::new(self, 0)
     }
diff --git a/src/ccu40_cc40/psc.rs b/src/ccu40_cc40/psc.rs
index 81b915c9..a65ae11b 100644
--- a/src/ccu40_cc40/psc.rs
+++ b/src/ccu40_cc40/psc.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Prescaler Initial Value"]
     #[inline(always)]
-    #[must_use]
     pub fn psiv(&mut self) -> PSIV_W<PSC_SPEC> {
         PSIV_W::new(self, 0)
     }
diff --git a/src/ccu40_cc40/psl.rs b/src/ccu40_cc40/psl.rs
index 3e3f8018..d9659b57 100644
--- a/src/ccu40_cc40/psl.rs
+++ b/src/ccu40_cc40/psl.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Output Passive Level"]
     #[inline(always)]
-    #[must_use]
     pub fn psl(&mut self) -> PSL_W<PSL_SPEC> {
         PSL_W::new(self, 0)
     }
diff --git a/src/ccu40_cc40/srs.rs b/src/ccu40_cc40/srs.rs
index c1f900c5..ad6a5eb9 100644
--- a/src/ccu40_cc40/srs.rs
+++ b/src/ccu40_cc40/srs.rs
@@ -462,31 +462,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Period/One match Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn posr(&mut self) -> POSR_W<SRS_SPEC> {
         POSR_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Compare match Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cmsr(&mut self) -> CMSR_W<SRS_SPEC> {
         CMSR_W::new(self, 2)
     }
     #[doc = "Bits 8:9 - Event 0 Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn e0sr(&mut self) -> E0SR_W<SRS_SPEC> {
         E0SR_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Event 1 Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn e1sr(&mut self) -> E1SR_W<SRS_SPEC> {
         E1SR_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Event 2 Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn e2sr(&mut self) -> E2SR_W<SRS_SPEC> {
         E2SR_W::new(self, 12)
     }
diff --git a/src/ccu40_cc40/swr.rs b/src/ccu40_cc40/swr.rs
index 290356fd..57c8d0a0 100644
--- a/src/ccu40_cc40/swr.rs
+++ b/src/ccu40_cc40/swr.rs
@@ -19,49 +19,41 @@ pub type RTRPF_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Period match while counting up clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpm(&mut self) -> RPM_W<SWR_SPEC> {
         RPM_W::new(self, 0)
     }
     #[doc = "Bit 1 - One match while counting down clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rom(&mut self) -> ROM_W<SWR_SPEC> {
         ROM_W::new(self, 1)
     }
     #[doc = "Bit 2 - Compare match while counting up clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rcmu(&mut self) -> RCMU_W<SWR_SPEC> {
         RCMU_W::new(self, 2)
     }
     #[doc = "Bit 3 - Compare match while counting down clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rcmd(&mut self) -> RCMD_W<SWR_SPEC> {
         RCMD_W::new(self, 3)
     }
     #[doc = "Bit 8 - Event 0 detection clear"]
     #[inline(always)]
-    #[must_use]
     pub fn re0a(&mut self) -> RE0A_W<SWR_SPEC> {
         RE0A_W::new(self, 8)
     }
     #[doc = "Bit 9 - Event 1 detection clear"]
     #[inline(always)]
-    #[must_use]
     pub fn re1a(&mut self) -> RE1A_W<SWR_SPEC> {
         RE1A_W::new(self, 9)
     }
     #[doc = "Bit 10 - Event 2 detection clear"]
     #[inline(always)]
-    #[must_use]
     pub fn re2a(&mut self) -> RE2A_W<SWR_SPEC> {
         RE2A_W::new(self, 10)
     }
     #[doc = "Bit 11 - Trap Flag status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rtrpf(&mut self) -> RTRPF_W<SWR_SPEC> {
         RTRPF_W::new(self, 11)
     }
diff --git a/src/ccu40_cc40/sws.rs b/src/ccu40_cc40/sws.rs
index 666deb65..15815c56 100644
--- a/src/ccu40_cc40/sws.rs
+++ b/src/ccu40_cc40/sws.rs
@@ -19,49 +19,41 @@ pub type STRPF_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Period match while counting up set"]
     #[inline(always)]
-    #[must_use]
     pub fn spm(&mut self) -> SPM_W<SWS_SPEC> {
         SPM_W::new(self, 0)
     }
     #[doc = "Bit 1 - One match while counting down set"]
     #[inline(always)]
-    #[must_use]
     pub fn som(&mut self) -> SOM_W<SWS_SPEC> {
         SOM_W::new(self, 1)
     }
     #[doc = "Bit 2 - Compare match while counting up set"]
     #[inline(always)]
-    #[must_use]
     pub fn scmu(&mut self) -> SCMU_W<SWS_SPEC> {
         SCMU_W::new(self, 2)
     }
     #[doc = "Bit 3 - Compare match while counting down set"]
     #[inline(always)]
-    #[must_use]
     pub fn scmd(&mut self) -> SCMD_W<SWS_SPEC> {
         SCMD_W::new(self, 3)
     }
     #[doc = "Bit 8 - Event 0 detection set"]
     #[inline(always)]
-    #[must_use]
     pub fn se0a(&mut self) -> SE0A_W<SWS_SPEC> {
         SE0A_W::new(self, 8)
     }
     #[doc = "Bit 9 - Event 1 detection set"]
     #[inline(always)]
-    #[must_use]
     pub fn se1a(&mut self) -> SE1A_W<SWS_SPEC> {
         SE1A_W::new(self, 9)
     }
     #[doc = "Bit 10 - Event 2 detection set"]
     #[inline(always)]
-    #[must_use]
     pub fn se2a(&mut self) -> SE2A_W<SWS_SPEC> {
         SE2A_W::new(self, 10)
     }
     #[doc = "Bit 11 - Trap Flag status set"]
     #[inline(always)]
-    #[must_use]
     pub fn strpf(&mut self) -> STRPF_W<SWS_SPEC> {
         STRPF_W::new(self, 11)
     }
diff --git a/src/ccu40_cc40/tc.rs b/src/ccu40_cc40/tc.rs
index afad6951..cd7927e3 100644
--- a/src/ccu40_cc40/tc.rs
+++ b/src/ccu40_cc40/tc.rs
@@ -1129,109 +1129,91 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Timer Counting Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tcm(&mut self) -> TCM_W<TC_SPEC> {
         TCM_W::new(self, 0)
     }
     #[doc = "Bit 1 - Timer Single Shot Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tssm(&mut self) -> TSSM_W<TC_SPEC> {
         TSSM_W::new(self, 1)
     }
     #[doc = "Bit 2 - Shadow Transfer on Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn clst(&mut self) -> CLST_W<TC_SPEC> {
         CLST_W::new(self, 2)
     }
     #[doc = "Bit 4 - Extended Capture Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn ecm(&mut self) -> ECM_W<TC_SPEC> {
         ECM_W::new(self, 4)
     }
     #[doc = "Bits 5:6 - Clear on Capture Control"]
     #[inline(always)]
-    #[must_use]
     pub fn capc(&mut self) -> CAPC_W<TC_SPEC> {
         CAPC_W::new(self, 5)
     }
     #[doc = "Bits 8:9 - Extended Stop Function Control"]
     #[inline(always)]
-    #[must_use]
     pub fn endm(&mut self) -> ENDM_W<TC_SPEC> {
         ENDM_W::new(self, 8)
     }
     #[doc = "Bit 10 - Extended Start Function Control"]
     #[inline(always)]
-    #[must_use]
     pub fn strm(&mut self) -> STRM_W<TC_SPEC> {
         STRM_W::new(self, 10)
     }
     #[doc = "Bit 11 - Equal Capture Event enable"]
     #[inline(always)]
-    #[must_use]
     pub fn sce(&mut self) -> SCE_W<TC_SPEC> {
         SCE_W::new(self, 11)
     }
     #[doc = "Bit 12 - Continuous Capture Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ccs(&mut self) -> CCS_W<TC_SPEC> {
         CCS_W::new(self, 12)
     }
     #[doc = "Bits 13:14 - Dither Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dithe(&mut self) -> DITHE_W<TC_SPEC> {
         DITHE_W::new(self, 13)
     }
     #[doc = "Bit 15 - Dither input selector"]
     #[inline(always)]
-    #[must_use]
     pub fn dim(&mut self) -> DIM_W<TC_SPEC> {
         DIM_W::new(self, 15)
     }
     #[doc = "Bit 16 - Floating Prescaler enable"]
     #[inline(always)]
-    #[must_use]
     pub fn fpe(&mut self) -> FPE_W<TC_SPEC> {
         FPE_W::new(self, 16)
     }
     #[doc = "Bit 17 - TRAP enable"]
     #[inline(always)]
-    #[must_use]
     pub fn trape(&mut self) -> TRAPE_W<TC_SPEC> {
         TRAPE_W::new(self, 17)
     }
     #[doc = "Bit 21 - TRAP Synchronization Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn trpse(&mut self) -> TRPSE_W<TC_SPEC> {
         TRPSE_W::new(self, 21)
     }
     #[doc = "Bit 22 - TRAP State Clear Control"]
     #[inline(always)]
-    #[must_use]
     pub fn trpsw(&mut self) -> TRPSW_W<TC_SPEC> {
         TRPSW_W::new(self, 22)
     }
     #[doc = "Bit 23 - External Modulation Synchronization"]
     #[inline(always)]
-    #[must_use]
     pub fn ems(&mut self) -> EMS_W<TC_SPEC> {
         EMS_W::new(self, 23)
     }
     #[doc = "Bit 24 - External Modulation Type"]
     #[inline(always)]
-    #[must_use]
     pub fn emt(&mut self) -> EMT_W<TC_SPEC> {
         EMT_W::new(self, 24)
     }
     #[doc = "Bit 25 - Multi Channel Mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mcme(&mut self) -> MCME_W<TC_SPEC> {
         MCME_W::new(self, 25)
     }
diff --git a/src/ccu40_cc40/tcclr.rs b/src/ccu40_cc40/tcclr.rs
index abf7b848..d6bac93c 100644
--- a/src/ccu40_cc40/tcclr.rs
+++ b/src/ccu40_cc40/tcclr.rs
@@ -9,19 +9,16 @@ pub type DITC_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Timer Run Bit Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn trbc(&mut self) -> TRBC_W<TCCLR_SPEC> {
         TRBC_W::new(self, 0)
     }
     #[doc = "Bit 1 - Timer Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn tcc(&mut self) -> TCC_W<TCCLR_SPEC> {
         TCC_W::new(self, 1)
     }
     #[doc = "Bit 2 - Dither Counter Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ditc(&mut self) -> DITC_W<TCCLR_SPEC> {
         DITC_W::new(self, 2)
     }
diff --git a/src/ccu40_cc40/tcset.rs b/src/ccu40_cc40/tcset.rs
index 04914af2..2c2ff325 100644
--- a/src/ccu40_cc40/tcset.rs
+++ b/src/ccu40_cc40/tcset.rs
@@ -5,7 +5,6 @@ pub type TRBS_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Timer Run Bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn trbs(&mut self) -> TRBS_W<TCSET_SPEC> {
         TRBS_W::new(self, 0)
     }
diff --git a/src/ccu40_cc40/timer.rs b/src/ccu40_cc40/timer.rs
index 222e6bd7..b6c60ec3 100644
--- a/src/ccu40_cc40/timer.rs
+++ b/src/ccu40_cc40/timer.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timer Value"]
     #[inline(always)]
-    #[must_use]
     pub fn tval(&mut self) -> TVAL_W<TIMER_SPEC> {
         TVAL_W::new(self, 0)
     }
diff --git a/src/ccu80/gcsc.rs b/src/ccu80/gcsc.rs
index 78e835a0..70a11fba 100644
--- a/src/ccu80/gcsc.rs
+++ b/src/ccu80/gcsc.rs
@@ -43,121 +43,101 @@ pub type S3ST2C_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Slice 0 shadow transfer request clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0sc(&mut self) -> S0SC_W<GCSC_SPEC> {
         S0SC_W::new(self, 0)
     }
     #[doc = "Bit 1 - Slice 0 Dither shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0dsc(&mut self) -> S0DSC_W<GCSC_SPEC> {
         S0DSC_W::new(self, 1)
     }
     #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0psc(&mut self) -> S0PSC_W<GCSC_SPEC> {
         S0PSC_W::new(self, 2)
     }
     #[doc = "Bit 4 - Slice 1 shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1sc(&mut self) -> S1SC_W<GCSC_SPEC> {
         S1SC_W::new(self, 4)
     }
     #[doc = "Bit 5 - Slice 1 Dither shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1dsc(&mut self) -> S1DSC_W<GCSC_SPEC> {
         S1DSC_W::new(self, 5)
     }
     #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1psc(&mut self) -> S1PSC_W<GCSC_SPEC> {
         S1PSC_W::new(self, 6)
     }
     #[doc = "Bit 8 - Slice 2 shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2sc(&mut self) -> S2SC_W<GCSC_SPEC> {
         S2SC_W::new(self, 8)
     }
     #[doc = "Bit 9 - Slice 2 Dither shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2dsc(&mut self) -> S2DSC_W<GCSC_SPEC> {
         S2DSC_W::new(self, 9)
     }
     #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2psc(&mut self) -> S2PSC_W<GCSC_SPEC> {
         S2PSC_W::new(self, 10)
     }
     #[doc = "Bit 12 - Slice 3 shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3sc(&mut self) -> S3SC_W<GCSC_SPEC> {
         S3SC_W::new(self, 12)
     }
     #[doc = "Bit 13 - Slice 3 Dither shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3dsc(&mut self) -> S3DSC_W<GCSC_SPEC> {
         S3DSC_W::new(self, 13)
     }
     #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3psc(&mut self) -> S3PSC_W<GCSC_SPEC> {
         S3PSC_W::new(self, 14)
     }
     #[doc = "Bit 16 - Slice 0 status bit 1 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0st1c(&mut self) -> S0ST1C_W<GCSC_SPEC> {
         S0ST1C_W::new(self, 16)
     }
     #[doc = "Bit 17 - Slice 1 status bit 1 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1st1c(&mut self) -> S1ST1C_W<GCSC_SPEC> {
         S1ST1C_W::new(self, 17)
     }
     #[doc = "Bit 18 - Slice 2 status bit 1 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2st1c(&mut self) -> S2ST1C_W<GCSC_SPEC> {
         S2ST1C_W::new(self, 18)
     }
     #[doc = "Bit 19 - Slice 3 status bit 1 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3st1c(&mut self) -> S3ST1C_W<GCSC_SPEC> {
         S3ST1C_W::new(self, 19)
     }
     #[doc = "Bit 20 - Slice 0 status bit 2 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s0st2c(&mut self) -> S0ST2C_W<GCSC_SPEC> {
         S0ST2C_W::new(self, 20)
     }
     #[doc = "Bit 21 - Slice 1 status bit 2 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s1st2c(&mut self) -> S1ST2C_W<GCSC_SPEC> {
         S1ST2C_W::new(self, 21)
     }
     #[doc = "Bit 22 - Slice 2 status bit 2 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s2st2c(&mut self) -> S2ST2C_W<GCSC_SPEC> {
         S2ST2C_W::new(self, 22)
     }
     #[doc = "Bit 23 - Slice 3 status bit 2 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn s3st2c(&mut self) -> S3ST2C_W<GCSC_SPEC> {
         S3ST2C_W::new(self, 23)
     }
diff --git a/src/ccu80/gcss.rs b/src/ccu80/gcss.rs
index 0c55eb8f..6879cd00 100644
--- a/src/ccu80/gcss.rs
+++ b/src/ccu80/gcss.rs
@@ -43,121 +43,101 @@ pub type S3ST2S_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Slice 0 shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s0se(&mut self) -> S0SE_W<GCSS_SPEC> {
         S0SE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s0dse(&mut self) -> S0DSE_W<GCSS_SPEC> {
         S0DSE_W::new(self, 1)
     }
     #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s0pse(&mut self) -> S0PSE_W<GCSS_SPEC> {
         S0PSE_W::new(self, 2)
     }
     #[doc = "Bit 4 - Slice 1 shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s1se(&mut self) -> S1SE_W<GCSS_SPEC> {
         S1SE_W::new(self, 4)
     }
     #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s1dse(&mut self) -> S1DSE_W<GCSS_SPEC> {
         S1DSE_W::new(self, 5)
     }
     #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s1pse(&mut self) -> S1PSE_W<GCSS_SPEC> {
         S1PSE_W::new(self, 6)
     }
     #[doc = "Bit 8 - Slice 2 shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s2se(&mut self) -> S2SE_W<GCSS_SPEC> {
         S2SE_W::new(self, 8)
     }
     #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s2dse(&mut self) -> S2DSE_W<GCSS_SPEC> {
         S2DSE_W::new(self, 9)
     }
     #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s2pse(&mut self) -> S2PSE_W<GCSS_SPEC> {
         S2PSE_W::new(self, 10)
     }
     #[doc = "Bit 12 - Slice 3 shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s3se(&mut self) -> S3SE_W<GCSS_SPEC> {
         S3SE_W::new(self, 12)
     }
     #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s3dse(&mut self) -> S3DSE_W<GCSS_SPEC> {
         S3DSE_W::new(self, 13)
     }
     #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"]
     #[inline(always)]
-    #[must_use]
     pub fn s3pse(&mut self) -> S3PSE_W<GCSS_SPEC> {
         S3PSE_W::new(self, 14)
     }
     #[doc = "Bit 16 - Slice 0 status bit 1 set"]
     #[inline(always)]
-    #[must_use]
     pub fn s0st1s(&mut self) -> S0ST1S_W<GCSS_SPEC> {
         S0ST1S_W::new(self, 16)
     }
     #[doc = "Bit 17 - Slice 1 status bit 1 set"]
     #[inline(always)]
-    #[must_use]
     pub fn s1st1s(&mut self) -> S1ST1S_W<GCSS_SPEC> {
         S1ST1S_W::new(self, 17)
     }
     #[doc = "Bit 18 - Slice 2 status bit 1 set"]
     #[inline(always)]
-    #[must_use]
     pub fn s2st1s(&mut self) -> S2ST1S_W<GCSS_SPEC> {
         S2ST1S_W::new(self, 18)
     }
     #[doc = "Bit 19 - Slice 3 status bit 1 set"]
     #[inline(always)]
-    #[must_use]
     pub fn s3st1s(&mut self) -> S3ST1S_W<GCSS_SPEC> {
         S3ST1S_W::new(self, 19)
     }
     #[doc = "Bit 20 - Slice 0 status bit 2 set"]
     #[inline(always)]
-    #[must_use]
     pub fn s0st2s(&mut self) -> S0ST2S_W<GCSS_SPEC> {
         S0ST2S_W::new(self, 20)
     }
     #[doc = "Bit 21 - Slice 1 status bit 2 set"]
     #[inline(always)]
-    #[must_use]
     pub fn s1st2s(&mut self) -> S1ST2S_W<GCSS_SPEC> {
         S1ST2S_W::new(self, 21)
     }
     #[doc = "Bit 22 - Slice 2 status bit 2 set"]
     #[inline(always)]
-    #[must_use]
     pub fn s2st2s(&mut self) -> S2ST2S_W<GCSS_SPEC> {
         S2ST2S_W::new(self, 22)
     }
     #[doc = "Bit 23 - Slice 3 status bit 2 set"]
     #[inline(always)]
-    #[must_use]
     pub fn s3st2s(&mut self) -> S3ST2S_W<GCSS_SPEC> {
         S3ST2S_W::new(self, 23)
     }
diff --git a/src/ccu80/gctrl.rs b/src/ccu80/gctrl.rs
index 5a43a147..e1ca4c5d 100644
--- a/src/ccu80/gctrl.rs
+++ b/src/ccu80/gctrl.rs
@@ -603,49 +603,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Prescaler Clear Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn prbc(&mut self) -> PRBC_W<GCTRL_SPEC> {
         PRBC_W::new(self, 0)
     }
     #[doc = "Bits 4:5 - Prescaler Input Clock Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn pcis(&mut self) -> PCIS_W<GCTRL_SPEC> {
         PCIS_W::new(self, 4)
     }
     #[doc = "Bits 8:9 - Suspend Mode Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn suscfg(&mut self) -> SUSCFG_W<GCTRL_SPEC> {
         SUSCFG_W::new(self, 8)
     }
     #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mse0(&mut self) -> MSE0_W<GCTRL_SPEC> {
         MSE0_W::new(self, 10)
     }
     #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mse1(&mut self) -> MSE1_W<GCTRL_SPEC> {
         MSE1_W::new(self, 11)
     }
     #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mse2(&mut self) -> MSE2_W<GCTRL_SPEC> {
         MSE2_W::new(self, 12)
     }
     #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mse3(&mut self) -> MSE3_W<GCTRL_SPEC> {
         MSE3_W::new(self, 13)
     }
     #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn msde(&mut self) -> MSDE_W<GCTRL_SPEC> {
         MSDE_W::new(self, 14)
     }
diff --git a/src/ccu80/gidlc.rs b/src/ccu80/gidlc.rs
index 17077922..c259c651 100644
--- a/src/ccu80/gidlc.rs
+++ b/src/ccu80/gidlc.rs
@@ -15,37 +15,31 @@ pub type SPCH_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - CC80 IDLE mode clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cs0i(&mut self) -> CS0I_W<GIDLC_SPEC> {
         CS0I_W::new(self, 0)
     }
     #[doc = "Bit 1 - CC81 IDLE mode clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cs1i(&mut self) -> CS1I_W<GIDLC_SPEC> {
         CS1I_W::new(self, 1)
     }
     #[doc = "Bit 2 - CC82 IDLE mode clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cs2i(&mut self) -> CS2I_W<GIDLC_SPEC> {
         CS2I_W::new(self, 2)
     }
     #[doc = "Bit 3 - CC83 IDLE mode clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cs3i(&mut self) -> CS3I_W<GIDLC_SPEC> {
         CS3I_W::new(self, 3)
     }
     #[doc = "Bit 8 - Prescaler Run Bit Set"]
     #[inline(always)]
-    #[must_use]
     pub fn sprb(&mut self) -> SPRB_W<GIDLC_SPEC> {
         SPRB_W::new(self, 8)
     }
     #[doc = "Bit 10 - Parity Checker run bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn spch(&mut self) -> SPCH_W<GIDLC_SPEC> {
         SPCH_W::new(self, 10)
     }
diff --git a/src/ccu80/gidls.rs b/src/ccu80/gidls.rs
index aeea95fc..d2c7e7ff 100644
--- a/src/ccu80/gidls.rs
+++ b/src/ccu80/gidls.rs
@@ -17,43 +17,36 @@ pub type CPCH_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - CC80 IDLE mode set"]
     #[inline(always)]
-    #[must_use]
     pub fn ss0i(&mut self) -> SS0I_W<GIDLS_SPEC> {
         SS0I_W::new(self, 0)
     }
     #[doc = "Bit 1 - CC81 IDLE mode set"]
     #[inline(always)]
-    #[must_use]
     pub fn ss1i(&mut self) -> SS1I_W<GIDLS_SPEC> {
         SS1I_W::new(self, 1)
     }
     #[doc = "Bit 2 - CC82 IDLE mode set"]
     #[inline(always)]
-    #[must_use]
     pub fn ss2i(&mut self) -> SS2I_W<GIDLS_SPEC> {
         SS2I_W::new(self, 2)
     }
     #[doc = "Bit 3 - CC83 IDLE mode set"]
     #[inline(always)]
-    #[must_use]
     pub fn ss3i(&mut self) -> SS3I_W<GIDLS_SPEC> {
         SS3I_W::new(self, 3)
     }
     #[doc = "Bit 8 - Prescaler# Run Bit Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cprb(&mut self) -> CPRB_W<GIDLS_SPEC> {
         CPRB_W::new(self, 8)
     }
     #[doc = "Bit 9 - Prescaler clear"]
     #[inline(always)]
-    #[must_use]
     pub fn psic(&mut self) -> PSIC_W<GIDLS_SPEC> {
         PSIC_W::new(self, 9)
     }
     #[doc = "Bit 10 - Parity Checker Run bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cpch(&mut self) -> CPCH_W<GIDLS_SPEC> {
         CPCH_W::new(self, 10)
     }
diff --git a/src/ccu80/gpchk.rs b/src/ccu80/gpchk.rs
index 75a356c4..70ee20e1 100644
--- a/src/ccu80/gpchk.rs
+++ b/src/ccu80/gpchk.rs
@@ -390,55 +390,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Parity Checker Automatic start/stop"]
     #[inline(always)]
-    #[must_use]
     pub fn pase(&mut self) -> PASE_W<GPCHK_SPEC> {
         PASE_W::new(self, 0)
     }
     #[doc = "Bits 1:2 - Parity Checker Automatic start/stop selector"]
     #[inline(always)]
-    #[must_use]
     pub fn pacs(&mut self) -> PACS_W<GPCHK_SPEC> {
         PACS_W::new(self, 1)
     }
     #[doc = "Bits 3:4 - Driver Input signal selector"]
     #[inline(always)]
-    #[must_use]
     pub fn pisel(&mut self) -> PISEL_W<GPCHK_SPEC> {
         PISEL_W::new(self, 3)
     }
     #[doc = "Bits 5:6 - Parity Checker Delay Input Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn pcds(&mut self) -> PCDS_W<GPCHK_SPEC> {
         PCDS_W::new(self, 5)
     }
     #[doc = "Bit 7 - Parity Checker type selector"]
     #[inline(always)]
-    #[must_use]
     pub fn pcts(&mut self) -> PCTS_W<GPCHK_SPEC> {
         PCTS_W::new(self, 7)
     }
     #[doc = "Bits 16:19 - Parity Checker Slice 0 output selection"]
     #[inline(always)]
-    #[must_use]
     pub fn pcsel0(&mut self) -> PCSEL0_W<GPCHK_SPEC> {
         PCSEL0_W::new(self, 16)
     }
     #[doc = "Bits 20:23 - Parity Checker Slice 1 output selection"]
     #[inline(always)]
-    #[must_use]
     pub fn pcsel1(&mut self) -> PCSEL1_W<GPCHK_SPEC> {
         PCSEL1_W::new(self, 20)
     }
     #[doc = "Bits 24:27 - Parity Checker Slice 2 output selection"]
     #[inline(always)]
-    #[must_use]
     pub fn pcsel2(&mut self) -> PCSEL2_W<GPCHK_SPEC> {
         PCSEL2_W::new(self, 24)
     }
     #[doc = "Bits 28:31 - Parity Checker Slice 3 output selection"]
     #[inline(always)]
-    #[must_use]
     pub fn pcsel3(&mut self) -> PCSEL3_W<GPCHK_SPEC> {
         PCSEL3_W::new(self, 28)
     }
diff --git a/src/ccu80_cc80/chc.rs b/src/ccu80_cc80/chc.rs
index 7892bfb2..fb1dc606 100644
--- a/src/ccu80_cc80/chc.rs
+++ b/src/ccu80_cc80/chc.rs
@@ -297,31 +297,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Asymmetric PWM mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ase(&mut self) -> ASE_W<CHC_SPEC> {
         ASE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Output selector for CCU8x.OUTy0"]
     #[inline(always)]
-    #[must_use]
     pub fn ocs1(&mut self) -> OCS1_W<CHC_SPEC> {
         OCS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Output selector for CCU8x.OUTy1"]
     #[inline(always)]
-    #[must_use]
     pub fn ocs2(&mut self) -> OCS2_W<CHC_SPEC> {
         OCS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Output selector for CCU8x.OUTy2"]
     #[inline(always)]
-    #[must_use]
     pub fn ocs3(&mut self) -> OCS3_W<CHC_SPEC> {
         OCS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Output selector for CCU8x.OUTy3"]
     #[inline(always)]
-    #[must_use]
     pub fn ocs4(&mut self) -> OCS4_W<CHC_SPEC> {
         OCS4_W::new(self, 4)
     }
diff --git a/src/ccu80_cc80/cmc.rs b/src/ccu80_cc80/cmc.rs
index 84109e27..509ca3bf 100644
--- a/src/ccu80_cc80/cmc.rs
+++ b/src/ccu80_cc80/cmc.rs
@@ -836,73 +836,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - External Start Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn strts(&mut self) -> STRTS_W<CMC_SPEC> {
         STRTS_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - External Stop Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ends(&mut self) -> ENDS_W<CMC_SPEC> {
         ENDS_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cap0s(&mut self) -> CAP0S_W<CMC_SPEC> {
         CAP0S_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cap1s(&mut self) -> CAP1S_W<CMC_SPEC> {
         CAP1S_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - External Gate Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn gates(&mut self) -> GATES_W<CMC_SPEC> {
         GATES_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - External Up/Down Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn uds(&mut self) -> UDS_W<CMC_SPEC> {
         UDS_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - External Timer Load Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn lds(&mut self) -> LDS_W<CMC_SPEC> {
         LDS_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - External Count Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cnts(&mut self) -> CNTS_W<CMC_SPEC> {
         CNTS_W::new(self, 14)
     }
     #[doc = "Bit 16 - Override Function Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ofs(&mut self) -> OFS_W<CMC_SPEC> {
         OFS_W::new(self, 16)
     }
     #[doc = "Bit 17 - Trap Function Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ts(&mut self) -> TS_W<CMC_SPEC> {
         TS_W::new(self, 17)
     }
     #[doc = "Bits 18:19 - External Modulation Functionality Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn mos(&mut self) -> MOS_W<CMC_SPEC> {
         MOS_W::new(self, 18)
     }
     #[doc = "Bit 20 - Timer Concatenation Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tce(&mut self) -> TCE_W<CMC_SPEC> {
         TCE_W::new(self, 20)
     }
diff --git a/src/ccu80_cc80/cr1s.rs b/src/ccu80_cc80/cr1s.rs
index 0714c604..594918d7 100644
--- a/src/ccu80_cc80/cr1s.rs
+++ b/src/ccu80_cc80/cr1s.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Shadow Compare Register for Channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn cr1s(&mut self) -> CR1S_W<CR1S_SPEC> {
         CR1S_W::new(self, 0)
     }
diff --git a/src/ccu80_cc80/cr2s.rs b/src/ccu80_cc80/cr2s.rs
index 66c34101..0c4f582f 100644
--- a/src/ccu80_cc80/cr2s.rs
+++ b/src/ccu80_cc80/cr2s.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Shadow Compare Register for Channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn cr2s(&mut self) -> CR2S_W<CR2S_SPEC> {
         CR2S_W::new(self, 0)
     }
diff --git a/src/ccu80_cc80/dc1r.rs b/src/ccu80_cc80/dc1r.rs
index 4ea85b59..a794090e 100644
--- a/src/ccu80_cc80/dc1r.rs
+++ b/src/ccu80_cc80/dc1r.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn dt1r(&mut self) -> DT1R_W<DC1R_SPEC> {
         DT1R_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn dt1f(&mut self) -> DT1F_W<DC1R_SPEC> {
         DT1F_W::new(self, 8)
     }
diff --git a/src/ccu80_cc80/dc2r.rs b/src/ccu80_cc80/dc2r.rs
index ee22369d..00c16859 100644
--- a/src/ccu80_cc80/dc2r.rs
+++ b/src/ccu80_cc80/dc2r.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn dt2r(&mut self) -> DT2R_W<DC2R_SPEC> {
         DT2R_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn dt2f(&mut self) -> DT2F_W<DC2R_SPEC> {
         DT2F_W::new(self, 8)
     }
diff --git a/src/ccu80_cc80/dits.rs b/src/ccu80_cc80/dits.rs
index 0457d48f..e01add6a 100644
--- a/src/ccu80_cc80/dits.rs
+++ b/src/ccu80_cc80/dits.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Dither Shadow Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn dcvs(&mut self) -> DCVS_W<DITS_SPEC> {
         DCVS_W::new(self, 0)
     }
diff --git a/src/ccu80_cc80/dtc.rs b/src/ccu80_cc80/dtc.rs
index 7ca7a348..9b2a664d 100644
--- a/src/ccu80_cc80/dtc.rs
+++ b/src/ccu80_cc80/dtc.rs
@@ -446,43 +446,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Dead Time Enable for Channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn dte1(&mut self) -> DTE1_W<DTC_SPEC> {
         DTE1_W::new(self, 0)
     }
     #[doc = "Bit 1 - Dead Time Enable for Channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn dte2(&mut self) -> DTE2_W<DTC_SPEC> {
         DTE2_W::new(self, 1)
     }
     #[doc = "Bit 2 - Dead Time Enable for CC8yST1"]
     #[inline(always)]
-    #[must_use]
     pub fn dcen1(&mut self) -> DCEN1_W<DTC_SPEC> {
         DCEN1_W::new(self, 2)
     }
     #[doc = "Bit 3 - Dead Time Enable for inverted CC8yST1"]
     #[inline(always)]
-    #[must_use]
     pub fn dcen2(&mut self) -> DCEN2_W<DTC_SPEC> {
         DCEN2_W::new(self, 3)
     }
     #[doc = "Bit 4 - Dead Time Enable for CC8yST2"]
     #[inline(always)]
-    #[must_use]
     pub fn dcen3(&mut self) -> DCEN3_W<DTC_SPEC> {
         DCEN3_W::new(self, 4)
     }
     #[doc = "Bit 5 - Dead Time Enable for inverted CC8yST2"]
     #[inline(always)]
-    #[must_use]
     pub fn dcen4(&mut self) -> DCEN4_W<DTC_SPEC> {
         DCEN4_W::new(self, 5)
     }
     #[doc = "Bits 6:7 - Dead Time clock control"]
     #[inline(always)]
-    #[must_use]
     pub fn dtcc(&mut self) -> DTCC_W<DTC_SPEC> {
         DTCC_W::new(self, 6)
     }
diff --git a/src/ccu80_cc80/fpc.rs b/src/ccu80_cc80/fpc.rs
index 77c4d241..ccab00bd 100644
--- a/src/ccu80_cc80/fpc.rs
+++ b/src/ccu80_cc80/fpc.rs
@@ -23,7 +23,6 @@ impl R {
 impl W {
     #[doc = "Bits 8:11 - Actual Prescaler Value"]
     #[inline(always)]
-    #[must_use]
     pub fn pval(&mut self) -> PVAL_W<FPC_SPEC> {
         PVAL_W::new(self, 8)
     }
diff --git a/src/ccu80_cc80/fpcs.rs b/src/ccu80_cc80/fpcs.rs
index 7ebabe62..4e7af348 100644
--- a/src/ccu80_cc80/fpcs.rs
+++ b/src/ccu80_cc80/fpcs.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn pcmp(&mut self) -> PCMP_W<FPCS_SPEC> {
         PCMP_W::new(self, 0)
     }
diff --git a/src/ccu80_cc80/ins.rs b/src/ccu80_cc80/ins.rs
index bd483a07..c1ba2802 100644
--- a/src/ccu80_cc80/ins.rs
+++ b/src/ccu80_cc80/ins.rs
@@ -1468,73 +1468,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Event 0 signal selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev0is(&mut self) -> EV0IS_W<INS_SPEC> {
         EV0IS_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Event 1 signal selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev1is(&mut self) -> EV1IS_W<INS_SPEC> {
         EV1IS_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Event 2 signal selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev2is(&mut self) -> EV2IS_W<INS_SPEC> {
         EV2IS_W::new(self, 8)
     }
     #[doc = "Bits 16:17 - Event 0 Edge Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev0em(&mut self) -> EV0EM_W<INS_SPEC> {
         EV0EM_W::new(self, 16)
     }
     #[doc = "Bits 18:19 - Event 1 Edge Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev1em(&mut self) -> EV1EM_W<INS_SPEC> {
         EV1EM_W::new(self, 18)
     }
     #[doc = "Bits 20:21 - Event 2 Edge Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev2em(&mut self) -> EV2EM_W<INS_SPEC> {
         EV2EM_W::new(self, 20)
     }
     #[doc = "Bit 22 - Event 0 Level Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev0lm(&mut self) -> EV0LM_W<INS_SPEC> {
         EV0LM_W::new(self, 22)
     }
     #[doc = "Bit 23 - Event 1 Level Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev1lm(&mut self) -> EV1LM_W<INS_SPEC> {
         EV1LM_W::new(self, 23)
     }
     #[doc = "Bit 24 - Event 2 Level Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ev2lm(&mut self) -> EV2LM_W<INS_SPEC> {
         EV2LM_W::new(self, 24)
     }
     #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn lpf0m(&mut self) -> LPF0M_W<INS_SPEC> {
         LPF0M_W::new(self, 25)
     }
     #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn lpf1m(&mut self) -> LPF1M_W<INS_SPEC> {
         LPF1M_W::new(self, 27)
     }
     #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn lpf2m(&mut self) -> LPF2M_W<INS_SPEC> {
         LPF2M_W::new(self, 29)
     }
diff --git a/src/ccu80_cc80/inte.rs b/src/ccu80_cc80/inte.rs
index 81cba007..b94d5316 100644
--- a/src/ccu80_cc80/inte.rs
+++ b/src/ccu80_cc80/inte.rs
@@ -529,55 +529,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Period match while counting up enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pme(&mut self) -> PME_W<INTE_SPEC> {
         PME_W::new(self, 0)
     }
     #[doc = "Bit 1 - One match while counting down enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ome(&mut self) -> OME_W<INTE_SPEC> {
         OME_W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel 1 Compare match while counting up enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cmu1e(&mut self) -> CMU1E_W<INTE_SPEC> {
         CMU1E_W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel 1 Compare match while counting down enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cmd1e(&mut self) -> CMD1E_W<INTE_SPEC> {
         CMD1E_W::new(self, 3)
     }
     #[doc = "Bit 4 - Channel 2 Compare match while counting up enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cmu2e(&mut self) -> CMU2E_W<INTE_SPEC> {
         CMU2E_W::new(self, 4)
     }
     #[doc = "Bit 5 - Channel 2 Compare match while counting down enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cmd2e(&mut self) -> CMD2E_W<INTE_SPEC> {
         CMD2E_W::new(self, 5)
     }
     #[doc = "Bit 8 - Event 0 interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn e0ae(&mut self) -> E0AE_W<INTE_SPEC> {
         E0AE_W::new(self, 8)
     }
     #[doc = "Bit 9 - Event 1 interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn e1ae(&mut self) -> E1AE_W<INTE_SPEC> {
         E1AE_W::new(self, 9)
     }
     #[doc = "Bit 10 - Event 2 interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn e2ae(&mut self) -> E2AE_W<INTE_SPEC> {
         E2AE_W::new(self, 10)
     }
diff --git a/src/ccu80_cc80/prs.rs b/src/ccu80_cc80/prs.rs
index 7a8e25be..33023479 100644
--- a/src/ccu80_cc80/prs.rs
+++ b/src/ccu80_cc80/prs.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Period Register"]
     #[inline(always)]
-    #[must_use]
     pub fn prs(&mut self) -> PRS_W<PRS_SPEC> {
         PRS_W::new(self, 0)
     }
diff --git a/src/ccu80_cc80/psc.rs b/src/ccu80_cc80/psc.rs
index 81b915c9..a65ae11b 100644
--- a/src/ccu80_cc80/psc.rs
+++ b/src/ccu80_cc80/psc.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Prescaler Initial Value"]
     #[inline(always)]
-    #[must_use]
     pub fn psiv(&mut self) -> PSIV_W<PSC_SPEC> {
         PSIV_W::new(self, 0)
     }
diff --git a/src/ccu80_cc80/psl.rs b/src/ccu80_cc80/psl.rs
index 9566c754..c6e9a4a0 100644
--- a/src/ccu80_cc80/psl.rs
+++ b/src/ccu80_cc80/psl.rs
@@ -239,25 +239,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Output Passive Level for CCU8x.OUTy0"]
     #[inline(always)]
-    #[must_use]
     pub fn psl11(&mut self) -> PSL11_W<PSL_SPEC> {
         PSL11_W::new(self, 0)
     }
     #[doc = "Bit 1 - Output Passive Level for CCU8x.OUTy1"]
     #[inline(always)]
-    #[must_use]
     pub fn psl12(&mut self) -> PSL12_W<PSL_SPEC> {
         PSL12_W::new(self, 1)
     }
     #[doc = "Bit 2 - Output Passive Level for CCU8x.OUTy2"]
     #[inline(always)]
-    #[must_use]
     pub fn psl21(&mut self) -> PSL21_W<PSL_SPEC> {
         PSL21_W::new(self, 2)
     }
     #[doc = "Bit 3 - Output Passive Level for CCU8x.OUTy3"]
     #[inline(always)]
-    #[must_use]
     pub fn psl22(&mut self) -> PSL22_W<PSL_SPEC> {
         PSL22_W::new(self, 3)
     }
diff --git a/src/ccu80_cc80/srs.rs b/src/ccu80_cc80/srs.rs
index e1492789..cf5e00ab 100644
--- a/src/ccu80_cc80/srs.rs
+++ b/src/ccu80_cc80/srs.rs
@@ -553,37 +553,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Period/One match Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn posr(&mut self) -> POSR_W<SRS_SPEC> {
         POSR_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Channel 1 Compare match Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cm1sr(&mut self) -> CM1SR_W<SRS_SPEC> {
         CM1SR_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Channel 2 Compare match Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cm2sr(&mut self) -> CM2SR_W<SRS_SPEC> {
         CM2SR_W::new(self, 4)
     }
     #[doc = "Bits 8:9 - Event 0 Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn e0sr(&mut self) -> E0SR_W<SRS_SPEC> {
         E0SR_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Event 1 Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn e1sr(&mut self) -> E1SR_W<SRS_SPEC> {
         E1SR_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Event 2 Service request selector"]
     #[inline(always)]
-    #[must_use]
     pub fn e2sr(&mut self) -> E2SR_W<SRS_SPEC> {
         E2SR_W::new(self, 12)
     }
diff --git a/src/ccu80_cc80/stc.rs b/src/ccu80_cc80/stc.rs
index 3951b800..f37f7025 100644
--- a/src/ccu80_cc80/stc.rs
+++ b/src/ccu80_cc80/stc.rs
@@ -143,13 +143,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Cascaded shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cse(&mut self) -> CSE_W<STC_SPEC> {
         CSE_W::new(self, 0)
     }
     #[doc = "Bits 1:2 - Shadow transfer mode"]
     #[inline(always)]
-    #[must_use]
     pub fn stm(&mut self) -> STM_W<STC_SPEC> {
         STM_W::new(self, 1)
     }
diff --git a/src/ccu80_cc80/swr.rs b/src/ccu80_cc80/swr.rs
index 2a89528e..b613551e 100644
--- a/src/ccu80_cc80/swr.rs
+++ b/src/ccu80_cc80/swr.rs
@@ -23,61 +23,51 @@ pub type RTRPF_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Period match while counting up clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpm(&mut self) -> RPM_W<SWR_SPEC> {
         RPM_W::new(self, 0)
     }
     #[doc = "Bit 1 - One match while counting down clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rom(&mut self) -> ROM_W<SWR_SPEC> {
         ROM_W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel 1 Compare match while counting up clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rcm1u(&mut self) -> RCM1U_W<SWR_SPEC> {
         RCM1U_W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel 1 Compare match while counting down clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rcm1d(&mut self) -> RCM1D_W<SWR_SPEC> {
         RCM1D_W::new(self, 3)
     }
     #[doc = "Bit 4 - Channel 2 Compare match while counting up clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rcm2u(&mut self) -> RCM2U_W<SWR_SPEC> {
         RCM2U_W::new(self, 4)
     }
     #[doc = "Bit 5 - Channel 2 Compare match while counting down clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rcm2d(&mut self) -> RCM2D_W<SWR_SPEC> {
         RCM2D_W::new(self, 5)
     }
     #[doc = "Bit 8 - Event 0 detection clear"]
     #[inline(always)]
-    #[must_use]
     pub fn re0a(&mut self) -> RE0A_W<SWR_SPEC> {
         RE0A_W::new(self, 8)
     }
     #[doc = "Bit 9 - Event 1 detection clear"]
     #[inline(always)]
-    #[must_use]
     pub fn re1a(&mut self) -> RE1A_W<SWR_SPEC> {
         RE1A_W::new(self, 9)
     }
     #[doc = "Bit 10 - Event 2 detection clear"]
     #[inline(always)]
-    #[must_use]
     pub fn re2a(&mut self) -> RE2A_W<SWR_SPEC> {
         RE2A_W::new(self, 10)
     }
     #[doc = "Bit 11 - Trap Flag status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rtrpf(&mut self) -> RTRPF_W<SWR_SPEC> {
         RTRPF_W::new(self, 11)
     }
diff --git a/src/ccu80_cc80/sws.rs b/src/ccu80_cc80/sws.rs
index 175754ee..cbf23dd3 100644
--- a/src/ccu80_cc80/sws.rs
+++ b/src/ccu80_cc80/sws.rs
@@ -23,61 +23,51 @@ pub type STRPF_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Period match while counting up set"]
     #[inline(always)]
-    #[must_use]
     pub fn spm(&mut self) -> SPM_W<SWS_SPEC> {
         SPM_W::new(self, 0)
     }
     #[doc = "Bit 1 - One match while counting down set"]
     #[inline(always)]
-    #[must_use]
     pub fn som(&mut self) -> SOM_W<SWS_SPEC> {
         SOM_W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel 1 Compare match while counting up set"]
     #[inline(always)]
-    #[must_use]
     pub fn scm1u(&mut self) -> SCM1U_W<SWS_SPEC> {
         SCM1U_W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel 1 Compare match while counting down set"]
     #[inline(always)]
-    #[must_use]
     pub fn scm1d(&mut self) -> SCM1D_W<SWS_SPEC> {
         SCM1D_W::new(self, 3)
     }
     #[doc = "Bit 4 - Compare match while counting up set"]
     #[inline(always)]
-    #[must_use]
     pub fn scm2u(&mut self) -> SCM2U_W<SWS_SPEC> {
         SCM2U_W::new(self, 4)
     }
     #[doc = "Bit 5 - Compare match while counting down set"]
     #[inline(always)]
-    #[must_use]
     pub fn scm2d(&mut self) -> SCM2D_W<SWS_SPEC> {
         SCM2D_W::new(self, 5)
     }
     #[doc = "Bit 8 - Event 0 detection set"]
     #[inline(always)]
-    #[must_use]
     pub fn se0a(&mut self) -> SE0A_W<SWS_SPEC> {
         SE0A_W::new(self, 8)
     }
     #[doc = "Bit 9 - Event 1 detection set"]
     #[inline(always)]
-    #[must_use]
     pub fn se1a(&mut self) -> SE1A_W<SWS_SPEC> {
         SE1A_W::new(self, 9)
     }
     #[doc = "Bit 10 - Event 2 detection set"]
     #[inline(always)]
-    #[must_use]
     pub fn se2a(&mut self) -> SE2A_W<SWS_SPEC> {
         SE2A_W::new(self, 10)
     }
     #[doc = "Bit 11 - Trap Flag status set"]
     #[inline(always)]
-    #[must_use]
     pub fn strpf(&mut self) -> STRPF_W<SWS_SPEC> {
         STRPF_W::new(self, 11)
     }
diff --git a/src/ccu80_cc80/tc.rs b/src/ccu80_cc80/tc.rs
index 0f274a55..93be4e42 100644
--- a/src/ccu80_cc80/tc.rs
+++ b/src/ccu80_cc80/tc.rs
@@ -1441,151 +1441,126 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Timer Counting Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tcm(&mut self) -> TCM_W<TC_SPEC> {
         TCM_W::new(self, 0)
     }
     #[doc = "Bit 1 - Timer Single Shot Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tssm(&mut self) -> TSSM_W<TC_SPEC> {
         TSSM_W::new(self, 1)
     }
     #[doc = "Bit 2 - Shadow Transfer on Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn clst(&mut self) -> CLST_W<TC_SPEC> {
         CLST_W::new(self, 2)
     }
     #[doc = "Bit 4 - Extended Capture Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn ecm(&mut self) -> ECM_W<TC_SPEC> {
         ECM_W::new(self, 4)
     }
     #[doc = "Bits 5:6 - Clear on Capture Control"]
     #[inline(always)]
-    #[must_use]
     pub fn capc(&mut self) -> CAPC_W<TC_SPEC> {
         CAPC_W::new(self, 5)
     }
     #[doc = "Bit 7 - Timer Load selector"]
     #[inline(always)]
-    #[must_use]
     pub fn tls(&mut self) -> TLS_W<TC_SPEC> {
         TLS_W::new(self, 7)
     }
     #[doc = "Bits 8:9 - Extended Stop Function Control"]
     #[inline(always)]
-    #[must_use]
     pub fn endm(&mut self) -> ENDM_W<TC_SPEC> {
         ENDM_W::new(self, 8)
     }
     #[doc = "Bit 10 - Extended Start Function Control"]
     #[inline(always)]
-    #[must_use]
     pub fn strm(&mut self) -> STRM_W<TC_SPEC> {
         STRM_W::new(self, 10)
     }
     #[doc = "Bit 11 - Equal Capture Event enable"]
     #[inline(always)]
-    #[must_use]
     pub fn sce(&mut self) -> SCE_W<TC_SPEC> {
         SCE_W::new(self, 11)
     }
     #[doc = "Bit 12 - Continuous Capture Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ccs(&mut self) -> CCS_W<TC_SPEC> {
         CCS_W::new(self, 12)
     }
     #[doc = "Bits 13:14 - Dither Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dithe(&mut self) -> DITHE_W<TC_SPEC> {
         DITHE_W::new(self, 13)
     }
     #[doc = "Bit 15 - Dither input selector"]
     #[inline(always)]
-    #[must_use]
     pub fn dim(&mut self) -> DIM_W<TC_SPEC> {
         DIM_W::new(self, 15)
     }
     #[doc = "Bit 16 - Floating Prescaler enable"]
     #[inline(always)]
-    #[must_use]
     pub fn fpe(&mut self) -> FPE_W<TC_SPEC> {
         FPE_W::new(self, 16)
     }
     #[doc = "Bit 17 - TRAP enable for CCU8x.OUTy0"]
     #[inline(always)]
-    #[must_use]
     pub fn trape0(&mut self) -> TRAPE0_W<TC_SPEC> {
         TRAPE0_W::new(self, 17)
     }
     #[doc = "Bit 18 - TRAP enable for CCU8x.OUTy1"]
     #[inline(always)]
-    #[must_use]
     pub fn trape1(&mut self) -> TRAPE1_W<TC_SPEC> {
         TRAPE1_W::new(self, 18)
     }
     #[doc = "Bit 19 - TRAP enable for CCU8x.OUTy2"]
     #[inline(always)]
-    #[must_use]
     pub fn trape2(&mut self) -> TRAPE2_W<TC_SPEC> {
         TRAPE2_W::new(self, 19)
     }
     #[doc = "Bit 20 - TRAP enable for CCU8x.OUTy3"]
     #[inline(always)]
-    #[must_use]
     pub fn trape3(&mut self) -> TRAPE3_W<TC_SPEC> {
         TRAPE3_W::new(self, 20)
     }
     #[doc = "Bit 21 - TRAP Synchronization Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn trpse(&mut self) -> TRPSE_W<TC_SPEC> {
         TRPSE_W::new(self, 21)
     }
     #[doc = "Bit 22 - TRAP State Clear Control"]
     #[inline(always)]
-    #[must_use]
     pub fn trpsw(&mut self) -> TRPSW_W<TC_SPEC> {
         TRPSW_W::new(self, 22)
     }
     #[doc = "Bit 23 - External Modulation Synchronization"]
     #[inline(always)]
-    #[must_use]
     pub fn ems(&mut self) -> EMS_W<TC_SPEC> {
         EMS_W::new(self, 23)
     }
     #[doc = "Bit 24 - External Modulation Type"]
     #[inline(always)]
-    #[must_use]
     pub fn emt(&mut self) -> EMT_W<TC_SPEC> {
         EMT_W::new(self, 24)
     }
     #[doc = "Bit 25 - Multi Channel Mode Enable for Channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn mcme1(&mut self) -> MCME1_W<TC_SPEC> {
         MCME1_W::new(self, 25)
     }
     #[doc = "Bit 26 - Multi Channel Mode Enable for Channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn mcme2(&mut self) -> MCME2_W<TC_SPEC> {
         MCME2_W::new(self, 26)
     }
     #[doc = "Bits 27:28 - External Modulation Channel enable"]
     #[inline(always)]
-    #[must_use]
     pub fn eme(&mut self) -> EME_W<TC_SPEC> {
         EME_W::new(self, 27)
     }
     #[doc = "Bits 29:30 - Status bit output selector"]
     #[inline(always)]
-    #[must_use]
     pub fn stos(&mut self) -> STOS_W<TC_SPEC> {
         STOS_W::new(self, 29)
     }
diff --git a/src/ccu80_cc80/tcclr.rs b/src/ccu80_cc80/tcclr.rs
index 3f7deef5..9dd2e441 100644
--- a/src/ccu80_cc80/tcclr.rs
+++ b/src/ccu80_cc80/tcclr.rs
@@ -13,31 +13,26 @@ pub type DTC2C_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Timer Run Bit Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn trbc(&mut self) -> TRBC_W<TCCLR_SPEC> {
         TRBC_W::new(self, 0)
     }
     #[doc = "Bit 1 - Timer Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn tcc(&mut self) -> TCC_W<TCCLR_SPEC> {
         TCC_W::new(self, 1)
     }
     #[doc = "Bit 2 - Dither Counter Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ditc(&mut self) -> DITC_W<TCCLR_SPEC> {
         DITC_W::new(self, 2)
     }
     #[doc = "Bit 3 - Dead Time Counter 1 Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn dtc1c(&mut self) -> DTC1C_W<TCCLR_SPEC> {
         DTC1C_W::new(self, 3)
     }
     #[doc = "Bit 4 - Dead Time Counter 2 Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn dtc2c(&mut self) -> DTC2C_W<TCCLR_SPEC> {
         DTC2C_W::new(self, 4)
     }
diff --git a/src/ccu80_cc80/tcset.rs b/src/ccu80_cc80/tcset.rs
index 04914af2..2c2ff325 100644
--- a/src/ccu80_cc80/tcset.rs
+++ b/src/ccu80_cc80/tcset.rs
@@ -5,7 +5,6 @@ pub type TRBS_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Timer Run Bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn trbs(&mut self) -> TRBS_W<TCSET_SPEC> {
         TRBS_W::new(self, 0)
     }
diff --git a/src/ccu80_cc80/timer.rs b/src/ccu80_cc80/timer.rs
index 222e6bd7..b6c60ec3 100644
--- a/src/ccu80_cc80/timer.rs
+++ b/src/ccu80_cc80/timer.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Timer Value"]
     #[inline(always)]
-    #[must_use]
     pub fn tval(&mut self) -> TVAL_W<TIMER_SPEC> {
         TVAL_W::new(self, 0)
     }
diff --git a/src/dac/dac01data.rs b/src/dac/dac01data.rs
index 114ba193..b403651e 100644
--- a/src/dac/dac01data.rs
+++ b/src/dac/dac01data.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - DAC0 Data Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn data0(&mut self) -> DATA0_W<DAC01DATA_SPEC> {
         DATA0_W::new(self, 0)
     }
     #[doc = "Bits 16:27 - DAC1 Data Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn data1(&mut self) -> DATA1_W<DAC01DATA_SPEC> {
         DATA1_W::new(self, 16)
     }
diff --git a/src/dac/dac0cfg0.rs b/src/dac/dac0cfg0.rs
index 13563c55..3c3b8f49 100644
--- a/src/dac/dac0cfg0.rs
+++ b/src/dac/dac0cfg0.rs
@@ -521,37 +521,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:19 - Integer Frequency Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn freq(&mut self) -> FREQ_W<DAC0CFG0_SPEC> {
         FREQ_W::new(self, 0)
     }
     #[doc = "Bits 20:22 - Enables and Sets the Mode for DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn mode(&mut self) -> MODE_W<DAC0CFG0_SPEC> {
         MODE_W::new(self, 20)
     }
     #[doc = "Bit 23 - Selects Between Signed and Unsigned DAC0 Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn sign(&mut self) -> SIGN_W<DAC0CFG0_SPEC> {
         SIGN_W::new(self, 23)
     }
     #[doc = "Bit 28 - Negates the DAC0 output"]
     #[inline(always)]
-    #[must_use]
     pub fn negate(&mut self) -> NEGATE_W<DAC0CFG0_SPEC> {
         NEGATE_W::new(self, 28)
     }
     #[doc = "Bit 29 - Enable Sign Output of DAC0 Pattern Generator"]
     #[inline(always)]
-    #[must_use]
     pub fn signen(&mut self) -> SIGNEN_W<DAC0CFG0_SPEC> {
         SIGNEN_W::new(self, 29)
     }
     #[doc = "Bit 30 - Enable DAC0 service request interrupt generation"]
     #[inline(always)]
-    #[must_use]
     pub fn sren(&mut self) -> SREN_W<DAC0CFG0_SPEC> {
         SREN_W::new(self, 30)
     }
diff --git a/src/dac/dac0cfg1.rs b/src/dac/dac0cfg1.rs
index 78cbe4d6..9efb561e 100644
--- a/src/dac/dac0cfg1.rs
+++ b/src/dac/dac0cfg1.rs
@@ -447,61 +447,51 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"]
     #[inline(always)]
-    #[must_use]
     pub fn scale(&mut self) -> SCALE_W<DAC0CFG1_SPEC> {
         SCALE_W::new(self, 0)
     }
     #[doc = "Bit 3 - Switch between up- and downscale of the DAC0 input data values"]
     #[inline(always)]
-    #[must_use]
     pub fn muldiv(&mut self) -> MULDIV_W<DAC0CFG1_SPEC> {
         MULDIV_W::new(self, 3)
     }
     #[doc = "Bits 4:11 - 8-bit offset value addition"]
     #[inline(always)]
-    #[must_use]
     pub fn offs(&mut self) -> OFFS_W<DAC0CFG1_SPEC> {
         OFFS_W::new(self, 4)
     }
     #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn trigsel(&mut self) -> TRIGSEL_W<DAC0CFG1_SPEC> {
         TRIGSEL_W::new(self, 12)
     }
     #[doc = "Bit 15 - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn datmod(&mut self) -> DATMOD_W<DAC0CFG1_SPEC> {
         DATMOD_W::new(self, 15)
     }
     #[doc = "Bit 16 - Software Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn swtrig(&mut self) -> SWTRIG_W<DAC0CFG1_SPEC> {
         SWTRIG_W::new(self, 16)
     }
     #[doc = "Bits 17:18 - Select the trigger source for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn trigmod(&mut self) -> TRIGMOD_W<DAC0CFG1_SPEC> {
         TRIGMOD_W::new(self, 17)
     }
     #[doc = "Bits 19:23 - DAC0 analog configuration/calibration parameters"]
     #[inline(always)]
-    #[must_use]
     pub fn anacfg(&mut self) -> ANACFG_W<DAC0CFG1_SPEC> {
         ANACFG_W::new(self, 19)
     }
     #[doc = "Bit 24 - Enable analog DAC for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn anaen(&mut self) -> ANAEN_W<DAC0CFG1_SPEC> {
         ANAEN_W::new(self, 24)
     }
     #[doc = "Bits 28:31 - Lower 4 band-gap configuration/calibration parameters"]
     #[inline(always)]
-    #[must_use]
     pub fn refcfgl(&mut self) -> REFCFGL_W<DAC0CFG1_SPEC> {
         REFCFGL_W::new(self, 28)
     }
diff --git a/src/dac/dac0data.rs b/src/dac/dac0data.rs
index ed05c204..fc0d93c2 100644
--- a/src/dac/dac0data.rs
+++ b/src/dac/dac0data.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - DAC0 Data Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn data0(&mut self) -> DATA0_W<DAC0DATA_SPEC> {
         DATA0_W::new(self, 0)
     }
diff --git a/src/dac/dac0path.rs b/src/dac/dac0path.rs
index 5a00ed26..8eef28a8 100644
--- a/src/dac/dac0path.rs
+++ b/src/dac/dac0path.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat6(&mut self) -> PAT6_W<DAC0PATH_SPEC> {
         PAT6_W::new(self, 0)
     }
     #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat7(&mut self) -> PAT7_W<DAC0PATH_SPEC> {
         PAT7_W::new(self, 5)
     }
     #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat8(&mut self) -> PAT8_W<DAC0PATH_SPEC> {
         PAT8_W::new(self, 10)
     }
diff --git a/src/dac/dac0patl.rs b/src/dac/dac0patl.rs
index 1c270a3d..e05d886a 100644
--- a/src/dac/dac0patl.rs
+++ b/src/dac/dac0patl.rs
@@ -61,37 +61,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat0(&mut self) -> PAT0_W<DAC0PATL_SPEC> {
         PAT0_W::new(self, 0)
     }
     #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat1(&mut self) -> PAT1_W<DAC0PATL_SPEC> {
         PAT1_W::new(self, 5)
     }
     #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat2(&mut self) -> PAT2_W<DAC0PATL_SPEC> {
         PAT2_W::new(self, 10)
     }
     #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat3(&mut self) -> PAT3_W<DAC0PATL_SPEC> {
         PAT3_W::new(self, 15)
     }
     #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat4(&mut self) -> PAT4_W<DAC0PATL_SPEC> {
         PAT4_W::new(self, 20)
     }
     #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC0"]
     #[inline(always)]
-    #[must_use]
     pub fn pat5(&mut self) -> PAT5_W<DAC0PATL_SPEC> {
         PAT5_W::new(self, 25)
     }
diff --git a/src/dac/dac1cfg0.rs b/src/dac/dac1cfg0.rs
index d1bb5412..db8a8751 100644
--- a/src/dac/dac1cfg0.rs
+++ b/src/dac/dac1cfg0.rs
@@ -521,37 +521,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:19 - Integer Frequency Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn freq(&mut self) -> FREQ_W<DAC1CFG0_SPEC> {
         FREQ_W::new(self, 0)
     }
     #[doc = "Bits 20:22 - Enables and sets the Mode for DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn mode(&mut self) -> MODE_W<DAC1CFG0_SPEC> {
         MODE_W::new(self, 20)
     }
     #[doc = "Bit 23 - Selects between signed and unsigned DAC1 mode"]
     #[inline(always)]
-    #[must_use]
     pub fn sign(&mut self) -> SIGN_W<DAC1CFG0_SPEC> {
         SIGN_W::new(self, 23)
     }
     #[doc = "Bit 28 - Negates the DAC1 output"]
     #[inline(always)]
-    #[must_use]
     pub fn negate(&mut self) -> NEGATE_W<DAC1CFG0_SPEC> {
         NEGATE_W::new(self, 28)
     }
     #[doc = "Bit 29 - Enable sign output of DAC1 pattern generator"]
     #[inline(always)]
-    #[must_use]
     pub fn signen(&mut self) -> SIGNEN_W<DAC1CFG0_SPEC> {
         SIGNEN_W::new(self, 29)
     }
     #[doc = "Bit 30 - Enable DAC1 service request interrupt generation"]
     #[inline(always)]
-    #[must_use]
     pub fn sren(&mut self) -> SREN_W<DAC1CFG0_SPEC> {
         SREN_W::new(self, 30)
     }
diff --git a/src/dac/dac1cfg1.rs b/src/dac/dac1cfg1.rs
index 87e6bc09..7b74ae49 100644
--- a/src/dac/dac1cfg1.rs
+++ b/src/dac/dac1cfg1.rs
@@ -389,55 +389,46 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"]
     #[inline(always)]
-    #[must_use]
     pub fn scale(&mut self) -> SCALE_W<DAC1CFG1_SPEC> {
         SCALE_W::new(self, 0)
     }
     #[doc = "Bit 3 - Switch between up- and downscale of the DAC1 input data values"]
     #[inline(always)]
-    #[must_use]
     pub fn muldiv(&mut self) -> MULDIV_W<DAC1CFG1_SPEC> {
         MULDIV_W::new(self, 3)
     }
     #[doc = "Bits 4:11 - 8-bit offset value addition"]
     #[inline(always)]
-    #[must_use]
     pub fn offs(&mut self) -> OFFS_W<DAC1CFG1_SPEC> {
         OFFS_W::new(self, 4)
     }
     #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn trigsel(&mut self) -> TRIGSEL_W<DAC1CFG1_SPEC> {
         TRIGSEL_W::new(self, 12)
     }
     #[doc = "Bit 16 - Software Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn swtrig(&mut self) -> SWTRIG_W<DAC1CFG1_SPEC> {
         SWTRIG_W::new(self, 16)
     }
     #[doc = "Bits 17:18 - Select the trigger source for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn trigmod(&mut self) -> TRIGMOD_W<DAC1CFG1_SPEC> {
         TRIGMOD_W::new(self, 17)
     }
     #[doc = "Bits 19:23 - DAC1 analog configuration/calibration parameters"]
     #[inline(always)]
-    #[must_use]
     pub fn anacfg(&mut self) -> ANACFG_W<DAC1CFG1_SPEC> {
         ANACFG_W::new(self, 19)
     }
     #[doc = "Bit 24 - Enable analog DAC for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn anaen(&mut self) -> ANAEN_W<DAC1CFG1_SPEC> {
         ANAEN_W::new(self, 24)
     }
     #[doc = "Bits 28:31 - Higher 4 band-gap configuration/calibration parameters"]
     #[inline(always)]
-    #[must_use]
     pub fn refcfgh(&mut self) -> REFCFGH_W<DAC1CFG1_SPEC> {
         REFCFGH_W::new(self, 28)
     }
diff --git a/src/dac/dac1data.rs b/src/dac/dac1data.rs
index 3acf8765..e031968b 100644
--- a/src/dac/dac1data.rs
+++ b/src/dac/dac1data.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - DAC1 Data Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn data1(&mut self) -> DATA1_W<DAC1DATA_SPEC> {
         DATA1_W::new(self, 0)
     }
diff --git a/src/dac/dac1path.rs b/src/dac/dac1path.rs
index 0f0cc861..88069fbb 100644
--- a/src/dac/dac1path.rs
+++ b/src/dac/dac1path.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat6(&mut self) -> PAT6_W<DAC1PATH_SPEC> {
         PAT6_W::new(self, 0)
     }
     #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat7(&mut self) -> PAT7_W<DAC1PATH_SPEC> {
         PAT7_W::new(self, 5)
     }
     #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat8(&mut self) -> PAT8_W<DAC1PATH_SPEC> {
         PAT8_W::new(self, 10)
     }
diff --git a/src/dac/dac1patl.rs b/src/dac/dac1patl.rs
index 245057ab..0834e679 100644
--- a/src/dac/dac1patl.rs
+++ b/src/dac/dac1patl.rs
@@ -61,37 +61,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat0(&mut self) -> PAT0_W<DAC1PATL_SPEC> {
         PAT0_W::new(self, 0)
     }
     #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat1(&mut self) -> PAT1_W<DAC1PATL_SPEC> {
         PAT1_W::new(self, 5)
     }
     #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat2(&mut self) -> PAT2_W<DAC1PATL_SPEC> {
         PAT2_W::new(self, 10)
     }
     #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat3(&mut self) -> PAT3_W<DAC1PATL_SPEC> {
         PAT3_W::new(self, 15)
     }
     #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat4(&mut self) -> PAT4_W<DAC1PATL_SPEC> {
         PAT4_W::new(self, 20)
     }
     #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC1"]
     #[inline(always)]
-    #[must_use]
     pub fn pat5(&mut self) -> PAT5_W<DAC1PATL_SPEC> {
         PAT5_W::new(self, 25)
     }
diff --git a/src/dlr/lnen.rs b/src/dlr/lnen.rs
index 8943d8b6..e5349a65 100644
--- a/src/dlr/lnen.rs
+++ b/src/dlr/lnen.rs
@@ -471,49 +471,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Line 0 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ln0(&mut self) -> LN0_W<LNEN_SPEC> {
         LN0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Line 1 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ln1(&mut self) -> LN1_W<LNEN_SPEC> {
         LN1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Line 2 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ln2(&mut self) -> LN2_W<LNEN_SPEC> {
         LN2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Line 3 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ln3(&mut self) -> LN3_W<LNEN_SPEC> {
         LN3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Line 4 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ln4(&mut self) -> LN4_W<LNEN_SPEC> {
         LN4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Line 5 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ln5(&mut self) -> LN5_W<LNEN_SPEC> {
         LN5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Line 6 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ln6(&mut self) -> LN6_W<LNEN_SPEC> {
         LN6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Line 7 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ln7(&mut self) -> LN7_W<LNEN_SPEC> {
         LN7_W::new(self, 7)
     }
diff --git a/src/dlr/ovrclr.rs b/src/dlr/ovrclr.rs
index d175174c..85cd2b87 100644
--- a/src/dlr/ovrclr.rs
+++ b/src/dlr/ovrclr.rs
@@ -19,49 +19,41 @@ pub type LN7_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Line 0 Overrun Status Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ln0(&mut self) -> LN0_W<OVRCLR_SPEC> {
         LN0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Line 1 Overrun Status Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ln1(&mut self) -> LN1_W<OVRCLR_SPEC> {
         LN1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Line 2 Overrun Status Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ln2(&mut self) -> LN2_W<OVRCLR_SPEC> {
         LN2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Line 3 Overrun Status Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ln3(&mut self) -> LN3_W<OVRCLR_SPEC> {
         LN3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Line 4 Overrun Status Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ln4(&mut self) -> LN4_W<OVRCLR_SPEC> {
         LN4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Line 5 Overrun Status Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ln5(&mut self) -> LN5_W<OVRCLR_SPEC> {
         LN5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Line 6 Overrun Status Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ln6(&mut self) -> LN6_W<OVRCLR_SPEC> {
         LN6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Line 7 Overrun Status Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ln7(&mut self) -> LN7_W<OVRCLR_SPEC> {
         LN7_W::new(self, 7)
     }
diff --git a/src/dlr/srsel0.rs b/src/dlr/srsel0.rs
index 7e517870..16280dfd 100644
--- a/src/dlr/srsel0.rs
+++ b/src/dlr/srsel0.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Request Source for Line 0"]
     #[inline(always)]
-    #[must_use]
     pub fn rs0(&mut self) -> RS0_W<SRSEL0_SPEC> {
         RS0_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Request Source for Line 1"]
     #[inline(always)]
-    #[must_use]
     pub fn rs1(&mut self) -> RS1_W<SRSEL0_SPEC> {
         RS1_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Request Source for Line 2"]
     #[inline(always)]
-    #[must_use]
     pub fn rs2(&mut self) -> RS2_W<SRSEL0_SPEC> {
         RS2_W::new(self, 8)
     }
     #[doc = "Bits 12:15 - Request Source for Line 3"]
     #[inline(always)]
-    #[must_use]
     pub fn rs3(&mut self) -> RS3_W<SRSEL0_SPEC> {
         RS3_W::new(self, 12)
     }
     #[doc = "Bits 16:19 - Request Source for Line 4"]
     #[inline(always)]
-    #[must_use]
     pub fn rs4(&mut self) -> RS4_W<SRSEL0_SPEC> {
         RS4_W::new(self, 16)
     }
     #[doc = "Bits 20:23 - Request Source for Line 5"]
     #[inline(always)]
-    #[must_use]
     pub fn rs5(&mut self) -> RS5_W<SRSEL0_SPEC> {
         RS5_W::new(self, 20)
     }
     #[doc = "Bits 24:27 - Request Source for Line 6"]
     #[inline(always)]
-    #[must_use]
     pub fn rs6(&mut self) -> RS6_W<SRSEL0_SPEC> {
         RS6_W::new(self, 24)
     }
     #[doc = "Bits 28:31 - Request Source for Line 7"]
     #[inline(always)]
-    #[must_use]
     pub fn rs7(&mut self) -> RS7_W<SRSEL0_SPEC> {
         RS7_W::new(self, 28)
     }
diff --git a/src/eru0/exicon.rs b/src/eru0/exicon.rs
index c40074b5..f089ff22 100644
--- a/src/eru0/exicon.rs
+++ b/src/eru0/exicon.rs
@@ -595,55 +595,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Output Trigger Pulse Enable for ETLx"]
     #[inline(always)]
-    #[must_use]
     pub fn pe(&mut self) -> PE_W<EXICON_SPEC> {
         PE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Rebuild Level Detection for Status Flag for ETLx"]
     #[inline(always)]
-    #[must_use]
     pub fn ld(&mut self) -> LD_W<EXICON_SPEC> {
         LD_W::new(self, 1)
     }
     #[doc = "Bit 2 - Rising Edge Detection Enable ETLx"]
     #[inline(always)]
-    #[must_use]
     pub fn re(&mut self) -> RE_W<EXICON_SPEC> {
         RE_W::new(self, 2)
     }
     #[doc = "Bit 3 - Falling Edge Detection Enable ETLx"]
     #[inline(always)]
-    #[must_use]
     pub fn fe(&mut self) -> FE_W<EXICON_SPEC> {
         FE_W::new(self, 3)
     }
     #[doc = "Bits 4:6 - Output Channel Select for ETLx Output Trigger Pulse"]
     #[inline(always)]
-    #[must_use]
     pub fn ocs(&mut self) -> OCS_W<EXICON_SPEC> {
         OCS_W::new(self, 4)
     }
     #[doc = "Bit 7 - Status Flag for ETLx"]
     #[inline(always)]
-    #[must_use]
     pub fn fl(&mut self) -> FL_W<EXICON_SPEC> {
         FL_W::new(self, 7)
     }
     #[doc = "Bits 8:9 - Input Source Select for ERSx"]
     #[inline(always)]
-    #[must_use]
     pub fn ss(&mut self) -> SS_W<EXICON_SPEC> {
         SS_W::new(self, 8)
     }
     #[doc = "Bit 10 - Input A Negation Select for ERSx"]
     #[inline(always)]
-    #[must_use]
     pub fn na(&mut self) -> NA_W<EXICON_SPEC> {
         NA_W::new(self, 10)
     }
     #[doc = "Bit 11 - Input B Negation Select for ERSx"]
     #[inline(always)]
-    #[must_use]
     pub fn nb(&mut self) -> NB_W<EXICON_SPEC> {
         NB_W::new(self, 11)
     }
diff --git a/src/eru0/exisel.rs b/src/eru0/exisel.rs
index 182ff44e..7e2c7dae 100644
--- a/src/eru0/exisel.rs
+++ b/src/eru0/exisel.rs
@@ -735,49 +735,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Event Source Select for A0 (ERS0)"]
     #[inline(always)]
-    #[must_use]
     pub fn exs0a(&mut self) -> EXS0A_W<EXISEL_SPEC> {
         EXS0A_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Event Source Select for B0 (ERS0)"]
     #[inline(always)]
-    #[must_use]
     pub fn exs0b(&mut self) -> EXS0B_W<EXISEL_SPEC> {
         EXS0B_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Event Source Select for A1 (ERS1)"]
     #[inline(always)]
-    #[must_use]
     pub fn exs1a(&mut self) -> EXS1A_W<EXISEL_SPEC> {
         EXS1A_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Event Source Select for B1 (ERS1)"]
     #[inline(always)]
-    #[must_use]
     pub fn exs1b(&mut self) -> EXS1B_W<EXISEL_SPEC> {
         EXS1B_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Event Source Select for A2 (ERS2)"]
     #[inline(always)]
-    #[must_use]
     pub fn exs2a(&mut self) -> EXS2A_W<EXISEL_SPEC> {
         EXS2A_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Event Source Select for B2 (ERS2)"]
     #[inline(always)]
-    #[must_use]
     pub fn exs2b(&mut self) -> EXS2B_W<EXISEL_SPEC> {
         EXS2B_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Event Source Select for A3 (ERS3)"]
     #[inline(always)]
-    #[must_use]
     pub fn exs3a(&mut self) -> EXS3A_W<EXISEL_SPEC> {
         EXS3A_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Event Source Select for B3 (ERS3)"]
     #[inline(always)]
-    #[must_use]
     pub fn exs3b(&mut self) -> EXS3B_W<EXISEL_SPEC> {
         EXS3B_W::new(self, 14)
     }
diff --git a/src/eru0/exocon.rs b/src/eru0/exocon.rs
index 1a1523f5..619167c5 100644
--- a/src/eru0/exocon.rs
+++ b/src/eru0/exocon.rs
@@ -520,43 +520,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Internal Trigger Source Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn iss(&mut self) -> ISS_W<EXOCON_SPEC> {
         ISS_W::new(self, 0)
     }
     #[doc = "Bit 2 - Gating Event Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn geen(&mut self) -> GEEN_W<EXOCON_SPEC> {
         GEEN_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Gating Selection for Pattern Detection Result"]
     #[inline(always)]
-    #[must_use]
     pub fn gp(&mut self) -> GP_W<EXOCON_SPEC> {
         GP_W::new(self, 4)
     }
     #[doc = "Bit 12 - Pattern Detection Enable for ETL0"]
     #[inline(always)]
-    #[must_use]
     pub fn ipen0(&mut self) -> IPEN0_W<EXOCON_SPEC> {
         IPEN0_W::new(self, 12)
     }
     #[doc = "Bit 13 - Pattern Detection Enable for ETL1"]
     #[inline(always)]
-    #[must_use]
     pub fn ipen1(&mut self) -> IPEN1_W<EXOCON_SPEC> {
         IPEN1_W::new(self, 13)
     }
     #[doc = "Bit 14 - Pattern Detection Enable for ETL2"]
     #[inline(always)]
-    #[must_use]
     pub fn ipen2(&mut self) -> IPEN2_W<EXOCON_SPEC> {
         IPEN2_W::new(self, 14)
     }
     #[doc = "Bit 15 - Pattern Detection Enable for ETL3"]
     #[inline(always)]
-    #[must_use]
     pub fn ipen3(&mut self) -> IPEN3_W<EXOCON_SPEC> {
         IPEN3_W::new(self, 15)
     }
diff --git a/src/fce/clc.rs b/src/fce/clc.rs
index 9cdb8ac7..03caff79 100644
--- a/src/fce/clc.rs
+++ b/src/fce/clc.rs
@@ -23,7 +23,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Module Disable Request Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn disr(&mut self) -> DISR_W<CLC_SPEC> {
         DISR_W::new(self, 0)
     }
diff --git a/src/fce_ke0/cfg.rs b/src/fce_ke0/cfg.rs
index e2778c60..049b3a28 100644
--- a/src/fce_ke0/cfg.rs
+++ b/src/fce_ke0/cfg.rs
@@ -529,55 +529,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - CRC Mismatch Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn cmi(&mut self) -> CMI_W<CFG_SPEC> {
         CMI_W::new(self, 0)
     }
     #[doc = "Bit 1 - Configuration Error Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn cei(&mut self) -> CEI_W<CFG_SPEC> {
         CEI_W::new(self, 1)
     }
     #[doc = "Bit 2 - Length Error Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn lei(&mut self) -> LEI_W<CFG_SPEC> {
         LEI_W::new(self, 2)
     }
     #[doc = "Bit 3 - Bus Error Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn bei(&mut self) -> BEI_W<CFG_SPEC> {
         BEI_W::new(self, 3)
     }
     #[doc = "Bit 4 - CRC Check Comparison"]
     #[inline(always)]
-    #[must_use]
     pub fn cce(&mut self) -> CCE_W<CFG_SPEC> {
         CCE_W::new(self, 4)
     }
     #[doc = "Bit 5 - Automatic Length Reload"]
     #[inline(always)]
-    #[must_use]
     pub fn alr(&mut self) -> ALR_W<CFG_SPEC> {
         ALR_W::new(self, 5)
     }
     #[doc = "Bit 8 - IR Byte Wise Reflection"]
     #[inline(always)]
-    #[must_use]
     pub fn refin(&mut self) -> REFIN_W<CFG_SPEC> {
         REFIN_W::new(self, 8)
     }
     #[doc = "Bit 9 - CRC 32-Bit Wise Reflection"]
     #[inline(always)]
-    #[must_use]
     pub fn refout(&mut self) -> REFOUT_W<CFG_SPEC> {
         REFOUT_W::new(self, 9)
     }
     #[doc = "Bit 10 - Selects the value to be xored with the final CRC"]
     #[inline(always)]
-    #[must_use]
     pub fn xsel(&mut self) -> XSEL_W<CFG_SPEC> {
         XSEL_W::new(self, 10)
     }
diff --git a/src/fce_ke0/check.rs b/src/fce_ke0/check.rs
index c25f786f..8a7b4f70 100644
--- a/src/fce_ke0/check.rs
+++ b/src/fce_ke0/check.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - CHECK Register"]
     #[inline(always)]
-    #[must_use]
     pub fn check(&mut self) -> CHECK_W<CHECK_SPEC> {
         CHECK_W::new(self, 0)
     }
diff --git a/src/fce_ke0/crc.rs b/src/fce_ke0/crc.rs
index 5480390a..cca73a82 100644
--- a/src/fce_ke0/crc.rs
+++ b/src/fce_ke0/crc.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - CRC Register"]
     #[inline(always)]
-    #[must_use]
     pub fn crc(&mut self) -> CRC_W<CRC_SPEC> {
         CRC_W::new(self, 0)
     }
diff --git a/src/fce_ke0/ctr.rs b/src/fce_ke0/ctr.rs
index a7bbcb73..a2bcb399 100644
--- a/src/fce_ke0/ctr.rs
+++ b/src/fce_ke0/ctr.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Force CRC Mismatch"]
     #[inline(always)]
-    #[must_use]
     pub fn fcm(&mut self) -> FCM_W<CTR_SPEC> {
         FCM_W::new(self, 0)
     }
     #[doc = "Bit 1 - Force CFG Register Mismatch"]
     #[inline(always)]
-    #[must_use]
     pub fn frm_cfg(&mut self) -> FRM_CFG_W<CTR_SPEC> {
         FRM_CFG_W::new(self, 1)
     }
     #[doc = "Bit 2 - Force Check Register Mismatch"]
     #[inline(always)]
-    #[must_use]
     pub fn frm_check(&mut self) -> FRM_CHECK_W<CTR_SPEC> {
         FRM_CHECK_W::new(self, 2)
     }
diff --git a/src/fce_ke0/ir.rs b/src/fce_ke0/ir.rs
index 2fb540aa..9cbf1696 100644
--- a/src/fce_ke0/ir.rs
+++ b/src/fce_ke0/ir.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Input Register"]
     #[inline(always)]
-    #[must_use]
     pub fn ir(&mut self) -> IR_W<IR_SPEC> {
         IR_W::new(self, 0)
     }
diff --git a/src/fce_ke0/length.rs b/src/fce_ke0/length.rs
index 636ee919..73a5f682 100644
--- a/src/fce_ke0/length.rs
+++ b/src/fce_ke0/length.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Message Length Register"]
     #[inline(always)]
-    #[must_use]
     pub fn length(&mut self) -> LENGTH_W<LENGTH_SPEC> {
         LENGTH_W::new(self, 0)
     }
diff --git a/src/fce_ke0/sts.rs b/src/fce_ke0/sts.rs
index 08894209..01161303 100644
--- a/src/fce_ke0/sts.rs
+++ b/src/fce_ke0/sts.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - CRC Mismatch Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn cmf(&mut self) -> CMF_W<STS_SPEC> {
         CMF_W::new(self, 0)
     }
     #[doc = "Bit 1 - Configuration Error Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn cef(&mut self) -> CEF_W<STS_SPEC> {
         CEF_W::new(self, 1)
     }
     #[doc = "Bit 2 - Length Error Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn lef(&mut self) -> LEF_W<STS_SPEC> {
         LEF_W::new(self, 2)
     }
     #[doc = "Bit 3 - Bus Error Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn bef(&mut self) -> BEF_W<STS_SPEC> {
         BEF_W::new(self, 3)
     }
diff --git a/src/flash0/fcon.rs b/src/flash0/fcon.rs
index ced6d3ff..43ef765c 100644
--- a/src/flash0/fcon.rs
+++ b/src/flash0/fcon.rs
@@ -848,79 +848,66 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Wait States for read access to PFLASH"]
     #[inline(always)]
-    #[must_use]
     pub fn wspflash(&mut self) -> WSPFLASH_W<FCON_SPEC> {
         WSPFLASH_W::new(self, 0)
     }
     #[doc = "Bit 4 - Wait State for Error Correction of PFLASH"]
     #[inline(always)]
-    #[must_use]
     pub fn wsecpf(&mut self) -> WSECPF_W<FCON_SPEC> {
         WSECPF_W::new(self, 4)
     }
     #[doc = "Bit 13 - Dynamic Flash Idle"]
     #[inline(always)]
-    #[must_use]
     pub fn idle(&mut self) -> IDLE_W<FCON_SPEC> {
         IDLE_W::new(self, 13)
     }
     #[doc = "Bit 14 - External Sleep Request Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn esldis(&mut self) -> ESLDIS_W<FCON_SPEC> {
         ESLDIS_W::new(self, 14)
     }
     #[doc = "Bit 15 - Flash SLEEP"]
     #[inline(always)]
-    #[must_use]
     pub fn sleep(&mut self) -> SLEEP_W<FCON_SPEC> {
         SLEEP_W::new(self, 15)
     }
     #[doc = "Bit 17 - Disable Code Fetch from Flash Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn dcf(&mut self) -> DCF_W<FCON_SPEC> {
         DCF_W::new(self, 17)
     }
     #[doc = "Bit 18 - Disable Any Data Fetch from Flash"]
     #[inline(always)]
-    #[must_use]
     pub fn ddf(&mut self) -> DDF_W<FCON_SPEC> {
         DDF_W::new(self, 18)
     }
     #[doc = "Bit 24 - Verify and Operation Error Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn voperm(&mut self) -> VOPERM_W<FCON_SPEC> {
         VOPERM_W::new(self, 24)
     }
     #[doc = "Bit 25 - Command Sequence Error Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn sqerm(&mut self) -> SQERM_W<FCON_SPEC> {
         SQERM_W::new(self, 25)
     }
     #[doc = "Bit 26 - Protection Error Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn proerm(&mut self) -> PROERM_W<FCON_SPEC> {
         PROERM_W::new(self, 26)
     }
     #[doc = "Bit 27 - PFLASH Single-Bit Error Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn pfsberm(&mut self) -> PFSBERM_W<FCON_SPEC> {
         PFSBERM_W::new(self, 27)
     }
     #[doc = "Bit 29 - PFLASH Double-Bit Error Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn pfdberm(&mut self) -> PFDBERM_W<FCON_SPEC> {
         PFDBERM_W::new(self, 29)
     }
     #[doc = "Bit 31 - End of Busy Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn eobm(&mut self) -> EOBM_W<FCON_SPEC> {
         EOBM_W::new(self, 31)
     }
diff --git a/src/flash0/marp.rs b/src/flash0/marp.rs
index 40a6dc40..84105fea 100644
--- a/src/flash0/marp.rs
+++ b/src/flash0/marp.rs
@@ -143,13 +143,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - PFLASH Margin Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn margin(&mut self) -> MARGIN_W<MARP_SPEC> {
         MARGIN_W::new(self, 0)
     }
     #[doc = "Bit 15 - PFLASH Double-Bit Error Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn trapdis(&mut self) -> TRAPDIS_W<MARP_SPEC> {
         TRAPDIS_W::new(self, 15)
     }
diff --git a/src/generic.rs b/src/generic.rs
index b25072d8..c71a767b 100644
--- a/src/generic.rs
+++ b/src/generic.rs
@@ -509,11 +509,51 @@ impl<REG: Resettable + Writable> Reg<REG> {
     #[doc = " ```"]
     #[doc = " In the latter case, other fields will be set to their reset value."]
     #[inline(always)]
-    pub fn write<F>(&self, f: F)
+    pub fn write<F>(&self, f: F) -> REG::Ux
     where
         F: FnOnce(&mut W<REG>) -> &mut W<REG>,
     {
-        self.register.set(f(&mut W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits);
+        let value = f(&mut W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits;
+        self.register.set(value);
+        value
+    }
+    #[doc = " Writes bits to a `Writable` register and produce a value."]
+    #[doc = ""]
+    #[doc = " You can write raw bits into a register:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write_and(|w| unsafe { w.bits(rawbits); });"]
+    #[doc = " ```"]
+    #[doc = " or write only the fields you need:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write_and(|w| {"]
+    #[doc = "     w.field1().bits(newfield1bits)"]
+    #[doc = "         .field2().set_bit()"]
+    #[doc = "         .field3().variant(VARIANT);"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " or an alternative way of saying the same:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.write_and(|w| {"]
+    #[doc = "     w.field1().bits(newfield1bits);"]
+    #[doc = "     w.field2().set_bit();"]
+    #[doc = "     w.field3().variant(VARIANT);"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " In the latter case, other fields will be set to their reset value."]
+    #[doc = ""]
+    #[doc = " Values can be returned from the closure:"]
+    #[doc = " ```ignore"]
+    #[doc = " let state = periph.reg.write_and(|w| State::set(w.field1()));"]
+    #[doc = " ```"]
+    #[inline(always)]
+    pub fn from_write<F, T>(&self, f: F) -> T
+    where
+        F: FnOnce(&mut W<REG>) -> T,
+    {
+        let mut writer = W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData };
+        let result = f(&mut writer);
+        self.register.set(writer.bits);
+        result
     }
 }
 impl<REG: Writable> Reg<REG> {
@@ -525,11 +565,30 @@ impl<REG: Writable> Reg<REG> {
     #[doc = ""]
     #[doc = " Unsafe to use with registers which don't allow to write 0."]
     #[inline(always)]
-    pub unsafe fn write_with_zero<F>(&self, f: F)
+    pub unsafe fn write_with_zero<F>(&self, f: F) -> REG::Ux
     where
         F: FnOnce(&mut W<REG>) -> &mut W<REG>,
     {
-        self.register.set(f(&mut W { bits: REG::Ux::default(), _reg: marker::PhantomData }).bits);
+        let value = f(&mut W { bits: REG::Ux::default(), _reg: marker::PhantomData }).bits;
+        self.register.set(value);
+        value
+    }
+    #[doc = " Writes 0 to a `Writable` register and produces a value."]
+    #[doc = ""]
+    #[doc = " Similar to `write`, but unused bits will contain 0."]
+    #[doc = ""]
+    #[doc = " # Safety"]
+    #[doc = ""]
+    #[doc = " Unsafe to use with registers which don't allow to write 0."]
+    #[inline(always)]
+    pub unsafe fn from_write_with_zero<F, T>(&self, f: F) -> T
+    where
+        F: FnOnce(&mut W<REG>) -> T,
+    {
+        let mut writer = W { bits: REG::Ux::default(), _reg: marker::PhantomData };
+        let result = f(&mut writer);
+        self.register.set(writer.bits);
+        result
     }
 }
 impl<REG: Readable + Writable> Reg<REG> {
@@ -559,12 +618,56 @@ impl<REG: Readable + Writable> Reg<REG> {
     #[doc = " ```"]
     #[doc = " Other fields will have the value they had before the call to `modify`."]
     #[inline(always)]
-    pub fn modify<F>(&self, f: F)
+    pub fn modify<F>(&self, f: F) -> REG::Ux
     where
         for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> &'w mut W<REG>,
     {
         let bits = self.register.get();
-        self.register.set(f(&R { bits, _reg: marker::PhantomData }, &mut W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits);
+        let value = f(&R { bits, _reg: marker::PhantomData }, &mut W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits;
+        self.register.set(value);
+        value
+    }
+    #[doc = " Modifies the contents of the register by reading and then writing it"]
+    #[doc = " and produces a value."]
+    #[doc = ""]
+    #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
+    #[doc = " ```ignore"]
+    #[doc = " let bits = periph.reg.modify(|r, w| {"]
+    #[doc = "     let new_bits = r.bits() | 3;"]
+    #[doc = "     unsafe {"]
+    #[doc = "         w.bits(new_bits);"]
+    #[doc = "     }"]
+    #[doc = ""]
+    #[doc = "     new_bits"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " or"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.modify(|_, w| {"]
+    #[doc = "     w.field1().bits(newfield1bits)"]
+    #[doc = "         .field2().set_bit()"]
+    #[doc = "         .field3().variant(VARIANT);"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " or an alternative way of saying the same:"]
+    #[doc = " ```ignore"]
+    #[doc = " periph.reg.modify(|_, w| {"]
+    #[doc = "     w.field1().bits(newfield1bits);"]
+    #[doc = "     w.field2().set_bit();"]
+    #[doc = "     w.field3().variant(VARIANT);"]
+    #[doc = " });"]
+    #[doc = " ```"]
+    #[doc = " Other fields will have the value they had before the call to `modify`."]
+    #[inline(always)]
+    pub fn from_modify<F, T>(&self, f: F) -> T
+    where
+        for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> T,
+    {
+        let bits = self.register.get();
+        let mut writer = W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData };
+        let result = f(&R { bits, _reg: marker::PhantomData }, &mut writer);
+        self.register.set(writer.bits);
+        result
     }
 }
 impl<REG: Readable> core::fmt::Debug for crate::generic::Reg<REG>
diff --git a/src/generic/raw.rs b/src/generic/raw.rs
index a38c3ce2..c379f871 100644
--- a/src/generic/raw.rs
+++ b/src/generic/raw.rs
@@ -35,6 +35,7 @@ impl<FI> BitReader<FI> {
         Self { bits, _reg: marker::PhantomData }
     }
 }
+#[must_use = "after creating `FieldWriter` you need to call field value setting method"]
 pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe>
 where
     REG: Writable + RegisterSpec,
@@ -56,6 +57,7 @@ where
         Self { w, o, _field: marker::PhantomData }
     }
 }
+#[must_use = "after creating `BitWriter` you need to call bit setting method"]
 pub struct BitWriter<'a, REG, FI = bool, M = BitM>
 where
     REG: Writable + RegisterSpec,
diff --git a/src/gpdma0/chenreg.rs b/src/gpdma0/chenreg.rs
index 7ded0541..c36d0223 100644
--- a/src/gpdma0/chenreg.rs
+++ b/src/gpdma0/chenreg.rs
@@ -74,13 +74,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Enables/Disables the channel"]
     #[inline(always)]
-    #[must_use]
     pub fn ch(&mut self) -> CH_W<CHENREG_SPEC> {
         CH_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Channel enable write enable"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch(&mut self) -> WE_CH_W<CHENREG_SPEC> {
         WE_CH_W::new(self, 8)
     }
diff --git a/src/gpdma0/clearblock.rs b/src/gpdma0/clearblock.rs
index bfbfb6ae..72f2fa42 100644
--- a/src/gpdma0/clearblock.rs
+++ b/src/gpdma0/clearblock.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<CLEARBLOCK_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<CLEARBLOCK_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<CLEARBLOCK_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<CLEARBLOCK_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<CLEARBLOCK_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<CLEARBLOCK_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<CLEARBLOCK_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<CLEARBLOCK_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/cleardsttran.rs b/src/gpdma0/cleardsttran.rs
index 3dfd9a11..693b1372 100644
--- a/src/gpdma0/cleardsttran.rs
+++ b/src/gpdma0/cleardsttran.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<CLEARDSTTRAN_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<CLEARDSTTRAN_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<CLEARDSTTRAN_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<CLEARDSTTRAN_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<CLEARDSTTRAN_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<CLEARDSTTRAN_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<CLEARDSTTRAN_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<CLEARDSTTRAN_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/clearerr.rs b/src/gpdma0/clearerr.rs
index 291719fa..86f9c398 100644
--- a/src/gpdma0/clearerr.rs
+++ b/src/gpdma0/clearerr.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<CLEARERR_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<CLEARERR_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<CLEARERR_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<CLEARERR_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<CLEARERR_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<CLEARERR_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<CLEARERR_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<CLEARERR_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/clearsrctran.rs b/src/gpdma0/clearsrctran.rs
index 2f65eeec..538d2b1c 100644
--- a/src/gpdma0/clearsrctran.rs
+++ b/src/gpdma0/clearsrctran.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<CLEARSRCTRAN_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<CLEARSRCTRAN_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<CLEARSRCTRAN_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<CLEARSRCTRAN_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<CLEARSRCTRAN_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<CLEARSRCTRAN_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<CLEARSRCTRAN_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<CLEARSRCTRAN_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/cleartfr.rs b/src/gpdma0/cleartfr.rs
index 4b42e8d6..c8d8f212 100644
--- a/src/gpdma0/cleartfr.rs
+++ b/src/gpdma0/cleartfr.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<CLEARTFR_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<CLEARTFR_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<CLEARTFR_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<CLEARTFR_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<CLEARTFR_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<CLEARTFR_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<CLEARTFR_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<CLEARTFR_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/dmacfgreg.rs b/src/gpdma0/dmacfgreg.rs
index d1ab2132..4d6376b6 100644
--- a/src/gpdma0/dmacfgreg.rs
+++ b/src/gpdma0/dmacfgreg.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - GPDMA Enable bit."]
     #[inline(always)]
-    #[must_use]
     pub fn dma_en(&mut self) -> DMA_EN_W<DMACFGREG_SPEC> {
         DMA_EN_W::new(self, 0)
     }
diff --git a/src/gpdma0/lstdstreg.rs b/src/gpdma0/lstdstreg.rs
index dc6e398f..eff71ad3 100644
--- a/src/gpdma0/lstdstreg.rs
+++ b/src/gpdma0/lstdstreg.rs
@@ -719,97 +719,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Destination last request for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<LSTDSTREG_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Destination last request for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<LSTDSTREG_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Destination last request for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<LSTDSTREG_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Destination last request for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<LSTDSTREG_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Destination last request for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<LSTDSTREG_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Destination last request for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<LSTDSTREG_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Destination last request for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<LSTDSTREG_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Destination last request for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<LSTDSTREG_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Destination last transaction request write enable for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<LSTDSTREG_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Destination last transaction request write enable for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<LSTDSTREG_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Destination last transaction request write enable for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<LSTDSTREG_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Destination last transaction request write enable for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<LSTDSTREG_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Destination last transaction request write enable for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<LSTDSTREG_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Destination last transaction request write enable for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<LSTDSTREG_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Destination last transaction request write enable for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<LSTDSTREG_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Destination last transaction request write enable for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<LSTDSTREG_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/lstsrcreg.rs b/src/gpdma0/lstsrcreg.rs
index 35d048f3..9e44c037 100644
--- a/src/gpdma0/lstsrcreg.rs
+++ b/src/gpdma0/lstsrcreg.rs
@@ -719,97 +719,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Source last request for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<LSTSRCREG_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Source last request for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<LSTSRCREG_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Source last request for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<LSTSRCREG_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Source last request for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<LSTSRCREG_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Source last request for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<LSTSRCREG_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Source last request for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<LSTSRCREG_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Source last request for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<LSTSRCREG_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Source last request for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<LSTSRCREG_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Source last transaction request write enable for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<LSTSRCREG_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Source last transaction request write enable for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<LSTSRCREG_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Source last transaction request write enable for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<LSTSRCREG_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Source last transaction request write enable for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<LSTSRCREG_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Source last transaction request write enable for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<LSTSRCREG_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Source last transaction request write enable for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<LSTSRCREG_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Source last transaction request write enable for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<LSTSRCREG_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Source last transaction request write enable for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<LSTSRCREG_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/maskblock.rs b/src/gpdma0/maskblock.rs
index f071f88f..2044355c 100644
--- a/src/gpdma0/maskblock.rs
+++ b/src/gpdma0/maskblock.rs
@@ -719,97 +719,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Mask bit for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<MASKBLOCK_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Mask bit for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<MASKBLOCK_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Mask bit for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<MASKBLOCK_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Mask bit for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<MASKBLOCK_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Mask bit for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<MASKBLOCK_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Mask bit for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<MASKBLOCK_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Mask bit for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<MASKBLOCK_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Mask bit for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<MASKBLOCK_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Write enable for mask bit of channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<MASKBLOCK_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Write enable for mask bit of channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<MASKBLOCK_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Write enable for mask bit of channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<MASKBLOCK_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Write enable for mask bit of channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<MASKBLOCK_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Write enable for mask bit of channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<MASKBLOCK_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Write enable for mask bit of channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<MASKBLOCK_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Write enable for mask bit of channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<MASKBLOCK_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Write enable for mask bit of channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<MASKBLOCK_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/maskdsttran.rs b/src/gpdma0/maskdsttran.rs
index 2f3af5eb..ad229e31 100644
--- a/src/gpdma0/maskdsttran.rs
+++ b/src/gpdma0/maskdsttran.rs
@@ -719,97 +719,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Mask bit for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<MASKDSTTRAN_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Mask bit for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<MASKDSTTRAN_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Mask bit for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<MASKDSTTRAN_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Mask bit for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<MASKDSTTRAN_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Mask bit for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<MASKDSTTRAN_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Mask bit for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<MASKDSTTRAN_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Mask bit for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<MASKDSTTRAN_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Mask bit for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<MASKDSTTRAN_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Write enable for mask bit of channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<MASKDSTTRAN_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Write enable for mask bit of channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<MASKDSTTRAN_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Write enable for mask bit of channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<MASKDSTTRAN_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Write enable for mask bit of channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<MASKDSTTRAN_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Write enable for mask bit of channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<MASKDSTTRAN_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Write enable for mask bit of channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<MASKDSTTRAN_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Write enable for mask bit of channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<MASKDSTTRAN_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Write enable for mask bit of channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<MASKDSTTRAN_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/maskerr.rs b/src/gpdma0/maskerr.rs
index 1fb515c5..b1726f47 100644
--- a/src/gpdma0/maskerr.rs
+++ b/src/gpdma0/maskerr.rs
@@ -719,97 +719,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Mask bit for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<MASKERR_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Mask bit for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<MASKERR_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Mask bit for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<MASKERR_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Mask bit for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<MASKERR_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Mask bit for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<MASKERR_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Mask bit for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<MASKERR_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Mask bit for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<MASKERR_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Mask bit for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<MASKERR_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Write enable for mask bit of channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<MASKERR_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Write enable for mask bit of channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<MASKERR_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Write enable for mask bit of channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<MASKERR_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Write enable for mask bit of channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<MASKERR_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Write enable for mask bit of channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<MASKERR_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Write enable for mask bit of channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<MASKERR_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Write enable for mask bit of channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<MASKERR_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Write enable for mask bit of channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<MASKERR_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/masksrctran.rs b/src/gpdma0/masksrctran.rs
index 04b9d9c1..d1bd1c00 100644
--- a/src/gpdma0/masksrctran.rs
+++ b/src/gpdma0/masksrctran.rs
@@ -719,97 +719,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Mask bit for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<MASKSRCTRAN_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Mask bit for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<MASKSRCTRAN_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Mask bit for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<MASKSRCTRAN_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Mask bit for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<MASKSRCTRAN_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Mask bit for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<MASKSRCTRAN_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Mask bit for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<MASKSRCTRAN_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Mask bit for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<MASKSRCTRAN_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Mask bit for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<MASKSRCTRAN_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Write enable for mask bit of channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<MASKSRCTRAN_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Write enable for mask bit of channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<MASKSRCTRAN_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Write enable for mask bit of channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<MASKSRCTRAN_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Write enable for mask bit of channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<MASKSRCTRAN_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Write enable for mask bit of channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<MASKSRCTRAN_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Write enable for mask bit of channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<MASKSRCTRAN_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Write enable for mask bit of channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<MASKSRCTRAN_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Write enable for mask bit of channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<MASKSRCTRAN_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/masktfr.rs b/src/gpdma0/masktfr.rs
index a5c3842b..05ede0c3 100644
--- a/src/gpdma0/masktfr.rs
+++ b/src/gpdma0/masktfr.rs
@@ -719,97 +719,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Mask bit for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<MASKTFR_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Mask bit for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<MASKTFR_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Mask bit for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<MASKTFR_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Mask bit for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<MASKTFR_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Mask bit for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<MASKTFR_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Mask bit for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<MASKTFR_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Mask bit for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<MASKTFR_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Mask bit for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<MASKTFR_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Write enable for mask bit of channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<MASKTFR_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Write enable for mask bit of channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<MASKTFR_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Write enable for mask bit of channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<MASKTFR_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Write enable for mask bit of channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<MASKTFR_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Write enable for mask bit of channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<MASKTFR_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Write enable for mask bit of channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<MASKTFR_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Write enable for mask bit of channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<MASKTFR_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Write enable for mask bit of channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<MASKTFR_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/rawblock.rs b/src/gpdma0/rawblock.rs
index b54478a3..0925ac07 100644
--- a/src/gpdma0/rawblock.rs
+++ b/src/gpdma0/rawblock.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Raw Interrupt Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<RAWBLOCK_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Raw Interrupt Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<RAWBLOCK_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Raw Interrupt Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<RAWBLOCK_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Raw Interrupt Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<RAWBLOCK_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Raw Interrupt Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<RAWBLOCK_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Raw Interrupt Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<RAWBLOCK_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Raw Interrupt Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<RAWBLOCK_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Raw Interrupt Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<RAWBLOCK_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/rawdsttran.rs b/src/gpdma0/rawdsttran.rs
index c3634201..e813016e 100644
--- a/src/gpdma0/rawdsttran.rs
+++ b/src/gpdma0/rawdsttran.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Raw Interrupt Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<RAWDSTTRAN_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Raw Interrupt Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<RAWDSTTRAN_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Raw Interrupt Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<RAWDSTTRAN_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Raw Interrupt Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<RAWDSTTRAN_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Raw Interrupt Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<RAWDSTTRAN_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Raw Interrupt Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<RAWDSTTRAN_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Raw Interrupt Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<RAWDSTTRAN_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Raw Interrupt Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<RAWDSTTRAN_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/rawerr.rs b/src/gpdma0/rawerr.rs
index b281e2e6..8297efcc 100644
--- a/src/gpdma0/rawerr.rs
+++ b/src/gpdma0/rawerr.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Raw Interrupt Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<RAWERR_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Raw Interrupt Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<RAWERR_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Raw Interrupt Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<RAWERR_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Raw Interrupt Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<RAWERR_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Raw Interrupt Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<RAWERR_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Raw Interrupt Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<RAWERR_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Raw Interrupt Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<RAWERR_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Raw Interrupt Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<RAWERR_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/rawsrctran.rs b/src/gpdma0/rawsrctran.rs
index 8519037d..40a86155 100644
--- a/src/gpdma0/rawsrctran.rs
+++ b/src/gpdma0/rawsrctran.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Raw Interrupt Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<RAWSRCTRAN_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Raw Interrupt Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<RAWSRCTRAN_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Raw Interrupt Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<RAWSRCTRAN_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Raw Interrupt Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<RAWSRCTRAN_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Raw Interrupt Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<RAWSRCTRAN_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Raw Interrupt Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<RAWSRCTRAN_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Raw Interrupt Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<RAWSRCTRAN_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Raw Interrupt Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<RAWSRCTRAN_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/rawtfr.rs b/src/gpdma0/rawtfr.rs
index 6371ebb5..86619c4b 100644
--- a/src/gpdma0/rawtfr.rs
+++ b/src/gpdma0/rawtfr.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Raw Interrupt Status for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<RAWTFR_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Raw Interrupt Status for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<RAWTFR_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Raw Interrupt Status for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<RAWTFR_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Raw Interrupt Status for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<RAWTFR_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Raw Interrupt Status for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<RAWTFR_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Raw Interrupt Status for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<RAWTFR_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Raw Interrupt Status for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<RAWTFR_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Raw Interrupt Status for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<RAWTFR_SPEC> {
         CH7_W::new(self, 7)
     }
diff --git a/src/gpdma0/reqdstreg.rs b/src/gpdma0/reqdstreg.rs
index c721b3dd..6a4a149f 100644
--- a/src/gpdma0/reqdstreg.rs
+++ b/src/gpdma0/reqdstreg.rs
@@ -327,97 +327,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Source request for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<REQDSTREG_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Source request for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<REQDSTREG_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Source request for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<REQDSTREG_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Source request for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<REQDSTREG_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Source request for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<REQDSTREG_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Source request for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<REQDSTREG_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Source request for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<REQDSTREG_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Source request for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<REQDSTREG_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Source request write enable for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<REQDSTREG_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Source request write enable for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<REQDSTREG_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Source request write enable for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<REQDSTREG_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Source request write enable for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<REQDSTREG_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Source request write enable for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<REQDSTREG_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Source request write enable for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<REQDSTREG_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Source request write enable for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<REQDSTREG_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Source request write enable for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<REQDSTREG_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/reqsrcreg.rs b/src/gpdma0/reqsrcreg.rs
index f0bbf157..1be2fe6c 100644
--- a/src/gpdma0/reqsrcreg.rs
+++ b/src/gpdma0/reqsrcreg.rs
@@ -327,97 +327,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Source request for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<REQSRCREG_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Source request for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<REQSRCREG_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Source request for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<REQSRCREG_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Source request for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<REQSRCREG_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Source request for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<REQSRCREG_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Source request for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<REQSRCREG_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Source request for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<REQSRCREG_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Source request for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<REQSRCREG_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Source request write enable for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<REQSRCREG_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Source request write enable for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<REQSRCREG_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Source request write enable for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<REQSRCREG_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Source request write enable for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<REQSRCREG_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Source request write enable for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<REQSRCREG_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Source request write enable for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<REQSRCREG_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Source request write enable for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<REQSRCREG_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Source request write enable for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<REQSRCREG_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/sglreqdstreg.rs b/src/gpdma0/sglreqdstreg.rs
index 674f2e69..fef7f70e 100644
--- a/src/gpdma0/sglreqdstreg.rs
+++ b/src/gpdma0/sglreqdstreg.rs
@@ -327,97 +327,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Source request for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<SGLREQDSTREG_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Source request for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<SGLREQDSTREG_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Source request for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<SGLREQDSTREG_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Source request for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<SGLREQDSTREG_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Source request for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<SGLREQDSTREG_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Source request for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<SGLREQDSTREG_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Source request for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<SGLREQDSTREG_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Source request for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<SGLREQDSTREG_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Source request write enable for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<SGLREQDSTREG_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Source request write enable for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<SGLREQDSTREG_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Source request write enable for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<SGLREQDSTREG_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Source request write enable for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<SGLREQDSTREG_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Source request write enable for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<SGLREQDSTREG_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Source request write enable for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<SGLREQDSTREG_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Source request write enable for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<SGLREQDSTREG_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Source request write enable for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<SGLREQDSTREG_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0/sglreqsrcreg.rs b/src/gpdma0/sglreqsrcreg.rs
index ef731c5c..ca4d00b3 100644
--- a/src/gpdma0/sglreqsrcreg.rs
+++ b/src/gpdma0/sglreqsrcreg.rs
@@ -327,97 +327,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Source request for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ch0(&mut self) -> CH0_W<SGLREQSRCREG_SPEC> {
         CH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Source request for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ch1(&mut self) -> CH1_W<SGLREQSRCREG_SPEC> {
         CH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Source request for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ch2(&mut self) -> CH2_W<SGLREQSRCREG_SPEC> {
         CH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Source request for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ch3(&mut self) -> CH3_W<SGLREQSRCREG_SPEC> {
         CH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Source request for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ch4(&mut self) -> CH4_W<SGLREQSRCREG_SPEC> {
         CH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Source request for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ch5(&mut self) -> CH5_W<SGLREQSRCREG_SPEC> {
         CH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Source request for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ch6(&mut self) -> CH6_W<SGLREQSRCREG_SPEC> {
         CH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Source request for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ch7(&mut self) -> CH7_W<SGLREQSRCREG_SPEC> {
         CH7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Source request write enable for channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch0(&mut self) -> WE_CH0_W<SGLREQSRCREG_SPEC> {
         WE_CH0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Source request write enable for channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch1(&mut self) -> WE_CH1_W<SGLREQSRCREG_SPEC> {
         WE_CH1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Source request write enable for channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch2(&mut self) -> WE_CH2_W<SGLREQSRCREG_SPEC> {
         WE_CH2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Source request write enable for channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch3(&mut self) -> WE_CH3_W<SGLREQSRCREG_SPEC> {
         WE_CH3_W::new(self, 11)
     }
     #[doc = "Bit 12 - Source request write enable for channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch4(&mut self) -> WE_CH4_W<SGLREQSRCREG_SPEC> {
         WE_CH4_W::new(self, 12)
     }
     #[doc = "Bit 13 - Source request write enable for channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch5(&mut self) -> WE_CH5_W<SGLREQSRCREG_SPEC> {
         WE_CH5_W::new(self, 13)
     }
     #[doc = "Bit 14 - Source request write enable for channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch6(&mut self) -> WE_CH6_W<SGLREQSRCREG_SPEC> {
         WE_CH6_W::new(self, 14)
     }
     #[doc = "Bit 15 - Source request write enable for channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn we_ch7(&mut self) -> WE_CH7_W<SGLREQSRCREG_SPEC> {
         WE_CH7_W::new(self, 15)
     }
diff --git a/src/gpdma0_ch0/cfgh.rs b/src/gpdma0_ch0/cfgh.rs
index 8de6142d..542ddfcc 100644
--- a/src/gpdma0_ch0/cfgh.rs
+++ b/src/gpdma0_ch0/cfgh.rs
@@ -168,43 +168,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Flow Control Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn fcmode(&mut self) -> FCMODE_W<CFGH_SPEC> {
         FCMODE_W::new(self, 0)
     }
     #[doc = "Bit 1 - FIFO Mode Select"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_mode(&mut self) -> FIFO_MODE_W<CFGH_SPEC> {
         FIFO_MODE_W::new(self, 1)
     }
     #[doc = "Bits 2:4 - Protection Control"]
     #[inline(always)]
-    #[must_use]
     pub fn protctl(&mut self) -> PROTCTL_W<CFGH_SPEC> {
         PROTCTL_W::new(self, 2)
     }
     #[doc = "Bit 5 - Destination Status Update Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ds_upd_en(&mut self) -> DS_UPD_EN_W<CFGH_SPEC> {
         DS_UPD_EN_W::new(self, 5)
     }
     #[doc = "Bit 6 - Source Status Update Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ss_upd_en(&mut self) -> SS_UPD_EN_W<CFGH_SPEC> {
         SS_UPD_EN_W::new(self, 6)
     }
     #[doc = "Bits 7:10 - Source Peripheral"]
     #[inline(always)]
-    #[must_use]
     pub fn src_per(&mut self) -> SRC_PER_W<CFGH_SPEC> {
         SRC_PER_W::new(self, 7)
     }
     #[doc = "Bits 11:14 - Destination Peripheral"]
     #[inline(always)]
-    #[must_use]
     pub fn dest_per(&mut self) -> DEST_PER_W<CFGH_SPEC> {
         DEST_PER_W::new(self, 11)
     }
diff --git a/src/gpdma0_ch0/cfgl.rs b/src/gpdma0_ch0/cfgl.rs
index 4fbe0d80..aa4bb3aa 100644
--- a/src/gpdma0_ch0/cfgl.rs
+++ b/src/gpdma0_ch0/cfgl.rs
@@ -548,79 +548,66 @@ impl R {
 impl W {
     #[doc = "Bits 5:7 - Channel priority"]
     #[inline(always)]
-    #[must_use]
     pub fn ch_prior(&mut self) -> CH_PRIOR_W<CFGL_SPEC> {
         CH_PRIOR_W::new(self, 5)
     }
     #[doc = "Bit 8 - Channel Suspend"]
     #[inline(always)]
-    #[must_use]
     pub fn ch_susp(&mut self) -> CH_SUSP_W<CFGL_SPEC> {
         CH_SUSP_W::new(self, 8)
     }
     #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"]
     #[inline(always)]
-    #[must_use]
     pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W<CFGL_SPEC> {
         HS_SEL_DST_W::new(self, 10)
     }
     #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"]
     #[inline(always)]
-    #[must_use]
     pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W<CFGL_SPEC> {
         HS_SEL_SRC_W::new(self, 11)
     }
     #[doc = "Bits 12:13 - Channel Lock Level"]
     #[inline(always)]
-    #[must_use]
     pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W<CFGL_SPEC> {
         LOCK_CH_L_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Bus Lock Level"]
     #[inline(always)]
-    #[must_use]
     pub fn lock_b_l(&mut self) -> LOCK_B_L_W<CFGL_SPEC> {
         LOCK_B_L_W::new(self, 14)
     }
     #[doc = "Bit 16 - Channel Lock Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn lock_ch(&mut self) -> LOCK_CH_W<CFGL_SPEC> {
         LOCK_CH_W::new(self, 16)
     }
     #[doc = "Bit 17 - Bus Lock Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn lock_b(&mut self) -> LOCK_B_W<CFGL_SPEC> {
         LOCK_B_W::new(self, 17)
     }
     #[doc = "Bit 18 - Destination Handshaking Interface Polarity"]
     #[inline(always)]
-    #[must_use]
     pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W<CFGL_SPEC> {
         DST_HS_POL_W::new(self, 18)
     }
     #[doc = "Bit 19 - Source Handshaking Interface Polarity"]
     #[inline(always)]
-    #[must_use]
     pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W<CFGL_SPEC> {
         SRC_HS_POL_W::new(self, 19)
     }
     #[doc = "Bits 20:29 - Maximum AMBA Burst Length"]
     #[inline(always)]
-    #[must_use]
     pub fn max_abrst(&mut self) -> MAX_ABRST_W<CFGL_SPEC> {
         MAX_ABRST_W::new(self, 20)
     }
     #[doc = "Bit 30 - Automatic Source Reload"]
     #[inline(always)]
-    #[must_use]
     pub fn reload_src(&mut self) -> RELOAD_SRC_W<CFGL_SPEC> {
         RELOAD_SRC_W::new(self, 30)
     }
     #[doc = "Bit 31 - Automatic Destination Reload"]
     #[inline(always)]
-    #[must_use]
     pub fn reload_dst(&mut self) -> RELOAD_DST_W<CFGL_SPEC> {
         RELOAD_DST_W::new(self, 31)
     }
diff --git a/src/gpdma0_ch0/ctlh.rs b/src/gpdma0_ch0/ctlh.rs
index b458bd15..c743ee96 100644
--- a/src/gpdma0_ch0/ctlh.rs
+++ b/src/gpdma0_ch0/ctlh.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - Block Transfer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn block_ts(&mut self) -> BLOCK_TS_W<CTLH_SPEC> {
         BLOCK_TS_W::new(self, 0)
     }
     #[doc = "Bit 12 - Done bit"]
     #[inline(always)]
-    #[must_use]
     pub fn done(&mut self) -> DONE_W<CTLH_SPEC> {
         DONE_W::new(self, 12)
     }
diff --git a/src/gpdma0_ch0/ctll.rs b/src/gpdma0_ch0/ctll.rs
index de26965e..72dac3b8 100644
--- a/src/gpdma0_ch0/ctll.rs
+++ b/src/gpdma0_ch0/ctll.rs
@@ -351,73 +351,61 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Interrupt Enable Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn int_en(&mut self) -> INT_EN_W<CTLL_SPEC> {
         INT_EN_W::new(self, 0)
     }
     #[doc = "Bits 1:3 - Destination Transfer Width"]
     #[inline(always)]
-    #[must_use]
     pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W<CTLL_SPEC> {
         DST_TR_WIDTH_W::new(self, 1)
     }
     #[doc = "Bits 4:6 - Source Transfer Width"]
     #[inline(always)]
-    #[must_use]
     pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W<CTLL_SPEC> {
         SRC_TR_WIDTH_W::new(self, 4)
     }
     #[doc = "Bits 7:8 - Destination Address Increment"]
     #[inline(always)]
-    #[must_use]
     pub fn dinc(&mut self) -> DINC_W<CTLL_SPEC> {
         DINC_W::new(self, 7)
     }
     #[doc = "Bits 9:10 - Source Address Increment"]
     #[inline(always)]
-    #[must_use]
     pub fn sinc(&mut self) -> SINC_W<CTLL_SPEC> {
         SINC_W::new(self, 9)
     }
     #[doc = "Bits 11:13 - Destination Burst Transaction Length"]
     #[inline(always)]
-    #[must_use]
     pub fn dest_msize(&mut self) -> DEST_MSIZE_W<CTLL_SPEC> {
         DEST_MSIZE_W::new(self, 11)
     }
     #[doc = "Bits 14:16 - Source Burst Transaction Length"]
     #[inline(always)]
-    #[must_use]
     pub fn src_msize(&mut self) -> SRC_MSIZE_W<CTLL_SPEC> {
         SRC_MSIZE_W::new(self, 14)
     }
     #[doc = "Bit 17 - Source gather enable"]
     #[inline(always)]
-    #[must_use]
     pub fn src_gather_en(&mut self) -> SRC_GATHER_EN_W<CTLL_SPEC> {
         SRC_GATHER_EN_W::new(self, 17)
     }
     #[doc = "Bit 18 - Destination scatter enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dst_scatter_en(&mut self) -> DST_SCATTER_EN_W<CTLL_SPEC> {
         DST_SCATTER_EN_W::new(self, 18)
     }
     #[doc = "Bits 20:22 - Transfer Type and Flow Control"]
     #[inline(always)]
-    #[must_use]
     pub fn tt_fc(&mut self) -> TT_FC_W<CTLL_SPEC> {
         TT_FC_W::new(self, 20)
     }
     #[doc = "Bit 27 - Linked List Pointer for Destination Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn llp_dst_en(&mut self) -> LLP_DST_EN_W<CTLL_SPEC> {
         LLP_DST_EN_W::new(self, 27)
     }
     #[doc = "Bit 28 - Linked List Pointer for Source Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn llp_src_en(&mut self) -> LLP_SRC_EN_W<CTLL_SPEC> {
         LLP_SRC_EN_W::new(self, 28)
     }
diff --git a/src/gpdma0_ch0/dar.rs b/src/gpdma0_ch0/dar.rs
index 31720911..3b0869d6 100644
--- a/src/gpdma0_ch0/dar.rs
+++ b/src/gpdma0_ch0/dar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Current Destination address of DMA transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn dar(&mut self) -> DAR_W<DAR_SPEC> {
         DAR_W::new(self, 0)
     }
diff --git a/src/gpdma0_ch0/dsr.rs b/src/gpdma0_ch0/dsr.rs
index 83029db0..d1e6c4f4 100644
--- a/src/gpdma0_ch0/dsr.rs
+++ b/src/gpdma0_ch0/dsr.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:19 - Destination scatter interval"]
     #[inline(always)]
-    #[must_use]
     pub fn dsi(&mut self) -> DSI_W<DSR_SPEC> {
         DSI_W::new(self, 0)
     }
     #[doc = "Bits 20:31 - Destination scatter count"]
     #[inline(always)]
-    #[must_use]
     pub fn dsc(&mut self) -> DSC_W<DSR_SPEC> {
         DSC_W::new(self, 20)
     }
diff --git a/src/gpdma0_ch0/dstat.rs b/src/gpdma0_ch0/dstat.rs
index 60769385..c75d5dc9 100644
--- a/src/gpdma0_ch0/dstat.rs
+++ b/src/gpdma0_ch0/dstat.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Destination Status"]
     #[inline(always)]
-    #[must_use]
     pub fn dstat(&mut self) -> DSTAT_W<DSTAT_SPEC> {
         DSTAT_W::new(self, 0)
     }
diff --git a/src/gpdma0_ch0/dstatar.rs b/src/gpdma0_ch0/dstatar.rs
index 8bd34d67..afac1c84 100644
--- a/src/gpdma0_ch0/dstatar.rs
+++ b/src/gpdma0_ch0/dstatar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Destination Status Address"]
     #[inline(always)]
-    #[must_use]
     pub fn dstatar(&mut self) -> DSTATAR_W<DSTATAR_SPEC> {
         DSTATAR_W::new(self, 0)
     }
diff --git a/src/gpdma0_ch0/llp.rs b/src/gpdma0_ch0/llp.rs
index 421ae8ab..e64969b4 100644
--- a/src/gpdma0_ch0/llp.rs
+++ b/src/gpdma0_ch0/llp.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 2:31 - Starting Address In Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn loc(&mut self) -> LOC_W<LLP_SPEC> {
         LOC_W::new(self, 2)
     }
diff --git a/src/gpdma0_ch0/sar.rs b/src/gpdma0_ch0/sar.rs
index c932fdd2..ae33a3e6 100644
--- a/src/gpdma0_ch0/sar.rs
+++ b/src/gpdma0_ch0/sar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Current Source Address of DMA transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn sar(&mut self) -> SAR_W<SAR_SPEC> {
         SAR_W::new(self, 0)
     }
diff --git a/src/gpdma0_ch0/sgr.rs b/src/gpdma0_ch0/sgr.rs
index f1c1179a..7116a510 100644
--- a/src/gpdma0_ch0/sgr.rs
+++ b/src/gpdma0_ch0/sgr.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:19 - Source gather interval"]
     #[inline(always)]
-    #[must_use]
     pub fn sgi(&mut self) -> SGI_W<SGR_SPEC> {
         SGI_W::new(self, 0)
     }
     #[doc = "Bits 20:31 - Source gather count"]
     #[inline(always)]
-    #[must_use]
     pub fn sgc(&mut self) -> SGC_W<SGR_SPEC> {
         SGC_W::new(self, 20)
     }
diff --git a/src/gpdma0_ch0/sstat.rs b/src/gpdma0_ch0/sstat.rs
index 34527e7c..9a5f5eb6 100644
--- a/src/gpdma0_ch0/sstat.rs
+++ b/src/gpdma0_ch0/sstat.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Source Status"]
     #[inline(always)]
-    #[must_use]
     pub fn sstat(&mut self) -> SSTAT_W<SSTAT_SPEC> {
         SSTAT_W::new(self, 0)
     }
diff --git a/src/gpdma0_ch0/sstatar.rs b/src/gpdma0_ch0/sstatar.rs
index 0b5e1a48..ab1efca8 100644
--- a/src/gpdma0_ch0/sstatar.rs
+++ b/src/gpdma0_ch0/sstatar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Source Status Address"]
     #[inline(always)]
-    #[must_use]
     pub fn sstatar(&mut self) -> SSTATAR_W<SSTATAR_SPEC> {
         SSTATAR_W::new(self, 0)
     }
diff --git a/src/gpdma0_ch2/cfgh.rs b/src/gpdma0_ch2/cfgh.rs
index df3ebf0c..a11bf0dc 100644
--- a/src/gpdma0_ch2/cfgh.rs
+++ b/src/gpdma0_ch2/cfgh.rs
@@ -150,31 +150,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Flow Control Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn fcmode(&mut self) -> FCMODE_W<CFGH_SPEC> {
         FCMODE_W::new(self, 0)
     }
     #[doc = "Bit 1 - FIFO Mode Select"]
     #[inline(always)]
-    #[must_use]
     pub fn fifo_mode(&mut self) -> FIFO_MODE_W<CFGH_SPEC> {
         FIFO_MODE_W::new(self, 1)
     }
     #[doc = "Bits 2:4 - Protection Control"]
     #[inline(always)]
-    #[must_use]
     pub fn protctl(&mut self) -> PROTCTL_W<CFGH_SPEC> {
         PROTCTL_W::new(self, 2)
     }
     #[doc = "Bits 7:10 - Source Peripheral"]
     #[inline(always)]
-    #[must_use]
     pub fn src_per(&mut self) -> SRC_PER_W<CFGH_SPEC> {
         SRC_PER_W::new(self, 7)
     }
     #[doc = "Bits 11:14 - Destination Peripheral"]
     #[inline(always)]
-    #[must_use]
     pub fn dest_per(&mut self) -> DEST_PER_W<CFGH_SPEC> {
         DEST_PER_W::new(self, 11)
     }
diff --git a/src/gpdma0_ch2/cfgl.rs b/src/gpdma0_ch2/cfgl.rs
index 1dd2d4e2..95c31393 100644
--- a/src/gpdma0_ch2/cfgl.rs
+++ b/src/gpdma0_ch2/cfgl.rs
@@ -530,67 +530,56 @@ impl R {
 impl W {
     #[doc = "Bits 5:7 - Channel priority"]
     #[inline(always)]
-    #[must_use]
     pub fn ch_prior(&mut self) -> CH_PRIOR_W<CFGL_SPEC> {
         CH_PRIOR_W::new(self, 5)
     }
     #[doc = "Bit 8 - Channel Suspend"]
     #[inline(always)]
-    #[must_use]
     pub fn ch_susp(&mut self) -> CH_SUSP_W<CFGL_SPEC> {
         CH_SUSP_W::new(self, 8)
     }
     #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"]
     #[inline(always)]
-    #[must_use]
     pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W<CFGL_SPEC> {
         HS_SEL_DST_W::new(self, 10)
     }
     #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"]
     #[inline(always)]
-    #[must_use]
     pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W<CFGL_SPEC> {
         HS_SEL_SRC_W::new(self, 11)
     }
     #[doc = "Bits 12:13 - Channel Lock Level"]
     #[inline(always)]
-    #[must_use]
     pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W<CFGL_SPEC> {
         LOCK_CH_L_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Bus Lock Level"]
     #[inline(always)]
-    #[must_use]
     pub fn lock_b_l(&mut self) -> LOCK_B_L_W<CFGL_SPEC> {
         LOCK_B_L_W::new(self, 14)
     }
     #[doc = "Bit 16 - Channel Lock Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn lock_ch(&mut self) -> LOCK_CH_W<CFGL_SPEC> {
         LOCK_CH_W::new(self, 16)
     }
     #[doc = "Bit 17 - Bus Lock Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn lock_b(&mut self) -> LOCK_B_W<CFGL_SPEC> {
         LOCK_B_W::new(self, 17)
     }
     #[doc = "Bit 18 - Destination Handshaking Interface Polarity"]
     #[inline(always)]
-    #[must_use]
     pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W<CFGL_SPEC> {
         DST_HS_POL_W::new(self, 18)
     }
     #[doc = "Bit 19 - Source Handshaking Interface Polarity"]
     #[inline(always)]
-    #[must_use]
     pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W<CFGL_SPEC> {
         SRC_HS_POL_W::new(self, 19)
     }
     #[doc = "Bits 20:29 - Maximum AMBA Burst Length"]
     #[inline(always)]
-    #[must_use]
     pub fn max_abrst(&mut self) -> MAX_ABRST_W<CFGL_SPEC> {
         MAX_ABRST_W::new(self, 20)
     }
diff --git a/src/gpdma0_ch2/ctlh.rs b/src/gpdma0_ch2/ctlh.rs
index b458bd15..c743ee96 100644
--- a/src/gpdma0_ch2/ctlh.rs
+++ b/src/gpdma0_ch2/ctlh.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - Block Transfer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn block_ts(&mut self) -> BLOCK_TS_W<CTLH_SPEC> {
         BLOCK_TS_W::new(self, 0)
     }
     #[doc = "Bit 12 - Done bit"]
     #[inline(always)]
-    #[must_use]
     pub fn done(&mut self) -> DONE_W<CTLH_SPEC> {
         DONE_W::new(self, 12)
     }
diff --git a/src/gpdma0_ch2/ctll.rs b/src/gpdma0_ch2/ctll.rs
index b33e26ae..e08d6467 100644
--- a/src/gpdma0_ch2/ctll.rs
+++ b/src/gpdma0_ch2/ctll.rs
@@ -217,49 +217,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Interrupt Enable Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn int_en(&mut self) -> INT_EN_W<CTLL_SPEC> {
         INT_EN_W::new(self, 0)
     }
     #[doc = "Bits 1:3 - Destination Transfer Width"]
     #[inline(always)]
-    #[must_use]
     pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W<CTLL_SPEC> {
         DST_TR_WIDTH_W::new(self, 1)
     }
     #[doc = "Bits 4:6 - Source Transfer Width"]
     #[inline(always)]
-    #[must_use]
     pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W<CTLL_SPEC> {
         SRC_TR_WIDTH_W::new(self, 4)
     }
     #[doc = "Bits 7:8 - Destination Address Increment"]
     #[inline(always)]
-    #[must_use]
     pub fn dinc(&mut self) -> DINC_W<CTLL_SPEC> {
         DINC_W::new(self, 7)
     }
     #[doc = "Bits 9:10 - Source Address Increment"]
     #[inline(always)]
-    #[must_use]
     pub fn sinc(&mut self) -> SINC_W<CTLL_SPEC> {
         SINC_W::new(self, 9)
     }
     #[doc = "Bits 11:13 - Destination Burst Transaction Length"]
     #[inline(always)]
-    #[must_use]
     pub fn dest_msize(&mut self) -> DEST_MSIZE_W<CTLL_SPEC> {
         DEST_MSIZE_W::new(self, 11)
     }
     #[doc = "Bits 14:16 - Source Burst Transaction Length"]
     #[inline(always)]
-    #[must_use]
     pub fn src_msize(&mut self) -> SRC_MSIZE_W<CTLL_SPEC> {
         SRC_MSIZE_W::new(self, 14)
     }
     #[doc = "Bits 20:22 - Transfer Type and Flow Control"]
     #[inline(always)]
-    #[must_use]
     pub fn tt_fc(&mut self) -> TT_FC_W<CTLL_SPEC> {
         TT_FC_W::new(self, 20)
     }
diff --git a/src/gpdma0_ch2/dar.rs b/src/gpdma0_ch2/dar.rs
index 31720911..3b0869d6 100644
--- a/src/gpdma0_ch2/dar.rs
+++ b/src/gpdma0_ch2/dar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Current Destination address of DMA transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn dar(&mut self) -> DAR_W<DAR_SPEC> {
         DAR_W::new(self, 0)
     }
diff --git a/src/gpdma0_ch2/sar.rs b/src/gpdma0_ch2/sar.rs
index c932fdd2..ae33a3e6 100644
--- a/src/gpdma0_ch2/sar.rs
+++ b/src/gpdma0_ch2/sar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Current Source Address of DMA transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn sar(&mut self) -> SAR_W<SAR_SPEC> {
         SAR_W::new(self, 0)
     }
diff --git a/src/hrpwm0/csgcfg.rs b/src/hrpwm0/csgcfg.rs
index 1049161f..7dbd23f6 100644
--- a/src/hrpwm0/csgcfg.rs
+++ b/src/hrpwm0/csgcfg.rs
@@ -268,37 +268,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - CSG0 Power Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn c0pm(&mut self) -> C0PM_W<CSGCFG_SPEC> {
         C0PM_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - CSG1 Power Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn c1pm(&mut self) -> C1PM_W<CSGCFG_SPEC> {
         C1PM_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - CSG2 Power Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn c2pm(&mut self) -> C2PM_W<CSGCFG_SPEC> {
         C2PM_W::new(self, 4)
     }
     #[doc = "Bit 16 - CSG0 Clock disable"]
     #[inline(always)]
-    #[must_use]
     pub fn c0cd(&mut self) -> C0CD_W<CSGCFG_SPEC> {
         C0CD_W::new(self, 16)
     }
     #[doc = "Bit 17 - CSG1 Clock disable"]
     #[inline(always)]
-    #[must_use]
     pub fn c1cd(&mut self) -> C1CD_W<CSGCFG_SPEC> {
         C1CD_W::new(self, 17)
     }
     #[doc = "Bit 18 - CSG2 Clock disable"]
     #[inline(always)]
-    #[must_use]
     pub fn c2cd(&mut self) -> C2CD_W<CSGCFG_SPEC> {
         C2CD_W::new(self, 18)
     }
diff --git a/src/hrpwm0/csgclrg.rs b/src/hrpwm0/csgclrg.rs
index 1e2e7acc..b11733ca 100644
--- a/src/hrpwm0/csgclrg.rs
+++ b/src/hrpwm0/csgclrg.rs
@@ -21,55 +21,46 @@ pub type CC2P_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - DAC0 run bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cd0r(&mut self) -> CD0R_W<CSGCLRG_SPEC> {
         CD0R_W::new(self, 0)
     }
     #[doc = "Bit 1 - CMP0 run bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cc0r(&mut self) -> CC0R_W<CSGCLRG_SPEC> {
         CC0R_W::new(self, 1)
     }
     #[doc = "Bit 2 - CMP0 passive level clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cc0p(&mut self) -> CC0P_W<CSGCLRG_SPEC> {
         CC0P_W::new(self, 2)
     }
     #[doc = "Bit 4 - DAC1 run bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cd1r(&mut self) -> CD1R_W<CSGCLRG_SPEC> {
         CD1R_W::new(self, 4)
     }
     #[doc = "Bit 5 - CMP1 run bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cc1r(&mut self) -> CC1R_W<CSGCLRG_SPEC> {
         CC1R_W::new(self, 5)
     }
     #[doc = "Bit 6 - CMP1 passive level clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cc1p(&mut self) -> CC1P_W<CSGCLRG_SPEC> {
         CC1P_W::new(self, 6)
     }
     #[doc = "Bit 8 - DAC2 run bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cd2r(&mut self) -> CD2R_W<CSGCLRG_SPEC> {
         CD2R_W::new(self, 8)
     }
     #[doc = "Bit 9 - CMP2 run bit clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cc2r(&mut self) -> CC2R_W<CSGCLRG_SPEC> {
         CC2R_W::new(self, 9)
     }
     #[doc = "Bit 10 - CMP2 passive level clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cc2p(&mut self) -> CC2P_W<CSGCLRG_SPEC> {
         CC2P_W::new(self, 10)
     }
diff --git a/src/hrpwm0/csgfcg.rs b/src/hrpwm0/csgfcg.rs
index 54f542b4..bac0b967 100644
--- a/src/hrpwm0/csgfcg.rs
+++ b/src/hrpwm0/csgfcg.rs
@@ -33,91 +33,76 @@ pub type PS2CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Slope 0 start"]
     #[inline(always)]
-    #[must_use]
     pub fn s0str(&mut self) -> S0STR_W<CSGFCG_SPEC> {
         S0STR_W::new(self, 0)
     }
     #[doc = "Bit 1 - Slope 0 stop"]
     #[inline(always)]
-    #[must_use]
     pub fn s0stp(&mut self) -> S0STP_W<CSGFCG_SPEC> {
         S0STP_W::new(self, 1)
     }
     #[doc = "Bit 2 - Prescaler 0 start"]
     #[inline(always)]
-    #[must_use]
     pub fn ps0str(&mut self) -> PS0STR_W<CSGFCG_SPEC> {
         PS0STR_W::new(self, 2)
     }
     #[doc = "Bit 3 - Prescaler 0 stop"]
     #[inline(always)]
-    #[must_use]
     pub fn ps0stp(&mut self) -> PS0STP_W<CSGFCG_SPEC> {
         PS0STP_W::new(self, 3)
     }
     #[doc = "Bit 4 - Prescaler 0 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ps0clr(&mut self) -> PS0CLR_W<CSGFCG_SPEC> {
         PS0CLR_W::new(self, 4)
     }
     #[doc = "Bit 8 - Slope 1 start"]
     #[inline(always)]
-    #[must_use]
     pub fn s1str(&mut self) -> S1STR_W<CSGFCG_SPEC> {
         S1STR_W::new(self, 8)
     }
     #[doc = "Bit 9 - Slope 1 stop"]
     #[inline(always)]
-    #[must_use]
     pub fn s1stp(&mut self) -> S1STP_W<CSGFCG_SPEC> {
         S1STP_W::new(self, 9)
     }
     #[doc = "Bit 10 - Prescaler 1 start"]
     #[inline(always)]
-    #[must_use]
     pub fn ps1str(&mut self) -> PS1STR_W<CSGFCG_SPEC> {
         PS1STR_W::new(self, 10)
     }
     #[doc = "Bit 11 - Prescaler 1 stop"]
     #[inline(always)]
-    #[must_use]
     pub fn ps1stp(&mut self) -> PS1STP_W<CSGFCG_SPEC> {
         PS1STP_W::new(self, 11)
     }
     #[doc = "Bit 12 - Prescaler 1 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ps1clr(&mut self) -> PS1CLR_W<CSGFCG_SPEC> {
         PS1CLR_W::new(self, 12)
     }
     #[doc = "Bit 16 - Slope 2 start"]
     #[inline(always)]
-    #[must_use]
     pub fn s2str(&mut self) -> S2STR_W<CSGFCG_SPEC> {
         S2STR_W::new(self, 16)
     }
     #[doc = "Bit 17 - Slope 2 stop"]
     #[inline(always)]
-    #[must_use]
     pub fn s2stp(&mut self) -> S2STP_W<CSGFCG_SPEC> {
         S2STP_W::new(self, 17)
     }
     #[doc = "Bit 18 - Prescaler 2 start"]
     #[inline(always)]
-    #[must_use]
     pub fn ps2str(&mut self) -> PS2STR_W<CSGFCG_SPEC> {
         PS2STR_W::new(self, 18)
     }
     #[doc = "Bit 19 - Prescaler 2 stop"]
     #[inline(always)]
-    #[must_use]
     pub fn ps2stp(&mut self) -> PS2STP_W<CSGFCG_SPEC> {
         PS2STP_W::new(self, 19)
     }
     #[doc = "Bit 20 - Prescaler 2 clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ps2clr(&mut self) -> PS2CLR_W<CSGFCG_SPEC> {
         PS2CLR_W::new(self, 20)
     }
diff --git a/src/hrpwm0/csgsetg.rs b/src/hrpwm0/csgsetg.rs
index 0438d66a..370757ad 100644
--- a/src/hrpwm0/csgsetg.rs
+++ b/src/hrpwm0/csgsetg.rs
@@ -21,55 +21,46 @@ pub type SC2P_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - DAC0 run bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn sd0r(&mut self) -> SD0R_W<CSGSETG_SPEC> {
         SD0R_W::new(self, 0)
     }
     #[doc = "Bit 1 - CMP0 run bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn sc0r(&mut self) -> SC0R_W<CSGSETG_SPEC> {
         SC0R_W::new(self, 1)
     }
     #[doc = "Bit 2 - CMP0 passive level set"]
     #[inline(always)]
-    #[must_use]
     pub fn sc0p(&mut self) -> SC0P_W<CSGSETG_SPEC> {
         SC0P_W::new(self, 2)
     }
     #[doc = "Bit 4 - DAC1 run bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn sd1r(&mut self) -> SD1R_W<CSGSETG_SPEC> {
         SD1R_W::new(self, 4)
     }
     #[doc = "Bit 5 - CMP1 run bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn sc1r(&mut self) -> SC1R_W<CSGSETG_SPEC> {
         SC1R_W::new(self, 5)
     }
     #[doc = "Bit 6 - CMP1 passive level set"]
     #[inline(always)]
-    #[must_use]
     pub fn sc1p(&mut self) -> SC1P_W<CSGSETG_SPEC> {
         SC1P_W::new(self, 6)
     }
     #[doc = "Bit 8 - DAC2 run bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn sd2r(&mut self) -> SD2R_W<CSGSETG_SPEC> {
         SD2R_W::new(self, 8)
     }
     #[doc = "Bit 9 - CMP2 run bit set"]
     #[inline(always)]
-    #[must_use]
     pub fn sc2r(&mut self) -> SC2R_W<CSGSETG_SPEC> {
         SC2R_W::new(self, 9)
     }
     #[doc = "Bit 10 - CMP2 passive level set"]
     #[inline(always)]
-    #[must_use]
     pub fn sc2p(&mut self) -> SC2P_W<CSGSETG_SPEC> {
         SC2P_W::new(self, 10)
     }
diff --git a/src/hrpwm0/csgtrc.rs b/src/hrpwm0/csgtrc.rs
index 75f1649a..4956cdaf 100644
--- a/src/hrpwm0/csgtrc.rs
+++ b/src/hrpwm0/csgtrc.rs
@@ -9,19 +9,16 @@ pub type D2SEC_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - DAC0 shadow transfer enable clear"]
     #[inline(always)]
-    #[must_use]
     pub fn d0sec(&mut self) -> D0SEC_W<CSGTRC_SPEC> {
         D0SEC_W::new(self, 0)
     }
     #[doc = "Bit 4 - DAC1 shadow transfer enable clear"]
     #[inline(always)]
-    #[must_use]
     pub fn d1sec(&mut self) -> D1SEC_W<CSGTRC_SPEC> {
         D1SEC_W::new(self, 4)
     }
     #[doc = "Bit 8 - DAC2 shadow transfer enable clear"]
     #[inline(always)]
-    #[must_use]
     pub fn d2sec(&mut self) -> D2SEC_W<CSGTRC_SPEC> {
         D2SEC_W::new(self, 8)
     }
diff --git a/src/hrpwm0/csgtrg.rs b/src/hrpwm0/csgtrg.rs
index 889dd2c7..b1cc1b39 100644
--- a/src/hrpwm0/csgtrg.rs
+++ b/src/hrpwm0/csgtrg.rs
@@ -15,37 +15,31 @@ pub type D2SVS_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - DAC0 shadow transfer enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn d0ses(&mut self) -> D0SES_W<CSGTRG_SPEC> {
         D0SES_W::new(self, 0)
     }
     #[doc = "Bit 1 - CMP0 inverting input switch request"]
     #[inline(always)]
-    #[must_use]
     pub fn d0svs(&mut self) -> D0SVS_W<CSGTRG_SPEC> {
         D0SVS_W::new(self, 1)
     }
     #[doc = "Bit 4 - DAC1 shadow transfer enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn d1ses(&mut self) -> D1SES_W<CSGTRG_SPEC> {
         D1SES_W::new(self, 4)
     }
     #[doc = "Bit 5 - CMP1 inverting input switch request"]
     #[inline(always)]
-    #[must_use]
     pub fn d1svs(&mut self) -> D1SVS_W<CSGTRG_SPEC> {
         D1SVS_W::new(self, 5)
     }
     #[doc = "Bit 8 - DAC2 shadow transfer enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn d2ses(&mut self) -> D2SES_W<CSGTRG_SPEC> {
         D2SES_W::new(self, 8)
     }
     #[doc = "Bit 9 - CMP2 inverting input switch request"]
     #[inline(always)]
-    #[must_use]
     pub fn d2svs(&mut self) -> D2SVS_W<CSGTRG_SPEC> {
         D2SVS_W::new(self, 9)
     }
diff --git a/src/hrpwm0/glbana.rs b/src/hrpwm0/glbana.rs
index 517a0f49..ccb67628 100644
--- a/src/hrpwm0/glbana.rs
+++ b/src/hrpwm0/glbana.rs
@@ -137,55 +137,46 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Delay of lock detection"]
     #[inline(always)]
-    #[must_use]
     pub fn sldly(&mut self) -> SLDLY_W<GLBANA_SPEC> {
         SLDLY_W::new(self, 0)
     }
     #[doc = "Bit 2 - Force chargepump up"]
     #[inline(always)]
-    #[must_use]
     pub fn fup(&mut self) -> FUP_W<GLBANA_SPEC> {
         FUP_W::new(self, 2)
     }
     #[doc = "Bit 3 - Force chargepump down"]
     #[inline(always)]
-    #[must_use]
     pub fn fdn(&mut self) -> FDN_W<GLBANA_SPEC> {
         FDN_W::new(self, 3)
     }
     #[doc = "Bits 6:8 - HRCs chargepump current selection"]
     #[inline(always)]
-    #[must_use]
     pub fn slcp(&mut self) -> SLCP_W<GLBANA_SPEC> {
         SLCP_W::new(self, 6)
     }
     #[doc = "Bits 9:10 - HRCs LDO bias current"]
     #[inline(always)]
-    #[must_use]
     pub fn slibldo(&mut self) -> SLIBLDO_W<GLBANA_SPEC> {
         SLIBLDO_W::new(self, 9)
     }
     #[doc = "Bits 11:12 - HRCs loop filter bias current"]
     #[inline(always)]
-    #[must_use]
     pub fn sliblf(&mut self) -> SLIBLF_W<GLBANA_SPEC> {
         SLIBLF_W::new(self, 11)
     }
     #[doc = "Bits 13:15 - Reference voltage for chargepump and loop filter"]
     #[inline(always)]
-    #[must_use]
     pub fn slvref(&mut self) -> SLVREF_W<GLBANA_SPEC> {
         SLVREF_W::new(self, 13)
     }
     #[doc = "Bits 16:17 - Bias trimming"]
     #[inline(always)]
-    #[must_use]
     pub fn tribias(&mut self) -> TRIBIAS_W<GLBANA_SPEC> {
         TRIBIAS_W::new(self, 16)
     }
     #[doc = "Bit 18 - Force chargepump down"]
     #[inline(always)]
-    #[must_use]
     pub fn ghren(&mut self) -> GHREN_W<GLBANA_SPEC> {
         GHREN_W::new(self, 18)
     }
diff --git a/src/hrpwm0/hrbsc.rs b/src/hrpwm0/hrbsc.rs
index a5f3532c..5cb189b7 100644
--- a/src/hrpwm0/hrbsc.rs
+++ b/src/hrpwm0/hrbsc.rs
@@ -107,13 +107,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Suspend configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn suscfg(&mut self) -> SUSCFG_W<HRBSC_SPEC> {
         SUSCFG_W::new(self, 0)
     }
     #[doc = "Bit 8 - HRPWM bias enable"]
     #[inline(always)]
-    #[must_use]
     pub fn hrbe(&mut self) -> HRBE_W<HRBSC_SPEC> {
         HRBE_W::new(self, 8)
     }
diff --git a/src/hrpwm0/hrccfg.rs b/src/hrpwm0/hrccfg.rs
index ef79769b..ad4b1620 100644
--- a/src/hrpwm0/hrccfg.rs
+++ b/src/hrpwm0/hrccfg.rs
@@ -620,61 +620,51 @@ impl R {
 impl W {
     #[doc = "Bit 0 - High resolution channels power mode"]
     #[inline(always)]
-    #[must_use]
     pub fn hrcpm(&mut self) -> HRCPM_W<HRCCFG_SPEC> {
         HRCPM_W::new(self, 0)
     }
     #[doc = "Bit 4 - HRC0 high resolution enable"]
     #[inline(always)]
-    #[must_use]
     pub fn hrc0e(&mut self) -> HRC0E_W<HRCCFG_SPEC> {
         HRC0E_W::new(self, 4)
     }
     #[doc = "Bit 5 - HRC1 high resolution channel enable"]
     #[inline(always)]
-    #[must_use]
     pub fn hrc1e(&mut self) -> HRC1E_W<HRCCFG_SPEC> {
         HRC1E_W::new(self, 5)
     }
     #[doc = "Bit 6 - HRC2 high resolution channel enable"]
     #[inline(always)]
-    #[must_use]
     pub fn hrc2e(&mut self) -> HRC2E_W<HRCCFG_SPEC> {
         HRC2E_W::new(self, 6)
     }
     #[doc = "Bit 7 - HRC3 high resolution channel enable"]
     #[inline(always)]
-    #[must_use]
     pub fn hrc3e(&mut self) -> HRC3E_W<HRCCFG_SPEC> {
         HRC3E_W::new(self, 7)
     }
     #[doc = "Bits 16:18 - Clock information control"]
     #[inline(always)]
-    #[must_use]
     pub fn clkc(&mut self) -> CLKC_W<HRCCFG_SPEC> {
         CLKC_W::new(self, 16)
     }
     #[doc = "Bit 20 - HRC0 low resolution channel enable"]
     #[inline(always)]
-    #[must_use]
     pub fn lrc0e(&mut self) -> LRC0E_W<HRCCFG_SPEC> {
         LRC0E_W::new(self, 20)
     }
     #[doc = "Bit 21 - HRC1 low resolution channel enable"]
     #[inline(always)]
-    #[must_use]
     pub fn lrc1e(&mut self) -> LRC1E_W<HRCCFG_SPEC> {
         LRC1E_W::new(self, 21)
     }
     #[doc = "Bit 22 - HRC2 low resolution channel enable"]
     #[inline(always)]
-    #[must_use]
     pub fn lrc2e(&mut self) -> LRC2E_W<HRCCFG_SPEC> {
         LRC2E_W::new(self, 22)
     }
     #[doc = "Bit 23 - HRC3 low resolution channel enable"]
     #[inline(always)]
-    #[must_use]
     pub fn lrc3e(&mut self) -> LRC3E_W<HRCCFG_SPEC> {
         LRC3E_W::new(self, 23)
     }
diff --git a/src/hrpwm0/hrcctrg.rs b/src/hrpwm0/hrcctrg.rs
index 93571c63..2b6db7c3 100644
--- a/src/hrpwm0/hrcctrg.rs
+++ b/src/hrpwm0/hrcctrg.rs
@@ -19,49 +19,41 @@ pub type H3DEC_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - HRC0 high resolution values shadow transfer Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn h0ec(&mut self) -> H0EC_W<HRCCTRG_SPEC> {
         H0EC_W::new(self, 0)
     }
     #[doc = "Bit 1 - HRC0 dead time value shadow transfer Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn h0dec(&mut self) -> H0DEC_W<HRCCTRG_SPEC> {
         H0DEC_W::new(self, 1)
     }
     #[doc = "Bit 4 - HRC1 high resolution values shadow transfer Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn h1ec(&mut self) -> H1EC_W<HRCCTRG_SPEC> {
         H1EC_W::new(self, 4)
     }
     #[doc = "Bit 5 - HRC1 dead time value shadow transfer Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn h1dec(&mut self) -> H1DEC_W<HRCCTRG_SPEC> {
         H1DEC_W::new(self, 5)
     }
     #[doc = "Bit 8 - HRC2 high resolution values shadow transfer Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn h2cec(&mut self) -> H2CEC_W<HRCCTRG_SPEC> {
         H2CEC_W::new(self, 8)
     }
     #[doc = "Bit 9 - HRC2 dead time value shadow transfer Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn h2dec(&mut self) -> H2DEC_W<HRCCTRG_SPEC> {
         H2DEC_W::new(self, 9)
     }
     #[doc = "Bit 12 - HRC3 high resolution values shadow transfer Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn h3ec(&mut self) -> H3EC_W<HRCCTRG_SPEC> {
         H3EC_W::new(self, 12)
     }
     #[doc = "Bit 13 - HRC3 dead time value shadow transfer Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn h3dec(&mut self) -> H3DEC_W<HRCCTRG_SPEC> {
         H3DEC_W::new(self, 13)
     }
diff --git a/src/hrpwm0/hrcstrg.rs b/src/hrpwm0/hrcstrg.rs
index 0cacd9de..39817ef8 100644
--- a/src/hrpwm0/hrcstrg.rs
+++ b/src/hrpwm0/hrcstrg.rs
@@ -19,49 +19,41 @@ pub type H3DES_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - HRC0 high resolution values shadow transfer Enable Set"]
     #[inline(always)]
-    #[must_use]
     pub fn h0es(&mut self) -> H0ES_W<HRCSTRG_SPEC> {
         H0ES_W::new(self, 0)
     }
     #[doc = "Bit 1 - HRC0 dead time value shadow transfer enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn h0des(&mut self) -> H0DES_W<HRCSTRG_SPEC> {
         H0DES_W::new(self, 1)
     }
     #[doc = "Bit 4 - HRC1 high resolution values shadow transfer Enable Set"]
     #[inline(always)]
-    #[must_use]
     pub fn h1es(&mut self) -> H1ES_W<HRCSTRG_SPEC> {
         H1ES_W::new(self, 4)
     }
     #[doc = "Bit 5 - HRC0 dead time value shadow transfer enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn h1des(&mut self) -> H1DES_W<HRCSTRG_SPEC> {
         H1DES_W::new(self, 5)
     }
     #[doc = "Bit 8 - HRC2 high resolution values shadow transfer Enable Set"]
     #[inline(always)]
-    #[must_use]
     pub fn h2es(&mut self) -> H2ES_W<HRCSTRG_SPEC> {
         H2ES_W::new(self, 8)
     }
     #[doc = "Bit 9 - HRC0 dead time value shadow transfer enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn h2des(&mut self) -> H2DES_W<HRCSTRG_SPEC> {
         H2DES_W::new(self, 9)
     }
     #[doc = "Bit 12 - HRC3 high resolution values shadow transfer Enable Set"]
     #[inline(always)]
-    #[must_use]
     pub fn h3es(&mut self) -> H3ES_W<HRCSTRG_SPEC> {
         H3ES_W::new(self, 12)
     }
     #[doc = "Bit 13 - HRC0 dead time value shadow transfer enable set"]
     #[inline(always)]
-    #[must_use]
     pub fn h3des(&mut self) -> H3DES_W<HRCSTRG_SPEC> {
         H3DES_W::new(self, 13)
     }
diff --git a/src/hrpwm0_csg0/blv.rs b/src/hrpwm0_csg0/blv.rs
index 9c281647..a4ca1c34 100644
--- a/src/hrpwm0_csg0/blv.rs
+++ b/src/hrpwm0_csg0/blv.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Blanking value"]
     #[inline(always)]
-    #[must_use]
     pub fn blv(&mut self) -> BLV_W<BLV_SPEC> {
         BLV_W::new(self, 0)
     }
diff --git a/src/hrpwm0_csg0/cc.rs b/src/hrpwm0_csg0/cc.rs
index 90285664..4b847e0f 100644
--- a/src/hrpwm0_csg0/cc.rs
+++ b/src/hrpwm0_csg0/cc.rs
@@ -796,67 +796,56 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - External blanking trigger selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ibs(&mut self) -> IBS_W<CC_SPEC> {
         IBS_W::new(self, 0)
     }
     #[doc = "Bit 8 - Inverting comparator input selector"]
     #[inline(always)]
-    #[must_use]
     pub fn imcs(&mut self) -> IMCS_W<CC_SPEC> {
         IMCS_W::new(self, 8)
     }
     #[doc = "Bits 9:10 - Comparator input switching configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn imcc(&mut self) -> IMCC_W<CC_SPEC> {
         IMCC_W::new(self, 9)
     }
     #[doc = "Bit 11 - External triggered switch enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ese(&mut self) -> ESE_W<CC_SPEC> {
         ESE_W::new(self, 11)
     }
     #[doc = "Bit 12 - Comparator output inversion enable"]
     #[inline(always)]
-    #[must_use]
     pub fn oie(&mut self) -> OIE_W<CC_SPEC> {
         OIE_W::new(self, 12)
     }
     #[doc = "Bit 13 - Comparator output synchronization enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ose(&mut self) -> OSE_W<CC_SPEC> {
         OSE_W::new(self, 13)
     }
     #[doc = "Bits 14:15 - Blanking mode"]
     #[inline(always)]
-    #[must_use]
     pub fn blmc(&mut self) -> BLMC_W<CC_SPEC> {
         BLMC_W::new(self, 14)
     }
     #[doc = "Bit 16 - External blanking trigger enabled"]
     #[inline(always)]
-    #[must_use]
     pub fn ebe(&mut self) -> EBE_W<CC_SPEC> {
         EBE_W::new(self, 16)
     }
     #[doc = "Bit 17 - Comparator output filter enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cofe(&mut self) -> COFE_W<CC_SPEC> {
         COFE_W::new(self, 17)
     }
     #[doc = "Bits 18:21 - Comparator output filter window"]
     #[inline(always)]
-    #[must_use]
     pub fn cofm(&mut self) -> COFM_W<CC_SPEC> {
         COFM_W::new(self, 18)
     }
     #[doc = "Bits 24:25 - Comparator output filter control"]
     #[inline(always)]
-    #[must_use]
     pub fn cofc(&mut self) -> COFC_W<CC_SPEC> {
         COFC_W::new(self, 24)
     }
diff --git a/src/hrpwm0_csg0/dci.rs b/src/hrpwm0_csg0/dci.rs
index 68d71da7..e32a26f9 100644
--- a/src/hrpwm0_csg0/dci.rs
+++ b/src/hrpwm0_csg0/dci.rs
@@ -381,37 +381,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Value Selector input selection"]
     #[inline(always)]
-    #[must_use]
     pub fn svis(&mut self) -> SVIS_W<DCI_SPEC> {
         SVIS_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Slope generation start control input selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stris(&mut self) -> STRIS_W<DCI_SPEC> {
         STRIS_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Slope generation stop control input selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stpis(&mut self) -> STPIS_W<DCI_SPEC> {
         STPIS_W::new(self, 8)
     }
     #[doc = "Bits 12:15 - External conversion trigger input selection"]
     #[inline(always)]
-    #[must_use]
     pub fn trgis(&mut self) -> TRGIS_W<DCI_SPEC> {
         TRGIS_W::new(self, 12)
     }
     #[doc = "Bits 16:19 - External shadow request enable input selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stis(&mut self) -> STIS_W<DCI_SPEC> {
         STIS_W::new(self, 16)
     }
     #[doc = "Bits 20:21 - Slope generation clock selection"]
     #[inline(always)]
-    #[must_use]
     pub fn scs(&mut self) -> SCS_W<DCI_SPEC> {
         SCS_W::new(self, 20)
     }
diff --git a/src/hrpwm0_csg0/dsv2.rs b/src/hrpwm0_csg0/dsv2.rs
index 32201ea2..0fc58be1 100644
--- a/src/hrpwm0_csg0/dsv2.rs
+++ b/src/hrpwm0_csg0/dsv2.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:9 - DAC reference value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn dsv2(&mut self) -> DSV2_W<DSV2_SPEC> {
         DSV2_W::new(self, 0)
     }
diff --git a/src/hrpwm0_csg0/ies.rs b/src/hrpwm0_csg0/ies.rs
index d2044ad8..69043d04 100644
--- a/src/hrpwm0_csg0/ies.rs
+++ b/src/hrpwm0_csg0/ies.rs
@@ -449,31 +449,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - External value switch function level selection"]
     #[inline(always)]
-    #[must_use]
     pub fn svls(&mut self) -> SVLS_W<IES_SPEC> {
         SVLS_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - External start function edge selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stres(&mut self) -> STRES_W<IES_SPEC> {
         STRES_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - External stop function edge selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stpes(&mut self) -> STPES_W<IES_SPEC> {
         STPES_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - External trigger function edge selection"]
     #[inline(always)]
-    #[must_use]
     pub fn trges(&mut self) -> TRGES_W<IES_SPEC> {
         TRGES_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - External shadow transfer enable edge selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stes(&mut self) -> STES_W<IES_SPEC> {
         STES_W::new(self, 8)
     }
diff --git a/src/hrpwm0_csg0/plc.rs b/src/hrpwm0_csg0/plc.rs
index a7fe298a..c2352f76 100644
--- a/src/hrpwm0_csg0/plc.rs
+++ b/src/hrpwm0_csg0/plc.rs
@@ -604,37 +604,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Clamping control signal selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ipls(&mut self) -> IPLS_W<PLC_SPEC> {
         IPLS_W::new(self, 0)
     }
     #[doc = "Bits 8:9 - Clamping control signal level selection"]
     #[inline(always)]
-    #[must_use]
     pub fn plcl(&mut self) -> PLCL_W<PLC_SPEC> {
         PLCL_W::new(self, 8)
     }
     #[doc = "Bit 10 - Output passive level value"]
     #[inline(always)]
-    #[must_use]
     pub fn psl(&mut self) -> PSL_W<PLC_SPEC> {
         PSL_W::new(self, 10)
     }
     #[doc = "Bit 11 - Clamped state exit SW configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn plsw(&mut self) -> PLSW_W<PLC_SPEC> {
         PLSW_W::new(self, 11)
     }
     #[doc = "Bits 12:13 - Passive level enter configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn plec(&mut self) -> PLEC_W<PLC_SPEC> {
         PLEC_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Passive level exit configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn plxc(&mut self) -> PLXC_W<PLC_SPEC> {
         PLXC_W::new(self, 14)
     }
diff --git a/src/hrpwm0_csg0/sc.rs b/src/hrpwm0_csg0/sc.rs
index 1e11e625..e013c377 100644
--- a/src/hrpwm0_csg0/sc.rs
+++ b/src/hrpwm0_csg0/sc.rs
@@ -12,7 +12,7 @@ pub enum PSRM_A {
     VALUE2 = 1,
     #[doc = "2: Clear prescaler"]
     VALUE3 = 2,
-    #[doc = "3: Clear &amp; Start prescaler"]
+    #[doc = "3: Clear & Start prescaler"]
     VALUE4 = 3,
 }
 impl From<PSRM_A> for u8 {
@@ -54,7 +54,7 @@ impl PSRM_R {
     pub fn is_value3(&self) -> bool {
         *self == PSRM_A::VALUE3
     }
-    #[doc = "Clear &amp; Start prescaler"]
+    #[doc = "Clear & Start prescaler"]
     #[inline(always)]
     pub fn is_value4(&self) -> bool {
         *self == PSRM_A::VALUE4
@@ -82,7 +82,7 @@ where
     pub fn value3(self) -> &'a mut crate::W<REG> {
         self.variant(PSRM_A::VALUE3)
     }
-    #[doc = "Clear &amp; Start prescaler"]
+    #[doc = "Clear & Start prescaler"]
     #[inline(always)]
     pub fn value4(self) -> &'a mut crate::W<REG> {
         self.variant(PSRM_A::VALUE4)
@@ -98,7 +98,7 @@ pub enum PSTM_A {
     VALUE2 = 1,
     #[doc = "2: Clear prescaler"]
     VALUE3 = 2,
-    #[doc = "3: Clear &amp; Stop prescaler"]
+    #[doc = "3: Clear & Stop prescaler"]
     VALUE4 = 3,
 }
 impl From<PSTM_A> for u8 {
@@ -140,7 +140,7 @@ impl PSTM_R {
     pub fn is_value3(&self) -> bool {
         *self == PSTM_A::VALUE3
     }
-    #[doc = "Clear &amp; Stop prescaler"]
+    #[doc = "Clear & Stop prescaler"]
     #[inline(always)]
     pub fn is_value4(&self) -> bool {
         *self == PSTM_A::VALUE4
@@ -168,7 +168,7 @@ where
     pub fn value3(self) -> &'a mut crate::W<REG> {
         self.variant(PSTM_A::VALUE3)
     }
-    #[doc = "Clear &amp; Stop prescaler"]
+    #[doc = "Clear & Stop prescaler"]
     #[inline(always)]
     pub fn value4(self) -> &'a mut crate::W<REG> {
         self.variant(PSTM_A::VALUE4)
@@ -990,79 +990,66 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Prescaler external start configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn psrm(&mut self) -> PSRM_W<SC_SPEC> {
         PSRM_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Prescaler external stop configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn pstm(&mut self) -> PSTM_W<SC_SPEC> {
         PSTM_W::new(self, 2)
     }
     #[doc = "Bit 4 - Fixed division disable"]
     #[inline(always)]
-    #[must_use]
     pub fn fpd(&mut self) -> FPD_W<SC_SPEC> {
         FPD_W::new(self, 4)
     }
     #[doc = "Bits 5:6 - Prescaler division factor"]
     #[inline(always)]
-    #[must_use]
     pub fn psv(&mut self) -> PSV_W<SC_SPEC> {
         PSV_W::new(self, 5)
     }
     #[doc = "Bits 8:9 - Slope control mode"]
     #[inline(always)]
-    #[must_use]
     pub fn scm(&mut self) -> SCM_W<SC_SPEC> {
         SCM_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Slope external start configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn ssrm(&mut self) -> SSRM_W<SC_SPEC> {
         SSRM_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Slope external stop configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn sstm(&mut self) -> SSTM_W<SC_SPEC> {
         SSTM_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Slope reference value mode"]
     #[inline(always)]
-    #[must_use]
     pub fn svsc(&mut self) -> SVSC_W<SC_SPEC> {
         SVSC_W::new(self, 14)
     }
     #[doc = "Bits 16:17 - Initial DAC start mode"]
     #[inline(always)]
-    #[must_use]
     pub fn swsm(&mut self) -> SWSM_W<SC_SPEC> {
         SWSM_W::new(self, 16)
     }
     #[doc = "Bits 18:19 - Slope step gain configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn gcfg(&mut self) -> GCFG_W<SC_SPEC> {
         GCFG_W::new(self, 18)
     }
     #[doc = "Bit 20 - Immediate shadow transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn ist(&mut self) -> IST_W<SC_SPEC> {
         IST_W::new(self, 20)
     }
     #[doc = "Bit 21 - Pulse swallow enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pse(&mut self) -> PSE_W<SC_SPEC> {
         PSE_W::new(self, 21)
     }
     #[doc = "Bits 24:25 - Pulse swallow window mode"]
     #[inline(always)]
-    #[must_use]
     pub fn pswm(&mut self) -> PSWM_W<SC_SPEC> {
         PSWM_W::new(self, 24)
     }
diff --git a/src/hrpwm0_csg0/sdsv1.rs b/src/hrpwm0_csg0/sdsv1.rs
index 0f138e3e..4181c912 100644
--- a/src/hrpwm0_csg0/sdsv1.rs
+++ b/src/hrpwm0_csg0/sdsv1.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:9 - Shadow DAC reference value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn sdsv1(&mut self) -> SDSV1_W<SDSV1_SPEC> {
         SDSV1_W::new(self, 0)
     }
diff --git a/src/hrpwm0_csg0/spc.rs b/src/hrpwm0_csg0/spc.rs
index 91b8b3a8..fd1d6410 100644
--- a/src/hrpwm0_csg0/spc.rs
+++ b/src/hrpwm0_csg0/spc.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Shadow pulse swallow value"]
     #[inline(always)]
-    #[must_use]
     pub fn spswv(&mut self) -> SPSWV_W<SPC_SPEC> {
         SPSWV_W::new(self, 0)
     }
diff --git a/src/hrpwm0_csg0/sre.rs b/src/hrpwm0_csg0/sre.rs
index 1af4fd9b..7931eb83 100644
--- a/src/hrpwm0_csg0/sre.rs
+++ b/src/hrpwm0_csg0/sre.rs
@@ -88,55 +88,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Value switch from CSGyDSV1 to CSGyDSV2 interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn vls1e(&mut self) -> VLS1E_W<SRE_SPEC> {
         VLS1E_W::new(self, 0)
     }
     #[doc = "Bit 1 - Value switch from CSGyDSV2 to CSGyDSV1 interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn vls2e(&mut self) -> VLS2E_W<SRE_SPEC> {
         VLS2E_W::new(self, 1)
     }
     #[doc = "Bit 2 - Conversion trigger interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn trgse(&mut self) -> TRGSE_W<SRE_SPEC> {
         TRGSE_W::new(self, 2)
     }
     #[doc = "Bit 3 - Start trigger interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn strse(&mut self) -> STRSE_W<SRE_SPEC> {
         STRSE_W::new(self, 3)
     }
     #[doc = "Bit 4 - Stop trigger interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn stpse(&mut self) -> STPSE_W<SRE_SPEC> {
         STPSE_W::new(self, 4)
     }
     #[doc = "Bit 5 - Shadow transfer done interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn stde(&mut self) -> STDE_W<SRE_SPEC> {
         STDE_W::new(self, 5)
     }
     #[doc = "Bit 6 - Comparator rise interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn crse(&mut self) -> CRSE_W<SRE_SPEC> {
         CRSE_W::new(self, 6)
     }
     #[doc = "Bit 7 - Comparator fall interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cfse(&mut self) -> CFSE_W<SRE_SPEC> {
         CFSE_W::new(self, 7)
     }
     #[doc = "Bit 8 - Clamped state interrupt enable"]
     #[inline(always)]
-    #[must_use]
     pub fn csee(&mut self) -> CSEE_W<SRE_SPEC> {
         CSEE_W::new(self, 8)
     }
diff --git a/src/hrpwm0_csg0/srs.rs b/src/hrpwm0_csg0/srs.rs
index 3da15ae1..51121826 100644
--- a/src/hrpwm0_csg0/srs.rs
+++ b/src/hrpwm0_csg0/srs.rs
@@ -644,43 +644,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection"]
     #[inline(always)]
-    #[must_use]
     pub fn vls1s(&mut self) -> VLS1S_W<SRS_SPEC> {
         VLS1S_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection"]
     #[inline(always)]
-    #[must_use]
     pub fn vls2s(&mut self) -> VLS2S_W<SRS_SPEC> {
         VLS2S_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Conversion trigger interrupt line selection"]
     #[inline(always)]
-    #[must_use]
     pub fn trls(&mut self) -> TRLS_W<SRS_SPEC> {
         TRLS_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Start/Stop trigger interrupt line selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ssls(&mut self) -> SSLS_W<SRS_SPEC> {
         SSLS_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Shadow transfer done interrupt line selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stls(&mut self) -> STLS_W<SRS_SPEC> {
         STLS_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Comparator rise/fall interrupt line selection"]
     #[inline(always)]
-    #[must_use]
     pub fn crfls(&mut self) -> CRFLS_W<SRS_SPEC> {
         CRFLS_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Comparator clamped state interrupt line selection"]
     #[inline(always)]
-    #[must_use]
     pub fn csls(&mut self) -> CSLS_W<SRS_SPEC> {
         CSLS_W::new(self, 12)
     }
diff --git a/src/hrpwm0_csg0/swc.rs b/src/hrpwm0_csg0/swc.rs
index 06ac675e..83e843c7 100644
--- a/src/hrpwm0_csg0/swc.rs
+++ b/src/hrpwm0_csg0/swc.rs
@@ -21,55 +21,46 @@ pub type CCSS_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Value switch from CSGyDSV1 to CSGyDSV2 status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cvls1(&mut self) -> CVLS1_W<SWC_SPEC> {
         CVLS1_W::new(self, 0)
     }
     #[doc = "Bit 1 - Value switch from CSGyDSV2 to CSGyDSV1 status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cvls2(&mut self) -> CVLS2_W<SWC_SPEC> {
         CVLS2_W::new(self, 1)
     }
     #[doc = "Bit 2 - Conversion trigger status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ctrgs(&mut self) -> CTRGS_W<SWC_SPEC> {
         CTRGS_W::new(self, 2)
     }
     #[doc = "Bit 3 - Start trigger status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cstrs(&mut self) -> CSTRS_W<SWC_SPEC> {
         CSTRS_W::new(self, 3)
     }
     #[doc = "Bit 4 - Stop trigger status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cstps(&mut self) -> CSTPS_W<SWC_SPEC> {
         CSTPS_W::new(self, 4)
     }
     #[doc = "Bit 5 - Shadow transfer status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn cstd(&mut self) -> CSTD_W<SWC_SPEC> {
         CSTD_W::new(self, 5)
     }
     #[doc = "Bit 6 - Comparator rise status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccrs(&mut self) -> CCRS_W<SWC_SPEC> {
         CCRS_W::new(self, 6)
     }
     #[doc = "Bit 7 - Comparator fall status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccfs(&mut self) -> CCFS_W<SWC_SPEC> {
         CCFS_W::new(self, 7)
     }
     #[doc = "Bit 8 - Comparator clamped status clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccss(&mut self) -> CCSS_W<SWC_SPEC> {
         CCSS_W::new(self, 8)
     }
diff --git a/src/hrpwm0_csg0/sws.rs b/src/hrpwm0_csg0/sws.rs
index f579d329..2953cfe7 100644
--- a/src/hrpwm0_csg0/sws.rs
+++ b/src/hrpwm0_csg0/sws.rs
@@ -21,55 +21,46 @@ pub type SCSS_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Value switch from CSGyDSV1 to CSGyDSV2 status set"]
     #[inline(always)]
-    #[must_use]
     pub fn svls1(&mut self) -> SVLS1_W<SWS_SPEC> {
         SVLS1_W::new(self, 0)
     }
     #[doc = "Bit 1 - Value switch from CSGyDSV2 to CSGyDSV1 status set"]
     #[inline(always)]
-    #[must_use]
     pub fn svls2(&mut self) -> SVLS2_W<SWS_SPEC> {
         SVLS2_W::new(self, 1)
     }
     #[doc = "Bit 2 - Conversion trigger status set"]
     #[inline(always)]
-    #[must_use]
     pub fn strgs(&mut self) -> STRGS_W<SWS_SPEC> {
         STRGS_W::new(self, 2)
     }
     #[doc = "Bit 3 - Start trigger status set"]
     #[inline(always)]
-    #[must_use]
     pub fn sstrs(&mut self) -> SSTRS_W<SWS_SPEC> {
         SSTRS_W::new(self, 3)
     }
     #[doc = "Bit 4 - Stop trigger status set"]
     #[inline(always)]
-    #[must_use]
     pub fn sstps(&mut self) -> SSTPS_W<SWS_SPEC> {
         SSTPS_W::new(self, 4)
     }
     #[doc = "Bit 5 - Shadow transfer status set"]
     #[inline(always)]
-    #[must_use]
     pub fn sstd(&mut self) -> SSTD_W<SWS_SPEC> {
         SSTD_W::new(self, 5)
     }
     #[doc = "Bit 6 - Comparator rise status set"]
     #[inline(always)]
-    #[must_use]
     pub fn scrs(&mut self) -> SCRS_W<SWS_SPEC> {
         SCRS_W::new(self, 6)
     }
     #[doc = "Bit 7 - Comparator fall status set"]
     #[inline(always)]
-    #[must_use]
     pub fn scfs(&mut self) -> SCFS_W<SWS_SPEC> {
         SCFS_W::new(self, 7)
     }
     #[doc = "Bit 8 - Comparator clamped state status set"]
     #[inline(always)]
-    #[must_use]
     pub fn scss(&mut self) -> SCSS_W<SWS_SPEC> {
         SCSS_W::new(self, 8)
     }
diff --git a/src/hrpwm0_hrc0/gc.rs b/src/hrpwm0_hrc0/gc.rs
index 68a23867..3948b568 100644
--- a/src/hrpwm0_hrc0/gc.rs
+++ b/src/hrpwm0_hrc0/gc.rs
@@ -653,61 +653,51 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - HRCy high resolution mode configuration for source selector 0"]
     #[inline(always)]
-    #[must_use]
     pub fn hrm0(&mut self) -> HRM0_W<GC_SPEC> {
         HRM0_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - HRCy high resolution mode configuration for source selector 1"]
     #[inline(always)]
-    #[must_use]
     pub fn hrm1(&mut self) -> HRM1_W<GC_SPEC> {
         HRM1_W::new(self, 2)
     }
     #[doc = "Bit 8 - HRCy dead time enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dte(&mut self) -> DTE_W<GC_SPEC> {
         DTE_W::new(self, 8)
     }
     #[doc = "Bit 9 - HRCy trap enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tr0e(&mut self) -> TR0E_W<GC_SPEC> {
         TR0E_W::new(self, 9)
     }
     #[doc = "Bit 10 - HRCy complementary trap enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tr1e(&mut self) -> TR1E_W<GC_SPEC> {
         TR1E_W::new(self, 10)
     }
     #[doc = "Bit 11 - HRCy shadow transfer configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn stc(&mut self) -> STC_W<GC_SPEC> {
         STC_W::new(self, 11)
     }
     #[doc = "Bit 12 - HRCy dead time shadow transfer configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn dstc(&mut self) -> DSTC_W<GC_SPEC> {
         DSTC_W::new(self, 12)
     }
     #[doc = "Bit 13 - HRPWMx.OUTy0 channel selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ocs0(&mut self) -> OCS0_W<GC_SPEC> {
         OCS0_W::new(self, 13)
     }
     #[doc = "Bit 14 - HRPWMx.OUTy1 channel selector"]
     #[inline(always)]
-    #[must_use]
     pub fn ocs1(&mut self) -> OCS1_W<GC_SPEC> {
         OCS1_W::new(self, 14)
     }
     #[doc = "Bit 16 - Dead Time update trigger selector"]
     #[inline(always)]
-    #[must_use]
     pub fn dtus(&mut self) -> DTUS_W<GC_SPEC> {
         DTUS_W::new(self, 16)
     }
diff --git a/src/hrpwm0_hrc0/gsel.rs b/src/hrpwm0_hrc0/gsel.rs
index 20c8ddc0..12ea7563 100644
--- a/src/hrpwm0_hrc0/gsel.rs
+++ b/src/hrpwm0_hrc0/gsel.rs
@@ -943,73 +943,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Source selector 0 comparator set configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn c0ss(&mut self) -> C0SS_W<GSEL_SPEC> {
         C0SS_W::new(self, 0)
     }
     #[doc = "Bits 3:5 - Source selector 0 comparator clear configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn c0cs(&mut self) -> C0CS_W<GSEL_SPEC> {
         C0CS_W::new(self, 3)
     }
     #[doc = "Bits 6:7 - Source selector 0 set configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn s0m(&mut self) -> S0M_W<GSEL_SPEC> {
         S0M_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Source selector 0 clear configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn c0m(&mut self) -> C0M_W<GSEL_SPEC> {
         C0M_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Source selector 0 set edge configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn s0es(&mut self) -> S0ES_W<GSEL_SPEC> {
         S0ES_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Source selector 0 clear edge configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn c0es(&mut self) -> C0ES_W<GSEL_SPEC> {
         C0ES_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Source selector 1 comparator set configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn c1ss(&mut self) -> C1SS_W<GSEL_SPEC> {
         C1SS_W::new(self, 16)
     }
     #[doc = "Bits 19:21 - Source selector 1 comparator clear configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn c1cs(&mut self) -> C1CS_W<GSEL_SPEC> {
         C1CS_W::new(self, 19)
     }
     #[doc = "Bits 22:23 - Source selector 1 set configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn s1m(&mut self) -> S1M_W<GSEL_SPEC> {
         S1M_W::new(self, 22)
     }
     #[doc = "Bits 24:25 - Source selector 1 clear configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn c1m(&mut self) -> C1M_W<GSEL_SPEC> {
         C1M_W::new(self, 24)
     }
     #[doc = "Bits 26:27 - Source selector 1 set edge configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn s1es(&mut self) -> S1ES_W<GSEL_SPEC> {
         S1ES_W::new(self, 26)
     }
     #[doc = "Bits 28:29 - Source selector 1 clear edge configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn c1es(&mut self) -> C1ES_W<GSEL_SPEC> {
         C1ES_W::new(self, 28)
     }
diff --git a/src/hrpwm0_hrc0/pl.rs b/src/hrpwm0_hrc0/pl.rs
index 2601eacb..4ee463ba 100644
--- a/src/hrpwm0_hrc0/pl.rs
+++ b/src/hrpwm0_hrc0/pl.rs
@@ -123,13 +123,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - HRPWMx.OUTy0 passive level"]
     #[inline(always)]
-    #[must_use]
     pub fn psl0(&mut self) -> PSL0_W<PL_SPEC> {
         PSL0_W::new(self, 0)
     }
     #[doc = "Bit 1 - HRPWMx.OUTy1 passive level"]
     #[inline(always)]
-    #[must_use]
     pub fn psl1(&mut self) -> PSL1_W<PL_SPEC> {
         PSL1_W::new(self, 1)
     }
diff --git a/src/hrpwm0_hrc0/scr1.rs b/src/hrpwm0_hrc0/scr1.rs
index a6ab4ca2..a9cd2c7c 100644
--- a/src/hrpwm0_hrc0/scr1.rs
+++ b/src/hrpwm0_hrc0/scr1.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - High resolution falling edge value"]
     #[inline(always)]
-    #[must_use]
     pub fn scr1(&mut self) -> SCR1_W<SCR1_SPEC> {
         SCR1_W::new(self, 0)
     }
diff --git a/src/hrpwm0_hrc0/scr2.rs b/src/hrpwm0_hrc0/scr2.rs
index 3e57a5d9..ecfc4af1 100644
--- a/src/hrpwm0_hrc0/scr2.rs
+++ b/src/hrpwm0_hrc0/scr2.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - High resolution rising edge value"]
     #[inline(always)]
-    #[must_use]
     pub fn scr2(&mut self) -> SCR2_W<SCR2_SPEC> {
         SCR2_W::new(self, 0)
     }
diff --git a/src/hrpwm0_hrc0/sdcf.rs b/src/hrpwm0_hrc0/sdcf.rs
index 773aca69..19128a69 100644
--- a/src/hrpwm0_hrc0/sdcf.rs
+++ b/src/hrpwm0_hrc0/sdcf.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Shadow dead time falling value"]
     #[inline(always)]
-    #[must_use]
     pub fn sdtfv(&mut self) -> SDTFV_W<SDCF_SPEC> {
         SDTFV_W::new(self, 0)
     }
diff --git a/src/hrpwm0_hrc0/sdcr.rs b/src/hrpwm0_hrc0/sdcr.rs
index baecffa5..fb9e9daf 100644
--- a/src/hrpwm0_hrc0/sdcr.rs
+++ b/src/hrpwm0_hrc0/sdcr.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Shadow dead time rising value"]
     #[inline(always)]
-    #[must_use]
     pub fn sdtrv(&mut self) -> SDTRV_W<SDCR_SPEC> {
         SDTRV_W::new(self, 0)
     }
diff --git a/src/hrpwm0_hrc0/ssc.rs b/src/hrpwm0_hrc0/ssc.rs
index c61da752..824b7965 100644
--- a/src/hrpwm0_hrc0/ssc.rs
+++ b/src/hrpwm0_hrc0/ssc.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Source selector for the shadow transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn sst(&mut self) -> SST_W<SSC_SPEC> {
         SST_W::new(self, 0)
     }
diff --git a/src/hrpwm0_hrc0/tsel.rs b/src/hrpwm0_hrc0/tsel.rs
index 956f52db..1bcad18e 100644
--- a/src/hrpwm0_hrc0/tsel.rs
+++ b/src/hrpwm0_hrc0/tsel.rs
@@ -305,25 +305,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Source Selector 0 Timer connection"]
     #[inline(always)]
-    #[must_use]
     pub fn tsel0(&mut self) -> TSEL0_W<TSEL_SPEC> {
         TSEL0_W::new(self, 0)
     }
     #[doc = "Bits 3:5 - Source Selector 1 Timer connection"]
     #[inline(always)]
-    #[must_use]
     pub fn tsel1(&mut self) -> TSEL1_W<TSEL_SPEC> {
         TSEL1_W::new(self, 3)
     }
     #[doc = "Bit 16 - Source selector 0 TRAP enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ts0e(&mut self) -> TS0E_W<TSEL_SPEC> {
         TS0E_W::new(self, 16)
     }
     #[doc = "Bit 17 - Source selector 1 TRAP enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ts1e(&mut self) -> TS1E_W<TSEL_SPEC> {
         TS1E_W::new(self, 17)
     }
diff --git a/src/ledts0/evfr.rs b/src/ledts0/evfr.rs
index 9bcaafb7..7ac6a6dd 100644
--- a/src/ledts0/evfr.rs
+++ b/src/ledts0/evfr.rs
@@ -162,19 +162,16 @@ impl R {
 impl W {
     #[doc = "Bit 16 - Clear Time Slice Interrupt Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn ctsf(&mut self) -> CTSF_W<EVFR_SPEC> {
         CTSF_W::new(self, 16)
     }
     #[doc = "Bit 17 - Clear (Extended) Time Frame Interrupt Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn ctff(&mut self) -> CTFF_W<EVFR_SPEC> {
         CTFF_W::new(self, 17)
     }
     #[doc = "Bit 18 - Clear Autoscan Time Period Interrupt Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn ctpf(&mut self) -> CTPF_W<EVFR_SPEC> {
         CTPF_W::new(self, 18)
     }
diff --git a/src/ledts0/fnctl.rs b/src/ledts0/fnctl.rs
index 978704a3..a5ef6a34 100644
--- a/src/ledts0/fnctl.rs
+++ b/src/ledts0/fnctl.rs
@@ -807,67 +807,56 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Touch-Sense TSIN Pad Turn"]
     #[inline(always)]
-    #[must_use]
     pub fn padt(&mut self) -> PADT_W<FNCTL_SPEC> {
         PADT_W::new(self, 0)
     }
     #[doc = "Bit 3 - Software Control for Touch-Sense Pad Turn"]
     #[inline(always)]
-    #[must_use]
     pub fn padtsw(&mut self) -> PADTSW_W<FNCTL_SPEC> {
         PADTSW_W::new(self, 3)
     }
     #[doc = "Bit 4 - Enable External Pull-up Configuration on Pin COLA"]
     #[inline(always)]
-    #[must_use]
     pub fn epull(&mut self) -> EPULL_W<FNCTL_SPEC> {
         EPULL_W::new(self, 4)
     }
     #[doc = "Bits 16:19 - Accumulate Count on Touch-Sense Input"]
     #[inline(always)]
-    #[must_use]
     pub fn acccnt(&mut self) -> ACCCNT_W<FNCTL_SPEC> {
         ACCCNT_W::new(self, 16)
     }
     #[doc = "Bit 20 - Common Compare Enable for Touch-Sense"]
     #[inline(always)]
-    #[must_use]
     pub fn tsccmp(&mut self) -> TSCCMP_W<FNCTL_SPEC> {
         TSCCMP_W::new(self, 20)
     }
     #[doc = "Bits 21:22 - Extension for Touch-Sense Output for Pin-Low-Level"]
     #[inline(always)]
-    #[must_use]
     pub fn tsoext(&mut self) -> TSOEXT_W<FNCTL_SPEC> {
         TSOEXT_W::new(self, 21)
     }
     #[doc = "Bit 23 - TS-Counter Auto Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn tsctrr(&mut self) -> TSCTRR_W<FNCTL_SPEC> {
         TSCTRR_W::new(self, 23)
     }
     #[doc = "Bit 24 - Saturation of TS-Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn tsctrsat(&mut self) -> TSCTRSAT_W<FNCTL_SPEC> {
         TSCTRSAT_W::new(self, 24)
     }
     #[doc = "Bits 25:27 - Number of Touch-Sense Input"]
     #[inline(always)]
-    #[must_use]
     pub fn nr_tsin(&mut self) -> NR_TSIN_W<FNCTL_SPEC> {
         NR_TSIN_W::new(self, 25)
     }
     #[doc = "Bit 28 - Active Level of LED Column"]
     #[inline(always)]
-    #[must_use]
     pub fn collev(&mut self) -> COLLEV_W<FNCTL_SPEC> {
         COLLEV_W::new(self, 28)
     }
     #[doc = "Bits 29:31 - Number of LED Columns"]
     #[inline(always)]
-    #[must_use]
     pub fn nr_ledcol(&mut self) -> NR_LEDCOL_W<FNCTL_SPEC> {
         NR_LEDCOL_W::new(self, 29)
     }
diff --git a/src/ledts0/globctl.rs b/src/ledts0/globctl.rs
index b9892caa..f7f743fb 100644
--- a/src/ledts0/globctl.rs
+++ b/src/ledts0/globctl.rs
@@ -518,67 +518,56 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Touch-Sense Function Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ts_en(&mut self) -> TS_EN_W<GLOBCTL_SPEC> {
         TS_EN_W::new(self, 0)
     }
     #[doc = "Bit 1 - LED Function Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ld_en(&mut self) -> LD_EN_W<GLOBCTL_SPEC> {
         LD_EN_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clock Master Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn cmtr(&mut self) -> CMTR_W<GLOBCTL_SPEC> {
         CMTR_W::new(self, 2)
     }
     #[doc = "Bit 3 - Enable Autoscan Time Period Synchronization"]
     #[inline(always)]
-    #[must_use]
     pub fn ensync(&mut self) -> ENSYNC_W<GLOBCTL_SPEC> {
         ENSYNC_W::new(self, 3)
     }
     #[doc = "Bit 8 - Suspend Request Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn suscfg(&mut self) -> SUSCFG_W<GLOBCTL_SPEC> {
         SUSCFG_W::new(self, 8)
     }
     #[doc = "Bits 9:11 - Mask Number of LSB Bits for Event Validation"]
     #[inline(always)]
-    #[must_use]
     pub fn maskval(&mut self) -> MASKVAL_W<GLOBCTL_SPEC> {
         MASKVAL_W::new(self, 9)
     }
     #[doc = "Bit 12 - Enable (Extended) Time Frame Validation"]
     #[inline(always)]
-    #[must_use]
     pub fn fenval(&mut self) -> FENVAL_W<GLOBCTL_SPEC> {
         FENVAL_W::new(self, 12)
     }
     #[doc = "Bit 13 - Enable Time Slice Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn its_en(&mut self) -> ITS_EN_W<GLOBCTL_SPEC> {
         ITS_EN_W::new(self, 13)
     }
     #[doc = "Bit 14 - Enable (Extended) Time Frame Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn itf_en(&mut self) -> ITF_EN_W<GLOBCTL_SPEC> {
         ITF_EN_W::new(self, 14)
     }
     #[doc = "Bit 15 - Enable Autoscan Time Period Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn itp_en(&mut self) -> ITP_EN_W<GLOBCTL_SPEC> {
         ITP_EN_W::new(self, 15)
     }
     #[doc = "Bits 16:31 - LEDTS-Counter Clock Pre-Scale Factor"]
     #[inline(always)]
-    #[must_use]
     pub fn clk_ps(&mut self) -> CLK_PS_W<GLOBCTL_SPEC> {
         CLK_PS_W::new(self, 16)
     }
diff --git a/src/ledts0/ldcmp0.rs b/src/ledts0/ldcmp0.rs
index aba89e1e..15a6150a 100644
--- a/src/ledts0/ldcmp0.rs
+++ b/src/ledts0/ldcmp0.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ld0(&mut self) -> CMP_LD0_W<LDCMP0_SPEC> {
         CMP_LD0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ld1(&mut self) -> CMP_LD1_W<LDCMP0_SPEC> {
         CMP_LD1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ld2(&mut self) -> CMP_LD2_W<LDCMP0_SPEC> {
         CMP_LD2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Compare Value for LED COL\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ld3(&mut self) -> CMP_LD3_W<LDCMP0_SPEC> {
         CMP_LD3_W::new(self, 24)
     }
diff --git a/src/ledts0/ldcmp1.rs b/src/ledts0/ldcmp1.rs
index d50855cc..65bdf19a 100644
--- a/src/ledts0/ldcmp1.rs
+++ b/src/ledts0/ldcmp1.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ld4(&mut self) -> CMP_LD4_W<LDCMP1_SPEC> {
         CMP_LD4_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ld5(&mut self) -> CMP_LD5_W<LDCMP1_SPEC> {
         CMP_LD5_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ld6(&mut self) -> CMP_LD6_W<LDCMP1_SPEC> {
         CMP_LD6_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_lda_tscom(&mut self) -> CMP_LDA_TSCOM_W<LDCMP1_SPEC> {
         CMP_LDA_TSCOM_W::new(self, 24)
     }
diff --git a/src/ledts0/line0.rs b/src/ledts0/line0.rs
index 1bf75dc1..1c1fdf62 100644
--- a/src/ledts0/line0.rs
+++ b/src/ledts0/line0.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Output on LINE\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn line_0(&mut self) -> LINE_0_W<LINE0_SPEC> {
         LINE_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Output on LINE\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn line_1(&mut self) -> LINE_1_W<LINE0_SPEC> {
         LINE_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Output on LINE\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn line_2(&mut self) -> LINE_2_W<LINE0_SPEC> {
         LINE_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Output on LINE\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn line_3(&mut self) -> LINE_3_W<LINE0_SPEC> {
         LINE_3_W::new(self, 24)
     }
diff --git a/src/ledts0/line1.rs b/src/ledts0/line1.rs
index 1c0af34c..0eb19ba7 100644
--- a/src/ledts0/line1.rs
+++ b/src/ledts0/line1.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Output on LINE\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn line_4(&mut self) -> LINE_4_W<LINE1_SPEC> {
         LINE_4_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Output on LINE\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn line_5(&mut self) -> LINE_5_W<LINE1_SPEC> {
         LINE_5_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Output on LINE\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn line_6(&mut self) -> LINE_6_W<LINE1_SPEC> {
         LINE_6_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Output on LINE\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn line_a(&mut self) -> LINE_A_W<LINE1_SPEC> {
         LINE_A_W::new(self, 24)
     }
diff --git a/src/ledts0/tscmp0.rs b/src/ledts0/tscmp0.rs
index fac583bc..5fc62dc2 100644
--- a/src/ledts0/tscmp0.rs
+++ b/src/ledts0/tscmp0.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ts0(&mut self) -> CMP_TS0_W<TSCMP0_SPEC> {
         CMP_TS0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ts1(&mut self) -> CMP_TS1_W<TSCMP0_SPEC> {
         CMP_TS1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ts2(&mut self) -> CMP_TS2_W<TSCMP0_SPEC> {
         CMP_TS2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ts3(&mut self) -> CMP_TS3_W<TSCMP0_SPEC> {
         CMP_TS3_W::new(self, 24)
     }
diff --git a/src/ledts0/tscmp1.rs b/src/ledts0/tscmp1.rs
index da99af1d..11d0e491 100644
--- a/src/ledts0/tscmp1.rs
+++ b/src/ledts0/tscmp1.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ts4(&mut self) -> CMP_TS4_W<TSCMP1_SPEC> {
         CMP_TS4_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ts5(&mut self) -> CMP_TS5_W<TSCMP1_SPEC> {
         CMP_TS5_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ts6(&mut self) -> CMP_TS6_W<TSCMP1_SPEC> {
         CMP_TS6_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp_ts7(&mut self) -> CMP_TS7_W<TSCMP1_SPEC> {
         CMP_TS7_W::new(self, 24)
     }
diff --git a/src/ledts0/tsval.rs b/src/ledts0/tsval.rs
index c50a90f3..851e39b9 100644
--- a/src/ledts0/tsval.rs
+++ b/src/ledts0/tsval.rs
@@ -23,7 +23,6 @@ impl R {
 impl W {
     #[doc = "Bits 16:31 - TS-Counter Value"]
     #[inline(always)]
-    #[must_use]
     pub fn tsctrval(&mut self) -> TSCTRVAL_W<TSVAL_SPEC> {
         TSCTRVAL_W::new(self, 16)
     }
diff --git a/src/lib.rs b/src/lib.rs
index c44f3456..2cf02564 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,5 +1,5 @@
-#![doc = "Peripheral access API for XMC4200 microcontrollers (generated using svd2rust v0.33.5 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
-svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.5/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
+#![doc = "Peripheral access API for XMC4200 microcontrollers (generated using svd2rust v0.35.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
+svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.35.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
 #![allow(non_camel_case_types)]
 #![allow(non_snake_case)]
 #![no_std]
diff --git a/src/pba0/sts.rs b/src/pba0/sts.rs
index b968864a..fea33611 100644
--- a/src/pba0/sts.rs
+++ b/src/pba0/sts.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Bufferable Write Access Error"]
     #[inline(always)]
-    #[must_use]
     pub fn werr(&mut self) -> WERR_W<STS_SPEC> {
         WERR_W::new(self, 0)
     }
diff --git a/src/port0/hwsel.rs b/src/port0/hwsel.rs
index 5cfcc8ba..cb909e2e 100644
--- a/src/port0/hwsel.rs
+++ b/src/port0/hwsel.rs
@@ -1255,97 +1255,81 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn hw0(&mut self) -> HW0_W<HWSEL_SPEC> {
         HW0_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn hw1(&mut self) -> HW1_W<HWSEL_SPEC> {
         HW1_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn hw2(&mut self) -> HW2_W<HWSEL_SPEC> {
         HW2_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn hw3(&mut self) -> HW3_W<HWSEL_SPEC> {
         HW3_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn hw4(&mut self) -> HW4_W<HWSEL_SPEC> {
         HW4_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn hw5(&mut self) -> HW5_W<HWSEL_SPEC> {
         HW5_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn hw6(&mut self) -> HW6_W<HWSEL_SPEC> {
         HW6_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn hw7(&mut self) -> HW7_W<HWSEL_SPEC> {
         HW7_W::new(self, 14)
     }
     #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn hw8(&mut self) -> HW8_W<HWSEL_SPEC> {
         HW8_W::new(self, 16)
     }
     #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn hw9(&mut self) -> HW9_W<HWSEL_SPEC> {
         HW9_W::new(self, 18)
     }
     #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn hw10(&mut self) -> HW10_W<HWSEL_SPEC> {
         HW10_W::new(self, 20)
     }
     #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn hw11(&mut self) -> HW11_W<HWSEL_SPEC> {
         HW11_W::new(self, 22)
     }
     #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn hw12(&mut self) -> HW12_W<HWSEL_SPEC> {
         HW12_W::new(self, 24)
     }
     #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn hw13(&mut self) -> HW13_W<HWSEL_SPEC> {
         HW13_W::new(self, 26)
     }
     #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn hw14(&mut self) -> HW14_W<HWSEL_SPEC> {
         HW14_W::new(self, 28)
     }
     #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn hw15(&mut self) -> HW15_W<HWSEL_SPEC> {
         HW15_W::new(self, 30)
     }
diff --git a/src/port0/iocr0.rs b/src/port0/iocr0.rs
index a979a70d..4382ff85 100644
--- a/src/port0/iocr0.rs
+++ b/src/port0/iocr0.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc0(&mut self) -> PC0_W<IOCR0_SPEC> {
         PC0_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc1(&mut self) -> PC1_W<IOCR0_SPEC> {
         PC1_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc2(&mut self) -> PC2_W<IOCR0_SPEC> {
         PC2_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc3(&mut self) -> PC3_W<IOCR0_SPEC> {
         PC3_W::new(self, 27)
     }
diff --git a/src/port0/iocr4.rs b/src/port0/iocr4.rs
index 3b8acd10..01793aa4 100644
--- a/src/port0/iocr4.rs
+++ b/src/port0/iocr4.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc4(&mut self) -> PC4_W<IOCR4_SPEC> {
         PC4_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc5(&mut self) -> PC5_W<IOCR4_SPEC> {
         PC5_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc6(&mut self) -> PC6_W<IOCR4_SPEC> {
         PC6_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc7(&mut self) -> PC7_W<IOCR4_SPEC> {
         PC7_W::new(self, 27)
     }
diff --git a/src/port0/iocr8.rs b/src/port0/iocr8.rs
index 24c0b59c..e8b106f3 100644
--- a/src/port0/iocr8.rs
+++ b/src/port0/iocr8.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc8(&mut self) -> PC8_W<IOCR8_SPEC> {
         PC8_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc9(&mut self) -> PC9_W<IOCR8_SPEC> {
         PC9_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc10(&mut self) -> PC10_W<IOCR8_SPEC> {
         PC10_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc11(&mut self) -> PC11_W<IOCR8_SPEC> {
         PC11_W::new(self, 27)
     }
diff --git a/src/port0/omr.rs b/src/port0/omr.rs
index 583993ec..d805f284 100644
--- a/src/port0/omr.rs
+++ b/src/port0/omr.rs
@@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Port n Set Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ps0(&mut self) -> PS0_W<OMR_SPEC> {
         PS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Set Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ps1(&mut self) -> PS1_W<OMR_SPEC> {
         PS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Set Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ps2(&mut self) -> PS2_W<OMR_SPEC> {
         PS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Set Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ps3(&mut self) -> PS3_W<OMR_SPEC> {
         PS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Set Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ps4(&mut self) -> PS4_W<OMR_SPEC> {
         PS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Set Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ps5(&mut self) -> PS5_W<OMR_SPEC> {
         PS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Set Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ps6(&mut self) -> PS6_W<OMR_SPEC> {
         PS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Set Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ps7(&mut self) -> PS7_W<OMR_SPEC> {
         PS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Set Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn ps8(&mut self) -> PS8_W<OMR_SPEC> {
         PS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Set Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn ps9(&mut self) -> PS9_W<OMR_SPEC> {
         PS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Set Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn ps10(&mut self) -> PS10_W<OMR_SPEC> {
         PS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Set Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn ps11(&mut self) -> PS11_W<OMR_SPEC> {
         PS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Set Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn ps12(&mut self) -> PS12_W<OMR_SPEC> {
         PS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Set Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn ps13(&mut self) -> PS13_W<OMR_SPEC> {
         PS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Set Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn ps14(&mut self) -> PS14_W<OMR_SPEC> {
         PS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Set Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn ps15(&mut self) -> PS15_W<OMR_SPEC> {
         PS15_W::new(self, 15)
     }
     #[doc = "Bit 16 - Port n Reset Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pr0(&mut self) -> PR0_W<OMR_SPEC> {
         PR0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Port n Reset Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pr1(&mut self) -> PR1_W<OMR_SPEC> {
         PR1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Port n Reset Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pr2(&mut self) -> PR2_W<OMR_SPEC> {
         PR2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Port n Reset Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pr3(&mut self) -> PR3_W<OMR_SPEC> {
         PR3_W::new(self, 19)
     }
     #[doc = "Bit 20 - Port n Reset Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pr4(&mut self) -> PR4_W<OMR_SPEC> {
         PR4_W::new(self, 20)
     }
     #[doc = "Bit 21 - Port n Reset Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pr5(&mut self) -> PR5_W<OMR_SPEC> {
         PR5_W::new(self, 21)
     }
     #[doc = "Bit 22 - Port n Reset Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pr6(&mut self) -> PR6_W<OMR_SPEC> {
         PR6_W::new(self, 22)
     }
     #[doc = "Bit 23 - Port n Reset Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pr7(&mut self) -> PR7_W<OMR_SPEC> {
         PR7_W::new(self, 23)
     }
     #[doc = "Bit 24 - Port n Reset Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pr8(&mut self) -> PR8_W<OMR_SPEC> {
         PR8_W::new(self, 24)
     }
     #[doc = "Bit 25 - Port n Reset Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pr9(&mut self) -> PR9_W<OMR_SPEC> {
         PR9_W::new(self, 25)
     }
     #[doc = "Bit 26 - Port n Reset Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pr10(&mut self) -> PR10_W<OMR_SPEC> {
         PR10_W::new(self, 26)
     }
     #[doc = "Bit 27 - Port n Reset Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pr11(&mut self) -> PR11_W<OMR_SPEC> {
         PR11_W::new(self, 27)
     }
     #[doc = "Bit 28 - Port n Reset Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pr12(&mut self) -> PR12_W<OMR_SPEC> {
         PR12_W::new(self, 28)
     }
     #[doc = "Bit 29 - Port n Reset Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pr13(&mut self) -> PR13_W<OMR_SPEC> {
         PR13_W::new(self, 29)
     }
     #[doc = "Bit 30 - Port n Reset Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pr14(&mut self) -> PR14_W<OMR_SPEC> {
         PR14_W::new(self, 30)
     }
     #[doc = "Bit 31 - Port n Reset Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pr15(&mut self) -> PR15_W<OMR_SPEC> {
         PR15_W::new(self, 31)
     }
diff --git a/src/port0/out.rs b/src/port0/out.rs
index 9c557f64..bde57cd7 100644
--- a/src/port0/out.rs
+++ b/src/port0/out.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Output Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn p0(&mut self) -> P0_W<OUT_SPEC> {
         P0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Output Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn p1(&mut self) -> P1_W<OUT_SPEC> {
         P1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Output Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn p2(&mut self) -> P2_W<OUT_SPEC> {
         P2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Output Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn p3(&mut self) -> P3_W<OUT_SPEC> {
         P3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Output Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn p4(&mut self) -> P4_W<OUT_SPEC> {
         P4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Output Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn p5(&mut self) -> P5_W<OUT_SPEC> {
         P5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Output Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn p6(&mut self) -> P6_W<OUT_SPEC> {
         P6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Output Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn p7(&mut self) -> P7_W<OUT_SPEC> {
         P7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Output Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn p8(&mut self) -> P8_W<OUT_SPEC> {
         P8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Output Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn p9(&mut self) -> P9_W<OUT_SPEC> {
         P9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Output Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn p10(&mut self) -> P10_W<OUT_SPEC> {
         P10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Output Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn p11(&mut self) -> P11_W<OUT_SPEC> {
         P11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Output Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn p12(&mut self) -> P12_W<OUT_SPEC> {
         P12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Output Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn p13(&mut self) -> P13_W<OUT_SPEC> {
         P13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Output Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn p14(&mut self) -> P14_W<OUT_SPEC> {
         P14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Output Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn p15(&mut self) -> P15_W<OUT_SPEC> {
         P15_W::new(self, 15)
     }
diff --git a/src/port0/pdr0.rs b/src/port0/pdr0.rs
index e86c3324..1fc5e269 100644
--- a/src/port0/pdr0.rs
+++ b/src/port0/pdr0.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"]
     #[inline(always)]
-    #[must_use]
     pub fn pd0(&mut self) -> PD0_W<PDR0_SPEC> {
         PD0_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"]
     #[inline(always)]
-    #[must_use]
     pub fn pd1(&mut self) -> PD1_W<PDR0_SPEC> {
         PD1_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"]
     #[inline(always)]
-    #[must_use]
     pub fn pd2(&mut self) -> PD2_W<PDR0_SPEC> {
         PD2_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"]
     #[inline(always)]
-    #[must_use]
     pub fn pd3(&mut self) -> PD3_W<PDR0_SPEC> {
         PD3_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"]
     #[inline(always)]
-    #[must_use]
     pub fn pd4(&mut self) -> PD4_W<PDR0_SPEC> {
         PD4_W::new(self, 16)
     }
     #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"]
     #[inline(always)]
-    #[must_use]
     pub fn pd5(&mut self) -> PD5_W<PDR0_SPEC> {
         PD5_W::new(self, 20)
     }
     #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"]
     #[inline(always)]
-    #[must_use]
     pub fn pd6(&mut self) -> PD6_W<PDR0_SPEC> {
         PD6_W::new(self, 24)
     }
     #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"]
     #[inline(always)]
-    #[must_use]
     pub fn pd7(&mut self) -> PD7_W<PDR0_SPEC> {
         PD7_W::new(self, 28)
     }
diff --git a/src/port0/pdr1.rs b/src/port0/pdr1.rs
index 1e85b35c..c858a7da 100644
--- a/src/port0/pdr1.rs
+++ b/src/port0/pdr1.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"]
     #[inline(always)]
-    #[must_use]
     pub fn pd8(&mut self) -> PD8_W<PDR1_SPEC> {
         PD8_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"]
     #[inline(always)]
-    #[must_use]
     pub fn pd9(&mut self) -> PD9_W<PDR1_SPEC> {
         PD9_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"]
     #[inline(always)]
-    #[must_use]
     pub fn pd10(&mut self) -> PD10_W<PDR1_SPEC> {
         PD10_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"]
     #[inline(always)]
-    #[must_use]
     pub fn pd11(&mut self) -> PD11_W<PDR1_SPEC> {
         PD11_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"]
     #[inline(always)]
-    #[must_use]
     pub fn pd12(&mut self) -> PD12_W<PDR1_SPEC> {
         PD12_W::new(self, 16)
     }
     #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"]
     #[inline(always)]
-    #[must_use]
     pub fn pd13(&mut self) -> PD13_W<PDR1_SPEC> {
         PD13_W::new(self, 20)
     }
     #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"]
     #[inline(always)]
-    #[must_use]
     pub fn pd14(&mut self) -> PD14_W<PDR1_SPEC> {
         PD14_W::new(self, 24)
     }
     #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"]
     #[inline(always)]
-    #[must_use]
     pub fn pd15(&mut self) -> PD15_W<PDR1_SPEC> {
         PD15_W::new(self, 28)
     }
diff --git a/src/port0/pps.rs b/src/port0/pps.rs
index 84439952..549244c2 100644
--- a/src/port0/pps.rs
+++ b/src/port0/pps.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Pin Power Save Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pps0(&mut self) -> PPS0_W<PPS_SPEC> {
         PPS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Pin Power Save Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pps1(&mut self) -> PPS1_W<PPS_SPEC> {
         PPS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Pin Power Save Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pps2(&mut self) -> PPS2_W<PPS_SPEC> {
         PPS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Pin Power Save Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pps3(&mut self) -> PPS3_W<PPS_SPEC> {
         PPS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Pin Power Save Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pps4(&mut self) -> PPS4_W<PPS_SPEC> {
         PPS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Pin Power Save Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pps5(&mut self) -> PPS5_W<PPS_SPEC> {
         PPS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Pin Power Save Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pps6(&mut self) -> PPS6_W<PPS_SPEC> {
         PPS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Pin Power Save Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pps7(&mut self) -> PPS7_W<PPS_SPEC> {
         PPS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Pin Power Save Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pps8(&mut self) -> PPS8_W<PPS_SPEC> {
         PPS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Pin Power Save Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pps9(&mut self) -> PPS9_W<PPS_SPEC> {
         PPS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Pin Power Save Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pps10(&mut self) -> PPS10_W<PPS_SPEC> {
         PPS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Pin Power Save Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pps11(&mut self) -> PPS11_W<PPS_SPEC> {
         PPS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Pin Power Save Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pps12(&mut self) -> PPS12_W<PPS_SPEC> {
         PPS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Pin Power Save Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pps13(&mut self) -> PPS13_W<PPS_SPEC> {
         PPS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Pin Power Save Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pps14(&mut self) -> PPS14_W<PPS_SPEC> {
         PPS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Pin Power Save Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pps15(&mut self) -> PPS15_W<PPS_SPEC> {
         PPS15_W::new(self, 15)
     }
diff --git a/src/port1/hwsel.rs b/src/port1/hwsel.rs
index ab5157e6..705c72ce 100644
--- a/src/port1/hwsel.rs
+++ b/src/port1/hwsel.rs
@@ -1255,97 +1255,81 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn hw0(&mut self) -> HW0_W<HWSEL_SPEC> {
         HW0_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn hw1(&mut self) -> HW1_W<HWSEL_SPEC> {
         HW1_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn hw2(&mut self) -> HW2_W<HWSEL_SPEC> {
         HW2_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn hw3(&mut self) -> HW3_W<HWSEL_SPEC> {
         HW3_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn hw4(&mut self) -> HW4_W<HWSEL_SPEC> {
         HW4_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn hw5(&mut self) -> HW5_W<HWSEL_SPEC> {
         HW5_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn hw6(&mut self) -> HW6_W<HWSEL_SPEC> {
         HW6_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn hw7(&mut self) -> HW7_W<HWSEL_SPEC> {
         HW7_W::new(self, 14)
     }
     #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn hw8(&mut self) -> HW8_W<HWSEL_SPEC> {
         HW8_W::new(self, 16)
     }
     #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn hw9(&mut self) -> HW9_W<HWSEL_SPEC> {
         HW9_W::new(self, 18)
     }
     #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn hw10(&mut self) -> HW10_W<HWSEL_SPEC> {
         HW10_W::new(self, 20)
     }
     #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn hw11(&mut self) -> HW11_W<HWSEL_SPEC> {
         HW11_W::new(self, 22)
     }
     #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn hw12(&mut self) -> HW12_W<HWSEL_SPEC> {
         HW12_W::new(self, 24)
     }
     #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn hw13(&mut self) -> HW13_W<HWSEL_SPEC> {
         HW13_W::new(self, 26)
     }
     #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn hw14(&mut self) -> HW14_W<HWSEL_SPEC> {
         HW14_W::new(self, 28)
     }
     #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn hw15(&mut self) -> HW15_W<HWSEL_SPEC> {
         HW15_W::new(self, 30)
     }
diff --git a/src/port1/iocr0.rs b/src/port1/iocr0.rs
index 56713514..fa1b28de 100644
--- a/src/port1/iocr0.rs
+++ b/src/port1/iocr0.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc0(&mut self) -> PC0_W<IOCR0_SPEC> {
         PC0_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc1(&mut self) -> PC1_W<IOCR0_SPEC> {
         PC1_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc2(&mut self) -> PC2_W<IOCR0_SPEC> {
         PC2_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc3(&mut self) -> PC3_W<IOCR0_SPEC> {
         PC3_W::new(self, 27)
     }
diff --git a/src/port1/iocr12.rs b/src/port1/iocr12.rs
index ca619f3a..419b39c6 100644
--- a/src/port1/iocr12.rs
+++ b/src/port1/iocr12.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc12(&mut self) -> PC12_W<IOCR12_SPEC> {
         PC12_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc13(&mut self) -> PC13_W<IOCR12_SPEC> {
         PC13_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc14(&mut self) -> PC14_W<IOCR12_SPEC> {
         PC14_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc15(&mut self) -> PC15_W<IOCR12_SPEC> {
         PC15_W::new(self, 27)
     }
diff --git a/src/port1/iocr4.rs b/src/port1/iocr4.rs
index f8d058da..55cc0977 100644
--- a/src/port1/iocr4.rs
+++ b/src/port1/iocr4.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc4(&mut self) -> PC4_W<IOCR4_SPEC> {
         PC4_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc5(&mut self) -> PC5_W<IOCR4_SPEC> {
         PC5_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc6(&mut self) -> PC6_W<IOCR4_SPEC> {
         PC6_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc7(&mut self) -> PC7_W<IOCR4_SPEC> {
         PC7_W::new(self, 27)
     }
diff --git a/src/port1/iocr8.rs b/src/port1/iocr8.rs
index 20b818bb..0a4920ec 100644
--- a/src/port1/iocr8.rs
+++ b/src/port1/iocr8.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc8(&mut self) -> PC8_W<IOCR8_SPEC> {
         PC8_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc9(&mut self) -> PC9_W<IOCR8_SPEC> {
         PC9_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc10(&mut self) -> PC10_W<IOCR8_SPEC> {
         PC10_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc11(&mut self) -> PC11_W<IOCR8_SPEC> {
         PC11_W::new(self, 27)
     }
diff --git a/src/port1/omr.rs b/src/port1/omr.rs
index f6583148..415628ea 100644
--- a/src/port1/omr.rs
+++ b/src/port1/omr.rs
@@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Port n Set Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ps0(&mut self) -> PS0_W<OMR_SPEC> {
         PS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Set Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ps1(&mut self) -> PS1_W<OMR_SPEC> {
         PS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Set Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ps2(&mut self) -> PS2_W<OMR_SPEC> {
         PS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Set Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ps3(&mut self) -> PS3_W<OMR_SPEC> {
         PS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Set Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ps4(&mut self) -> PS4_W<OMR_SPEC> {
         PS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Set Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ps5(&mut self) -> PS5_W<OMR_SPEC> {
         PS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Set Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ps6(&mut self) -> PS6_W<OMR_SPEC> {
         PS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Set Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ps7(&mut self) -> PS7_W<OMR_SPEC> {
         PS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Set Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn ps8(&mut self) -> PS8_W<OMR_SPEC> {
         PS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Set Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn ps9(&mut self) -> PS9_W<OMR_SPEC> {
         PS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Set Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn ps10(&mut self) -> PS10_W<OMR_SPEC> {
         PS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Set Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn ps11(&mut self) -> PS11_W<OMR_SPEC> {
         PS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Set Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn ps12(&mut self) -> PS12_W<OMR_SPEC> {
         PS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Set Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn ps13(&mut self) -> PS13_W<OMR_SPEC> {
         PS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Set Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn ps14(&mut self) -> PS14_W<OMR_SPEC> {
         PS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Set Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn ps15(&mut self) -> PS15_W<OMR_SPEC> {
         PS15_W::new(self, 15)
     }
     #[doc = "Bit 16 - Port n Reset Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pr0(&mut self) -> PR0_W<OMR_SPEC> {
         PR0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Port n Reset Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pr1(&mut self) -> PR1_W<OMR_SPEC> {
         PR1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Port n Reset Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pr2(&mut self) -> PR2_W<OMR_SPEC> {
         PR2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Port n Reset Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pr3(&mut self) -> PR3_W<OMR_SPEC> {
         PR3_W::new(self, 19)
     }
     #[doc = "Bit 20 - Port n Reset Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pr4(&mut self) -> PR4_W<OMR_SPEC> {
         PR4_W::new(self, 20)
     }
     #[doc = "Bit 21 - Port n Reset Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pr5(&mut self) -> PR5_W<OMR_SPEC> {
         PR5_W::new(self, 21)
     }
     #[doc = "Bit 22 - Port n Reset Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pr6(&mut self) -> PR6_W<OMR_SPEC> {
         PR6_W::new(self, 22)
     }
     #[doc = "Bit 23 - Port n Reset Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pr7(&mut self) -> PR7_W<OMR_SPEC> {
         PR7_W::new(self, 23)
     }
     #[doc = "Bit 24 - Port n Reset Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pr8(&mut self) -> PR8_W<OMR_SPEC> {
         PR8_W::new(self, 24)
     }
     #[doc = "Bit 25 - Port n Reset Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pr9(&mut self) -> PR9_W<OMR_SPEC> {
         PR9_W::new(self, 25)
     }
     #[doc = "Bit 26 - Port n Reset Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pr10(&mut self) -> PR10_W<OMR_SPEC> {
         PR10_W::new(self, 26)
     }
     #[doc = "Bit 27 - Port n Reset Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pr11(&mut self) -> PR11_W<OMR_SPEC> {
         PR11_W::new(self, 27)
     }
     #[doc = "Bit 28 - Port n Reset Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pr12(&mut self) -> PR12_W<OMR_SPEC> {
         PR12_W::new(self, 28)
     }
     #[doc = "Bit 29 - Port n Reset Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pr13(&mut self) -> PR13_W<OMR_SPEC> {
         PR13_W::new(self, 29)
     }
     #[doc = "Bit 30 - Port n Reset Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pr14(&mut self) -> PR14_W<OMR_SPEC> {
         PR14_W::new(self, 30)
     }
     #[doc = "Bit 31 - Port n Reset Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pr15(&mut self) -> PR15_W<OMR_SPEC> {
         PR15_W::new(self, 31)
     }
diff --git a/src/port1/out.rs b/src/port1/out.rs
index 1ecdc3ca..ac3c575a 100644
--- a/src/port1/out.rs
+++ b/src/port1/out.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Output Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn p0(&mut self) -> P0_W<OUT_SPEC> {
         P0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Output Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn p1(&mut self) -> P1_W<OUT_SPEC> {
         P1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Output Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn p2(&mut self) -> P2_W<OUT_SPEC> {
         P2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Output Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn p3(&mut self) -> P3_W<OUT_SPEC> {
         P3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Output Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn p4(&mut self) -> P4_W<OUT_SPEC> {
         P4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Output Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn p5(&mut self) -> P5_W<OUT_SPEC> {
         P5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Output Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn p6(&mut self) -> P6_W<OUT_SPEC> {
         P6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Output Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn p7(&mut self) -> P7_W<OUT_SPEC> {
         P7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Output Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn p8(&mut self) -> P8_W<OUT_SPEC> {
         P8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Output Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn p9(&mut self) -> P9_W<OUT_SPEC> {
         P9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Output Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn p10(&mut self) -> P10_W<OUT_SPEC> {
         P10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Output Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn p11(&mut self) -> P11_W<OUT_SPEC> {
         P11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Output Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn p12(&mut self) -> P12_W<OUT_SPEC> {
         P12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Output Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn p13(&mut self) -> P13_W<OUT_SPEC> {
         P13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Output Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn p14(&mut self) -> P14_W<OUT_SPEC> {
         P14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Output Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn p15(&mut self) -> P15_W<OUT_SPEC> {
         P15_W::new(self, 15)
     }
diff --git a/src/port1/pdr0.rs b/src/port1/pdr0.rs
index b35f448c..8cc8db47 100644
--- a/src/port1/pdr0.rs
+++ b/src/port1/pdr0.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"]
     #[inline(always)]
-    #[must_use]
     pub fn pd0(&mut self) -> PD0_W<PDR0_SPEC> {
         PD0_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"]
     #[inline(always)]
-    #[must_use]
     pub fn pd1(&mut self) -> PD1_W<PDR0_SPEC> {
         PD1_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"]
     #[inline(always)]
-    #[must_use]
     pub fn pd2(&mut self) -> PD2_W<PDR0_SPEC> {
         PD2_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"]
     #[inline(always)]
-    #[must_use]
     pub fn pd3(&mut self) -> PD3_W<PDR0_SPEC> {
         PD3_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"]
     #[inline(always)]
-    #[must_use]
     pub fn pd4(&mut self) -> PD4_W<PDR0_SPEC> {
         PD4_W::new(self, 16)
     }
     #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"]
     #[inline(always)]
-    #[must_use]
     pub fn pd5(&mut self) -> PD5_W<PDR0_SPEC> {
         PD5_W::new(self, 20)
     }
     #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"]
     #[inline(always)]
-    #[must_use]
     pub fn pd6(&mut self) -> PD6_W<PDR0_SPEC> {
         PD6_W::new(self, 24)
     }
     #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"]
     #[inline(always)]
-    #[must_use]
     pub fn pd7(&mut self) -> PD7_W<PDR0_SPEC> {
         PD7_W::new(self, 28)
     }
diff --git a/src/port1/pdr1.rs b/src/port1/pdr1.rs
index c4d9bc79..9ba657ac 100644
--- a/src/port1/pdr1.rs
+++ b/src/port1/pdr1.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"]
     #[inline(always)]
-    #[must_use]
     pub fn pd8(&mut self) -> PD8_W<PDR1_SPEC> {
         PD8_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"]
     #[inline(always)]
-    #[must_use]
     pub fn pd9(&mut self) -> PD9_W<PDR1_SPEC> {
         PD9_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"]
     #[inline(always)]
-    #[must_use]
     pub fn pd10(&mut self) -> PD10_W<PDR1_SPEC> {
         PD10_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"]
     #[inline(always)]
-    #[must_use]
     pub fn pd11(&mut self) -> PD11_W<PDR1_SPEC> {
         PD11_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"]
     #[inline(always)]
-    #[must_use]
     pub fn pd12(&mut self) -> PD12_W<PDR1_SPEC> {
         PD12_W::new(self, 16)
     }
     #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"]
     #[inline(always)]
-    #[must_use]
     pub fn pd13(&mut self) -> PD13_W<PDR1_SPEC> {
         PD13_W::new(self, 20)
     }
     #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"]
     #[inline(always)]
-    #[must_use]
     pub fn pd14(&mut self) -> PD14_W<PDR1_SPEC> {
         PD14_W::new(self, 24)
     }
     #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"]
     #[inline(always)]
-    #[must_use]
     pub fn pd15(&mut self) -> PD15_W<PDR1_SPEC> {
         PD15_W::new(self, 28)
     }
diff --git a/src/port1/pps.rs b/src/port1/pps.rs
index b204d790..da357cb7 100644
--- a/src/port1/pps.rs
+++ b/src/port1/pps.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Pin Power Save Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pps0(&mut self) -> PPS0_W<PPS_SPEC> {
         PPS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Pin Power Save Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pps1(&mut self) -> PPS1_W<PPS_SPEC> {
         PPS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Pin Power Save Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pps2(&mut self) -> PPS2_W<PPS_SPEC> {
         PPS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Pin Power Save Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pps3(&mut self) -> PPS3_W<PPS_SPEC> {
         PPS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Pin Power Save Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pps4(&mut self) -> PPS4_W<PPS_SPEC> {
         PPS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Pin Power Save Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pps5(&mut self) -> PPS5_W<PPS_SPEC> {
         PPS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Pin Power Save Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pps6(&mut self) -> PPS6_W<PPS_SPEC> {
         PPS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Pin Power Save Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pps7(&mut self) -> PPS7_W<PPS_SPEC> {
         PPS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Pin Power Save Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pps8(&mut self) -> PPS8_W<PPS_SPEC> {
         PPS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Pin Power Save Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pps9(&mut self) -> PPS9_W<PPS_SPEC> {
         PPS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Pin Power Save Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pps10(&mut self) -> PPS10_W<PPS_SPEC> {
         PPS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Pin Power Save Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pps11(&mut self) -> PPS11_W<PPS_SPEC> {
         PPS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Pin Power Save Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pps12(&mut self) -> PPS12_W<PPS_SPEC> {
         PPS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Pin Power Save Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pps13(&mut self) -> PPS13_W<PPS_SPEC> {
         PPS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Pin Power Save Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pps14(&mut self) -> PPS14_W<PPS_SPEC> {
         PPS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Pin Power Save Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pps15(&mut self) -> PPS15_W<PPS_SPEC> {
         PPS15_W::new(self, 15)
     }
diff --git a/src/port14/hwsel.rs b/src/port14/hwsel.rs
index b3ef0e79..ea164828 100644
--- a/src/port14/hwsel.rs
+++ b/src/port14/hwsel.rs
@@ -1255,97 +1255,81 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn hw0(&mut self) -> HW0_W<HWSEL_SPEC> {
         HW0_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn hw1(&mut self) -> HW1_W<HWSEL_SPEC> {
         HW1_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn hw2(&mut self) -> HW2_W<HWSEL_SPEC> {
         HW2_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn hw3(&mut self) -> HW3_W<HWSEL_SPEC> {
         HW3_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn hw4(&mut self) -> HW4_W<HWSEL_SPEC> {
         HW4_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn hw5(&mut self) -> HW5_W<HWSEL_SPEC> {
         HW5_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn hw6(&mut self) -> HW6_W<HWSEL_SPEC> {
         HW6_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn hw7(&mut self) -> HW7_W<HWSEL_SPEC> {
         HW7_W::new(self, 14)
     }
     #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn hw8(&mut self) -> HW8_W<HWSEL_SPEC> {
         HW8_W::new(self, 16)
     }
     #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn hw9(&mut self) -> HW9_W<HWSEL_SPEC> {
         HW9_W::new(self, 18)
     }
     #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn hw10(&mut self) -> HW10_W<HWSEL_SPEC> {
         HW10_W::new(self, 20)
     }
     #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn hw11(&mut self) -> HW11_W<HWSEL_SPEC> {
         HW11_W::new(self, 22)
     }
     #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn hw12(&mut self) -> HW12_W<HWSEL_SPEC> {
         HW12_W::new(self, 24)
     }
     #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn hw13(&mut self) -> HW13_W<HWSEL_SPEC> {
         HW13_W::new(self, 26)
     }
     #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn hw14(&mut self) -> HW14_W<HWSEL_SPEC> {
         HW14_W::new(self, 28)
     }
     #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn hw15(&mut self) -> HW15_W<HWSEL_SPEC> {
         HW15_W::new(self, 30)
     }
diff --git a/src/port14/iocr0.rs b/src/port14/iocr0.rs
index 8f6da63d..3b0eb38b 100644
--- a/src/port14/iocr0.rs
+++ b/src/port14/iocr0.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc0(&mut self) -> PC0_W<IOCR0_SPEC> {
         PC0_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc1(&mut self) -> PC1_W<IOCR0_SPEC> {
         PC1_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc2(&mut self) -> PC2_W<IOCR0_SPEC> {
         PC2_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc3(&mut self) -> PC3_W<IOCR0_SPEC> {
         PC3_W::new(self, 27)
     }
diff --git a/src/port14/iocr12.rs b/src/port14/iocr12.rs
index 625be6f4..474c6772 100644
--- a/src/port14/iocr12.rs
+++ b/src/port14/iocr12.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc12(&mut self) -> PC12_W<IOCR12_SPEC> {
         PC12_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc13(&mut self) -> PC13_W<IOCR12_SPEC> {
         PC13_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc14(&mut self) -> PC14_W<IOCR12_SPEC> {
         PC14_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc15(&mut self) -> PC15_W<IOCR12_SPEC> {
         PC15_W::new(self, 27)
     }
diff --git a/src/port14/iocr4.rs b/src/port14/iocr4.rs
index cbf8f808..d29641fe 100644
--- a/src/port14/iocr4.rs
+++ b/src/port14/iocr4.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc4(&mut self) -> PC4_W<IOCR4_SPEC> {
         PC4_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc5(&mut self) -> PC5_W<IOCR4_SPEC> {
         PC5_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc6(&mut self) -> PC6_W<IOCR4_SPEC> {
         PC6_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc7(&mut self) -> PC7_W<IOCR4_SPEC> {
         PC7_W::new(self, 27)
     }
diff --git a/src/port14/iocr8.rs b/src/port14/iocr8.rs
index f0261686..06f04dda 100644
--- a/src/port14/iocr8.rs
+++ b/src/port14/iocr8.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc8(&mut self) -> PC8_W<IOCR8_SPEC> {
         PC8_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc9(&mut self) -> PC9_W<IOCR8_SPEC> {
         PC9_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc10(&mut self) -> PC10_W<IOCR8_SPEC> {
         PC10_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc11(&mut self) -> PC11_W<IOCR8_SPEC> {
         PC11_W::new(self, 27)
     }
diff --git a/src/port14/omr.rs b/src/port14/omr.rs
index 3a804c69..e46ed812 100644
--- a/src/port14/omr.rs
+++ b/src/port14/omr.rs
@@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Port n Set Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ps0(&mut self) -> PS0_W<OMR_SPEC> {
         PS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Set Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ps1(&mut self) -> PS1_W<OMR_SPEC> {
         PS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Set Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ps2(&mut self) -> PS2_W<OMR_SPEC> {
         PS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Set Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ps3(&mut self) -> PS3_W<OMR_SPEC> {
         PS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Set Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ps4(&mut self) -> PS4_W<OMR_SPEC> {
         PS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Set Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ps5(&mut self) -> PS5_W<OMR_SPEC> {
         PS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Set Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ps6(&mut self) -> PS6_W<OMR_SPEC> {
         PS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Set Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ps7(&mut self) -> PS7_W<OMR_SPEC> {
         PS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Set Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn ps8(&mut self) -> PS8_W<OMR_SPEC> {
         PS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Set Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn ps9(&mut self) -> PS9_W<OMR_SPEC> {
         PS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Set Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn ps10(&mut self) -> PS10_W<OMR_SPEC> {
         PS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Set Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn ps11(&mut self) -> PS11_W<OMR_SPEC> {
         PS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Set Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn ps12(&mut self) -> PS12_W<OMR_SPEC> {
         PS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Set Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn ps13(&mut self) -> PS13_W<OMR_SPEC> {
         PS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Set Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn ps14(&mut self) -> PS14_W<OMR_SPEC> {
         PS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Set Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn ps15(&mut self) -> PS15_W<OMR_SPEC> {
         PS15_W::new(self, 15)
     }
     #[doc = "Bit 16 - Port n Reset Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pr0(&mut self) -> PR0_W<OMR_SPEC> {
         PR0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Port n Reset Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pr1(&mut self) -> PR1_W<OMR_SPEC> {
         PR1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Port n Reset Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pr2(&mut self) -> PR2_W<OMR_SPEC> {
         PR2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Port n Reset Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pr3(&mut self) -> PR3_W<OMR_SPEC> {
         PR3_W::new(self, 19)
     }
     #[doc = "Bit 20 - Port n Reset Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pr4(&mut self) -> PR4_W<OMR_SPEC> {
         PR4_W::new(self, 20)
     }
     #[doc = "Bit 21 - Port n Reset Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pr5(&mut self) -> PR5_W<OMR_SPEC> {
         PR5_W::new(self, 21)
     }
     #[doc = "Bit 22 - Port n Reset Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pr6(&mut self) -> PR6_W<OMR_SPEC> {
         PR6_W::new(self, 22)
     }
     #[doc = "Bit 23 - Port n Reset Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pr7(&mut self) -> PR7_W<OMR_SPEC> {
         PR7_W::new(self, 23)
     }
     #[doc = "Bit 24 - Port n Reset Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pr8(&mut self) -> PR8_W<OMR_SPEC> {
         PR8_W::new(self, 24)
     }
     #[doc = "Bit 25 - Port n Reset Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pr9(&mut self) -> PR9_W<OMR_SPEC> {
         PR9_W::new(self, 25)
     }
     #[doc = "Bit 26 - Port n Reset Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pr10(&mut self) -> PR10_W<OMR_SPEC> {
         PR10_W::new(self, 26)
     }
     #[doc = "Bit 27 - Port n Reset Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pr11(&mut self) -> PR11_W<OMR_SPEC> {
         PR11_W::new(self, 27)
     }
     #[doc = "Bit 28 - Port n Reset Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pr12(&mut self) -> PR12_W<OMR_SPEC> {
         PR12_W::new(self, 28)
     }
     #[doc = "Bit 29 - Port n Reset Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pr13(&mut self) -> PR13_W<OMR_SPEC> {
         PR13_W::new(self, 29)
     }
     #[doc = "Bit 30 - Port n Reset Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pr14(&mut self) -> PR14_W<OMR_SPEC> {
         PR14_W::new(self, 30)
     }
     #[doc = "Bit 31 - Port n Reset Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pr15(&mut self) -> PR15_W<OMR_SPEC> {
         PR15_W::new(self, 31)
     }
diff --git a/src/port14/out.rs b/src/port14/out.rs
index a16ae658..f15cd07f 100644
--- a/src/port14/out.rs
+++ b/src/port14/out.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Output Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn p0(&mut self) -> P0_W<OUT_SPEC> {
         P0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Output Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn p1(&mut self) -> P1_W<OUT_SPEC> {
         P1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Output Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn p2(&mut self) -> P2_W<OUT_SPEC> {
         P2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Output Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn p3(&mut self) -> P3_W<OUT_SPEC> {
         P3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Output Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn p4(&mut self) -> P4_W<OUT_SPEC> {
         P4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Output Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn p5(&mut self) -> P5_W<OUT_SPEC> {
         P5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Output Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn p6(&mut self) -> P6_W<OUT_SPEC> {
         P6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Output Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn p7(&mut self) -> P7_W<OUT_SPEC> {
         P7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Output Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn p8(&mut self) -> P8_W<OUT_SPEC> {
         P8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Output Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn p9(&mut self) -> P9_W<OUT_SPEC> {
         P9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Output Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn p10(&mut self) -> P10_W<OUT_SPEC> {
         P10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Output Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn p11(&mut self) -> P11_W<OUT_SPEC> {
         P11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Output Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn p12(&mut self) -> P12_W<OUT_SPEC> {
         P12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Output Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn p13(&mut self) -> P13_W<OUT_SPEC> {
         P13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Output Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn p14(&mut self) -> P14_W<OUT_SPEC> {
         P14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Output Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn p15(&mut self) -> P15_W<OUT_SPEC> {
         P15_W::new(self, 15)
     }
diff --git a/src/port14/pdisc.rs b/src/port14/pdisc.rs
index 85e55766..96f26d14 100644
--- a/src/port14/pdisc.rs
+++ b/src/port14/pdisc.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Pad Disable for Port n Pin 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis0(&mut self) -> PDIS0_W<PDISC_SPEC> {
         PDIS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Pad Disable for Port n Pin 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis1(&mut self) -> PDIS1_W<PDISC_SPEC> {
         PDIS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Pad Disable for Port n Pin 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis2(&mut self) -> PDIS2_W<PDISC_SPEC> {
         PDIS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Pad Disable for Port n Pin 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis3(&mut self) -> PDIS3_W<PDISC_SPEC> {
         PDIS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Pad Disable for Port n Pin 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis4(&mut self) -> PDIS4_W<PDISC_SPEC> {
         PDIS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Pad Disable for Port n Pin 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis5(&mut self) -> PDIS5_W<PDISC_SPEC> {
         PDIS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Pad Disable for Port n Pin 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis6(&mut self) -> PDIS6_W<PDISC_SPEC> {
         PDIS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Pad Disable for Port n Pin 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis7(&mut self) -> PDIS7_W<PDISC_SPEC> {
         PDIS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Pad Disable for Port n Pin 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis8(&mut self) -> PDIS8_W<PDISC_SPEC> {
         PDIS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Pad Disable for Port n Pin 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis9(&mut self) -> PDIS9_W<PDISC_SPEC> {
         PDIS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Pad Disable for Port n Pin 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis10(&mut self) -> PDIS10_W<PDISC_SPEC> {
         PDIS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Pad Disable for Port n Pin 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis11(&mut self) -> PDIS11_W<PDISC_SPEC> {
         PDIS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Pad Disable for Port n Pin 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis12(&mut self) -> PDIS12_W<PDISC_SPEC> {
         PDIS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Pad Disable for Port n Pin 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis13(&mut self) -> PDIS13_W<PDISC_SPEC> {
         PDIS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Pad Disable for Port n Pin 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis14(&mut self) -> PDIS14_W<PDISC_SPEC> {
         PDIS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Pad Disable for Port n Pin 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pdis15(&mut self) -> PDIS15_W<PDISC_SPEC> {
         PDIS15_W::new(self, 15)
     }
diff --git a/src/port14/pps.rs b/src/port14/pps.rs
index 2d39eb8c..0b400f40 100644
--- a/src/port14/pps.rs
+++ b/src/port14/pps.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Pin Power Save Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pps0(&mut self) -> PPS0_W<PPS_SPEC> {
         PPS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Pin Power Save Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pps1(&mut self) -> PPS1_W<PPS_SPEC> {
         PPS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Pin Power Save Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pps2(&mut self) -> PPS2_W<PPS_SPEC> {
         PPS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Pin Power Save Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pps3(&mut self) -> PPS3_W<PPS_SPEC> {
         PPS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Pin Power Save Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pps4(&mut self) -> PPS4_W<PPS_SPEC> {
         PPS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Pin Power Save Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pps5(&mut self) -> PPS5_W<PPS_SPEC> {
         PPS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Pin Power Save Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pps6(&mut self) -> PPS6_W<PPS_SPEC> {
         PPS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Pin Power Save Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pps7(&mut self) -> PPS7_W<PPS_SPEC> {
         PPS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Pin Power Save Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pps8(&mut self) -> PPS8_W<PPS_SPEC> {
         PPS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Pin Power Save Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pps9(&mut self) -> PPS9_W<PPS_SPEC> {
         PPS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Pin Power Save Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pps10(&mut self) -> PPS10_W<PPS_SPEC> {
         PPS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Pin Power Save Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pps11(&mut self) -> PPS11_W<PPS_SPEC> {
         PPS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Pin Power Save Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pps12(&mut self) -> PPS12_W<PPS_SPEC> {
         PPS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Pin Power Save Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pps13(&mut self) -> PPS13_W<PPS_SPEC> {
         PPS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Pin Power Save Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pps14(&mut self) -> PPS14_W<PPS_SPEC> {
         PPS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Pin Power Save Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pps15(&mut self) -> PPS15_W<PPS_SPEC> {
         PPS15_W::new(self, 15)
     }
diff --git a/src/port2/hwsel.rs b/src/port2/hwsel.rs
index 9986fc21..1e4434f9 100644
--- a/src/port2/hwsel.rs
+++ b/src/port2/hwsel.rs
@@ -1255,97 +1255,81 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn hw0(&mut self) -> HW0_W<HWSEL_SPEC> {
         HW0_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn hw1(&mut self) -> HW1_W<HWSEL_SPEC> {
         HW1_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn hw2(&mut self) -> HW2_W<HWSEL_SPEC> {
         HW2_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn hw3(&mut self) -> HW3_W<HWSEL_SPEC> {
         HW3_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn hw4(&mut self) -> HW4_W<HWSEL_SPEC> {
         HW4_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn hw5(&mut self) -> HW5_W<HWSEL_SPEC> {
         HW5_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn hw6(&mut self) -> HW6_W<HWSEL_SPEC> {
         HW6_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn hw7(&mut self) -> HW7_W<HWSEL_SPEC> {
         HW7_W::new(self, 14)
     }
     #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn hw8(&mut self) -> HW8_W<HWSEL_SPEC> {
         HW8_W::new(self, 16)
     }
     #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn hw9(&mut self) -> HW9_W<HWSEL_SPEC> {
         HW9_W::new(self, 18)
     }
     #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn hw10(&mut self) -> HW10_W<HWSEL_SPEC> {
         HW10_W::new(self, 20)
     }
     #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn hw11(&mut self) -> HW11_W<HWSEL_SPEC> {
         HW11_W::new(self, 22)
     }
     #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn hw12(&mut self) -> HW12_W<HWSEL_SPEC> {
         HW12_W::new(self, 24)
     }
     #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn hw13(&mut self) -> HW13_W<HWSEL_SPEC> {
         HW13_W::new(self, 26)
     }
     #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn hw14(&mut self) -> HW14_W<HWSEL_SPEC> {
         HW14_W::new(self, 28)
     }
     #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn hw15(&mut self) -> HW15_W<HWSEL_SPEC> {
         HW15_W::new(self, 30)
     }
diff --git a/src/port2/iocr0.rs b/src/port2/iocr0.rs
index 90b88b3d..17c2e828 100644
--- a/src/port2/iocr0.rs
+++ b/src/port2/iocr0.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc0(&mut self) -> PC0_W<IOCR0_SPEC> {
         PC0_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc1(&mut self) -> PC1_W<IOCR0_SPEC> {
         PC1_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc2(&mut self) -> PC2_W<IOCR0_SPEC> {
         PC2_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc3(&mut self) -> PC3_W<IOCR0_SPEC> {
         PC3_W::new(self, 27)
     }
diff --git a/src/port2/iocr12.rs b/src/port2/iocr12.rs
index 4f8b652e..6ffdc8ac 100644
--- a/src/port2/iocr12.rs
+++ b/src/port2/iocr12.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc12(&mut self) -> PC12_W<IOCR12_SPEC> {
         PC12_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc13(&mut self) -> PC13_W<IOCR12_SPEC> {
         PC13_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc14(&mut self) -> PC14_W<IOCR12_SPEC> {
         PC14_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pc15(&mut self) -> PC15_W<IOCR12_SPEC> {
         PC15_W::new(self, 27)
     }
diff --git a/src/port2/iocr4.rs b/src/port2/iocr4.rs
index 27fbc929..9f5444fa 100644
--- a/src/port2/iocr4.rs
+++ b/src/port2/iocr4.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc4(&mut self) -> PC4_W<IOCR4_SPEC> {
         PC4_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc5(&mut self) -> PC5_W<IOCR4_SPEC> {
         PC5_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc6(&mut self) -> PC6_W<IOCR4_SPEC> {
         PC6_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pc7(&mut self) -> PC7_W<IOCR4_SPEC> {
         PC7_W::new(self, 27)
     }
diff --git a/src/port2/iocr8.rs b/src/port2/iocr8.rs
index d8b10679..b9f118ab 100644
--- a/src/port2/iocr8.rs
+++ b/src/port2/iocr8.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc8(&mut self) -> PC8_W<IOCR8_SPEC> {
         PC8_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc9(&mut self) -> PC9_W<IOCR8_SPEC> {
         PC9_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc10(&mut self) -> PC10_W<IOCR8_SPEC> {
         PC10_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pc11(&mut self) -> PC11_W<IOCR8_SPEC> {
         PC11_W::new(self, 27)
     }
diff --git a/src/port2/omr.rs b/src/port2/omr.rs
index 5fd03cd0..9ceb3860 100644
--- a/src/port2/omr.rs
+++ b/src/port2/omr.rs
@@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Port n Set Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ps0(&mut self) -> PS0_W<OMR_SPEC> {
         PS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Set Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ps1(&mut self) -> PS1_W<OMR_SPEC> {
         PS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Set Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ps2(&mut self) -> PS2_W<OMR_SPEC> {
         PS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Set Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ps3(&mut self) -> PS3_W<OMR_SPEC> {
         PS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Set Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ps4(&mut self) -> PS4_W<OMR_SPEC> {
         PS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Set Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ps5(&mut self) -> PS5_W<OMR_SPEC> {
         PS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Set Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ps6(&mut self) -> PS6_W<OMR_SPEC> {
         PS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Set Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ps7(&mut self) -> PS7_W<OMR_SPEC> {
         PS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Set Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn ps8(&mut self) -> PS8_W<OMR_SPEC> {
         PS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Set Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn ps9(&mut self) -> PS9_W<OMR_SPEC> {
         PS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Set Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn ps10(&mut self) -> PS10_W<OMR_SPEC> {
         PS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Set Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn ps11(&mut self) -> PS11_W<OMR_SPEC> {
         PS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Set Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn ps12(&mut self) -> PS12_W<OMR_SPEC> {
         PS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Set Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn ps13(&mut self) -> PS13_W<OMR_SPEC> {
         PS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Set Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn ps14(&mut self) -> PS14_W<OMR_SPEC> {
         PS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Set Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn ps15(&mut self) -> PS15_W<OMR_SPEC> {
         PS15_W::new(self, 15)
     }
     #[doc = "Bit 16 - Port n Reset Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pr0(&mut self) -> PR0_W<OMR_SPEC> {
         PR0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Port n Reset Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pr1(&mut self) -> PR1_W<OMR_SPEC> {
         PR1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Port n Reset Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pr2(&mut self) -> PR2_W<OMR_SPEC> {
         PR2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Port n Reset Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pr3(&mut self) -> PR3_W<OMR_SPEC> {
         PR3_W::new(self, 19)
     }
     #[doc = "Bit 20 - Port n Reset Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pr4(&mut self) -> PR4_W<OMR_SPEC> {
         PR4_W::new(self, 20)
     }
     #[doc = "Bit 21 - Port n Reset Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pr5(&mut self) -> PR5_W<OMR_SPEC> {
         PR5_W::new(self, 21)
     }
     #[doc = "Bit 22 - Port n Reset Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pr6(&mut self) -> PR6_W<OMR_SPEC> {
         PR6_W::new(self, 22)
     }
     #[doc = "Bit 23 - Port n Reset Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pr7(&mut self) -> PR7_W<OMR_SPEC> {
         PR7_W::new(self, 23)
     }
     #[doc = "Bit 24 - Port n Reset Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pr8(&mut self) -> PR8_W<OMR_SPEC> {
         PR8_W::new(self, 24)
     }
     #[doc = "Bit 25 - Port n Reset Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pr9(&mut self) -> PR9_W<OMR_SPEC> {
         PR9_W::new(self, 25)
     }
     #[doc = "Bit 26 - Port n Reset Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pr10(&mut self) -> PR10_W<OMR_SPEC> {
         PR10_W::new(self, 26)
     }
     #[doc = "Bit 27 - Port n Reset Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pr11(&mut self) -> PR11_W<OMR_SPEC> {
         PR11_W::new(self, 27)
     }
     #[doc = "Bit 28 - Port n Reset Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pr12(&mut self) -> PR12_W<OMR_SPEC> {
         PR12_W::new(self, 28)
     }
     #[doc = "Bit 29 - Port n Reset Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pr13(&mut self) -> PR13_W<OMR_SPEC> {
         PR13_W::new(self, 29)
     }
     #[doc = "Bit 30 - Port n Reset Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pr14(&mut self) -> PR14_W<OMR_SPEC> {
         PR14_W::new(self, 30)
     }
     #[doc = "Bit 31 - Port n Reset Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pr15(&mut self) -> PR15_W<OMR_SPEC> {
         PR15_W::new(self, 31)
     }
diff --git a/src/port2/out.rs b/src/port2/out.rs
index ff800299..258d5b2f 100644
--- a/src/port2/out.rs
+++ b/src/port2/out.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Output Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn p0(&mut self) -> P0_W<OUT_SPEC> {
         P0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Output Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn p1(&mut self) -> P1_W<OUT_SPEC> {
         P1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Output Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn p2(&mut self) -> P2_W<OUT_SPEC> {
         P2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Output Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn p3(&mut self) -> P3_W<OUT_SPEC> {
         P3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Output Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn p4(&mut self) -> P4_W<OUT_SPEC> {
         P4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Output Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn p5(&mut self) -> P5_W<OUT_SPEC> {
         P5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Output Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn p6(&mut self) -> P6_W<OUT_SPEC> {
         P6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Output Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn p7(&mut self) -> P7_W<OUT_SPEC> {
         P7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Output Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn p8(&mut self) -> P8_W<OUT_SPEC> {
         P8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Output Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn p9(&mut self) -> P9_W<OUT_SPEC> {
         P9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Output Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn p10(&mut self) -> P10_W<OUT_SPEC> {
         P10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Output Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn p11(&mut self) -> P11_W<OUT_SPEC> {
         P11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Output Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn p12(&mut self) -> P12_W<OUT_SPEC> {
         P12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Output Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn p13(&mut self) -> P13_W<OUT_SPEC> {
         P13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Output Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn p14(&mut self) -> P14_W<OUT_SPEC> {
         P14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Output Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn p15(&mut self) -> P15_W<OUT_SPEC> {
         P15_W::new(self, 15)
     }
diff --git a/src/port2/pdr0.rs b/src/port2/pdr0.rs
index 7e6af204..5533d55f 100644
--- a/src/port2/pdr0.rs
+++ b/src/port2/pdr0.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"]
     #[inline(always)]
-    #[must_use]
     pub fn pd0(&mut self) -> PD0_W<PDR0_SPEC> {
         PD0_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"]
     #[inline(always)]
-    #[must_use]
     pub fn pd1(&mut self) -> PD1_W<PDR0_SPEC> {
         PD1_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"]
     #[inline(always)]
-    #[must_use]
     pub fn pd2(&mut self) -> PD2_W<PDR0_SPEC> {
         PD2_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"]
     #[inline(always)]
-    #[must_use]
     pub fn pd3(&mut self) -> PD3_W<PDR0_SPEC> {
         PD3_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"]
     #[inline(always)]
-    #[must_use]
     pub fn pd4(&mut self) -> PD4_W<PDR0_SPEC> {
         PD4_W::new(self, 16)
     }
     #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"]
     #[inline(always)]
-    #[must_use]
     pub fn pd5(&mut self) -> PD5_W<PDR0_SPEC> {
         PD5_W::new(self, 20)
     }
     #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"]
     #[inline(always)]
-    #[must_use]
     pub fn pd6(&mut self) -> PD6_W<PDR0_SPEC> {
         PD6_W::new(self, 24)
     }
     #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"]
     #[inline(always)]
-    #[must_use]
     pub fn pd7(&mut self) -> PD7_W<PDR0_SPEC> {
         PD7_W::new(self, 28)
     }
diff --git a/src/port2/pdr1.rs b/src/port2/pdr1.rs
index 09066435..207d6103 100644
--- a/src/port2/pdr1.rs
+++ b/src/port2/pdr1.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"]
     #[inline(always)]
-    #[must_use]
     pub fn pd8(&mut self) -> PD8_W<PDR1_SPEC> {
         PD8_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"]
     #[inline(always)]
-    #[must_use]
     pub fn pd9(&mut self) -> PD9_W<PDR1_SPEC> {
         PD9_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"]
     #[inline(always)]
-    #[must_use]
     pub fn pd10(&mut self) -> PD10_W<PDR1_SPEC> {
         PD10_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"]
     #[inline(always)]
-    #[must_use]
     pub fn pd11(&mut self) -> PD11_W<PDR1_SPEC> {
         PD11_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"]
     #[inline(always)]
-    #[must_use]
     pub fn pd12(&mut self) -> PD12_W<PDR1_SPEC> {
         PD12_W::new(self, 16)
     }
     #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"]
     #[inline(always)]
-    #[must_use]
     pub fn pd13(&mut self) -> PD13_W<PDR1_SPEC> {
         PD13_W::new(self, 20)
     }
     #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"]
     #[inline(always)]
-    #[must_use]
     pub fn pd14(&mut self) -> PD14_W<PDR1_SPEC> {
         PD14_W::new(self, 24)
     }
     #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"]
     #[inline(always)]
-    #[must_use]
     pub fn pd15(&mut self) -> PD15_W<PDR1_SPEC> {
         PD15_W::new(self, 28)
     }
diff --git a/src/port2/pps.rs b/src/port2/pps.rs
index a5cf9d2b..79dcd256 100644
--- a/src/port2/pps.rs
+++ b/src/port2/pps.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Pin Power Save Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pps0(&mut self) -> PPS0_W<PPS_SPEC> {
         PPS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Pin Power Save Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pps1(&mut self) -> PPS1_W<PPS_SPEC> {
         PPS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Pin Power Save Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pps2(&mut self) -> PPS2_W<PPS_SPEC> {
         PPS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Pin Power Save Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pps3(&mut self) -> PPS3_W<PPS_SPEC> {
         PPS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Pin Power Save Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pps4(&mut self) -> PPS4_W<PPS_SPEC> {
         PPS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Pin Power Save Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pps5(&mut self) -> PPS5_W<PPS_SPEC> {
         PPS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Pin Power Save Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pps6(&mut self) -> PPS6_W<PPS_SPEC> {
         PPS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Pin Power Save Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pps7(&mut self) -> PPS7_W<PPS_SPEC> {
         PPS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Pin Power Save Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pps8(&mut self) -> PPS8_W<PPS_SPEC> {
         PPS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Pin Power Save Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pps9(&mut self) -> PPS9_W<PPS_SPEC> {
         PPS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Pin Power Save Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pps10(&mut self) -> PPS10_W<PPS_SPEC> {
         PPS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Pin Power Save Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pps11(&mut self) -> PPS11_W<PPS_SPEC> {
         PPS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Pin Power Save Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pps12(&mut self) -> PPS12_W<PPS_SPEC> {
         PPS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Pin Power Save Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pps13(&mut self) -> PPS13_W<PPS_SPEC> {
         PPS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Pin Power Save Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pps14(&mut self) -> PPS14_W<PPS_SPEC> {
         PPS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Pin Power Save Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pps15(&mut self) -> PPS15_W<PPS_SPEC> {
         PPS15_W::new(self, 15)
     }
diff --git a/src/port3/hwsel.rs b/src/port3/hwsel.rs
index 5b742f6a..16afbec6 100644
--- a/src/port3/hwsel.rs
+++ b/src/port3/hwsel.rs
@@ -1255,97 +1255,81 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn hw0(&mut self) -> HW0_W<HWSEL_SPEC> {
         HW0_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn hw1(&mut self) -> HW1_W<HWSEL_SPEC> {
         HW1_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn hw2(&mut self) -> HW2_W<HWSEL_SPEC> {
         HW2_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn hw3(&mut self) -> HW3_W<HWSEL_SPEC> {
         HW3_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn hw4(&mut self) -> HW4_W<HWSEL_SPEC> {
         HW4_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn hw5(&mut self) -> HW5_W<HWSEL_SPEC> {
         HW5_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn hw6(&mut self) -> HW6_W<HWSEL_SPEC> {
         HW6_W::new(self, 12)
     }
     #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn hw7(&mut self) -> HW7_W<HWSEL_SPEC> {
         HW7_W::new(self, 14)
     }
     #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn hw8(&mut self) -> HW8_W<HWSEL_SPEC> {
         HW8_W::new(self, 16)
     }
     #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn hw9(&mut self) -> HW9_W<HWSEL_SPEC> {
         HW9_W::new(self, 18)
     }
     #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn hw10(&mut self) -> HW10_W<HWSEL_SPEC> {
         HW10_W::new(self, 20)
     }
     #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn hw11(&mut self) -> HW11_W<HWSEL_SPEC> {
         HW11_W::new(self, 22)
     }
     #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn hw12(&mut self) -> HW12_W<HWSEL_SPEC> {
         HW12_W::new(self, 24)
     }
     #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn hw13(&mut self) -> HW13_W<HWSEL_SPEC> {
         HW13_W::new(self, 26)
     }
     #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn hw14(&mut self) -> HW14_W<HWSEL_SPEC> {
         HW14_W::new(self, 28)
     }
     #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn hw15(&mut self) -> HW15_W<HWSEL_SPEC> {
         HW15_W::new(self, 30)
     }
diff --git a/src/port3/iocr0.rs b/src/port3/iocr0.rs
index 10777565..d9af1afb 100644
--- a/src/port3/iocr0.rs
+++ b/src/port3/iocr0.rs
@@ -1099,25 +1099,21 @@ impl R {
 impl W {
     #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc0(&mut self) -> PC0_W<IOCR0_SPEC> {
         PC0_W::new(self, 3)
     }
     #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc1(&mut self) -> PC1_W<IOCR0_SPEC> {
         PC1_W::new(self, 11)
     }
     #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc2(&mut self) -> PC2_W<IOCR0_SPEC> {
         PC2_W::new(self, 19)
     }
     #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pc3(&mut self) -> PC3_W<IOCR0_SPEC> {
         PC3_W::new(self, 27)
     }
diff --git a/src/port3/omr.rs b/src/port3/omr.rs
index c45e0548..f79eb7d0 100644
--- a/src/port3/omr.rs
+++ b/src/port3/omr.rs
@@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Port n Set Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ps0(&mut self) -> PS0_W<OMR_SPEC> {
         PS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Set Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ps1(&mut self) -> PS1_W<OMR_SPEC> {
         PS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Set Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ps2(&mut self) -> PS2_W<OMR_SPEC> {
         PS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Set Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ps3(&mut self) -> PS3_W<OMR_SPEC> {
         PS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Set Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ps4(&mut self) -> PS4_W<OMR_SPEC> {
         PS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Set Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ps5(&mut self) -> PS5_W<OMR_SPEC> {
         PS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Set Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ps6(&mut self) -> PS6_W<OMR_SPEC> {
         PS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Set Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ps7(&mut self) -> PS7_W<OMR_SPEC> {
         PS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Set Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn ps8(&mut self) -> PS8_W<OMR_SPEC> {
         PS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Set Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn ps9(&mut self) -> PS9_W<OMR_SPEC> {
         PS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Set Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn ps10(&mut self) -> PS10_W<OMR_SPEC> {
         PS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Set Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn ps11(&mut self) -> PS11_W<OMR_SPEC> {
         PS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Set Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn ps12(&mut self) -> PS12_W<OMR_SPEC> {
         PS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Set Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn ps13(&mut self) -> PS13_W<OMR_SPEC> {
         PS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Set Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn ps14(&mut self) -> PS14_W<OMR_SPEC> {
         PS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Set Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn ps15(&mut self) -> PS15_W<OMR_SPEC> {
         PS15_W::new(self, 15)
     }
     #[doc = "Bit 16 - Port n Reset Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pr0(&mut self) -> PR0_W<OMR_SPEC> {
         PR0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Port n Reset Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pr1(&mut self) -> PR1_W<OMR_SPEC> {
         PR1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Port n Reset Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pr2(&mut self) -> PR2_W<OMR_SPEC> {
         PR2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Port n Reset Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pr3(&mut self) -> PR3_W<OMR_SPEC> {
         PR3_W::new(self, 19)
     }
     #[doc = "Bit 20 - Port n Reset Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pr4(&mut self) -> PR4_W<OMR_SPEC> {
         PR4_W::new(self, 20)
     }
     #[doc = "Bit 21 - Port n Reset Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pr5(&mut self) -> PR5_W<OMR_SPEC> {
         PR5_W::new(self, 21)
     }
     #[doc = "Bit 22 - Port n Reset Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pr6(&mut self) -> PR6_W<OMR_SPEC> {
         PR6_W::new(self, 22)
     }
     #[doc = "Bit 23 - Port n Reset Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pr7(&mut self) -> PR7_W<OMR_SPEC> {
         PR7_W::new(self, 23)
     }
     #[doc = "Bit 24 - Port n Reset Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pr8(&mut self) -> PR8_W<OMR_SPEC> {
         PR8_W::new(self, 24)
     }
     #[doc = "Bit 25 - Port n Reset Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pr9(&mut self) -> PR9_W<OMR_SPEC> {
         PR9_W::new(self, 25)
     }
     #[doc = "Bit 26 - Port n Reset Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pr10(&mut self) -> PR10_W<OMR_SPEC> {
         PR10_W::new(self, 26)
     }
     #[doc = "Bit 27 - Port n Reset Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pr11(&mut self) -> PR11_W<OMR_SPEC> {
         PR11_W::new(self, 27)
     }
     #[doc = "Bit 28 - Port n Reset Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pr12(&mut self) -> PR12_W<OMR_SPEC> {
         PR12_W::new(self, 28)
     }
     #[doc = "Bit 29 - Port n Reset Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pr13(&mut self) -> PR13_W<OMR_SPEC> {
         PR13_W::new(self, 29)
     }
     #[doc = "Bit 30 - Port n Reset Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pr14(&mut self) -> PR14_W<OMR_SPEC> {
         PR14_W::new(self, 30)
     }
     #[doc = "Bit 31 - Port n Reset Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pr15(&mut self) -> PR15_W<OMR_SPEC> {
         PR15_W::new(self, 31)
     }
diff --git a/src/port3/out.rs b/src/port3/out.rs
index 5c53eb03..6cc2c8cf 100644
--- a/src/port3/out.rs
+++ b/src/port3/out.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Output Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn p0(&mut self) -> P0_W<OUT_SPEC> {
         P0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Output Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn p1(&mut self) -> P1_W<OUT_SPEC> {
         P1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Output Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn p2(&mut self) -> P2_W<OUT_SPEC> {
         P2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Output Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn p3(&mut self) -> P3_W<OUT_SPEC> {
         P3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Output Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn p4(&mut self) -> P4_W<OUT_SPEC> {
         P4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Output Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn p5(&mut self) -> P5_W<OUT_SPEC> {
         P5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Output Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn p6(&mut self) -> P6_W<OUT_SPEC> {
         P6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Output Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn p7(&mut self) -> P7_W<OUT_SPEC> {
         P7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Output Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn p8(&mut self) -> P8_W<OUT_SPEC> {
         P8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Output Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn p9(&mut self) -> P9_W<OUT_SPEC> {
         P9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Output Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn p10(&mut self) -> P10_W<OUT_SPEC> {
         P10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Output Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn p11(&mut self) -> P11_W<OUT_SPEC> {
         P11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Output Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn p12(&mut self) -> P12_W<OUT_SPEC> {
         P12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Output Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn p13(&mut self) -> P13_W<OUT_SPEC> {
         P13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Output Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn p14(&mut self) -> P14_W<OUT_SPEC> {
         P14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Output Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn p15(&mut self) -> P15_W<OUT_SPEC> {
         P15_W::new(self, 15)
     }
diff --git a/src/port3/pdr0.rs b/src/port3/pdr0.rs
index 09120f9b..8fd84e41 100644
--- a/src/port3/pdr0.rs
+++ b/src/port3/pdr0.rs
@@ -79,49 +79,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"]
     #[inline(always)]
-    #[must_use]
     pub fn pd0(&mut self) -> PD0_W<PDR0_SPEC> {
         PD0_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"]
     #[inline(always)]
-    #[must_use]
     pub fn pd1(&mut self) -> PD1_W<PDR0_SPEC> {
         PD1_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"]
     #[inline(always)]
-    #[must_use]
     pub fn pd2(&mut self) -> PD2_W<PDR0_SPEC> {
         PD2_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"]
     #[inline(always)]
-    #[must_use]
     pub fn pd3(&mut self) -> PD3_W<PDR0_SPEC> {
         PD3_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"]
     #[inline(always)]
-    #[must_use]
     pub fn pd4(&mut self) -> PD4_W<PDR0_SPEC> {
         PD4_W::new(self, 16)
     }
     #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"]
     #[inline(always)]
-    #[must_use]
     pub fn pd5(&mut self) -> PD5_W<PDR0_SPEC> {
         PD5_W::new(self, 20)
     }
     #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"]
     #[inline(always)]
-    #[must_use]
     pub fn pd6(&mut self) -> PD6_W<PDR0_SPEC> {
         PD6_W::new(self, 24)
     }
     #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"]
     #[inline(always)]
-    #[must_use]
     pub fn pd7(&mut self) -> PD7_W<PDR0_SPEC> {
         PD7_W::new(self, 28)
     }
diff --git a/src/port3/pps.rs b/src/port3/pps.rs
index 539e527d..79b7cd0b 100644
--- a/src/port3/pps.rs
+++ b/src/port3/pps.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Port n Pin Power Save Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pps0(&mut self) -> PPS0_W<PPS_SPEC> {
         PPS0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Port n Pin Power Save Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pps1(&mut self) -> PPS1_W<PPS_SPEC> {
         PPS1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Port n Pin Power Save Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pps2(&mut self) -> PPS2_W<PPS_SPEC> {
         PPS2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Port n Pin Power Save Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pps3(&mut self) -> PPS3_W<PPS_SPEC> {
         PPS3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Port n Pin Power Save Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pps4(&mut self) -> PPS4_W<PPS_SPEC> {
         PPS4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Port n Pin Power Save Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pps5(&mut self) -> PPS5_W<PPS_SPEC> {
         PPS5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Port n Pin Power Save Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pps6(&mut self) -> PPS6_W<PPS_SPEC> {
         PPS6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Port n Pin Power Save Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pps7(&mut self) -> PPS7_W<PPS_SPEC> {
         PPS7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Port n Pin Power Save Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pps8(&mut self) -> PPS8_W<PPS_SPEC> {
         PPS8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Port n Pin Power Save Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pps9(&mut self) -> PPS9_W<PPS_SPEC> {
         PPS9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Port n Pin Power Save Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pps10(&mut self) -> PPS10_W<PPS_SPEC> {
         PPS10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Port n Pin Power Save Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pps11(&mut self) -> PPS11_W<PPS_SPEC> {
         PPS11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Port n Pin Power Save Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pps12(&mut self) -> PPS12_W<PPS_SPEC> {
         PPS12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Port n Pin Power Save Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pps13(&mut self) -> PPS13_W<PPS_SPEC> {
         PPS13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Port n Pin Power Save Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pps14(&mut self) -> PPS14_W<PPS_SPEC> {
         PPS14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Port n Pin Power Save Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pps15(&mut self) -> PPS15_W<PPS_SPEC> {
         PPS15_W::new(self, 15)
     }
diff --git a/src/posif0/halps.rs b/src/posif0/halps.rs
index 861e249d..b721148b 100644
--- a/src/posif0/halps.rs
+++ b/src/posif0/halps.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Shadow Hall Current Pattern"]
     #[inline(always)]
-    #[must_use]
     pub fn hcps(&mut self) -> HCPS_W<HALPS_SPEC> {
         HCPS_W::new(self, 0)
     }
     #[doc = "Bits 3:5 - Shadow Hall expected Pattern"]
     #[inline(always)]
-    #[must_use]
     pub fn heps(&mut self) -> HEPS_W<HALPS_SPEC> {
         HEPS_W::new(self, 3)
     }
diff --git a/src/posif0/mcmc.rs b/src/posif0/mcmc.rs
index b73050d6..5b2947b0 100644
--- a/src/posif0/mcmc.rs
+++ b/src/posif0/mcmc.rs
@@ -7,13 +7,11 @@ pub type MPC_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Multi-Channel Pattern Update Enable Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn mnpc(&mut self) -> MNPC_W<MCMC_SPEC> {
         MNPC_W::new(self, 0)
     }
     #[doc = "Bit 1 - Multi-Channel Pattern clear"]
     #[inline(always)]
-    #[must_use]
     pub fn mpc(&mut self) -> MPC_W<MCMC_SPEC> {
         MPC_W::new(self, 1)
     }
diff --git a/src/posif0/mcms.rs b/src/posif0/mcms.rs
index c3a7203a..4f3ef17a 100644
--- a/src/posif0/mcms.rs
+++ b/src/posif0/mcms.rs
@@ -9,19 +9,16 @@ pub type STMR_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Multi-Channel Pattern Update Enable Set"]
     #[inline(always)]
-    #[must_use]
     pub fn mnps(&mut self) -> MNPS_W<MCMS_SPEC> {
         MNPS_W::new(self, 0)
     }
     #[doc = "Bit 1 - Hall Pattern Shadow Transfer Request"]
     #[inline(always)]
-    #[must_use]
     pub fn sthr(&mut self) -> STHR_W<MCMS_SPEC> {
         STHR_W::new(self, 1)
     }
     #[doc = "Bit 2 - Multi-Channel Shadow Transfer Request"]
     #[inline(always)]
-    #[must_use]
     pub fn stmr(&mut self) -> STMR_W<MCMS_SPEC> {
         STMR_W::new(self, 2)
     }
diff --git a/src/posif0/mcsm.rs b/src/posif0/mcsm.rs
index c9e3d79f..727e001e 100644
--- a/src/posif0/mcsm.rs
+++ b/src/posif0/mcsm.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Shadow Multi-Channel Pattern"]
     #[inline(always)]
-    #[must_use]
     pub fn mcmps(&mut self) -> MCMPS_W<MCSM_SPEC> {
         MCMPS_W::new(self, 0)
     }
diff --git a/src/posif0/pconf.rs b/src/posif0/pconf.rs
index a2fb3f06..aac56ab6 100644
--- a/src/posif0/pconf.rs
+++ b/src/posif0/pconf.rs
@@ -1260,97 +1260,81 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Function Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn fsel(&mut self) -> FSEL_W<PCONF_SPEC> {
         FSEL_W::new(self, 0)
     }
     #[doc = "Bit 2 - Position Decoder Mode selection"]
     #[inline(always)]
-    #[must_use]
     pub fn qdcm(&mut self) -> QDCM_W<PCONF_SPEC> {
         QDCM_W::new(self, 2)
     }
     #[doc = "Bit 4 - Idle generation enable"]
     #[inline(always)]
-    #[must_use]
     pub fn hidg(&mut self) -> HIDG_W<PCONF_SPEC> {
         HIDG_W::new(self, 4)
     }
     #[doc = "Bit 5 - Multi-Channel Pattern SW update enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mcue(&mut self) -> MCUE_W<PCONF_SPEC> {
         MCUE_W::new(self, 5)
     }
     #[doc = "Bits 8:9 - PhaseA/Hal input 1 selector"]
     #[inline(always)]
-    #[must_use]
     pub fn insel0(&mut self) -> INSEL0_W<PCONF_SPEC> {
         INSEL0_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - PhaseB/Hall input 2 selector"]
     #[inline(always)]
-    #[must_use]
     pub fn insel1(&mut self) -> INSEL1_W<PCONF_SPEC> {
         INSEL1_W::new(self, 10)
     }
     #[doc = "Bits 12:13 - Index/Hall input 3 selector"]
     #[inline(always)]
-    #[must_use]
     pub fn insel2(&mut self) -> INSEL2_W<PCONF_SPEC> {
         INSEL2_W::new(self, 12)
     }
     #[doc = "Bit 16 - Delay Pin selector"]
     #[inline(always)]
-    #[must_use]
     pub fn dsel(&mut self) -> DSEL_W<PCONF_SPEC> {
         DSEL_W::new(self, 16)
     }
     #[doc = "Bit 17 - Edge selector for the sampling trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn spes(&mut self) -> SPES_W<PCONF_SPEC> {
         SPES_W::new(self, 17)
     }
     #[doc = "Bits 18:20 - Pattern update signal select"]
     #[inline(always)]
-    #[must_use]
     pub fn msets(&mut self) -> MSETS_W<PCONF_SPEC> {
         MSETS_W::new(self, 18)
     }
     #[doc = "Bit 21 - Multi-Channel pattern update trigger edge"]
     #[inline(always)]
-    #[must_use]
     pub fn mses(&mut self) -> MSES_W<PCONF_SPEC> {
         MSES_W::new(self, 21)
     }
     #[doc = "Bits 22:23 - PWM synchronization signal selector"]
     #[inline(always)]
-    #[must_use]
     pub fn msyns(&mut self) -> MSYNS_W<PCONF_SPEC> {
         MSYNS_W::new(self, 22)
     }
     #[doc = "Bits 24:25 - Wrong Hall Event selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ewis(&mut self) -> EWIS_W<PCONF_SPEC> {
         EWIS_W::new(self, 24)
     }
     #[doc = "Bit 26 - External Wrong Hall Event enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ewie(&mut self) -> EWIE_W<PCONF_SPEC> {
         EWIE_W::new(self, 26)
     }
     #[doc = "Bit 27 - External Wrong Hall Event active level"]
     #[inline(always)]
-    #[must_use]
     pub fn ewil(&mut self) -> EWIL_W<PCONF_SPEC> {
         EWIL_W::new(self, 27)
     }
     #[doc = "Bits 28:30 - Low Pass Filters Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn lpc(&mut self) -> LPC_W<PCONF_SPEC> {
         LPC_W::new(self, 28)
     }
diff --git a/src/posif0/pflge.rs b/src/posif0/pflge.rs
index ce5fb276..5083cf01 100644
--- a/src/posif0/pflge.rs
+++ b/src/posif0/pflge.rs
@@ -1051,109 +1051,91 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Correct Hall Event Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn eche(&mut self) -> ECHE_W<PFLGE_SPEC> {
         ECHE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Wrong Hall Event Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ewhe(&mut self) -> EWHE_W<PFLGE_SPEC> {
         EWHE_W::new(self, 1)
     }
     #[doc = "Bit 2 - Hall Input Update Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ehie(&mut self) -> EHIE_W<PFLGE_SPEC> {
         EHIE_W::new(self, 2)
     }
     #[doc = "Bit 4 - Multi-Channel pattern shadow transfer enable"]
     #[inline(always)]
-    #[must_use]
     pub fn emst(&mut self) -> EMST_W<PFLGE_SPEC> {
         EMST_W::new(self, 4)
     }
     #[doc = "Bit 8 - Quadrature Index Event Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn eindx(&mut self) -> EINDX_W<PFLGE_SPEC> {
         EINDX_W::new(self, 8)
     }
     #[doc = "Bit 9 - Quadrature Phase Error Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn eerr(&mut self) -> EERR_W<PFLGE_SPEC> {
         EERR_W::new(self, 9)
     }
     #[doc = "Bit 10 - Quadrature CLK interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ecnt(&mut self) -> ECNT_W<PFLGE_SPEC> {
         ECNT_W::new(self, 10)
     }
     #[doc = "Bit 11 - Quadrature direction change interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn edir(&mut self) -> EDIR_W<PFLGE_SPEC> {
         EDIR_W::new(self, 11)
     }
     #[doc = "Bit 12 - Quadrature Period CLK interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn epclk(&mut self) -> EPCLK_W<PFLGE_SPEC> {
         EPCLK_W::new(self, 12)
     }
     #[doc = "Bit 16 - Correct Hall Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn chesel(&mut self) -> CHESEL_W<PFLGE_SPEC> {
         CHESEL_W::new(self, 16)
     }
     #[doc = "Bit 17 - Wrong Hall Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn whesel(&mut self) -> WHESEL_W<PFLGE_SPEC> {
         WHESEL_W::new(self, 17)
     }
     #[doc = "Bit 18 - Hall Inputs Update Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn hiesel(&mut self) -> HIESEL_W<PFLGE_SPEC> {
         HIESEL_W::new(self, 18)
     }
     #[doc = "Bit 20 - Multi-Channel pattern Update Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn mstsel(&mut self) -> MSTSEL_W<PFLGE_SPEC> {
         MSTSEL_W::new(self, 20)
     }
     #[doc = "Bit 24 - Quadrature Index Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn indsel(&mut self) -> INDSEL_W<PFLGE_SPEC> {
         INDSEL_W::new(self, 24)
     }
     #[doc = "Bit 25 - Quadrature Phase Error Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn errsel(&mut self) -> ERRSEL_W<PFLGE_SPEC> {
         ERRSEL_W::new(self, 25)
     }
     #[doc = "Bit 26 - Quadrature Clock Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn cntsel(&mut self) -> CNTSEL_W<PFLGE_SPEC> {
         CNTSEL_W::new(self, 26)
     }
     #[doc = "Bit 27 - Quadrature Direction Update Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn dirsel(&mut self) -> DIRSEL_W<PFLGE_SPEC> {
         DIRSEL_W::new(self, 27)
     }
     #[doc = "Bit 28 - Quadrature Period clock Event Service Request Selector"]
     #[inline(always)]
-    #[must_use]
     pub fn pclsel(&mut self) -> PCLSEL_W<PFLGE_SPEC> {
         PCLSEL_W::new(self, 28)
     }
diff --git a/src/posif0/prunc.rs b/src/posif0/prunc.rs
index 57316646..76bbef20 100644
--- a/src/posif0/prunc.rs
+++ b/src/posif0/prunc.rs
@@ -7,13 +7,11 @@ pub type CSM_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Clear Run bit"]
     #[inline(always)]
-    #[must_use]
     pub fn crb(&mut self) -> CRB_W<PRUNC_SPEC> {
         CRB_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Current internal status"]
     #[inline(always)]
-    #[must_use]
     pub fn csm(&mut self) -> CSM_W<PRUNC_SPEC> {
         CSM_W::new(self, 1)
     }
diff --git a/src/posif0/pruns.rs b/src/posif0/pruns.rs
index d80e4493..09976f6f 100644
--- a/src/posif0/pruns.rs
+++ b/src/posif0/pruns.rs
@@ -5,7 +5,6 @@ pub type SRB_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Set Run bit"]
     #[inline(always)]
-    #[must_use]
     pub fn srb(&mut self) -> SRB_W<PRUNS_SPEC> {
         SRB_W::new(self, 0)
     }
diff --git a/src/posif0/psus.rs b/src/posif0/psus.rs
index c106d344..3eb71ab0 100644
--- a/src/posif0/psus.rs
+++ b/src/posif0/psus.rs
@@ -189,13 +189,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Quadrature Mode Suspend Config"]
     #[inline(always)]
-    #[must_use]
     pub fn qsus(&mut self) -> QSUS_W<PSUS_SPEC> {
         QSUS_W::new(self, 0)
     }
     #[doc = "Bits 2:3 - Multi-Channel Mode Suspend Config"]
     #[inline(always)]
-    #[must_use]
     pub fn msus(&mut self) -> MSUS_W<PSUS_SPEC> {
         MSUS_W::new(self, 2)
     }
diff --git a/src/posif0/qdc.rs b/src/posif0/qdc.rs
index 2c3ec97c..fed310fa 100644
--- a/src/posif0/qdc.rs
+++ b/src/posif0/qdc.rs
@@ -300,25 +300,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Phase A Level selector"]
     #[inline(always)]
-    #[must_use]
     pub fn pals(&mut self) -> PALS_W<QDC_SPEC> {
         PALS_W::new(self, 0)
     }
     #[doc = "Bit 1 - Phase B Level selector"]
     #[inline(always)]
-    #[must_use]
     pub fn pbls(&mut self) -> PBLS_W<QDC_SPEC> {
         PBLS_W::new(self, 1)
     }
     #[doc = "Bit 2 - Phase signals swap"]
     #[inline(always)]
-    #[must_use]
     pub fn phs(&mut self) -> PHS_W<QDC_SPEC> {
         PHS_W::new(self, 2)
     }
     #[doc = "Bits 4:5 - Index Marker generations control"]
     #[inline(always)]
-    #[must_use]
     pub fn icm(&mut self) -> ICM_W<QDC_SPEC> {
         ICM_W::new(self, 4)
     }
diff --git a/src/posif0/rpflg.rs b/src/posif0/rpflg.rs
index b3e179ab..6758f52b 100644
--- a/src/posif0/rpflg.rs
+++ b/src/posif0/rpflg.rs
@@ -21,55 +21,46 @@ pub type RPCLK_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Correct Hall Event flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rche(&mut self) -> RCHE_W<RPFLG_SPEC> {
         RCHE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Wrong Hall Event flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rwhe(&mut self) -> RWHE_W<RPFLG_SPEC> {
         RWHE_W::new(self, 1)
     }
     #[doc = "Bit 2 - Hall Inputs Update Event flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rhie(&mut self) -> RHIE_W<RPFLG_SPEC> {
         RHIE_W::new(self, 2)
     }
     #[doc = "Bit 4 - Multi-Channel Pattern shadow transfer flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rmst(&mut self) -> RMST_W<RPFLG_SPEC> {
         RMST_W::new(self, 4)
     }
     #[doc = "Bit 8 - Quadrature Index flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rindx(&mut self) -> RINDX_W<RPFLG_SPEC> {
         RINDX_W::new(self, 8)
     }
     #[doc = "Bit 9 - Quadrature Phase Error flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rerr(&mut self) -> RERR_W<RPFLG_SPEC> {
         RERR_W::new(self, 9)
     }
     #[doc = "Bit 10 - Quadrature CLK flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rcnt(&mut self) -> RCNT_W<RPFLG_SPEC> {
         RCNT_W::new(self, 10)
     }
     #[doc = "Bit 11 - Quadrature Direction flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rdir(&mut self) -> RDIR_W<RPFLG_SPEC> {
         RDIR_W::new(self, 11)
     }
     #[doc = "Bit 12 - Quadrature period clock flag clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpclk(&mut self) -> RPCLK_W<RPFLG_SPEC> {
         RPCLK_W::new(self, 12)
     }
diff --git a/src/posif0/spflg.rs b/src/posif0/spflg.rs
index c6ae6ba7..9a25fb5b 100644
--- a/src/posif0/spflg.rs
+++ b/src/posif0/spflg.rs
@@ -21,55 +21,46 @@ pub type SPCLK_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Correct Hall Event flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn sche(&mut self) -> SCHE_W<SPFLG_SPEC> {
         SCHE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Wrong Hall Event flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn swhe(&mut self) -> SWHE_W<SPFLG_SPEC> {
         SWHE_W::new(self, 1)
     }
     #[doc = "Bit 2 - Hall Inputs Update Event flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn shie(&mut self) -> SHIE_W<SPFLG_SPEC> {
         SHIE_W::new(self, 2)
     }
     #[doc = "Bit 4 - Multi-Channel Pattern shadow transfer flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn smst(&mut self) -> SMST_W<SPFLG_SPEC> {
         SMST_W::new(self, 4)
     }
     #[doc = "Bit 8 - Quadrature Index flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn sindx(&mut self) -> SINDX_W<SPFLG_SPEC> {
         SINDX_W::new(self, 8)
     }
     #[doc = "Bit 9 - Quadrature Phase Error flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn serr(&mut self) -> SERR_W<SPFLG_SPEC> {
         SERR_W::new(self, 9)
     }
     #[doc = "Bit 10 - Quadrature CLK flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn scnt(&mut self) -> SCNT_W<SPFLG_SPEC> {
         SCNT_W::new(self, 10)
     }
     #[doc = "Bit 11 - Quadrature Direction flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn sdir(&mut self) -> SDIR_W<SPFLG_SPEC> {
         SDIR_W::new(self, 11)
     }
     #[doc = "Bit 12 - Quadrature period clock flag set"]
     #[inline(always)]
-    #[must_use]
     pub fn spclk(&mut self) -> SPCLK_W<SPFLG_SPEC> {
         SPCLK_W::new(self, 12)
     }
diff --git a/src/ppb/actlr.rs b/src/ppb/actlr.rs
index 8cd01a89..0ddcbc5b 100644
--- a/src/ppb/actlr.rs
+++ b/src/ppb/actlr.rs
@@ -52,31 +52,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Disable load/store multiple"]
     #[inline(always)]
-    #[must_use]
     pub fn dismcycint(&mut self) -> DISMCYCINT_W<ACTLR_SPEC> {
         DISMCYCINT_W::new(self, 0)
     }
     #[doc = "Bit 1 - Disable write buffer"]
     #[inline(always)]
-    #[must_use]
     pub fn disdefwbuf(&mut self) -> DISDEFWBUF_W<ACTLR_SPEC> {
         DISDEFWBUF_W::new(self, 1)
     }
     #[doc = "Bit 2 - Disable IT folding"]
     #[inline(always)]
-    #[must_use]
     pub fn disfold(&mut self) -> DISFOLD_W<ACTLR_SPEC> {
         DISFOLD_W::new(self, 2)
     }
     #[doc = "Bit 8 - Disable FPCA update"]
     #[inline(always)]
-    #[must_use]
     pub fn disfpca(&mut self) -> DISFPCA_W<ACTLR_SPEC> {
         DISFPCA_W::new(self, 8)
     }
     #[doc = "Bit 9 - Disable out of order FP execution"]
     #[inline(always)]
-    #[must_use]
     pub fn disoofp(&mut self) -> DISOOFP_W<ACTLR_SPEC> {
         DISOOFP_W::new(self, 9)
     }
diff --git a/src/ppb/afsr.rs b/src/ppb/afsr.rs
index dda9d3ec..7b3269c5 100644
--- a/src/ppb/afsr.rs
+++ b/src/ppb/afsr.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Reserved"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> VALUE_W<AFSR_SPEC> {
         VALUE_W::new(self, 0)
     }
diff --git a/src/ppb/aircr.rs b/src/ppb/aircr.rs
index b1f64a8b..eb89e4c4 100644
--- a/src/ppb/aircr.rs
+++ b/src/ppb/aircr.rs
@@ -101,31 +101,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Reserved for Debug use."]
     #[inline(always)]
-    #[must_use]
     pub fn vectreset(&mut self) -> VECTRESET_W<AIRCR_SPEC> {
         VECTRESET_W::new(self, 0)
     }
     #[doc = "Bit 1 - Reserved for Debug use."]
     #[inline(always)]
-    #[must_use]
     pub fn vectclractive(&mut self) -> VECTCLRACTIVE_W<AIRCR_SPEC> {
         VECTCLRACTIVE_W::new(self, 1)
     }
     #[doc = "Bit 2 - System reset request"]
     #[inline(always)]
-    #[must_use]
     pub fn sysresetreq(&mut self) -> SYSRESETREQ_W<AIRCR_SPEC> {
         SYSRESETREQ_W::new(self, 2)
     }
     #[doc = "Bits 8:10 - Interrupt priority grouping field"]
     #[inline(always)]
-    #[must_use]
     pub fn prigroup(&mut self) -> PRIGROUP_W<AIRCR_SPEC> {
         PRIGROUP_W::new(self, 8)
     }
     #[doc = "Bits 16:31 - Register key"]
     #[inline(always)]
-    #[must_use]
     pub fn vectkey(&mut self) -> VECTKEY_W<AIRCR_SPEC> {
         VECTKEY_W::new(self, 16)
     }
diff --git a/src/ppb/bfar.rs b/src/ppb/bfar.rs
index 0c079de8..4c132d3f 100644
--- a/src/ppb/bfar.rs
+++ b/src/ppb/bfar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Address causing the fault"]
     #[inline(always)]
-    #[must_use]
     pub fn address(&mut self) -> ADDRESS_W<BFAR_SPEC> {
         ADDRESS_W::new(self, 0)
     }
diff --git a/src/ppb/ccr.rs b/src/ppb/ccr.rs
index 3126f8f9..37d158ab 100644
--- a/src/ppb/ccr.rs
+++ b/src/ppb/ccr.rs
@@ -358,37 +358,31 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Non Base Thread Mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn nonbasethrdena(&mut self) -> NONBASETHRDENA_W<CCR_SPEC> {
         NONBASETHRDENA_W::new(self, 0)
     }
     #[doc = "Bit 1 - User Set Pending Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn usersetmpend(&mut self) -> USERSETMPEND_W<CCR_SPEC> {
         USERSETMPEND_W::new(self, 1)
     }
     #[doc = "Bit 3 - Unaligned Access Trap Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn unalign_trp(&mut self) -> UNALIGN_TRP_W<CCR_SPEC> {
         UNALIGN_TRP_W::new(self, 3)
     }
     #[doc = "Bit 4 - Divide by Zero Trap Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn div_0_trp(&mut self) -> DIV_0_TRP_W<CCR_SPEC> {
         DIV_0_TRP_W::new(self, 4)
     }
     #[doc = "Bit 8 - Bus Fault Hard Fault and NMI Ignore"]
     #[inline(always)]
-    #[must_use]
     pub fn bfhfnmign(&mut self) -> BFHFNMIGN_W<CCR_SPEC> {
         BFHFNMIGN_W::new(self, 8)
     }
     #[doc = "Bit 9 - Stack Alignment"]
     #[inline(always)]
-    #[must_use]
     pub fn stkalign(&mut self) -> STKALIGN_W<CCR_SPEC> {
         STKALIGN_W::new(self, 9)
     }
diff --git a/src/ppb/cfsr.rs b/src/ppb/cfsr.rs
index 9a169710..96b9d5d2 100644
--- a/src/ppb/cfsr.rs
+++ b/src/ppb/cfsr.rs
@@ -1109,115 +1109,96 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Instruction access violation flag"]
     #[inline(always)]
-    #[must_use]
     pub fn iaccviol(&mut self) -> IACCVIOL_W<CFSR_SPEC> {
         IACCVIOL_W::new(self, 0)
     }
     #[doc = "Bit 1 - Data access violation flag"]
     #[inline(always)]
-    #[must_use]
     pub fn daccviol(&mut self) -> DACCVIOL_W<CFSR_SPEC> {
         DACCVIOL_W::new(self, 1)
     }
     #[doc = "Bit 3 - MemManage fault on unstacking for a return from exception"]
     #[inline(always)]
-    #[must_use]
     pub fn munstkerr(&mut self) -> MUNSTKERR_W<CFSR_SPEC> {
         MUNSTKERR_W::new(self, 3)
     }
     #[doc = "Bit 4 - MemManage fault on stacking for exception entry"]
     #[inline(always)]
-    #[must_use]
     pub fn mstkerr(&mut self) -> MSTKERR_W<CFSR_SPEC> {
         MSTKERR_W::new(self, 4)
     }
     #[doc = "Bit 5 - MemManage fault during floating point lazy state preservation"]
     #[inline(always)]
-    #[must_use]
     pub fn mlsperr(&mut self) -> MLSPERR_W<CFSR_SPEC> {
         MLSPERR_W::new(self, 5)
     }
     #[doc = "Bit 7 - MemManage Fault Address Register (MMFAR) valid flag"]
     #[inline(always)]
-    #[must_use]
     pub fn mmarvalid(&mut self) -> MMARVALID_W<CFSR_SPEC> {
         MMARVALID_W::new(self, 7)
     }
     #[doc = "Bit 8 - Instruction bus error"]
     #[inline(always)]
-    #[must_use]
     pub fn ibuserr(&mut self) -> IBUSERR_W<CFSR_SPEC> {
         IBUSERR_W::new(self, 8)
     }
     #[doc = "Bit 9 - Precise data bus error"]
     #[inline(always)]
-    #[must_use]
     pub fn preciserr(&mut self) -> PRECISERR_W<CFSR_SPEC> {
         PRECISERR_W::new(self, 9)
     }
     #[doc = "Bit 10 - Imprecise data bus error"]
     #[inline(always)]
-    #[must_use]
     pub fn impreciserr(&mut self) -> IMPRECISERR_W<CFSR_SPEC> {
         IMPRECISERR_W::new(self, 10)
     }
     #[doc = "Bit 11 - BusFault on unstacking for a return from exception"]
     #[inline(always)]
-    #[must_use]
     pub fn unstkerr(&mut self) -> UNSTKERR_W<CFSR_SPEC> {
         UNSTKERR_W::new(self, 11)
     }
     #[doc = "Bit 12 - BusFault on stacking for exception entry"]
     #[inline(always)]
-    #[must_use]
     pub fn stkerr(&mut self) -> STKERR_W<CFSR_SPEC> {
         STKERR_W::new(self, 12)
     }
     #[doc = "Bit 13 - BusFault during floating point lazy state preservation"]
     #[inline(always)]
-    #[must_use]
     pub fn lsperr(&mut self) -> LSPERR_W<CFSR_SPEC> {
         LSPERR_W::new(self, 13)
     }
     #[doc = "Bit 15 - BusFault Address Register (BFAR) valid flag"]
     #[inline(always)]
-    #[must_use]
     pub fn bfarvalid(&mut self) -> BFARVALID_W<CFSR_SPEC> {
         BFARVALID_W::new(self, 15)
     }
     #[doc = "Bit 16 - Undefined instruction UsageFault"]
     #[inline(always)]
-    #[must_use]
     pub fn undefinstr(&mut self) -> UNDEFINSTR_W<CFSR_SPEC> {
         UNDEFINSTR_W::new(self, 16)
     }
     #[doc = "Bit 17 - Invalid state UsageFault"]
     #[inline(always)]
-    #[must_use]
     pub fn invstate(&mut self) -> INVSTATE_W<CFSR_SPEC> {
         INVSTATE_W::new(self, 17)
     }
     #[doc = "Bit 18 - Invalid PC load UsageFault"]
     #[inline(always)]
-    #[must_use]
     pub fn invpc(&mut self) -> INVPC_W<CFSR_SPEC> {
         INVPC_W::new(self, 18)
     }
     #[doc = "Bit 19 - No coprocessor UsageFault"]
     #[inline(always)]
-    #[must_use]
     pub fn nocp(&mut self) -> NOCP_W<CFSR_SPEC> {
         NOCP_W::new(self, 19)
     }
     #[doc = "Bit 24 - Unaligned access UsageFault"]
     #[inline(always)]
-    #[must_use]
     pub fn unaligned(&mut self) -> UNALIGNED_W<CFSR_SPEC> {
         UNALIGNED_W::new(self, 24)
     }
     #[doc = "Bit 25 - Divide by zero UsageFault"]
     #[inline(always)]
-    #[must_use]
     pub fn divbyzero(&mut self) -> DIVBYZERO_W<CFSR_SPEC> {
         DIVBYZERO_W::new(self, 25)
     }
diff --git a/src/ppb/cpacr.rs b/src/ppb/cpacr.rs
index 1d369904..205b141f 100644
--- a/src/ppb/cpacr.rs
+++ b/src/ppb/cpacr.rs
@@ -163,13 +163,11 @@ impl R {
 impl W {
     #[doc = "Bits 20:21 - Access privileges for coprocessor 10"]
     #[inline(always)]
-    #[must_use]
     pub fn cp10(&mut self) -> CP10_W<CPACR_SPEC> {
         CP10_W::new(self, 20)
     }
     #[doc = "Bits 22:23 - Access privileges for coprocessor 11"]
     #[inline(always)]
-    #[must_use]
     pub fn cp11(&mut self) -> CP11_W<CPACR_SPEC> {
         CP11_W::new(self, 22)
     }
diff --git a/src/ppb/fpcar.rs b/src/ppb/fpcar.rs
index 9f271893..5a2febb8 100644
--- a/src/ppb/fpcar.rs
+++ b/src/ppb/fpcar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 3:31 - Address"]
     #[inline(always)]
-    #[must_use]
     pub fn address(&mut self) -> ADDRESS_W<FPCAR_SPEC> {
         ADDRESS_W::new(self, 3)
     }
diff --git a/src/ppb/fpccr.rs b/src/ppb/fpccr.rs
index de4e6c59..4f36e1bd 100644
--- a/src/ppb/fpccr.rs
+++ b/src/ppb/fpccr.rs
@@ -529,55 +529,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Lazy State Preservation Active"]
     #[inline(always)]
-    #[must_use]
     pub fn lspact(&mut self) -> LSPACT_W<FPCCR_SPEC> {
         LSPACT_W::new(self, 0)
     }
     #[doc = "Bit 1 - User allocated Stack Frame"]
     #[inline(always)]
-    #[must_use]
     pub fn user(&mut self) -> USER_W<FPCCR_SPEC> {
         USER_W::new(self, 1)
     }
     #[doc = "Bit 3 - Thread Mode allocated Stack Frame"]
     #[inline(always)]
-    #[must_use]
     pub fn thread(&mut self) -> THREAD_W<FPCCR_SPEC> {
         THREAD_W::new(self, 3)
     }
     #[doc = "Bit 4 - HardFault Ready"]
     #[inline(always)]
-    #[must_use]
     pub fn hfrdy(&mut self) -> HFRDY_W<FPCCR_SPEC> {
         HFRDY_W::new(self, 4)
     }
     #[doc = "Bit 5 - MemManage Ready"]
     #[inline(always)]
-    #[must_use]
     pub fn mmrdy(&mut self) -> MMRDY_W<FPCCR_SPEC> {
         MMRDY_W::new(self, 5)
     }
     #[doc = "Bit 6 - BusFault Ready"]
     #[inline(always)]
-    #[must_use]
     pub fn bfrdy(&mut self) -> BFRDY_W<FPCCR_SPEC> {
         BFRDY_W::new(self, 6)
     }
     #[doc = "Bit 8 - Monitor Ready"]
     #[inline(always)]
-    #[must_use]
     pub fn monrdy(&mut self) -> MONRDY_W<FPCCR_SPEC> {
         MONRDY_W::new(self, 8)
     }
     #[doc = "Bit 30 - Lazy State Preservation Enabled"]
     #[inline(always)]
-    #[must_use]
     pub fn lspen(&mut self) -> LSPEN_W<FPCCR_SPEC> {
         LSPEN_W::new(self, 30)
     }
     #[doc = "Bit 31 - Automatic State Preservation"]
     #[inline(always)]
-    #[must_use]
     pub fn aspen(&mut self) -> ASPEN_W<FPCCR_SPEC> {
         ASPEN_W::new(self, 31)
     }
diff --git a/src/ppb/fpdscr.rs b/src/ppb/fpdscr.rs
index 5dec8d8e..a7b49ba2 100644
--- a/src/ppb/fpdscr.rs
+++ b/src/ppb/fpdscr.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 22:23 - Default value for FPSCR.RMode"]
     #[inline(always)]
-    #[must_use]
     pub fn rmode(&mut self) -> RMODE_W<FPDSCR_SPEC> {
         RMODE_W::new(self, 22)
     }
     #[doc = "Bit 24 - Default value for FPSCR.FZ"]
     #[inline(always)]
-    #[must_use]
     pub fn fz(&mut self) -> FZ_W<FPDSCR_SPEC> {
         FZ_W::new(self, 24)
     }
     #[doc = "Bit 25 - Default value for FPSCR.DN"]
     #[inline(always)]
-    #[must_use]
     pub fn dn(&mut self) -> DN_W<FPDSCR_SPEC> {
         DN_W::new(self, 25)
     }
     #[doc = "Bit 26 - Default value for FPSCR.AHP"]
     #[inline(always)]
-    #[must_use]
     pub fn ahp(&mut self) -> AHP_W<FPDSCR_SPEC> {
         AHP_W::new(self, 26)
     }
diff --git a/src/ppb/hfsr.rs b/src/ppb/hfsr.rs
index 7049ec73..53d9b3e3 100644
--- a/src/ppb/hfsr.rs
+++ b/src/ppb/hfsr.rs
@@ -132,19 +132,16 @@ impl R {
 impl W {
     #[doc = "Bit 1 - BusFault on vector table read"]
     #[inline(always)]
-    #[must_use]
     pub fn vecttbl(&mut self) -> VECTTBL_W<HFSR_SPEC> {
         VECTTBL_W::new(self, 1)
     }
     #[doc = "Bit 30 - Forced HardFault"]
     #[inline(always)]
-    #[must_use]
     pub fn forced(&mut self) -> FORCED_W<HFSR_SPEC> {
         FORCED_W::new(self, 30)
     }
     #[doc = "Bit 31 - Reserved for Debug use"]
     #[inline(always)]
-    #[must_use]
     pub fn debugevt(&mut self) -> DEBUGEVT_W<HFSR_SPEC> {
         DEBUGEVT_W::new(self, 31)
     }
diff --git a/src/ppb/icsr.rs b/src/ppb/icsr.rs
index ea73ce6e..c4b0f9b4 100644
--- a/src/ppb/icsr.rs
+++ b/src/ppb/icsr.rs
@@ -305,31 +305,26 @@ impl R {
 impl W {
     #[doc = "Bit 25 - SysTick exception clear-pending bit"]
     #[inline(always)]
-    #[must_use]
     pub fn pendstclr(&mut self) -> PENDSTCLR_W<ICSR_SPEC> {
         PENDSTCLR_W::new(self, 25)
     }
     #[doc = "Bit 26 - SysTick exception set-pending bit"]
     #[inline(always)]
-    #[must_use]
     pub fn pendstset(&mut self) -> PENDSTSET_W<ICSR_SPEC> {
         PENDSTSET_W::new(self, 26)
     }
     #[doc = "Bit 27 - PendSV clear-pending bit"]
     #[inline(always)]
-    #[must_use]
     pub fn pendsvclr(&mut self) -> PENDSVCLR_W<ICSR_SPEC> {
         PENDSVCLR_W::new(self, 27)
     }
     #[doc = "Bit 28 - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"]
     #[inline(always)]
-    #[must_use]
     pub fn pendsvset(&mut self) -> PENDSVSET_W<ICSR_SPEC> {
         PENDSVSET_W::new(self, 28)
     }
     #[doc = "Bit 31 - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"]
     #[inline(always)]
-    #[must_use]
     pub fn nmipendset(&mut self) -> NMIPENDSET_W<ICSR_SPEC> {
         NMIPENDSET_W::new(self, 31)
     }
diff --git a/src/ppb/mmfar.rs b/src/ppb/mmfar.rs
index 50f6a26d..9c27ee68 100644
--- a/src/ppb/mmfar.rs
+++ b/src/ppb/mmfar.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Address causing the fault"]
     #[inline(always)]
-    #[must_use]
     pub fn address(&mut self) -> ADDRESS_W<MMFAR_SPEC> {
         ADDRESS_W::new(self, 0)
     }
diff --git a/src/ppb/mpu_ctrl.rs b/src/ppb/mpu_ctrl.rs
index c92fbd1f..1fd22ec1 100644
--- a/src/ppb/mpu_ctrl.rs
+++ b/src/ppb/mpu_ctrl.rs
@@ -181,19 +181,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Enable MPU"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> ENABLE_W<MPU_CTRL_SPEC> {
         ENABLE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"]
     #[inline(always)]
-    #[must_use]
     pub fn hfnmiena(&mut self) -> HFNMIENA_W<MPU_CTRL_SPEC> {
         HFNMIENA_W::new(self, 1)
     }
     #[doc = "Bit 2 - Enables privileged software access to the default memory map"]
     #[inline(always)]
-    #[must_use]
     pub fn privdefena(&mut self) -> PRIVDEFENA_W<MPU_CTRL_SPEC> {
         PRIVDEFENA_W::new(self, 2)
     }
diff --git a/src/ppb/mpu_rasr.rs b/src/ppb/mpu_rasr.rs
index cb73ff71..4aadc74f 100644
--- a/src/ppb/mpu_rasr.rs
+++ b/src/ppb/mpu_rasr.rs
@@ -193,55 +193,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Region enable bit."]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> ENABLE_W<MPU_RASR_SPEC> {
         ENABLE_W::new(self, 0)
     }
     #[doc = "Bits 1:5 - MPU protection region size"]
     #[inline(always)]
-    #[must_use]
     pub fn size(&mut self) -> SIZE_W<MPU_RASR_SPEC> {
         SIZE_W::new(self, 1)
     }
     #[doc = "Bits 8:15 - Subregion disable bits"]
     #[inline(always)]
-    #[must_use]
     pub fn srd(&mut self) -> SRD_W<MPU_RASR_SPEC> {
         SRD_W::new(self, 8)
     }
     #[doc = "Bit 16 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn b(&mut self) -> B_W<MPU_RASR_SPEC> {
         B_W::new(self, 16)
     }
     #[doc = "Bit 17 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn c(&mut self) -> C_W<MPU_RASR_SPEC> {
         C_W::new(self, 17)
     }
     #[doc = "Bit 18 - Shareable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn s(&mut self) -> S_W<MPU_RASR_SPEC> {
         S_W::new(self, 18)
     }
     #[doc = "Bits 19:21 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn tex(&mut self) -> TEX_W<MPU_RASR_SPEC> {
         TEX_W::new(self, 19)
     }
     #[doc = "Bits 24:26 - Access permission field"]
     #[inline(always)]
-    #[must_use]
     pub fn ap(&mut self) -> AP_W<MPU_RASR_SPEC> {
         AP_W::new(self, 24)
     }
     #[doc = "Bit 28 - Instruction access disable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn xn(&mut self) -> XN_W<MPU_RASR_SPEC> {
         XN_W::new(self, 28)
     }
diff --git a/src/ppb/mpu_rasr_a1.rs b/src/ppb/mpu_rasr_a1.rs
index b42f0d14..e259e68f 100644
--- a/src/ppb/mpu_rasr_a1.rs
+++ b/src/ppb/mpu_rasr_a1.rs
@@ -193,55 +193,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Region enable bit."]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> ENABLE_W<MPU_RASR_A1_SPEC> {
         ENABLE_W::new(self, 0)
     }
     #[doc = "Bits 1:5 - MPU protection region size"]
     #[inline(always)]
-    #[must_use]
     pub fn size(&mut self) -> SIZE_W<MPU_RASR_A1_SPEC> {
         SIZE_W::new(self, 1)
     }
     #[doc = "Bits 8:15 - Subregion disable bits"]
     #[inline(always)]
-    #[must_use]
     pub fn srd(&mut self) -> SRD_W<MPU_RASR_A1_SPEC> {
         SRD_W::new(self, 8)
     }
     #[doc = "Bit 16 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn b(&mut self) -> B_W<MPU_RASR_A1_SPEC> {
         B_W::new(self, 16)
     }
     #[doc = "Bit 17 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn c(&mut self) -> C_W<MPU_RASR_A1_SPEC> {
         C_W::new(self, 17)
     }
     #[doc = "Bit 18 - Shareable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn s(&mut self) -> S_W<MPU_RASR_A1_SPEC> {
         S_W::new(self, 18)
     }
     #[doc = "Bits 19:21 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn tex(&mut self) -> TEX_W<MPU_RASR_A1_SPEC> {
         TEX_W::new(self, 19)
     }
     #[doc = "Bits 24:26 - Access permission field"]
     #[inline(always)]
-    #[must_use]
     pub fn ap(&mut self) -> AP_W<MPU_RASR_A1_SPEC> {
         AP_W::new(self, 24)
     }
     #[doc = "Bit 28 - Instruction access disable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn xn(&mut self) -> XN_W<MPU_RASR_A1_SPEC> {
         XN_W::new(self, 28)
     }
diff --git a/src/ppb/mpu_rasr_a2.rs b/src/ppb/mpu_rasr_a2.rs
index 776f7e25..266f775e 100644
--- a/src/ppb/mpu_rasr_a2.rs
+++ b/src/ppb/mpu_rasr_a2.rs
@@ -193,55 +193,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Region enable bit."]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> ENABLE_W<MPU_RASR_A2_SPEC> {
         ENABLE_W::new(self, 0)
     }
     #[doc = "Bits 1:5 - MPU protection region size"]
     #[inline(always)]
-    #[must_use]
     pub fn size(&mut self) -> SIZE_W<MPU_RASR_A2_SPEC> {
         SIZE_W::new(self, 1)
     }
     #[doc = "Bits 8:15 - Subregion disable bits"]
     #[inline(always)]
-    #[must_use]
     pub fn srd(&mut self) -> SRD_W<MPU_RASR_A2_SPEC> {
         SRD_W::new(self, 8)
     }
     #[doc = "Bit 16 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn b(&mut self) -> B_W<MPU_RASR_A2_SPEC> {
         B_W::new(self, 16)
     }
     #[doc = "Bit 17 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn c(&mut self) -> C_W<MPU_RASR_A2_SPEC> {
         C_W::new(self, 17)
     }
     #[doc = "Bit 18 - Shareable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn s(&mut self) -> S_W<MPU_RASR_A2_SPEC> {
         S_W::new(self, 18)
     }
     #[doc = "Bits 19:21 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn tex(&mut self) -> TEX_W<MPU_RASR_A2_SPEC> {
         TEX_W::new(self, 19)
     }
     #[doc = "Bits 24:26 - Access permission field"]
     #[inline(always)]
-    #[must_use]
     pub fn ap(&mut self) -> AP_W<MPU_RASR_A2_SPEC> {
         AP_W::new(self, 24)
     }
     #[doc = "Bit 28 - Instruction access disable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn xn(&mut self) -> XN_W<MPU_RASR_A2_SPEC> {
         XN_W::new(self, 28)
     }
diff --git a/src/ppb/mpu_rasr_a3.rs b/src/ppb/mpu_rasr_a3.rs
index 18a2f8bc..19346136 100644
--- a/src/ppb/mpu_rasr_a3.rs
+++ b/src/ppb/mpu_rasr_a3.rs
@@ -193,55 +193,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Region enable bit."]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> ENABLE_W<MPU_RASR_A3_SPEC> {
         ENABLE_W::new(self, 0)
     }
     #[doc = "Bits 1:5 - MPU protection region size"]
     #[inline(always)]
-    #[must_use]
     pub fn size(&mut self) -> SIZE_W<MPU_RASR_A3_SPEC> {
         SIZE_W::new(self, 1)
     }
     #[doc = "Bits 8:15 - Subregion disable bits"]
     #[inline(always)]
-    #[must_use]
     pub fn srd(&mut self) -> SRD_W<MPU_RASR_A3_SPEC> {
         SRD_W::new(self, 8)
     }
     #[doc = "Bit 16 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn b(&mut self) -> B_W<MPU_RASR_A3_SPEC> {
         B_W::new(self, 16)
     }
     #[doc = "Bit 17 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn c(&mut self) -> C_W<MPU_RASR_A3_SPEC> {
         C_W::new(self, 17)
     }
     #[doc = "Bit 18 - Shareable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn s(&mut self) -> S_W<MPU_RASR_A3_SPEC> {
         S_W::new(self, 18)
     }
     #[doc = "Bits 19:21 - Memory access attribute"]
     #[inline(always)]
-    #[must_use]
     pub fn tex(&mut self) -> TEX_W<MPU_RASR_A3_SPEC> {
         TEX_W::new(self, 19)
     }
     #[doc = "Bits 24:26 - Access permission field"]
     #[inline(always)]
-    #[must_use]
     pub fn ap(&mut self) -> AP_W<MPU_RASR_A3_SPEC> {
         AP_W::new(self, 24)
     }
     #[doc = "Bit 28 - Instruction access disable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn xn(&mut self) -> XN_W<MPU_RASR_A3_SPEC> {
         XN_W::new(self, 28)
     }
diff --git a/src/ppb/mpu_rbar.rs b/src/ppb/mpu_rbar.rs
index 12a75396..706754ff 100644
--- a/src/ppb/mpu_rbar.rs
+++ b/src/ppb/mpu_rbar.rs
@@ -83,19 +83,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - MPU region field"]
     #[inline(always)]
-    #[must_use]
     pub fn region(&mut self) -> REGION_W<MPU_RBAR_SPEC> {
         REGION_W::new(self, 0)
     }
     #[doc = "Bit 4 - MPU Region Number valid bit"]
     #[inline(always)]
-    #[must_use]
     pub fn valid(&mut self) -> VALID_W<MPU_RBAR_SPEC> {
         VALID_W::new(self, 4)
     }
     #[doc = "Bits 9:31 - Region base address field"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> ADDR_W<MPU_RBAR_SPEC> {
         ADDR_W::new(self, 9)
     }
diff --git a/src/ppb/mpu_rbar_a1.rs b/src/ppb/mpu_rbar_a1.rs
index a37996a3..262a6b2e 100644
--- a/src/ppb/mpu_rbar_a1.rs
+++ b/src/ppb/mpu_rbar_a1.rs
@@ -83,19 +83,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - MPU region field"]
     #[inline(always)]
-    #[must_use]
     pub fn region(&mut self) -> REGION_W<MPU_RBAR_A1_SPEC> {
         REGION_W::new(self, 0)
     }
     #[doc = "Bit 4 - MPU Region Number valid bit"]
     #[inline(always)]
-    #[must_use]
     pub fn valid(&mut self) -> VALID_W<MPU_RBAR_A1_SPEC> {
         VALID_W::new(self, 4)
     }
     #[doc = "Bits 9:31 - Region base address field"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> ADDR_W<MPU_RBAR_A1_SPEC> {
         ADDR_W::new(self, 9)
     }
diff --git a/src/ppb/mpu_rbar_a2.rs b/src/ppb/mpu_rbar_a2.rs
index 6d2998b4..74b01e9a 100644
--- a/src/ppb/mpu_rbar_a2.rs
+++ b/src/ppb/mpu_rbar_a2.rs
@@ -83,19 +83,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - MPU region field"]
     #[inline(always)]
-    #[must_use]
     pub fn region(&mut self) -> REGION_W<MPU_RBAR_A2_SPEC> {
         REGION_W::new(self, 0)
     }
     #[doc = "Bit 4 - MPU Region Number valid bit"]
     #[inline(always)]
-    #[must_use]
     pub fn valid(&mut self) -> VALID_W<MPU_RBAR_A2_SPEC> {
         VALID_W::new(self, 4)
     }
     #[doc = "Bits 9:31 - Region base address field"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> ADDR_W<MPU_RBAR_A2_SPEC> {
         ADDR_W::new(self, 9)
     }
diff --git a/src/ppb/mpu_rbar_a3.rs b/src/ppb/mpu_rbar_a3.rs
index 77c2573a..4c36bc8f 100644
--- a/src/ppb/mpu_rbar_a3.rs
+++ b/src/ppb/mpu_rbar_a3.rs
@@ -83,19 +83,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - MPU region field"]
     #[inline(always)]
-    #[must_use]
     pub fn region(&mut self) -> REGION_W<MPU_RBAR_A3_SPEC> {
         REGION_W::new(self, 0)
     }
     #[doc = "Bit 4 - MPU Region Number valid bit"]
     #[inline(always)]
-    #[must_use]
     pub fn valid(&mut self) -> VALID_W<MPU_RBAR_A3_SPEC> {
         VALID_W::new(self, 4)
     }
     #[doc = "Bits 9:31 - Region base address field"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> ADDR_W<MPU_RBAR_A3_SPEC> {
         ADDR_W::new(self, 9)
     }
diff --git a/src/ppb/mpu_rnr.rs b/src/ppb/mpu_rnr.rs
index 87423c66..e848ef85 100644
--- a/src/ppb/mpu_rnr.rs
+++ b/src/ppb/mpu_rnr.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Region"]
     #[inline(always)]
-    #[must_use]
     pub fn region(&mut self) -> REGION_W<MPU_RNR_SPEC> {
         REGION_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_iabr0.rs b/src/ppb/nvic_iabr0.rs
index 1d1352c3..e289baab 100644
--- a/src/ppb/nvic_iabr0.rs
+++ b/src/ppb/nvic_iabr0.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt active flags:"]
     #[inline(always)]
-    #[must_use]
     pub fn active(&mut self) -> ACTIVE_W<NVIC_IABR0_SPEC> {
         ACTIVE_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_iabr1.rs b/src/ppb/nvic_iabr1.rs
index 14f6e78c..b29a40cf 100644
--- a/src/ppb/nvic_iabr1.rs
+++ b/src/ppb/nvic_iabr1.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt active flags:"]
     #[inline(always)]
-    #[must_use]
     pub fn active(&mut self) -> ACTIVE_W<NVIC_IABR1_SPEC> {
         ACTIVE_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_iabr2.rs b/src/ppb/nvic_iabr2.rs
index b4bfadce..613e15e7 100644
--- a/src/ppb/nvic_iabr2.rs
+++ b/src/ppb/nvic_iabr2.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt active flags:"]
     #[inline(always)]
-    #[must_use]
     pub fn active(&mut self) -> ACTIVE_W<NVIC_IABR2_SPEC> {
         ACTIVE_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_iabr3.rs b/src/ppb/nvic_iabr3.rs
index c686cad0..23436a4f 100644
--- a/src/ppb/nvic_iabr3.rs
+++ b/src/ppb/nvic_iabr3.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt active flags:"]
     #[inline(always)]
-    #[must_use]
     pub fn active(&mut self) -> ACTIVE_W<NVIC_IABR3_SPEC> {
         ACTIVE_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_icer0.rs b/src/ppb/nvic_icer0.rs
index c647323e..27ac0099 100644
--- a/src/ppb/nvic_icer0.rs
+++ b/src/ppb/nvic_icer0.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt clear-enable bits."]
     #[inline(always)]
-    #[must_use]
     pub fn clrena(&mut self) -> CLRENA_W<NVIC_ICER0_SPEC> {
         CLRENA_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_icer1.rs b/src/ppb/nvic_icer1.rs
index 4638b613..ebe660f6 100644
--- a/src/ppb/nvic_icer1.rs
+++ b/src/ppb/nvic_icer1.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt clear-enable bits."]
     #[inline(always)]
-    #[must_use]
     pub fn clrena(&mut self) -> CLRENA_W<NVIC_ICER1_SPEC> {
         CLRENA_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_icer2.rs b/src/ppb/nvic_icer2.rs
index a9dfe960..55ba6f42 100644
--- a/src/ppb/nvic_icer2.rs
+++ b/src/ppb/nvic_icer2.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt clear-enable bits."]
     #[inline(always)]
-    #[must_use]
     pub fn clrena(&mut self) -> CLRENA_W<NVIC_ICER2_SPEC> {
         CLRENA_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_icer3.rs b/src/ppb/nvic_icer3.rs
index 83ce0792..c6cb8156 100644
--- a/src/ppb/nvic_icer3.rs
+++ b/src/ppb/nvic_icer3.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt clear-enable bits."]
     #[inline(always)]
-    #[must_use]
     pub fn clrena(&mut self) -> CLRENA_W<NVIC_ICER3_SPEC> {
         CLRENA_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_icpr0.rs b/src/ppb/nvic_icpr0.rs
index 4e3c2d6e..9f56b409 100644
--- a/src/ppb/nvic_icpr0.rs
+++ b/src/ppb/nvic_icpr0.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-pending bits."]
     #[inline(always)]
-    #[must_use]
     pub fn clrpend(&mut self) -> CLRPEND_W<NVIC_ICPR0_SPEC> {
         CLRPEND_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_icpr1.rs b/src/ppb/nvic_icpr1.rs
index 4e8f961e..11418a05 100644
--- a/src/ppb/nvic_icpr1.rs
+++ b/src/ppb/nvic_icpr1.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-pending bits."]
     #[inline(always)]
-    #[must_use]
     pub fn clrpend(&mut self) -> CLRPEND_W<NVIC_ICPR1_SPEC> {
         CLRPEND_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_icpr2.rs b/src/ppb/nvic_icpr2.rs
index a6f060ee..282ec3ce 100644
--- a/src/ppb/nvic_icpr2.rs
+++ b/src/ppb/nvic_icpr2.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-pending bits."]
     #[inline(always)]
-    #[must_use]
     pub fn clrpend(&mut self) -> CLRPEND_W<NVIC_ICPR2_SPEC> {
         CLRPEND_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_icpr3.rs b/src/ppb/nvic_icpr3.rs
index 4dfa476e..a248a0da 100644
--- a/src/ppb/nvic_icpr3.rs
+++ b/src/ppb/nvic_icpr3.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-pending bits."]
     #[inline(always)]
-    #[must_use]
     pub fn clrpend(&mut self) -> CLRPEND_W<NVIC_ICPR3_SPEC> {
         CLRPEND_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_ipr0.rs b/src/ppb/nvic_ipr0.rs
index 1a94f2a7..bee5cf5d 100644
--- a/src/ppb/nvic_ipr0.rs
+++ b/src/ppb/nvic_ipr0.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR0_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR0_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR0_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR0_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr1.rs b/src/ppb/nvic_ipr1.rs
index a723d30f..9351927e 100644
--- a/src/ppb/nvic_ipr1.rs
+++ b/src/ppb/nvic_ipr1.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR1_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR1_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR1_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR1_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr10.rs b/src/ppb/nvic_ipr10.rs
index 7597ac61..dbe15972 100644
--- a/src/ppb/nvic_ipr10.rs
+++ b/src/ppb/nvic_ipr10.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR10_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR10_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR10_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR10_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr11.rs b/src/ppb/nvic_ipr11.rs
index a4e75c2d..4b4a6d4e 100644
--- a/src/ppb/nvic_ipr11.rs
+++ b/src/ppb/nvic_ipr11.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR11_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR11_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR11_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR11_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr12.rs b/src/ppb/nvic_ipr12.rs
index 43315fc1..74785bf3 100644
--- a/src/ppb/nvic_ipr12.rs
+++ b/src/ppb/nvic_ipr12.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR12_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR12_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR12_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR12_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr13.rs b/src/ppb/nvic_ipr13.rs
index bb86b859..bb5151b9 100644
--- a/src/ppb/nvic_ipr13.rs
+++ b/src/ppb/nvic_ipr13.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR13_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR13_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR13_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR13_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr14.rs b/src/ppb/nvic_ipr14.rs
index 51e3137b..a1164a9c 100644
--- a/src/ppb/nvic_ipr14.rs
+++ b/src/ppb/nvic_ipr14.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR14_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR14_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR14_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR14_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr15.rs b/src/ppb/nvic_ipr15.rs
index 1b10e27a..fcdd42e7 100644
--- a/src/ppb/nvic_ipr15.rs
+++ b/src/ppb/nvic_ipr15.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR15_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR15_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR15_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR15_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr16.rs b/src/ppb/nvic_ipr16.rs
index c8247e2c..8ef41c61 100644
--- a/src/ppb/nvic_ipr16.rs
+++ b/src/ppb/nvic_ipr16.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR16_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR16_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR16_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR16_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr17.rs b/src/ppb/nvic_ipr17.rs
index 84ada4a3..4b789cb6 100644
--- a/src/ppb/nvic_ipr17.rs
+++ b/src/ppb/nvic_ipr17.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR17_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR17_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR17_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR17_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr18.rs b/src/ppb/nvic_ipr18.rs
index 58b2a3c8..18ab9618 100644
--- a/src/ppb/nvic_ipr18.rs
+++ b/src/ppb/nvic_ipr18.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR18_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR18_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR18_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR18_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr19.rs b/src/ppb/nvic_ipr19.rs
index 8a2045af..00c0148c 100644
--- a/src/ppb/nvic_ipr19.rs
+++ b/src/ppb/nvic_ipr19.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR19_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR19_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR19_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR19_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr2.rs b/src/ppb/nvic_ipr2.rs
index 0aa004bc..4ef3d43e 100644
--- a/src/ppb/nvic_ipr2.rs
+++ b/src/ppb/nvic_ipr2.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR2_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR2_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR2_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR2_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr20.rs b/src/ppb/nvic_ipr20.rs
index 79278117..c3db6510 100644
--- a/src/ppb/nvic_ipr20.rs
+++ b/src/ppb/nvic_ipr20.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR20_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR20_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR20_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR20_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr21.rs b/src/ppb/nvic_ipr21.rs
index d1155af3..3112cc0f 100644
--- a/src/ppb/nvic_ipr21.rs
+++ b/src/ppb/nvic_ipr21.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR21_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR21_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR21_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR21_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr22.rs b/src/ppb/nvic_ipr22.rs
index 95d954f4..15be2a54 100644
--- a/src/ppb/nvic_ipr22.rs
+++ b/src/ppb/nvic_ipr22.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR22_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR22_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR22_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR22_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr23.rs b/src/ppb/nvic_ipr23.rs
index 5f88d74b..25b88c97 100644
--- a/src/ppb/nvic_ipr23.rs
+++ b/src/ppb/nvic_ipr23.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR23_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR23_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR23_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR23_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr24.rs b/src/ppb/nvic_ipr24.rs
index be770ff3..f2b94544 100644
--- a/src/ppb/nvic_ipr24.rs
+++ b/src/ppb/nvic_ipr24.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR24_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR24_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR24_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR24_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr25.rs b/src/ppb/nvic_ipr25.rs
index fdb26d7c..aee31a08 100644
--- a/src/ppb/nvic_ipr25.rs
+++ b/src/ppb/nvic_ipr25.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR25_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR25_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR25_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR25_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr26.rs b/src/ppb/nvic_ipr26.rs
index 7c50398b..4397e071 100644
--- a/src/ppb/nvic_ipr26.rs
+++ b/src/ppb/nvic_ipr26.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR26_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR26_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR26_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR26_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr27.rs b/src/ppb/nvic_ipr27.rs
index bcbc1c76..dc6fd872 100644
--- a/src/ppb/nvic_ipr27.rs
+++ b/src/ppb/nvic_ipr27.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR27_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR27_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR27_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR27_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr3.rs b/src/ppb/nvic_ipr3.rs
index 93fecfd2..a0f6ac28 100644
--- a/src/ppb/nvic_ipr3.rs
+++ b/src/ppb/nvic_ipr3.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR3_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR3_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR3_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR3_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr4.rs b/src/ppb/nvic_ipr4.rs
index 7fd1aba9..c064b6a9 100644
--- a/src/ppb/nvic_ipr4.rs
+++ b/src/ppb/nvic_ipr4.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR4_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR4_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR4_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR4_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr5.rs b/src/ppb/nvic_ipr5.rs
index 29a11906..114f9b4b 100644
--- a/src/ppb/nvic_ipr5.rs
+++ b/src/ppb/nvic_ipr5.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR5_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR5_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR5_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR5_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr6.rs b/src/ppb/nvic_ipr6.rs
index 689ce5ff..167189b8 100644
--- a/src/ppb/nvic_ipr6.rs
+++ b/src/ppb/nvic_ipr6.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR6_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR6_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR6_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR6_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr7.rs b/src/ppb/nvic_ipr7.rs
index 46c73359..9634d5d9 100644
--- a/src/ppb/nvic_ipr7.rs
+++ b/src/ppb/nvic_ipr7.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR7_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR7_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR7_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR7_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr8.rs b/src/ppb/nvic_ipr8.rs
index 49aa77b1..8ed328c4 100644
--- a/src/ppb/nvic_ipr8.rs
+++ b/src/ppb/nvic_ipr8.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR8_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR8_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR8_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR8_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_ipr9.rs b/src/ppb/nvic_ipr9.rs
index c843b0d2..090e8256 100644
--- a/src/ppb/nvic_ipr9.rs
+++ b/src/ppb/nvic_ipr9.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority value 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_0(&mut self) -> PRI_0_W<NVIC_IPR9_SPEC> {
         PRI_0_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority value 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_1(&mut self) -> PRI_1_W<NVIC_IPR9_SPEC> {
         PRI_1_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority value 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_2(&mut self) -> PRI_2_W<NVIC_IPR9_SPEC> {
         PRI_2_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority value 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_3(&mut self) -> PRI_3_W<NVIC_IPR9_SPEC> {
         PRI_3_W::new(self, 24)
     }
diff --git a/src/ppb/nvic_iser0.rs b/src/ppb/nvic_iser0.rs
index 05c64f30..dbf399e7 100644
--- a/src/ppb/nvic_iser0.rs
+++ b/src/ppb/nvic_iser0.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-enable bits"]
     #[inline(always)]
-    #[must_use]
     pub fn setena(&mut self) -> SETENA_W<NVIC_ISER0_SPEC> {
         SETENA_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_iser1.rs b/src/ppb/nvic_iser1.rs
index 80fc1e5d..caf56b8b 100644
--- a/src/ppb/nvic_iser1.rs
+++ b/src/ppb/nvic_iser1.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-enable bits"]
     #[inline(always)]
-    #[must_use]
     pub fn setena(&mut self) -> SETENA_W<NVIC_ISER1_SPEC> {
         SETENA_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_iser2.rs b/src/ppb/nvic_iser2.rs
index 9bee7e59..f8944f37 100644
--- a/src/ppb/nvic_iser2.rs
+++ b/src/ppb/nvic_iser2.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-enable bits"]
     #[inline(always)]
-    #[must_use]
     pub fn setena(&mut self) -> SETENA_W<NVIC_ISER2_SPEC> {
         SETENA_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_iser3.rs b/src/ppb/nvic_iser3.rs
index b2faaa0b..cca7c357 100644
--- a/src/ppb/nvic_iser3.rs
+++ b/src/ppb/nvic_iser3.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-enable bits"]
     #[inline(always)]
-    #[must_use]
     pub fn setena(&mut self) -> SETENA_W<NVIC_ISER3_SPEC> {
         SETENA_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_ispr0.rs b/src/ppb/nvic_ispr0.rs
index db41fe52..277a51ab 100644
--- a/src/ppb/nvic_ispr0.rs
+++ b/src/ppb/nvic_ispr0.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-pending bits."]
     #[inline(always)]
-    #[must_use]
     pub fn setpend(&mut self) -> SETPEND_W<NVIC_ISPR0_SPEC> {
         SETPEND_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_ispr1.rs b/src/ppb/nvic_ispr1.rs
index 5276c203..f9299165 100644
--- a/src/ppb/nvic_ispr1.rs
+++ b/src/ppb/nvic_ispr1.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-pending bits."]
     #[inline(always)]
-    #[must_use]
     pub fn setpend(&mut self) -> SETPEND_W<NVIC_ISPR1_SPEC> {
         SETPEND_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_ispr2.rs b/src/ppb/nvic_ispr2.rs
index abf15b5d..e03cc851 100644
--- a/src/ppb/nvic_ispr2.rs
+++ b/src/ppb/nvic_ispr2.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-pending bits."]
     #[inline(always)]
-    #[must_use]
     pub fn setpend(&mut self) -> SETPEND_W<NVIC_ISPR2_SPEC> {
         SETPEND_W::new(self, 0)
     }
diff --git a/src/ppb/nvic_ispr3.rs b/src/ppb/nvic_ispr3.rs
index eff33e3e..f7531083 100644
--- a/src/ppb/nvic_ispr3.rs
+++ b/src/ppb/nvic_ispr3.rs
@@ -72,7 +72,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Interrupt set-pending bits."]
     #[inline(always)]
-    #[must_use]
     pub fn setpend(&mut self) -> SETPEND_W<NVIC_ISPR3_SPEC> {
         SETPEND_W::new(self, 0)
     }
diff --git a/src/ppb/scr.rs b/src/ppb/scr.rs
index 2e6656c6..c4d178dd 100644
--- a/src/ppb/scr.rs
+++ b/src/ppb/scr.rs
@@ -181,19 +181,16 @@ impl R {
 impl W {
     #[doc = "Bit 1 - Sleep on Exit"]
     #[inline(always)]
-    #[must_use]
     pub fn sleeponexit(&mut self) -> SLEEPONEXIT_W<SCR_SPEC> {
         SLEEPONEXIT_W::new(self, 1)
     }
     #[doc = "Bit 2 - Sleep or Deep Sleep"]
     #[inline(always)]
-    #[must_use]
     pub fn sleepdeep(&mut self) -> SLEEPDEEP_W<SCR_SPEC> {
         SLEEPDEEP_W::new(self, 2)
     }
     #[doc = "Bit 4 - Send Event on Pending bit:"]
     #[inline(always)]
-    #[must_use]
     pub fn sevonpend(&mut self) -> SEVONPEND_W<SCR_SPEC> {
         SEVONPEND_W::new(self, 4)
     }
diff --git a/src/ppb/shcsr.rs b/src/ppb/shcsr.rs
index a58d218c..5be51bd4 100644
--- a/src/ppb/shcsr.rs
+++ b/src/ppb/shcsr.rs
@@ -133,85 +133,71 @@ impl R {
 impl W {
     #[doc = "Bit 0 - MemManage exception active bit"]
     #[inline(always)]
-    #[must_use]
     pub fn memfaultact(&mut self) -> MEMFAULTACT_W<SHCSR_SPEC> {
         MEMFAULTACT_W::new(self, 0)
     }
     #[doc = "Bit 1 - BusFault exception active bit"]
     #[inline(always)]
-    #[must_use]
     pub fn busfaultact(&mut self) -> BUSFAULTACT_W<SHCSR_SPEC> {
         BUSFAULTACT_W::new(self, 1)
     }
     #[doc = "Bit 3 - UsageFault exception active bit"]
     #[inline(always)]
-    #[must_use]
     pub fn usgfaultact(&mut self) -> USGFAULTACT_W<SHCSR_SPEC> {
         USGFAULTACT_W::new(self, 3)
     }
     #[doc = "Bit 7 - SVCall active bit"]
     #[inline(always)]
-    #[must_use]
     pub fn svcallact(&mut self) -> SVCALLACT_W<SHCSR_SPEC> {
         SVCALLACT_W::new(self, 7)
     }
     #[doc = "Bit 8 - Debug monitor active bit"]
     #[inline(always)]
-    #[must_use]
     pub fn monitoract(&mut self) -> MONITORACT_W<SHCSR_SPEC> {
         MONITORACT_W::new(self, 8)
     }
     #[doc = "Bit 10 - PendSV exception active bit"]
     #[inline(always)]
-    #[must_use]
     pub fn pendsvact(&mut self) -> PENDSVACT_W<SHCSR_SPEC> {
         PENDSVACT_W::new(self, 10)
     }
     #[doc = "Bit 11 - SysTick exception active bit"]
     #[inline(always)]
-    #[must_use]
     pub fn systickact(&mut self) -> SYSTICKACT_W<SHCSR_SPEC> {
         SYSTICKACT_W::new(self, 11)
     }
     #[doc = "Bit 12 - UsageFault exception pending bit"]
     #[inline(always)]
-    #[must_use]
     pub fn usgfaultpended(&mut self) -> USGFAULTPENDED_W<SHCSR_SPEC> {
         USGFAULTPENDED_W::new(self, 12)
     }
     #[doc = "Bit 13 - MemManage exception pending bit"]
     #[inline(always)]
-    #[must_use]
     pub fn memfaultpended(&mut self) -> MEMFAULTPENDED_W<SHCSR_SPEC> {
         MEMFAULTPENDED_W::new(self, 13)
     }
     #[doc = "Bit 14 - BusFault exception pending bit"]
     #[inline(always)]
-    #[must_use]
     pub fn busfaultpended(&mut self) -> BUSFAULTPENDED_W<SHCSR_SPEC> {
         BUSFAULTPENDED_W::new(self, 14)
     }
     #[doc = "Bit 15 - SVCall pending bit"]
     #[inline(always)]
-    #[must_use]
     pub fn svcallpended(&mut self) -> SVCALLPENDED_W<SHCSR_SPEC> {
         SVCALLPENDED_W::new(self, 15)
     }
     #[doc = "Bit 16 - MemManage enable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn memfaultena(&mut self) -> MEMFAULTENA_W<SHCSR_SPEC> {
         MEMFAULTENA_W::new(self, 16)
     }
     #[doc = "Bit 17 - BusFault enable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn busfaultena(&mut self) -> BUSFAULTENA_W<SHCSR_SPEC> {
         BUSFAULTENA_W::new(self, 17)
     }
     #[doc = "Bit 18 - UsageFault enable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn usgfaultena(&mut self) -> USGFAULTENA_W<SHCSR_SPEC> {
         USGFAULTENA_W::new(self, 18)
     }
diff --git a/src/ppb/shpr1.rs b/src/ppb/shpr1.rs
index 152d5d8c..e446ba97 100644
--- a/src/ppb/shpr1.rs
+++ b/src/ppb/shpr1.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Priority of system handler 4, MemManage"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_4(&mut self) -> PRI_4_W<SHPR1_SPEC> {
         PRI_4_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Priority of system handler 5, BusFault"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_5(&mut self) -> PRI_5_W<SHPR1_SPEC> {
         PRI_5_W::new(self, 8)
     }
     #[doc = "Bits 16:23 - Priority of system handler 6, UsageFault"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_6(&mut self) -> PRI_6_W<SHPR1_SPEC> {
         PRI_6_W::new(self, 16)
     }
diff --git a/src/ppb/shpr2.rs b/src/ppb/shpr2.rs
index 2e3c0058..0708f5f5 100644
--- a/src/ppb/shpr2.rs
+++ b/src/ppb/shpr2.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 24:31 - Priority of system handler 11, SVCall"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_11(&mut self) -> PRI_11_W<SHPR2_SPEC> {
         PRI_11_W::new(self, 24)
     }
diff --git a/src/ppb/shpr3.rs b/src/ppb/shpr3.rs
index 34baaa1c..4c6384bb 100644
--- a/src/ppb/shpr3.rs
+++ b/src/ppb/shpr3.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 16:23 - Priority of system handler 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_14(&mut self) -> PRI_14_W<SHPR3_SPEC> {
         PRI_14_W::new(self, 16)
     }
     #[doc = "Bits 24:31 - Priority of system handler 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pri_15(&mut self) -> PRI_15_W<SHPR3_SPEC> {
         PRI_15_W::new(self, 24)
     }
diff --git a/src/ppb/stir.rs b/src/ppb/stir.rs
index 6d260a60..58405187 100644
--- a/src/ppb/stir.rs
+++ b/src/ppb/stir.rs
@@ -5,7 +5,6 @@ pub type INTID_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
 impl W {
     #[doc = "Bits 0:8 - Interrupt ID of the interrupt to trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn intid(&mut self) -> INTID_W<STIR_SPEC> {
         INTID_W::new(self, 0)
     }
diff --git a/src/ppb/syst_calib.rs b/src/ppb/syst_calib.rs
index b526dc65..845ceda9 100644
--- a/src/ppb/syst_calib.rs
+++ b/src/ppb/syst_calib.rs
@@ -132,19 +132,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:23 - Ten Milliseconds Reload Value"]
     #[inline(always)]
-    #[must_use]
     pub fn tenms(&mut self) -> TENMS_W<SYST_CALIB_SPEC> {
         TENMS_W::new(self, 0)
     }
     #[doc = "Bit 30 - Ten Milliseconds Skewed"]
     #[inline(always)]
-    #[must_use]
     pub fn skew(&mut self) -> SKEW_W<SYST_CALIB_SPEC> {
         SKEW_W::new(self, 30)
     }
     #[doc = "Bit 31 - No Reference Clock"]
     #[inline(always)]
-    #[must_use]
     pub fn noref(&mut self) -> NOREF_W<SYST_CALIB_SPEC> {
         NOREF_W::new(self, 31)
     }
diff --git a/src/ppb/syst_csr.rs b/src/ppb/syst_csr.rs
index 141b5b35..ea8bd0e1 100644
--- a/src/ppb/syst_csr.rs
+++ b/src/ppb/syst_csr.rs
@@ -190,25 +190,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> ENABLE_W<SYST_CSR_SPEC> {
         ENABLE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Tick Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tickint(&mut self) -> TICKINT_W<SYST_CSR_SPEC> {
         TICKINT_W::new(self, 1)
     }
     #[doc = "Bit 2 - Indicates the clock source:"]
     #[inline(always)]
-    #[must_use]
     pub fn clksource(&mut self) -> CLKSOURCE_W<SYST_CSR_SPEC> {
         CLKSOURCE_W::new(self, 2)
     }
     #[doc = "Bit 16 - Counter Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn countflag(&mut self) -> COUNTFLAG_W<SYST_CSR_SPEC> {
         COUNTFLAG_W::new(self, 16)
     }
diff --git a/src/ppb/syst_cvr.rs b/src/ppb/syst_cvr.rs
index ca5f621e..ffd3399d 100644
--- a/src/ppb/syst_cvr.rs
+++ b/src/ppb/syst_cvr.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:23 - Current Value"]
     #[inline(always)]
-    #[must_use]
     pub fn current(&mut self) -> CURRENT_W<SYST_CVR_SPEC> {
         CURRENT_W::new(self, 0)
     }
diff --git a/src/ppb/syst_rvr.rs b/src/ppb/syst_rvr.rs
index 0fa79e04..ba31c373 100644
--- a/src/ppb/syst_rvr.rs
+++ b/src/ppb/syst_rvr.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:23 - Reload Value"]
     #[inline(always)]
-    #[must_use]
     pub fn reload(&mut self) -> RELOAD_W<SYST_RVR_SPEC> {
         RELOAD_W::new(self, 0)
     }
diff --git a/src/ppb/vtor.rs b/src/ppb/vtor.rs
index 1503b4ae..87ec276a 100644
--- a/src/ppb/vtor.rs
+++ b/src/ppb/vtor.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 10:31 - Vector table base offset field"]
     #[inline(always)]
-    #[must_use]
     pub fn tbloff(&mut self) -> TBLOFF_W<VTOR_SPEC> {
         TBLOFF_W::new(self, 10)
     }
diff --git a/src/pref/pcon.rs b/src/pref/pcon.rs
index e326d0c9..c7f980e4 100644
--- a/src/pref/pcon.rs
+++ b/src/pref/pcon.rs
@@ -154,19 +154,16 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Instruction Prefetch Buffer Bypass"]
     #[inline(always)]
-    #[must_use]
     pub fn ibyp(&mut self) -> IBYP_W<PCON_SPEC> {
         IBYP_W::new(self, 0)
     }
     #[doc = "Bit 1 - Instruction Prefetch Buffer Invalidate"]
     #[inline(always)]
-    #[must_use]
     pub fn iinv(&mut self) -> IINV_W<PCON_SPEC> {
         IINV_W::new(self, 1)
     }
     #[doc = "Bit 4 - Data Buffer Bypass"]
     #[inline(always)]
-    #[must_use]
     pub fn dbyp(&mut self) -> DBYP_W<PCON_SPEC> {
         DBYP_W::new(self, 4)
     }
diff --git a/src/rtc/atim0.rs b/src/rtc/atim0.rs
index 37ed4dcf..f5cbf3d7 100644
--- a/src/rtc/atim0.rs
+++ b/src/rtc/atim0.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Alarm Seconds Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ase(&mut self) -> ASE_W<ATIM0_SPEC> {
         ASE_W::new(self, 0)
     }
     #[doc = "Bits 8:13 - Alarm Minutes Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ami(&mut self) -> AMI_W<ATIM0_SPEC> {
         AMI_W::new(self, 8)
     }
     #[doc = "Bits 16:20 - Alarm Hours Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn aho(&mut self) -> AHO_W<ATIM0_SPEC> {
         AHO_W::new(self, 16)
     }
     #[doc = "Bits 24:28 - Alarm Days Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ada(&mut self) -> ADA_W<ATIM0_SPEC> {
         ADA_W::new(self, 24)
     }
diff --git a/src/rtc/atim1.rs b/src/rtc/atim1.rs
index 99bf56b8..68801a33 100644
--- a/src/rtc/atim1.rs
+++ b/src/rtc/atim1.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 8:11 - Alarm Month Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn amo(&mut self) -> AMO_W<ATIM1_SPEC> {
         AMO_W::new(self, 8)
     }
     #[doc = "Bits 16:31 - Alarm Year Compare Value"]
     #[inline(always)]
-    #[must_use]
     pub fn aye(&mut self) -> AYE_W<ATIM1_SPEC> {
         AYE_W::new(self, 16)
     }
diff --git a/src/rtc/clrsr.rs b/src/rtc/clrsr.rs
index 4d641e97..0fcab2c2 100644
--- a/src/rtc/clrsr.rs
+++ b/src/rtc/clrsr.rs
@@ -17,43 +17,36 @@ pub type RAI_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Periodic Seconds Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpse(&mut self) -> RPSE_W<CLRSR_SPEC> {
         RPSE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Periodic Minutes Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpmi(&mut self) -> RPMI_W<CLRSR_SPEC> {
         RPMI_W::new(self, 1)
     }
     #[doc = "Bit 2 - Periodic Hours Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpho(&mut self) -> RPHO_W<CLRSR_SPEC> {
         RPHO_W::new(self, 2)
     }
     #[doc = "Bit 3 - Periodic Days Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpda(&mut self) -> RPDA_W<CLRSR_SPEC> {
         RPDA_W::new(self, 3)
     }
     #[doc = "Bit 5 - Periodic Months Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpmo(&mut self) -> RPMO_W<CLRSR_SPEC> {
         RPMO_W::new(self, 5)
     }
     #[doc = "Bit 6 - Periodic Years Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rpye(&mut self) -> RPYE_W<CLRSR_SPEC> {
         RPYE_W::new(self, 6)
     }
     #[doc = "Bit 8 - Alarm Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rai(&mut self) -> RAI_W<CLRSR_SPEC> {
         RAI_W::new(self, 8)
     }
diff --git a/src/rtc/ctr.rs b/src/rtc/ctr.rs
index e932c8b6..b178d603 100644
--- a/src/rtc/ctr.rs
+++ b/src/rtc/ctr.rs
@@ -88,55 +88,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - RTC Module Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn enb(&mut self) -> ENB_W<CTR_SPEC> {
         ENB_W::new(self, 0)
     }
     #[doc = "Bit 2 - Timer Alarm Enable for Hibernation Wake-up"]
     #[inline(always)]
-    #[must_use]
     pub fn tae(&mut self) -> TAE_W<CTR_SPEC> {
         TAE_W::new(self, 2)
     }
     #[doc = "Bit 8 - Enable Seconds Comparison for Hibernation Wake-up"]
     #[inline(always)]
-    #[must_use]
     pub fn esec(&mut self) -> ESEC_W<CTR_SPEC> {
         ESEC_W::new(self, 8)
     }
     #[doc = "Bit 9 - Enable Minutes Comparison for Hibernation Wake-up"]
     #[inline(always)]
-    #[must_use]
     pub fn emic(&mut self) -> EMIC_W<CTR_SPEC> {
         EMIC_W::new(self, 9)
     }
     #[doc = "Bit 10 - Enable Hours Comparison for Hibernation Wake-up"]
     #[inline(always)]
-    #[must_use]
     pub fn ehoc(&mut self) -> EHOC_W<CTR_SPEC> {
         EHOC_W::new(self, 10)
     }
     #[doc = "Bit 11 - Enable Days Comparison for Hibernation Wake-up"]
     #[inline(always)]
-    #[must_use]
     pub fn edac(&mut self) -> EDAC_W<CTR_SPEC> {
         EDAC_W::new(self, 11)
     }
     #[doc = "Bit 13 - Enable Months Comparison for Hibernation Wake-up"]
     #[inline(always)]
-    #[must_use]
     pub fn emoc(&mut self) -> EMOC_W<CTR_SPEC> {
         EMOC_W::new(self, 13)
     }
     #[doc = "Bit 14 - Enable Years Comparison for Hibernation Wake-up"]
     #[inline(always)]
-    #[must_use]
     pub fn eyec(&mut self) -> EYEC_W<CTR_SPEC> {
         EYEC_W::new(self, 14)
     }
     #[doc = "Bits 16:31 - RTC Clock Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn div(&mut self) -> DIV_W<CTR_SPEC> {
         DIV_W::new(self, 16)
     }
diff --git a/src/rtc/msksr.rs b/src/rtc/msksr.rs
index 778aaf2e..74845e42 100644
--- a/src/rtc/msksr.rs
+++ b/src/rtc/msksr.rs
@@ -70,43 +70,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Periodic Seconds Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn mpse(&mut self) -> MPSE_W<MSKSR_SPEC> {
         MPSE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Periodic Minutes Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn mpmi(&mut self) -> MPMI_W<MSKSR_SPEC> {
         MPMI_W::new(self, 1)
     }
     #[doc = "Bit 2 - Periodic Hours Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn mpho(&mut self) -> MPHO_W<MSKSR_SPEC> {
         MPHO_W::new(self, 2)
     }
     #[doc = "Bit 3 - Periodic Days Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn mpda(&mut self) -> MPDA_W<MSKSR_SPEC> {
         MPDA_W::new(self, 3)
     }
     #[doc = "Bit 5 - Periodic Months Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn mpmo(&mut self) -> MPMO_W<MSKSR_SPEC> {
         MPMO_W::new(self, 5)
     }
     #[doc = "Bit 6 - Periodic Years Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn mpye(&mut self) -> MPYE_W<MSKSR_SPEC> {
         MPYE_W::new(self, 6)
     }
     #[doc = "Bit 8 - Alarm Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn mai(&mut self) -> MAI_W<MSKSR_SPEC> {
         MAI_W::new(self, 8)
     }
diff --git a/src/rtc/tim0.rs b/src/rtc/tim0.rs
index e425c0e4..9b8b22bf 100644
--- a/src/rtc/tim0.rs
+++ b/src/rtc/tim0.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Seconds Time Value"]
     #[inline(always)]
-    #[must_use]
     pub fn se(&mut self) -> SE_W<TIM0_SPEC> {
         SE_W::new(self, 0)
     }
     #[doc = "Bits 8:13 - Minutes Time Value"]
     #[inline(always)]
-    #[must_use]
     pub fn mi(&mut self) -> MI_W<TIM0_SPEC> {
         MI_W::new(self, 8)
     }
     #[doc = "Bits 16:20 - Hours Time Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ho(&mut self) -> HO_W<TIM0_SPEC> {
         HO_W::new(self, 16)
     }
     #[doc = "Bits 24:28 - Days Time Value"]
     #[inline(always)]
-    #[must_use]
     pub fn da(&mut self) -> DA_W<TIM0_SPEC> {
         DA_W::new(self, 24)
     }
diff --git a/src/rtc/tim1.rs b/src/rtc/tim1.rs
index 7502be4c..6d5958db 100644
--- a/src/rtc/tim1.rs
+++ b/src/rtc/tim1.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Days of Week Time Value"]
     #[inline(always)]
-    #[must_use]
     pub fn dawe(&mut self) -> DAWE_W<TIM1_SPEC> {
         DAWE_W::new(self, 0)
     }
     #[doc = "Bits 8:11 - Month Time Value"]
     #[inline(always)]
-    #[must_use]
     pub fn mo(&mut self) -> MO_W<TIM1_SPEC> {
         MO_W::new(self, 8)
     }
     #[doc = "Bits 16:31 - Year Time Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ye(&mut self) -> YE_W<TIM1_SPEC> {
         YE_W::new(self, 16)
     }
diff --git a/src/scu_clk/ccuclkcr.rs b/src/scu_clk/ccuclkcr.rs
index 7fb4097e..a76902f3 100644
--- a/src/scu_clk/ccuclkcr.rs
+++ b/src/scu_clk/ccuclkcr.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - CCU Clock Divider Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ccudiv(&mut self) -> CCUDIV_W<CCUCLKCR_SPEC> {
         CCUDIV_W::new(self, 0)
     }
diff --git a/src/scu_clk/cgatclr0.rs b/src/scu_clk/cgatclr0.rs
index e481e29b..33cc1c24 100644
--- a/src/scu_clk/cgatclr0.rs
+++ b/src/scu_clk/cgatclr0.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - VADC Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn vadc(&mut self) -> VADC_W<CGATCLR0_SPEC> {
         VADC_W::new(self, 0)
     }
     #[doc = "Bit 2 - CCU40 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu40(&mut self) -> CCU40_W<CGATCLR0_SPEC> {
         CCU40_W::new(self, 2)
     }
     #[doc = "Bit 3 - CCU41 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu41(&mut self) -> CCU41_W<CGATCLR0_SPEC> {
         CCU41_W::new(self, 3)
     }
     #[doc = "Bit 7 - CCU80 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu80(&mut self) -> CCU80_W<CGATCLR0_SPEC> {
         CCU80_W::new(self, 7)
     }
     #[doc = "Bit 9 - POSIF0 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn posif0(&mut self) -> POSIF0_W<CGATCLR0_SPEC> {
         POSIF0_W::new(self, 9)
     }
     #[doc = "Bit 11 - USIC0 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn usic0(&mut self) -> USIC0_W<CGATCLR0_SPEC> {
         USIC0_W::new(self, 11)
     }
     #[doc = "Bit 16 - ERU1 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn eru1(&mut self) -> ERU1_W<CGATCLR0_SPEC> {
         ERU1_W::new(self, 16)
     }
     #[doc = "Bit 23 - HRPWM0 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hrpwm0(&mut self) -> HRPWM0_W<CGATCLR0_SPEC> {
         HRPWM0_W::new(self, 23)
     }
diff --git a/src/scu_clk/cgatclr1.rs b/src/scu_clk/cgatclr1.rs
index cc013133..dca76e8b 100644
--- a/src/scu_clk/cgatclr1.rs
+++ b/src/scu_clk/cgatclr1.rs
@@ -158,31 +158,26 @@ where
 impl W {
     #[doc = "Bit 3 - LEDTS Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ledtscu0(&mut self) -> LEDTSCU0_W<CGATCLR1_SPEC> {
         LEDTSCU0_W::new(self, 3)
     }
     #[doc = "Bit 4 - MultiCAN Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn mcan0(&mut self) -> MCAN0_W<CGATCLR1_SPEC> {
         MCAN0_W::new(self, 4)
     }
     #[doc = "Bit 5 - DAC Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn dac(&mut self) -> DAC_W<CGATCLR1_SPEC> {
         DAC_W::new(self, 5)
     }
     #[doc = "Bit 7 - USIC1 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn usic1(&mut self) -> USIC1_W<CGATCLR1_SPEC> {
         USIC1_W::new(self, 7)
     }
     #[doc = "Bit 9 - PORTS Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn pports(&mut self) -> PPORTS_W<CGATCLR1_SPEC> {
         PPORTS_W::new(self, 9)
     }
diff --git a/src/scu_clk/cgatclr2.rs b/src/scu_clk/cgatclr2.rs
index acfc4a56..fd948a5e 100644
--- a/src/scu_clk/cgatclr2.rs
+++ b/src/scu_clk/cgatclr2.rs
@@ -127,25 +127,21 @@ where
 impl W {
     #[doc = "Bit 1 - WDT Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn wdt(&mut self) -> WDT_W<CGATCLR2_SPEC> {
         WDT_W::new(self, 1)
     }
     #[doc = "Bit 4 - DMA0 Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn dma0(&mut self) -> DMA0_W<CGATCLR2_SPEC> {
         DMA0_W::new(self, 4)
     }
     #[doc = "Bit 6 - FCE Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn fce(&mut self) -> FCE_W<CGATCLR2_SPEC> {
         FCE_W::new(self, 6)
     }
     #[doc = "Bit 7 - USB Gating Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn usb(&mut self) -> USB_W<CGATCLR2_SPEC> {
         USB_W::new(self, 7)
     }
diff --git a/src/scu_clk/cgatset0.rs b/src/scu_clk/cgatset0.rs
index 96b11aa9..bb677a10 100644
--- a/src/scu_clk/cgatset0.rs
+++ b/src/scu_clk/cgatset0.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - VADC Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn vadc(&mut self) -> VADC_W<CGATSET0_SPEC> {
         VADC_W::new(self, 0)
     }
     #[doc = "Bit 2 - CCU40 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu40(&mut self) -> CCU40_W<CGATSET0_SPEC> {
         CCU40_W::new(self, 2)
     }
     #[doc = "Bit 3 - CCU41 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu41(&mut self) -> CCU41_W<CGATSET0_SPEC> {
         CCU41_W::new(self, 3)
     }
     #[doc = "Bit 7 - CCU80 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu80(&mut self) -> CCU80_W<CGATSET0_SPEC> {
         CCU80_W::new(self, 7)
     }
     #[doc = "Bit 9 - POSIF0 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn posif0(&mut self) -> POSIF0_W<CGATSET0_SPEC> {
         POSIF0_W::new(self, 9)
     }
     #[doc = "Bit 11 - USIC0 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn usic0(&mut self) -> USIC0_W<CGATSET0_SPEC> {
         USIC0_W::new(self, 11)
     }
     #[doc = "Bit 16 - ERU1 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn eru1(&mut self) -> ERU1_W<CGATSET0_SPEC> {
         ERU1_W::new(self, 16)
     }
     #[doc = "Bit 23 - HRPWM0 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hrpwm0(&mut self) -> HRPWM0_W<CGATSET0_SPEC> {
         HRPWM0_W::new(self, 23)
     }
diff --git a/src/scu_clk/cgatset1.rs b/src/scu_clk/cgatset1.rs
index a84fb730..09b6a371 100644
--- a/src/scu_clk/cgatset1.rs
+++ b/src/scu_clk/cgatset1.rs
@@ -158,31 +158,26 @@ where
 impl W {
     #[doc = "Bit 3 - LEDTS Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ledtscu0(&mut self) -> LEDTSCU0_W<CGATSET1_SPEC> {
         LEDTSCU0_W::new(self, 3)
     }
     #[doc = "Bit 4 - MultiCAN Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn mcan0(&mut self) -> MCAN0_W<CGATSET1_SPEC> {
         MCAN0_W::new(self, 4)
     }
     #[doc = "Bit 5 - DAC Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn dac(&mut self) -> DAC_W<CGATSET1_SPEC> {
         DAC_W::new(self, 5)
     }
     #[doc = "Bit 7 - USIC1 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn usic1(&mut self) -> USIC1_W<CGATSET1_SPEC> {
         USIC1_W::new(self, 7)
     }
     #[doc = "Bit 9 - PORTS Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn pports(&mut self) -> PPORTS_W<CGATSET1_SPEC> {
         PPORTS_W::new(self, 9)
     }
diff --git a/src/scu_clk/cgatset2.rs b/src/scu_clk/cgatset2.rs
index 741f6dd4..3a549320 100644
--- a/src/scu_clk/cgatset2.rs
+++ b/src/scu_clk/cgatset2.rs
@@ -127,25 +127,21 @@ where
 impl W {
     #[doc = "Bit 1 - WDT Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn wdt(&mut self) -> WDT_W<CGATSET2_SPEC> {
         WDT_W::new(self, 1)
     }
     #[doc = "Bit 4 - DMA0 Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn dma0(&mut self) -> DMA0_W<CGATSET2_SPEC> {
         DMA0_W::new(self, 4)
     }
     #[doc = "Bit 6 - FCE Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn fce(&mut self) -> FCE_W<CGATSET2_SPEC> {
         FCE_W::new(self, 6)
     }
     #[doc = "Bit 7 - USB Gating Set"]
     #[inline(always)]
-    #[must_use]
     pub fn usb(&mut self) -> USB_W<CGATSET2_SPEC> {
         USB_W::new(self, 7)
     }
diff --git a/src/scu_clk/clkclr.rs b/src/scu_clk/clkclr.rs
index 27e84d9c..6027e4d9 100644
--- a/src/scu_clk/clkclr.rs
+++ b/src/scu_clk/clkclr.rs
@@ -96,19 +96,16 @@ where
 impl W {
     #[doc = "Bit 0 - USB Clock Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn usbcdi(&mut self) -> USBCDI_W<CLKCLR_SPEC> {
         USBCDI_W::new(self, 0)
     }
     #[doc = "Bit 4 - CCU Clock Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn ccucdi(&mut self) -> CCUCDI_W<CLKCLR_SPEC> {
         CCUCDI_W::new(self, 4)
     }
     #[doc = "Bit 5 - WDT Clock Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtcdi(&mut self) -> WDTCDI_W<CLKCLR_SPEC> {
         WDTCDI_W::new(self, 5)
     }
diff --git a/src/scu_clk/clkset.rs b/src/scu_clk/clkset.rs
index 65416e98..aa5d0ca4 100644
--- a/src/scu_clk/clkset.rs
+++ b/src/scu_clk/clkset.rs
@@ -96,19 +96,16 @@ where
 impl W {
     #[doc = "Bit 0 - USB Clock Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn usbcen(&mut self) -> USBCEN_W<CLKSET_SPEC> {
         USBCEN_W::new(self, 0)
     }
     #[doc = "Bit 4 - CCU Clock Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ccucen(&mut self) -> CCUCEN_W<CLKSET_SPEC> {
         CCUCEN_W::new(self, 4)
     }
     #[doc = "Bit 5 - WDT Clock Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtcen(&mut self) -> WDTCEN_W<CLKSET_SPEC> {
         WDTCEN_W::new(self, 5)
     }
diff --git a/src/scu_clk/cpuclkcr.rs b/src/scu_clk/cpuclkcr.rs
index e5888d23..e4bc0a65 100644
--- a/src/scu_clk/cpuclkcr.rs
+++ b/src/scu_clk/cpuclkcr.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - CPU Clock Divider Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cpudiv(&mut self) -> CPUDIV_W<CPUCLKCR_SPEC> {
         CPUDIV_W::new(self, 0)
     }
diff --git a/src/scu_clk/dsleepcr.rs b/src/scu_clk/dsleepcr.rs
index 34ee68e9..f954c869 100644
--- a/src/scu_clk/dsleepcr.rs
+++ b/src/scu_clk/dsleepcr.rs
@@ -413,43 +413,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - System Clock Selection Value"]
     #[inline(always)]
-    #[must_use]
     pub fn syssel(&mut self) -> SYSSEL_W<DSLEEPCR_SPEC> {
         SYSSEL_W::new(self, 0)
     }
     #[doc = "Bit 11 - Flash Power Down"]
     #[inline(always)]
-    #[must_use]
     pub fn fpdn(&mut self) -> FPDN_W<DSLEEPCR_SPEC> {
         FPDN_W::new(self, 11)
     }
     #[doc = "Bit 12 - PLL Power Down"]
     #[inline(always)]
-    #[must_use]
     pub fn pllpdn(&mut self) -> PLLPDN_W<DSLEEPCR_SPEC> {
         PLLPDN_W::new(self, 12)
     }
     #[doc = "Bit 13 - VCO Power Down"]
     #[inline(always)]
-    #[must_use]
     pub fn vcopdn(&mut self) -> VCOPDN_W<DSLEEPCR_SPEC> {
         VCOPDN_W::new(self, 13)
     }
     #[doc = "Bit 16 - USB Clock Control"]
     #[inline(always)]
-    #[must_use]
     pub fn usbcr(&mut self) -> USBCR_W<DSLEEPCR_SPEC> {
         USBCR_W::new(self, 16)
     }
     #[doc = "Bit 20 - CCU Clock Control"]
     #[inline(always)]
-    #[must_use]
     pub fn ccucr(&mut self) -> CCUCR_W<DSLEEPCR_SPEC> {
         CCUCR_W::new(self, 20)
     }
     #[doc = "Bit 21 - WDT Clock Control"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtcr(&mut self) -> WDTCR_W<DSLEEPCR_SPEC> {
         WDTCR_W::new(self, 21)
     }
diff --git a/src/scu_clk/extclkcr.rs b/src/scu_clk/extclkcr.rs
index ec106b01..6ab1de56 100644
--- a/src/scu_clk/extclkcr.rs
+++ b/src/scu_clk/extclkcr.rs
@@ -107,13 +107,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - External Clock Selection Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ecksel(&mut self) -> ECKSEL_W<EXTCLKCR_SPEC> {
         ECKSEL_W::new(self, 0)
     }
     #[doc = "Bits 16:24 - External Clock Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn eckdiv(&mut self) -> ECKDIV_W<EXTCLKCR_SPEC> {
         ECKDIV_W::new(self, 16)
     }
diff --git a/src/scu_clk/mlinkclkcr.rs b/src/scu_clk/mlinkclkcr.rs
index ff59ebd4..92d1dea6 100644
--- a/src/scu_clk/mlinkclkcr.rs
+++ b/src/scu_clk/mlinkclkcr.rs
@@ -335,43 +335,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - System Clock Division Value"]
     #[inline(always)]
-    #[must_use]
     pub fn sysdiv(&mut self) -> SYSDIV_W<MLINKCLKCR_SPEC> {
         SYSDIV_W::new(self, 0)
     }
     #[doc = "Bit 8 - System Clock Selection Value"]
     #[inline(always)]
-    #[must_use]
     pub fn syssel(&mut self) -> SYSSEL_W<MLINKCLKCR_SPEC> {
         SYSSEL_W::new(self, 8)
     }
     #[doc = "Bit 10 - CPU Clock Divider Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cpudiv(&mut self) -> CPUDIV_W<MLINKCLKCR_SPEC> {
         CPUDIV_W::new(self, 10)
     }
     #[doc = "Bit 12 - PB Clock Divider Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pbdiv(&mut self) -> PBDIV_W<MLINKCLKCR_SPEC> {
         PBDIV_W::new(self, 12)
     }
     #[doc = "Bit 14 - CCU Clock Divider Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ccudiv(&mut self) -> CCUDIV_W<MLINKCLKCR_SPEC> {
         CCUDIV_W::new(self, 14)
     }
     #[doc = "Bits 16:23 - WDT Clock Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtdiv(&mut self) -> WDTDIV_W<MLINKCLKCR_SPEC> {
         WDTDIV_W::new(self, 16)
     }
     #[doc = "Bits 24:25 - WDT Clock Selection Value"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtsel(&mut self) -> WDTSEL_W<MLINKCLKCR_SPEC> {
         WDTSEL_W::new(self, 24)
     }
diff --git a/src/scu_clk/pbclkcr.rs b/src/scu_clk/pbclkcr.rs
index 79eedc07..05127e30 100644
--- a/src/scu_clk/pbclkcr.rs
+++ b/src/scu_clk/pbclkcr.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - PB Clock Divider Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pbdiv(&mut self) -> PBDIV_W<PBCLKCR_SPEC> {
         PBDIV_W::new(self, 0)
     }
diff --git a/src/scu_clk/sleepcr.rs b/src/scu_clk/sleepcr.rs
index 87c01ff1..bb5f50d1 100644
--- a/src/scu_clk/sleepcr.rs
+++ b/src/scu_clk/sleepcr.rs
@@ -239,25 +239,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - System Clock Selection Value"]
     #[inline(always)]
-    #[must_use]
     pub fn syssel(&mut self) -> SYSSEL_W<SLEEPCR_SPEC> {
         SYSSEL_W::new(self, 0)
     }
     #[doc = "Bit 16 - USB Clock Control"]
     #[inline(always)]
-    #[must_use]
     pub fn usbcr(&mut self) -> USBCR_W<SLEEPCR_SPEC> {
         USBCR_W::new(self, 16)
     }
     #[doc = "Bit 20 - CCU Clock Control"]
     #[inline(always)]
-    #[must_use]
     pub fn ccucr(&mut self) -> CCUCR_W<SLEEPCR_SPEC> {
         CCUCR_W::new(self, 20)
     }
     #[doc = "Bit 21 - WDT Clock Control"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtcr(&mut self) -> WDTCR_W<SLEEPCR_SPEC> {
         WDTCR_W::new(self, 21)
     }
diff --git a/src/scu_clk/sysclkcr.rs b/src/scu_clk/sysclkcr.rs
index 275668f0..e6769d91 100644
--- a/src/scu_clk/sysclkcr.rs
+++ b/src/scu_clk/sysclkcr.rs
@@ -74,13 +74,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - System Clock Division Value"]
     #[inline(always)]
-    #[must_use]
     pub fn sysdiv(&mut self) -> SYSDIV_W<SYSCLKCR_SPEC> {
         SYSDIV_W::new(self, 0)
     }
     #[doc = "Bit 16 - System Clock Selection Value"]
     #[inline(always)]
-    #[must_use]
     pub fn syssel(&mut self) -> SYSSEL_W<SYSCLKCR_SPEC> {
         SYSSEL_W::new(self, 16)
     }
diff --git a/src/scu_clk/usbclkcr.rs b/src/scu_clk/usbclkcr.rs
index 39cbcbdd..718de30d 100644
--- a/src/scu_clk/usbclkcr.rs
+++ b/src/scu_clk/usbclkcr.rs
@@ -74,13 +74,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - USB Clock Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn usbdiv(&mut self) -> USBDIV_W<USBCLKCR_SPEC> {
         USBDIV_W::new(self, 0)
     }
     #[doc = "Bit 16 - USB Clock Selection Value"]
     #[inline(always)]
-    #[must_use]
     pub fn usbsel(&mut self) -> USBSEL_W<USBCLKCR_SPEC> {
         USBSEL_W::new(self, 16)
     }
diff --git a/src/scu_clk/wdtclkcr.rs b/src/scu_clk/wdtclkcr.rs
index e4000da0..57413544 100644
--- a/src/scu_clk/wdtclkcr.rs
+++ b/src/scu_clk/wdtclkcr.rs
@@ -94,13 +94,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - WDT Clock Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtdiv(&mut self) -> WDTDIV_W<WDTCLKCR_SPEC> {
         WDTDIV_W::new(self, 0)
     }
     #[doc = "Bits 16:17 - WDT Clock Selection Value"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtsel(&mut self) -> WDTSEL_W<WDTCLKCR_SPEC> {
         WDTSEL_W::new(self, 16)
     }
diff --git a/src/scu_general/ccucon.rs b/src/scu_general/ccucon.rs
index 4c7d0940..375ef967 100644
--- a/src/scu_general/ccucon.rs
+++ b/src/scu_general/ccucon.rs
@@ -239,25 +239,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Global Start Control CCU40"]
     #[inline(always)]
-    #[must_use]
     pub fn gsc40(&mut self) -> GSC40_W<CCUCON_SPEC> {
         GSC40_W::new(self, 0)
     }
     #[doc = "Bit 1 - Global Start Control CCU41"]
     #[inline(always)]
-    #[must_use]
     pub fn gsc41(&mut self) -> GSC41_W<CCUCON_SPEC> {
         GSC41_W::new(self, 1)
     }
     #[doc = "Bit 8 - Global Start Control CCU80"]
     #[inline(always)]
-    #[must_use]
     pub fn gsc80(&mut self) -> GSC80_W<CCUCON_SPEC> {
         GSC80_W::new(self, 8)
     }
     #[doc = "Bit 24 - Global Start Control HRPWM0"]
     #[inline(always)]
-    #[must_use]
     pub fn gshr0(&mut self) -> GSHR0_W<CCUCON_SPEC> {
         GSHR0_W::new(self, 24)
     }
diff --git a/src/scu_general/dtemplim.rs b/src/scu_general/dtemplim.rs
index 57d8cb03..c939bfbd 100644
--- a/src/scu_general/dtemplim.rs
+++ b/src/scu_general/dtemplim.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:9 - Lower Limit"]
     #[inline(always)]
-    #[must_use]
     pub fn lower(&mut self) -> LOWER_W<DTEMPLIM_SPEC> {
         LOWER_W::new(self, 0)
     }
     #[doc = "Bits 16:25 - Upper Limit"]
     #[inline(always)]
-    #[must_use]
     pub fn upper(&mut self) -> UPPER_W<DTEMPLIM_SPEC> {
         UPPER_W::new(self, 16)
     }
diff --git a/src/scu_general/dtscon.rs b/src/scu_general/dtscon.rs
index 3ef43320..503975cd 100644
--- a/src/scu_general/dtscon.rs
+++ b/src/scu_general/dtscon.rs
@@ -132,37 +132,31 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Sensor Power Down"]
     #[inline(always)]
-    #[must_use]
     pub fn pwd(&mut self) -> PWD_W<DTSCON_SPEC> {
         PWD_W::new(self, 0)
     }
     #[doc = "Bit 1 - Sensor Measurement Start"]
     #[inline(always)]
-    #[must_use]
     pub fn start(&mut self) -> START_W<DTSCON_SPEC> {
         START_W::new(self, 1)
     }
     #[doc = "Bits 4:10 - Offset Calibration Value"]
     #[inline(always)]
-    #[must_use]
     pub fn offset(&mut self) -> OFFSET_W<DTSCON_SPEC> {
         OFFSET_W::new(self, 4)
     }
     #[doc = "Bits 11:16 - Gain Calibration Value"]
     #[inline(always)]
-    #[must_use]
     pub fn gain(&mut self) -> GAIN_W<DTSCON_SPEC> {
         GAIN_W::new(self, 11)
     }
     #[doc = "Bits 17:19 - Reference Trim Calibration Value"]
     #[inline(always)]
-    #[must_use]
     pub fn reftrim(&mut self) -> REFTRIM_W<DTSCON_SPEC> {
         REFTRIM_W::new(self, 17)
     }
     #[doc = "Bits 20:23 - Bandgap Trim Calibration Value"]
     #[inline(always)]
-    #[must_use]
     pub fn bgtrim(&mut self) -> BGTRIM_W<DTSCON_SPEC> {
         BGTRIM_W::new(self, 20)
     }
diff --git a/src/scu_general/g0orcen.rs b/src/scu_general/g0orcen.rs
index 6e8eb962..6ffb62bf 100644
--- a/src/scu_general/g0orcen.rs
+++ b/src/scu_general/g0orcen.rs
@@ -123,13 +123,11 @@ impl R {
 impl W {
     #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn enorc6(&mut self) -> ENORC6_W<G0ORCEN_SPEC> {
         ENORC6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn enorc7(&mut self) -> ENORC7_W<G0ORCEN_SPEC> {
         ENORC7_W::new(self, 7)
     }
diff --git a/src/scu_general/g1orcen.rs b/src/scu_general/g1orcen.rs
index 5838950e..5b10559c 100644
--- a/src/scu_general/g1orcen.rs
+++ b/src/scu_general/g1orcen.rs
@@ -123,13 +123,11 @@ impl R {
 impl W {
     #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn enorc6(&mut self) -> ENORC6_W<G1ORCEN_SPEC> {
         ENORC6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn enorc7(&mut self) -> ENORC7_W<G1ORCEN_SPEC> {
         ENORC7_W::new(self, 7)
     }
diff --git a/src/scu_general/gpr0.rs b/src/scu_general/gpr0.rs
index b283ac4b..6c0a1b28 100644
--- a/src/scu_general/gpr0.rs
+++ b/src/scu_general/gpr0.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - User Data"]
     #[inline(always)]
-    #[must_use]
     pub fn dat(&mut self) -> DAT_W<GPR0_SPEC> {
         DAT_W::new(self, 0)
     }
diff --git a/src/scu_general/gpr1.rs b/src/scu_general/gpr1.rs
index b5b3a48e..66e2a964 100644
--- a/src/scu_general/gpr1.rs
+++ b/src/scu_general/gpr1.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - User Data"]
     #[inline(always)]
-    #[must_use]
     pub fn dat(&mut self) -> DAT_W<GPR1_SPEC> {
         DAT_W::new(self, 0)
     }
diff --git a/src/scu_general/mirrallreq.rs b/src/scu_general/mirrallreq.rs
index 88258949..8f37a7d8 100644
--- a/src/scu_general/mirrallreq.rs
+++ b/src/scu_general/mirrallreq.rs
@@ -34,7 +34,6 @@ where
 impl W {
     #[doc = "Bit 0 - Mirror All Execution Request"]
     #[inline(always)]
-    #[must_use]
     pub fn req(&mut self) -> REQ_W<MIRRALLREQ_SPEC> {
         REQ_W::new(self, 0)
     }
diff --git a/src/scu_general/rmacr.rs b/src/scu_general/rmacr.rs
index 2d427fd0..87e80d37 100644
--- a/src/scu_general/rmacr.rs
+++ b/src/scu_general/rmacr.rs
@@ -74,13 +74,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Hibernate Retention Memory Register Update Control"]
     #[inline(always)]
-    #[must_use]
     pub fn rdwr(&mut self) -> RDWR_W<RMACR_SPEC> {
         RDWR_W::new(self, 0)
     }
     #[doc = "Bits 16:19 - Hibernate Retention Memory Register Address Select"]
     #[inline(always)]
-    #[must_use]
     pub fn addr(&mut self) -> ADDR_W<RMACR_SPEC> {
         ADDR_W::new(self, 16)
     }
diff --git a/src/scu_general/rmdata.rs b/src/scu_general/rmdata.rs
index e83ae39a..67fb3d31 100644
--- a/src/scu_general/rmdata.rs
+++ b/src/scu_general/rmdata.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Hibernate Retention Memory Data"]
     #[inline(always)]
-    #[must_use]
     pub fn data(&mut self) -> DATA_W<RMDATA_SPEC> {
         DATA_W::new(self, 0)
     }
diff --git a/src/scu_general/stcon.rs b/src/scu_general/stcon.rs
index e4fd1901..cab5acc4 100644
--- a/src/scu_general/stcon.rs
+++ b/src/scu_general/stcon.rs
@@ -213,7 +213,6 @@ impl R {
 impl W {
     #[doc = "Bits 8:11 - SW Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn swcon(&mut self) -> SWCON_W<STCON_SPEC> {
         SWCON_W::new(self, 8)
     }
diff --git a/src/scu_hibernate/hdclr.rs b/src/scu_hibernate/hdclr.rs
index 6e3c2893..dab7ca13 100644
--- a/src/scu_hibernate/hdclr.rs
+++ b/src/scu_hibernate/hdclr.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Wake-up Pin Event Positive Edge Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn epev(&mut self) -> EPEV_W<HDCLR_SPEC> {
         EPEV_W::new(self, 0)
     }
     #[doc = "Bit 1 - Wake-up Pin Event Negative Edge Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn enev(&mut self) -> ENEV_W<HDCLR_SPEC> {
         ENEV_W::new(self, 1)
     }
     #[doc = "Bit 2 - RTC Event Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rtcev(&mut self) -> RTCEV_W<HDCLR_SPEC> {
         RTCEV_W::new(self, 2)
     }
     #[doc = "Bit 3 - ULP WDG Alarm Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ulpwdg(&mut self) -> ULPWDG_W<HDCLR_SPEC> {
         ULPWDG_W::new(self, 3)
     }
     #[doc = "Bit 8 - Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatpev(&mut self) -> VBATPEV_W<HDCLR_SPEC> {
         VBATPEV_W::new(self, 8)
     }
     #[doc = "Bit 9 - Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatnev(&mut self) -> VBATNEV_W<HDCLR_SPEC> {
         VBATNEV_W::new(self, 9)
     }
     #[doc = "Bit 10 - Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0pev(&mut self) -> AHIBIO0PEV_W<HDCLR_SPEC> {
         AHIBIO0PEV_W::new(self, 10)
     }
     #[doc = "Bit 11 - Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0nev(&mut self) -> AHIBIO0NEV_W<HDCLR_SPEC> {
         AHIBIO0NEV_W::new(self, 11)
     }
diff --git a/src/scu_hibernate/hdcr.rs b/src/scu_hibernate/hdcr.rs
index 11a2c221..eae48feb 100644
--- a/src/scu_hibernate/hdcr.rs
+++ b/src/scu_hibernate/hdcr.rs
@@ -1092,103 +1092,86 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Wake-Up on Pin Event Positive Edge Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn wkpep(&mut self) -> WKPEP_W<HDCR_SPEC> {
         WKPEP_W::new(self, 0)
     }
     #[doc = "Bit 1 - Wake-up on Pin Event Negative Edge Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn wkpen(&mut self) -> WKPEN_W<HDCR_SPEC> {
         WKPEN_W::new(self, 1)
     }
     #[doc = "Bit 2 - Wake-up on RTC Event Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rtce(&mut self) -> RTCE_W<HDCR_SPEC> {
         RTCE_W::new(self, 2)
     }
     #[doc = "Bit 3 - ULP WDG Alarm Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ulpwdgen(&mut self) -> ULPWDGEN_W<HDCR_SPEC> {
         ULPWDGEN_W::new(self, 3)
     }
     #[doc = "Bit 4 - Hibernate Request Value Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hib(&mut self) -> HIB_W<HDCR_SPEC> {
         HIB_W::new(self, 4)
     }
     #[doc = "Bit 5 - Multiplex Control for RTC_XTAL_1 Select as GPI Input"]
     #[inline(always)]
-    #[must_use]
     pub fn xtalgpi1sel(&mut self) -> XTALGPI1SEL_W<HDCR_SPEC> {
         XTALGPI1SEL_W::new(self, 5)
     }
     #[doc = "Bit 6 - fRTC Clock Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn rcs(&mut self) -> RCS_W<HDCR_SPEC> {
         RCS_W::new(self, 6)
     }
     #[doc = "Bit 7 - fSTDBY Clock Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stdbysel(&mut self) -> STDBYSEL_W<HDCR_SPEC> {
         STDBYSEL_W::new(self, 7)
     }
     #[doc = "Bit 8 - Wake-Up from Hibernate Trigger Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn wkupsel(&mut self) -> WKUPSEL_W<HDCR_SPEC> {
         WKUPSEL_W::new(self, 8)
     }
     #[doc = "Bit 10 - General Purpose Input 0 Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn gpi0sel(&mut self) -> GPI0SEL_W<HDCR_SPEC> {
         GPI0SEL_W::new(self, 10)
     }
     #[doc = "Bit 12 - HIBIO0 Polarity Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hibio0pol(&mut self) -> HIBIO0POL_W<HDCR_SPEC> {
         HIBIO0POL_W::new(self, 12)
     }
     #[doc = "Bit 14 - Select Analog Channel 0 or Digital Output Path"]
     #[inline(always)]
-    #[must_use]
     pub fn adig0sel(&mut self) -> ADIG0SEL_W<HDCR_SPEC> {
         ADIG0SEL_W::new(self, 14)
     }
     #[doc = "Bits 16:19 - HIB_IO_0 Pin I/O Control (default HIBOUT)"]
     #[inline(always)]
-    #[must_use]
     pub fn hibio0sel(&mut self) -> HIBIO0SEL_W<HDCR_SPEC> {
         HIBIO0SEL_W::new(self, 16)
     }
     #[doc = "Bit 24 - Wake-Up on VBAT Falling Below Threshold Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatlo(&mut self) -> VBATLO_W<HDCR_SPEC> {
         VBATLO_W::new(self, 24)
     }
     #[doc = "Bit 25 - Wake-Up on VBAT Rising Above Threshold Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn vbathi(&mut self) -> VBATHI_W<HDCR_SPEC> {
         VBATHI_W::new(self, 25)
     }
     #[doc = "Bit 26 - Wake-Up on Analog HIB_IO_0 Falling Below Threshold Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0lo(&mut self) -> AHIBIO0LO_W<HDCR_SPEC> {
         AHIBIO0LO_W::new(self, 26)
     }
     #[doc = "Bit 27 - Wake-Up on Analog HIB_IO_0 Rising Above Threshold Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0hi(&mut self) -> AHIBIO0HI_W<HDCR_SPEC> {
         AHIBIO0HI_W::new(self, 27)
     }
diff --git a/src/scu_hibernate/hdset.rs b/src/scu_hibernate/hdset.rs
index 809a841d..82fd38fc 100644
--- a/src/scu_hibernate/hdset.rs
+++ b/src/scu_hibernate/hdset.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Wake-up Pin Event Positive Edge Set"]
     #[inline(always)]
-    #[must_use]
     pub fn epev(&mut self) -> EPEV_W<HDSET_SPEC> {
         EPEV_W::new(self, 0)
     }
     #[doc = "Bit 1 - Wake-up Pin Event Negative Edge Set"]
     #[inline(always)]
-    #[must_use]
     pub fn enev(&mut self) -> ENEV_W<HDSET_SPEC> {
         ENEV_W::new(self, 1)
     }
     #[doc = "Bit 2 - RTC Event Set"]
     #[inline(always)]
-    #[must_use]
     pub fn rtcev(&mut self) -> RTCEV_W<HDSET_SPEC> {
         RTCEV_W::new(self, 2)
     }
     #[doc = "Bit 3 - ULP WDG Alarm Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ulpwdg(&mut self) -> ULPWDG_W<HDSET_SPEC> {
         ULPWDG_W::new(self, 3)
     }
     #[doc = "Bit 8 - Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Set"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatpev(&mut self) -> VBATPEV_W<HDSET_SPEC> {
         VBATPEV_W::new(self, 8)
     }
     #[doc = "Bit 9 - Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Set"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatnev(&mut self) -> VBATNEV_W<HDSET_SPEC> {
         VBATNEV_W::new(self, 9)
     }
     #[doc = "Bit 10 - Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0pev(&mut self) -> AHIBIO0PEV_W<HDSET_SPEC> {
         AHIBIO0PEV_W::new(self, 10)
     }
     #[doc = "Bit 11 - Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0nev(&mut self) -> AHIBIO0NEV_W<HDSET_SPEC> {
         AHIBIO0NEV_W::new(self, 11)
     }
diff --git a/src/scu_hibernate/hintclr.rs b/src/scu_hibernate/hintclr.rs
index 491e0bba..078a3e2d 100644
--- a/src/scu_hibernate/hintclr.rs
+++ b/src/scu_hibernate/hintclr.rs
@@ -160,37 +160,31 @@ where
 impl W {
     #[doc = "Bit 0 - Internally Controlled Hibernate Sequence Request Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hibnint(&mut self) -> HIBNINT_W<HINTCLR_SPEC> {
         HIBNINT_W::new(self, 0)
     }
     #[doc = "Bit 2 - VDDP Supply Switch of Flash Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn flashoff(&mut self) -> FLASHOFF_W<HINTCLR_SPEC> {
         FLASHOFF_W::new(self, 2)
     }
     #[doc = "Bit 3 - Flash Power Down Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn flashpd(&mut self) -> FLASHPD_W<HINTCLR_SPEC> {
         FLASHPD_W::new(self, 3)
     }
     #[doc = "Bit 4 - PORST Pull-up OFF Direct Control Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn poffd(&mut self) -> POFFD_W<HINTCLR_SPEC> {
         POFFD_W::new(self, 4)
     }
     #[doc = "Bits 16:17 - Delay on PORTS Pull-up Switching OFF on Hibernate Request Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ppodel(&mut self) -> PPODEL_W<HINTCLR_SPEC> {
         PPODEL_W::new(self, 16)
     }
     #[doc = "Bit 20 - PORST Pull-up OFF in Hibernate Mode Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn poffh(&mut self) -> POFFH_W<HINTCLR_SPEC> {
         POFFH_W::new(self, 20)
     }
diff --git a/src/scu_hibernate/hintset.rs b/src/scu_hibernate/hintset.rs
index c41e5e82..944b3ed8 100644
--- a/src/scu_hibernate/hintset.rs
+++ b/src/scu_hibernate/hintset.rs
@@ -191,43 +191,36 @@ where
 impl W {
     #[doc = "Bit 0 - Internally Controlled Hibernate Sequence Request Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hibnint(&mut self) -> HIBNINT_W<HINTSET_SPEC> {
         HIBNINT_W::new(self, 0)
     }
     #[doc = "Bit 1 - VDDC Generation off on EVR Set"]
     #[inline(always)]
-    #[must_use]
     pub fn vcoreoff(&mut self) -> VCOREOFF_W<HINTSET_SPEC> {
         VCOREOFF_W::new(self, 1)
     }
     #[doc = "Bit 2 - VDDP Supply Switch of Flash Set"]
     #[inline(always)]
-    #[must_use]
     pub fn flashoff(&mut self) -> FLASHOFF_W<HINTSET_SPEC> {
         FLASHOFF_W::new(self, 2)
     }
     #[doc = "Bit 3 - Flash Power Down Set"]
     #[inline(always)]
-    #[must_use]
     pub fn flashpd(&mut self) -> FLASHPD_W<HINTSET_SPEC> {
         FLASHPD_W::new(self, 3)
     }
     #[doc = "Bit 4 - PORST Pull-up OFF Direct Control Set"]
     #[inline(always)]
-    #[must_use]
     pub fn poffd(&mut self) -> POFFD_W<HINTSET_SPEC> {
         POFFD_W::new(self, 4)
     }
     #[doc = "Bits 16:17 - Delay on PORTS Pull-up Switching OFF on Hibernate Request Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ppodel(&mut self) -> PPODEL_W<HINTSET_SPEC> {
         PPODEL_W::new(self, 16)
     }
     #[doc = "Bit 20 - PORST Pull-up OFF in Hibernate Mode Set"]
     #[inline(always)]
-    #[must_use]
     pub fn poffh(&mut self) -> POFFH_W<HINTSET_SPEC> {
         POFFH_W::new(self, 20)
     }
diff --git a/src/scu_hibernate/lpacclr.rs b/src/scu_hibernate/lpacclr.rs
index c3c6b401..0d37de13 100644
--- a/src/scu_hibernate/lpacclr.rs
+++ b/src/scu_hibernate/lpacclr.rs
@@ -127,25 +127,21 @@ where
 impl W {
     #[doc = "Bit 0 - Trigger VBAT Single Compare Operation Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatscmp(&mut self) -> VBATSCMP_W<LPACCLR_SPEC> {
         VBATSCMP_W::new(self, 0)
     }
     #[doc = "Bit 1 - Trigger HIB_IO_0 Input Single Compare Operation Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0scmp(&mut self) -> AHIBIO0SCMP_W<LPACCLR_SPEC> {
         AHIBIO0SCMP_W::new(self, 1)
     }
     #[doc = "Bit 16 - VBAT Compare Operation Initial Value Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatval(&mut self) -> VBATVAL_W<LPACCLR_SPEC> {
         VBATVAL_W::new(self, 16)
     }
     #[doc = "Bit 17 - HIB_IO_0 Input Compare Initial Value Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0val(&mut self) -> AHIBIO0VAL_W<LPACCLR_SPEC> {
         AHIBIO0VAL_W::new(self, 17)
     }
diff --git a/src/scu_hibernate/lpacconf.rs b/src/scu_hibernate/lpacconf.rs
index b87fd6e6..73f85bc2 100644
--- a/src/scu_hibernate/lpacconf.rs
+++ b/src/scu_hibernate/lpacconf.rs
@@ -255,31 +255,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Compare Enable for Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn cmpen(&mut self) -> CMPEN_W<LPACCONF_SPEC> {
         CMPEN_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Analog Compare Trigger Select"]
     #[inline(always)]
-    #[must_use]
     pub fn trigsel(&mut self) -> TRIGSEL_W<LPACCONF_SPEC> {
         TRIGSEL_W::new(self, 4)
     }
     #[doc = "Bit 12 - Conversion Delay"]
     #[inline(always)]
-    #[must_use]
     pub fn convdel(&mut self) -> CONVDEL_W<LPACCONF_SPEC> {
         CONVDEL_W::new(self, 12)
     }
     #[doc = "Bits 16:27 - Sub-second Interval Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn intervcnt(&mut self) -> INTERVCNT_W<LPACCONF_SPEC> {
         INTERVCNT_W::new(self, 16)
     }
     #[doc = "Bits 28:31 - LPAC Settle Time Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn settlecnt(&mut self) -> SETTLECNT_W<LPACCONF_SPEC> {
         SETTLECNT_W::new(self, 28)
     }
diff --git a/src/scu_hibernate/lpacset.rs b/src/scu_hibernate/lpacset.rs
index 8541f436..304550f6 100644
--- a/src/scu_hibernate/lpacset.rs
+++ b/src/scu_hibernate/lpacset.rs
@@ -127,25 +127,21 @@ where
 impl W {
     #[doc = "Bit 0 - Trigger VBAT Single Compare Operation Set"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatscmp(&mut self) -> VBATSCMP_W<LPACSET_SPEC> {
         VBATSCMP_W::new(self, 0)
     }
     #[doc = "Bit 1 - Trigger HIB_IO_0 Input Single Compare Operation Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0scmp(&mut self) -> AHIBIO0SCMP_W<LPACSET_SPEC> {
         AHIBIO0SCMP_W::new(self, 1)
     }
     #[doc = "Bit 16 - VBAT Compare Operation Initial Value Set"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatval(&mut self) -> VBATVAL_W<LPACSET_SPEC> {
         VBATVAL_W::new(self, 16)
     }
     #[doc = "Bit 17 - HIB_IO_0 Input Compare Initial Value Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0val(&mut self) -> AHIBIO0VAL_W<LPACSET_SPEC> {
         AHIBIO0VAL_W::new(self, 17)
     }
diff --git a/src/scu_hibernate/lpacth0.rs b/src/scu_hibernate/lpacth0.rs
index d9941990..85025af3 100644
--- a/src/scu_hibernate/lpacth0.rs
+++ b/src/scu_hibernate/lpacth0.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - VBAT Lower Threshold Value"]
     #[inline(always)]
-    #[must_use]
     pub fn vbatlo(&mut self) -> VBATLO_W<LPACTH0_SPEC> {
         VBATLO_W::new(self, 0)
     }
     #[doc = "Bits 8:13 - VBAT Upper Threshold Value"]
     #[inline(always)]
-    #[must_use]
     pub fn vbathi(&mut self) -> VBATHI_W<LPACTH0_SPEC> {
         VBATHI_W::new(self, 8)
     }
diff --git a/src/scu_hibernate/lpacth1.rs b/src/scu_hibernate/lpacth1.rs
index a228cc25..ff95a3db 100644
--- a/src/scu_hibernate/lpacth1.rs
+++ b/src/scu_hibernate/lpacth1.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Analog HIB_IO_0 Lower Threshold Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0lo(&mut self) -> AHIBIO0LO_W<LPACTH1_SPEC> {
         AHIBIO0LO_W::new(self, 0)
     }
     #[doc = "Bits 8:13 - Analog HIB_IO_0 Upper Threshold Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ahibio0hi(&mut self) -> AHIBIO0HI_W<LPACTH1_SPEC> {
         AHIBIO0HI_W::new(self, 8)
     }
diff --git a/src/scu_hibernate/oscsictrl.rs b/src/scu_hibernate/oscsictrl.rs
index 913795a4..ea8ebede 100644
--- a/src/scu_hibernate/oscsictrl.rs
+++ b/src/scu_hibernate/oscsictrl.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Turn OFF the fOSI Clock Source"]
     #[inline(always)]
-    #[must_use]
     pub fn pwd(&mut self) -> PWD_W<OSCSICTRL_SPEC> {
         PWD_W::new(self, 0)
     }
diff --git a/src/scu_hibernate/osculctrl.rs b/src/scu_hibernate/osculctrl.rs
index e3987769..dacd7950 100644
--- a/src/scu_hibernate/osculctrl.rs
+++ b/src/scu_hibernate/osculctrl.rs
@@ -156,13 +156,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - XTAL1 Data General Purpose Input Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn x1den(&mut self) -> X1DEN_W<OSCULCTRL_SPEC> {
         X1DEN_W::new(self, 0)
     }
     #[doc = "Bits 4:5 - Oscillator Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn mode(&mut self) -> MODE_W<OSCULCTRL_SPEC> {
         MODE_W::new(self, 4)
     }
diff --git a/src/scu_interrupt/nmireqen.rs b/src/scu_interrupt/nmireqen.rs
index b66a22ae..974a9e6e 100644
--- a/src/scu_interrupt/nmireqen.rs
+++ b/src/scu_interrupt/nmireqen.rs
@@ -413,43 +413,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Promote Pre-Warning Interrupt Request to NMI Request"]
     #[inline(always)]
-    #[must_use]
     pub fn prwarn(&mut self) -> PRWARN_W<NMIREQEN_SPEC> {
         PRWARN_W::new(self, 0)
     }
     #[doc = "Bit 1 - Promote RTC Periodic Interrupt request to NMI Request"]
     #[inline(always)]
-    #[must_use]
     pub fn pi(&mut self) -> PI_W<NMIREQEN_SPEC> {
         PI_W::new(self, 1)
     }
     #[doc = "Bit 2 - Promote RTC Alarm Interrupt Request to NMI Request"]
     #[inline(always)]
-    #[must_use]
     pub fn ai(&mut self) -> AI_W<NMIREQEN_SPEC> {
         AI_W::new(self, 2)
     }
     #[doc = "Bit 16 - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"]
     #[inline(always)]
-    #[must_use]
     pub fn eru00(&mut self) -> ERU00_W<NMIREQEN_SPEC> {
         ERU00_W::new(self, 16)
     }
     #[doc = "Bit 17 - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"]
     #[inline(always)]
-    #[must_use]
     pub fn eru01(&mut self) -> ERU01_W<NMIREQEN_SPEC> {
         ERU01_W::new(self, 17)
     }
     #[doc = "Bit 18 - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"]
     #[inline(always)]
-    #[must_use]
     pub fn eru02(&mut self) -> ERU02_W<NMIREQEN_SPEC> {
         ERU02_W::new(self, 18)
     }
     #[doc = "Bit 19 - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"]
     #[inline(always)]
-    #[must_use]
     pub fn eru03(&mut self) -> ERU03_W<NMIREQEN_SPEC> {
         ERU03_W::new(self, 19)
     }
diff --git a/src/scu_interrupt/srclr.rs b/src/scu_interrupt/srclr.rs
index a9451379..fe739a6f 100644
--- a/src/scu_interrupt/srclr.rs
+++ b/src/scu_interrupt/srclr.rs
@@ -747,145 +747,121 @@ where
 impl W {
     #[doc = "Bit 0 - WDT pre-warning Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn prwarn(&mut self) -> PRWARN_W<SRCLR_SPEC> {
         PRWARN_W::new(self, 0)
     }
     #[doc = "Bit 1 - RTC Periodic Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn pi(&mut self) -> PI_W<SRCLR_SPEC> {
         PI_W::new(self, 1)
     }
     #[doc = "Bit 2 - RTC Alarm Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ai(&mut self) -> AI_W<SRCLR_SPEC> {
         AI_W::new(self, 2)
     }
     #[doc = "Bit 3 - DLR Request Overrun Interrupt clear"]
     #[inline(always)]
-    #[must_use]
     pub fn dlrovr(&mut self) -> DLROVR_W<SRCLR_SPEC> {
         DLROVR_W::new(self, 3)
     }
     #[doc = "Bit 6 - LPACLR Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn lpaccr(&mut self) -> LPACCR_W<SRCLR_SPEC> {
         LPACCR_W::new(self, 6)
     }
     #[doc = "Bit 7 - LPACTH0 Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacth0(&mut self) -> LPACTH0_W<SRCLR_SPEC> {
         LPACTH0_W::new(self, 7)
     }
     #[doc = "Bit 8 - LPACTH1 Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacth1(&mut self) -> LPACTH1_W<SRCLR_SPEC> {
         LPACTH1_W::new(self, 8)
     }
     #[doc = "Bit 9 - LPACST Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacst(&mut self) -> LPACST_W<SRCLR_SPEC> {
         LPACST_W::new(self, 9)
     }
     #[doc = "Bit 10 - LPACCLR Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacclr(&mut self) -> LPACCLR_W<SRCLR_SPEC> {
         LPACCLR_W::new(self, 10)
     }
     #[doc = "Bit 11 - LPACSET Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacset(&mut self) -> LPACSET_W<SRCLR_SPEC> {
         LPACSET_W::new(self, 11)
     }
     #[doc = "Bit 12 - HINTST Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hintst(&mut self) -> HINTST_W<SRCLR_SPEC> {
         HINTST_W::new(self, 12)
     }
     #[doc = "Bit 13 - HINTCLR Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hintclr(&mut self) -> HINTCLR_W<SRCLR_SPEC> {
         HINTCLR_W::new(self, 13)
     }
     #[doc = "Bit 14 - HINTSET Mirror Register Update Interrupt Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hintset(&mut self) -> HINTSET_W<SRCLR_SPEC> {
         HINTSET_W::new(self, 14)
     }
     #[doc = "Bit 17 - HDCLR Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hdclr(&mut self) -> HDCLR_W<SRCLR_SPEC> {
         HDCLR_W::new(self, 17)
     }
     #[doc = "Bit 18 - HDSET Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hdset(&mut self) -> HDSET_W<SRCLR_SPEC> {
         HDSET_W::new(self, 18)
     }
     #[doc = "Bit 19 - HDCR Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hdcr(&mut self) -> HDCR_W<SRCLR_SPEC> {
         HDCR_W::new(self, 19)
     }
     #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn oscsictrl(&mut self) -> OSCSICTRL_W<SRCLR_SPEC> {
         OSCSICTRL_W::new(self, 21)
     }
     #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn osculctrl(&mut self) -> OSCULCTRL_W<SRCLR_SPEC> {
         OSCULCTRL_W::new(self, 23)
     }
     #[doc = "Bit 24 - RTC CTR Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_ctr(&mut self) -> RTC_CTR_W<SRCLR_SPEC> {
         RTC_CTR_W::new(self, 24)
     }
     #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W<SRCLR_SPEC> {
         RTC_ATIM0_W::new(self, 25)
     }
     #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W<SRCLR_SPEC> {
         RTC_ATIM1_W::new(self, 26)
     }
     #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_tim0(&mut self) -> RTC_TIM0_W<SRCLR_SPEC> {
         RTC_TIM0_W::new(self, 27)
     }
     #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_tim1(&mut self) -> RTC_TIM1_W<SRCLR_SPEC> {
         RTC_TIM1_W::new(self, 28)
     }
     #[doc = "Bit 29 - Retention Memory Mirror Register Update Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn rmx(&mut self) -> RMX_W<SRCLR_SPEC> {
         RMX_W::new(self, 29)
     }
diff --git a/src/scu_interrupt/srmsk.rs b/src/scu_interrupt/srmsk.rs
index 69c7027f..c70bab9f 100644
--- a/src/scu_interrupt/srmsk.rs
+++ b/src/scu_interrupt/srmsk.rs
@@ -1399,145 +1399,121 @@ impl R {
 impl W {
     #[doc = "Bit 0 - WDT pre-warning Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn prwarn(&mut self) -> PRWARN_W<SRMSK_SPEC> {
         PRWARN_W::new(self, 0)
     }
     #[doc = "Bit 1 - RTC Periodic Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn pi(&mut self) -> PI_W<SRMSK_SPEC> {
         PI_W::new(self, 1)
     }
     #[doc = "Bit 2 - RTC Alarm Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn ai(&mut self) -> AI_W<SRMSK_SPEC> {
         AI_W::new(self, 2)
     }
     #[doc = "Bit 3 - DLR Request Overrun Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn dlrovr(&mut self) -> DLROVR_W<SRMSK_SPEC> {
         DLROVR_W::new(self, 3)
     }
     #[doc = "Bit 6 - LPACLR Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn lpaccr(&mut self) -> LPACCR_W<SRMSK_SPEC> {
         LPACCR_W::new(self, 6)
     }
     #[doc = "Bit 7 - LPACTH0 Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacth0(&mut self) -> LPACTH0_W<SRMSK_SPEC> {
         LPACTH0_W::new(self, 7)
     }
     #[doc = "Bit 8 - LPACTH1 Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacth1(&mut self) -> LPACTH1_W<SRMSK_SPEC> {
         LPACTH1_W::new(self, 8)
     }
     #[doc = "Bit 9 - LPACST Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacst(&mut self) -> LPACST_W<SRMSK_SPEC> {
         LPACST_W::new(self, 9)
     }
     #[doc = "Bit 10 - LPACCLR Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacclr(&mut self) -> LPACCLR_W<SRMSK_SPEC> {
         LPACCLR_W::new(self, 10)
     }
     #[doc = "Bit 11 - LPACSET Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacset(&mut self) -> LPACSET_W<SRMSK_SPEC> {
         LPACSET_W::new(self, 11)
     }
     #[doc = "Bit 12 - HINTST Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn hintst(&mut self) -> HINTST_W<SRMSK_SPEC> {
         HINTST_W::new(self, 12)
     }
     #[doc = "Bit 13 - HINTCLR Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn hintclr(&mut self) -> HINTCLR_W<SRMSK_SPEC> {
         HINTCLR_W::new(self, 13)
     }
     #[doc = "Bit 14 - HINTSET Mirror Register Update Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn hintset(&mut self) -> HINTSET_W<SRMSK_SPEC> {
         HINTSET_W::new(self, 14)
     }
     #[doc = "Bit 17 - HDCLR Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn hdclr(&mut self) -> HDCLR_W<SRMSK_SPEC> {
         HDCLR_W::new(self, 17)
     }
     #[doc = "Bit 18 - HDSET Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn hdset(&mut self) -> HDSET_W<SRMSK_SPEC> {
         HDSET_W::new(self, 18)
     }
     #[doc = "Bit 19 - HDCR Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn hdcr(&mut self) -> HDCR_W<SRMSK_SPEC> {
         HDCR_W::new(self, 19)
     }
     #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn oscsictrl(&mut self) -> OSCSICTRL_W<SRMSK_SPEC> {
         OSCSICTRL_W::new(self, 21)
     }
     #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn osculctrl(&mut self) -> OSCULCTRL_W<SRMSK_SPEC> {
         OSCULCTRL_W::new(self, 23)
     }
     #[doc = "Bit 24 - RTC CTR Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_ctr(&mut self) -> RTC_CTR_W<SRMSK_SPEC> {
         RTC_CTR_W::new(self, 24)
     }
     #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W<SRMSK_SPEC> {
         RTC_ATIM0_W::new(self, 25)
     }
     #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W<SRMSK_SPEC> {
         RTC_ATIM1_W::new(self, 26)
     }
     #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_tim0(&mut self) -> RTC_TIM0_W<SRMSK_SPEC> {
         RTC_TIM0_W::new(self, 27)
     }
     #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_tim1(&mut self) -> RTC_TIM1_W<SRMSK_SPEC> {
         RTC_TIM1_W::new(self, 28)
     }
     #[doc = "Bit 29 - Retention Memory Mirror Register Update Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rmx(&mut self) -> RMX_W<SRMSK_SPEC> {
         RMX_W::new(self, 29)
     }
diff --git a/src/scu_interrupt/srset.rs b/src/scu_interrupt/srset.rs
index f304775f..2642bfa6 100644
--- a/src/scu_interrupt/srset.rs
+++ b/src/scu_interrupt/srset.rs
@@ -747,145 +747,121 @@ where
 impl W {
     #[doc = "Bit 0 - WDT pre-warning Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn prwarn(&mut self) -> PRWARN_W<SRSET_SPEC> {
         PRWARN_W::new(self, 0)
     }
     #[doc = "Bit 1 - RTC Periodic Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn pi(&mut self) -> PI_W<SRSET_SPEC> {
         PI_W::new(self, 1)
     }
     #[doc = "Bit 2 - RTC Alarm Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ai(&mut self) -> AI_W<SRSET_SPEC> {
         AI_W::new(self, 2)
     }
     #[doc = "Bit 3 - DLR Request Overrun Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn dlrovr(&mut self) -> DLROVR_W<SRSET_SPEC> {
         DLROVR_W::new(self, 3)
     }
     #[doc = "Bit 6 - LPACLR Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn lpaccr(&mut self) -> LPACCR_W<SRSET_SPEC> {
         LPACCR_W::new(self, 6)
     }
     #[doc = "Bit 7 - LPACTH0 Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacth0(&mut self) -> LPACTH0_W<SRSET_SPEC> {
         LPACTH0_W::new(self, 7)
     }
     #[doc = "Bit 8 - LPACTH1 Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacth1(&mut self) -> LPACTH1_W<SRSET_SPEC> {
         LPACTH1_W::new(self, 8)
     }
     #[doc = "Bit 9 - LPACST Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacst(&mut self) -> LPACST_W<SRSET_SPEC> {
         LPACST_W::new(self, 9)
     }
     #[doc = "Bit 10 - LPACCLR Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacclr(&mut self) -> LPACCLR_W<SRSET_SPEC> {
         LPACCLR_W::new(self, 10)
     }
     #[doc = "Bit 11 - LPACSET Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn lpacset(&mut self) -> LPACSET_W<SRSET_SPEC> {
         LPACSET_W::new(self, 11)
     }
     #[doc = "Bit 12 - HINTST Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hintst(&mut self) -> HINTST_W<SRSET_SPEC> {
         HINTST_W::new(self, 12)
     }
     #[doc = "Bit 13 - HINTCLR Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hintclr(&mut self) -> HINTCLR_W<SRSET_SPEC> {
         HINTCLR_W::new(self, 13)
     }
     #[doc = "Bit 14 - HINTSET Mirror Register Update Interrupt Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hintset(&mut self) -> HINTSET_W<SRSET_SPEC> {
         HINTSET_W::new(self, 14)
     }
     #[doc = "Bit 17 - HDCRCLR Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hdcrclr(&mut self) -> HDCRCLR_W<SRSET_SPEC> {
         HDCRCLR_W::new(self, 17)
     }
     #[doc = "Bit 18 - HDCRSET Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hdcrset(&mut self) -> HDCRSET_W<SRSET_SPEC> {
         HDCRSET_W::new(self, 18)
     }
     #[doc = "Bit 19 - HDCR Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn hdcr(&mut self) -> HDCR_W<SRSET_SPEC> {
         HDCR_W::new(self, 19)
     }
     #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn oscsictrl(&mut self) -> OSCSICTRL_W<SRSET_SPEC> {
         OSCSICTRL_W::new(self, 21)
     }
     #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn osculctrl(&mut self) -> OSCULCTRL_W<SRSET_SPEC> {
         OSCULCTRL_W::new(self, 23)
     }
     #[doc = "Bit 24 - RTC CTR Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_ctr(&mut self) -> RTC_CTR_W<SRSET_SPEC> {
         RTC_CTR_W::new(self, 24)
     }
     #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W<SRSET_SPEC> {
         RTC_ATIM0_W::new(self, 25)
     }
     #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W<SRSET_SPEC> {
         RTC_ATIM1_W::new(self, 26)
     }
     #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_tim0(&mut self) -> RTC_TIM0_W<SRSET_SPEC> {
         RTC_TIM0_W::new(self, 27)
     }
     #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc_tim1(&mut self) -> RTC_TIM1_W<SRSET_SPEC> {
         RTC_TIM1_W::new(self, 28)
     }
     #[doc = "Bit 29 - Retention Memory Mirror Register Update Set"]
     #[inline(always)]
-    #[must_use]
     pub fn rmx(&mut self) -> RMX_W<SRSET_SPEC> {
         RMX_W::new(self, 29)
     }
diff --git a/src/scu_osc/clkcalconst.rs b/src/scu_osc/clkcalconst.rs
index 0a0711bb..af945409 100644
--- a/src/scu_osc/clkcalconst.rs
+++ b/src/scu_osc/clkcalconst.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Clock Calibration Constant Value"]
     #[inline(always)]
-    #[must_use]
     pub fn calibconst(&mut self) -> CALIBCONST_W<CLKCALCONST_SPEC> {
         CALIBCONST_W::new(self, 0)
     }
diff --git a/src/scu_osc/oschpctrl.rs b/src/scu_osc/oschpctrl.rs
index fbe3e620..bb6a2801 100644
--- a/src/scu_osc/oschpctrl.rs
+++ b/src/scu_osc/oschpctrl.rs
@@ -223,25 +223,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - XTAL1 Data Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn x1den(&mut self) -> X1DEN_W<OSCHPCTRL_SPEC> {
         X1DEN_W::new(self, 0)
     }
     #[doc = "Bit 1 - Shaper Bypass"]
     #[inline(always)]
-    #[must_use]
     pub fn shby(&mut self) -> SHBY_W<OSCHPCTRL_SPEC> {
         SHBY_W::new(self, 1)
     }
     #[doc = "Bits 4:5 - Oscillator Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn mode(&mut self) -> MODE_W<OSCHPCTRL_SPEC> {
         MODE_W::new(self, 4)
     }
     #[doc = "Bits 16:19 - OSC Frequency Value"]
     #[inline(always)]
-    #[must_use]
     pub fn oscval(&mut self) -> OSCVAL_W<OSCHPCTRL_SPEC> {
         OSCVAL_W::new(self, 16)
     }
diff --git a/src/scu_parity/mchkcon.rs b/src/scu_parity/mchkcon.rs
index 3da152f0..65a0d1a2 100644
--- a/src/scu_parity/mchkcon.rs
+++ b/src/scu_parity/mchkcon.rs
@@ -413,43 +413,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Select Memory Check for PSRAM"]
     #[inline(always)]
-    #[must_use]
     pub fn selps(&mut self) -> SELPS_W<MCHKCON_SPEC> {
         SELPS_W::new(self, 0)
     }
     #[doc = "Bit 1 - Select Memory Check for DSRAM1"]
     #[inline(always)]
-    #[must_use]
     pub fn selds1(&mut self) -> SELDS1_W<MCHKCON_SPEC> {
         SELDS1_W::new(self, 1)
     }
     #[doc = "Bit 8 - Select Memory Check for USIC0"]
     #[inline(always)]
-    #[must_use]
     pub fn usic0dra(&mut self) -> USIC0DRA_W<MCHKCON_SPEC> {
         USIC0DRA_W::new(self, 8)
     }
     #[doc = "Bit 9 - Select Memory Check for USIC1"]
     #[inline(always)]
-    #[must_use]
     pub fn usic1dra(&mut self) -> USIC1DRA_W<MCHKCON_SPEC> {
         USIC1DRA_W::new(self, 9)
     }
     #[doc = "Bit 12 - Select Memory Check for MultiCAN"]
     #[inline(always)]
-    #[must_use]
     pub fn mcandra(&mut self) -> MCANDRA_W<MCHKCON_SPEC> {
         MCANDRA_W::new(self, 12)
     }
     #[doc = "Bit 13 - Select Memory Check for PMU"]
     #[inline(always)]
-    #[must_use]
     pub fn pprfdra(&mut self) -> PPRFDRA_W<MCHKCON_SPEC> {
         PPRFDRA_W::new(self, 13)
     }
     #[doc = "Bit 16 - Select Memory Check for USB SRAM"]
     #[inline(always)]
-    #[must_use]
     pub fn selusb(&mut self) -> SELUSB_W<MCHKCON_SPEC> {
         SELUSB_W::new(self, 16)
     }
diff --git a/src/scu_parity/peen.rs b/src/scu_parity/peen.rs
index 6bfa1844..4de16d7a 100644
--- a/src/scu_parity/peen.rs
+++ b/src/scu_parity/peen.rs
@@ -413,43 +413,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Parity Error Enable for PSRAM"]
     #[inline(always)]
-    #[must_use]
     pub fn peenps(&mut self) -> PEENPS_W<PEEN_SPEC> {
         PEENPS_W::new(self, 0)
     }
     #[doc = "Bit 1 - Parity Error Enable for DSRAM1"]
     #[inline(always)]
-    #[must_use]
     pub fn peends1(&mut self) -> PEENDS1_W<PEEN_SPEC> {
         PEENDS1_W::new(self, 1)
     }
     #[doc = "Bit 8 - Parity Error Enable for USIC0 Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peenu0(&mut self) -> PEENU0_W<PEEN_SPEC> {
         PEENU0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Parity Error Enable for USIC1 Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peenu1(&mut self) -> PEENU1_W<PEEN_SPEC> {
         PEENU1_W::new(self, 9)
     }
     #[doc = "Bit 12 - Parity Error Enable for MultiCAN Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peenmc(&mut self) -> PEENMC_W<PEEN_SPEC> {
         PEENMC_W::new(self, 12)
     }
     #[doc = "Bit 13 - Parity Error Enable for PMU Prefetch Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peenpprf(&mut self) -> PEENPPRF_W<PEEN_SPEC> {
         PEENPPRF_W::new(self, 13)
     }
     #[doc = "Bit 16 - Parity Error Enable for USB Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peenusb(&mut self) -> PEENUSB_W<PEEN_SPEC> {
         PEENUSB_W::new(self, 16)
     }
diff --git a/src/scu_parity/peflag.rs b/src/scu_parity/peflag.rs
index ef766f14..7b59d08f 100644
--- a/src/scu_parity/peflag.rs
+++ b/src/scu_parity/peflag.rs
@@ -413,43 +413,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Parity Error Flag for PSRAM"]
     #[inline(always)]
-    #[must_use]
     pub fn pefps(&mut self) -> PEFPS_W<PEFLAG_SPEC> {
         PEFPS_W::new(self, 0)
     }
     #[doc = "Bit 1 - Parity Error Flag for DSRAM1"]
     #[inline(always)]
-    #[must_use]
     pub fn pefds1(&mut self) -> PEFDS1_W<PEFLAG_SPEC> {
         PEFDS1_W::new(self, 1)
     }
     #[doc = "Bit 8 - Parity Error Flag for USIC0 Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn pefu0(&mut self) -> PEFU0_W<PEFLAG_SPEC> {
         PEFU0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Parity Error Flag for USIC1 Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn pefu1(&mut self) -> PEFU1_W<PEFLAG_SPEC> {
         PEFU1_W::new(self, 9)
     }
     #[doc = "Bit 12 - Parity Error Flag for MultiCAN Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn pefmc(&mut self) -> PEFMC_W<PEFLAG_SPEC> {
         PEFMC_W::new(self, 12)
     }
     #[doc = "Bit 13 - Parity Error Flag for PMU Prefetch Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn pefpprf(&mut self) -> PEFPPRF_W<PEFLAG_SPEC> {
         PEFPPRF_W::new(self, 13)
     }
     #[doc = "Bit 16 - Parity Error Flag for USB Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peusb(&mut self) -> PEUSB_W<PEFLAG_SPEC> {
         PEUSB_W::new(self, 16)
     }
diff --git a/src/scu_parity/persten.rs b/src/scu_parity/persten.rs
index 8f5b6969..f7df0502 100644
--- a/src/scu_parity/persten.rs
+++ b/src/scu_parity/persten.rs
@@ -65,7 +65,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - System Reset Enable upon Parity Error Trap"]
     #[inline(always)]
-    #[must_use]
     pub fn rsen(&mut self) -> RSEN_W<PERSTEN_SPEC> {
         RSEN_W::new(self, 0)
     }
diff --git a/src/scu_parity/pete.rs b/src/scu_parity/pete.rs
index 72bf3b70..355643f3 100644
--- a/src/scu_parity/pete.rs
+++ b/src/scu_parity/pete.rs
@@ -413,43 +413,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Parity Error Trap Enable for PSRAM"]
     #[inline(always)]
-    #[must_use]
     pub fn peteps(&mut self) -> PETEPS_W<PETE_SPEC> {
         PETEPS_W::new(self, 0)
     }
     #[doc = "Bit 1 - Parity Error Trap Enable for DSRAM1"]
     #[inline(always)]
-    #[must_use]
     pub fn peteds1(&mut self) -> PETEDS1_W<PETE_SPEC> {
         PETEDS1_W::new(self, 1)
     }
     #[doc = "Bit 8 - Parity Error Trap Enable for USIC0 Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peteu0(&mut self) -> PETEU0_W<PETE_SPEC> {
         PETEU0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Parity Error Trap Enable for USIC1 Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peteu1(&mut self) -> PETEU1_W<PETE_SPEC> {
         PETEU1_W::new(self, 9)
     }
     #[doc = "Bit 12 - Parity Error Trap Enable for MultiCAN Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn petemc(&mut self) -> PETEMC_W<PETE_SPEC> {
         PETEMC_W::new(self, 12)
     }
     #[doc = "Bit 13 - Parity Error Trap Enable for PMU Prefetch Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn petepprf(&mut self) -> PETEPPRF_W<PETE_SPEC> {
         PETEPPRF_W::new(self, 13)
     }
     #[doc = "Bit 16 - Parity Error Trap Enable for USB Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn peteusb(&mut self) -> PETEUSB_W<PETE_SPEC> {
         PETEUSB_W::new(self, 16)
     }
diff --git a/src/scu_parity/pmtpr.rs b/src/scu_parity/pmtpr.rs
index 572d76f6..4c9634f0 100644
--- a/src/scu_parity/pmtpr.rs
+++ b/src/scu_parity/pmtpr.rs
@@ -23,7 +23,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Parity Write Values for Memory Test"]
     #[inline(always)]
-    #[must_use]
     pub fn pwr(&mut self) -> PWR_W<PMTPR_SPEC> {
         PWR_W::new(self, 0)
     }
diff --git a/src/scu_parity/pmtsr.rs b/src/scu_parity/pmtsr.rs
index f89cc2a4..f4aa00cd 100644
--- a/src/scu_parity/pmtsr.rs
+++ b/src/scu_parity/pmtsr.rs
@@ -413,43 +413,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Test Enable Control for PSRAM"]
     #[inline(always)]
-    #[must_use]
     pub fn mtenps(&mut self) -> MTENPS_W<PMTSR_SPEC> {
         MTENPS_W::new(self, 0)
     }
     #[doc = "Bit 1 - Test Enable Control for DSRAM1"]
     #[inline(always)]
-    #[must_use]
     pub fn mtends1(&mut self) -> MTENDS1_W<PMTSR_SPEC> {
         MTENDS1_W::new(self, 1)
     }
     #[doc = "Bit 8 - Test Enable Control for USIC0 Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn mteu0(&mut self) -> MTEU0_W<PMTSR_SPEC> {
         MTEU0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Test Enable Control for USIC1 Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn mteu1(&mut self) -> MTEU1_W<PMTSR_SPEC> {
         MTEU1_W::new(self, 9)
     }
     #[doc = "Bit 12 - Test Enable Control for MultiCAN Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn mtemc(&mut self) -> MTEMC_W<PMTSR_SPEC> {
         MTEMC_W::new(self, 12)
     }
     #[doc = "Bit 13 - Test Enable Control for PMU Prefetch Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn mtepprf(&mut self) -> MTEPPRF_W<PMTSR_SPEC> {
         MTEPPRF_W::new(self, 13)
     }
     #[doc = "Bit 16 - Test Enable Control for USB Memory"]
     #[inline(always)]
-    #[must_use]
     pub fn mtusb(&mut self) -> MTUSB_W<PMTSR_SPEC> {
         MTUSB_W::new(self, 16)
     }
diff --git a/src/scu_pll/pllcon0.rs b/src/scu_pll/pllcon0.rs
index 4c39c485..638c6fb6 100644
--- a/src/scu_pll/pllcon0.rs
+++ b/src/scu_pll/pllcon0.rs
@@ -531,61 +531,51 @@ impl R {
 impl W {
     #[doc = "Bit 0 - VCO Bypass"]
     #[inline(always)]
-    #[must_use]
     pub fn vcobyp(&mut self) -> VCOBYP_W<PLLCON0_SPEC> {
         VCOBYP_W::new(self, 0)
     }
     #[doc = "Bit 1 - VCO Power Saving Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn vcopwd(&mut self) -> VCOPWD_W<PLLCON0_SPEC> {
         VCOPWD_W::new(self, 1)
     }
     #[doc = "Bit 2 - VCO Trim Control"]
     #[inline(always)]
-    #[must_use]
     pub fn vcotr(&mut self) -> VCOTR_W<PLLCON0_SPEC> {
         VCOTR_W::new(self, 2)
     }
     #[doc = "Bit 4 - Disconnect Oscillator from VCO"]
     #[inline(always)]
-    #[must_use]
     pub fn findis(&mut self) -> FINDIS_W<PLLCON0_SPEC> {
         FINDIS_W::new(self, 4)
     }
     #[doc = "Bit 6 - Oscillator Disconnect Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W<PLLCON0_SPEC> {
         OSCDISCDIS_W::new(self, 6)
     }
     #[doc = "Bit 16 - PLL Power Saving Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn pllpwd(&mut self) -> PLLPWD_W<PLLCON0_SPEC> {
         PLLPWD_W::new(self, 16)
     }
     #[doc = "Bit 17 - Oscillator Watchdog Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn oscres(&mut self) -> OSCRES_W<PLLCON0_SPEC> {
         OSCRES_W::new(self, 17)
     }
     #[doc = "Bit 18 - Restart VCO Lock Detection"]
     #[inline(always)]
-    #[must_use]
     pub fn resld(&mut self) -> RESLD_W<PLLCON0_SPEC> {
         RESLD_W::new(self, 18)
     }
     #[doc = "Bit 19 - Automatic Oscillator Calibration Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn aotren(&mut self) -> AOTREN_W<PLLCON0_SPEC> {
         AOTREN_W::new(self, 19)
     }
     #[doc = "Bit 20 - Factory Oscillator Calibration"]
     #[inline(always)]
-    #[must_use]
     pub fn fotr(&mut self) -> FOTR_W<PLLCON0_SPEC> {
         FOTR_W::new(self, 20)
     }
diff --git a/src/scu_pll/pllcon1.rs b/src/scu_pll/pllcon1.rs
index 4fb0e51f..17d9d09c 100644
--- a/src/scu_pll/pllcon1.rs
+++ b/src/scu_pll/pllcon1.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:6 - K1-Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn k1div(&mut self) -> K1DIV_W<PLLCON1_SPEC> {
         K1DIV_W::new(self, 0)
     }
     #[doc = "Bits 8:14 - N-Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ndiv(&mut self) -> NDIV_W<PLLCON1_SPEC> {
         NDIV_W::new(self, 8)
     }
     #[doc = "Bits 16:22 - K2-Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn k2div(&mut self) -> K2DIV_W<PLLCON1_SPEC> {
         K2DIV_W::new(self, 16)
     }
     #[doc = "Bits 24:27 - P-Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn pdiv(&mut self) -> PDIV_W<PLLCON1_SPEC> {
         PDIV_W::new(self, 24)
     }
diff --git a/src/scu_pll/pllcon2.rs b/src/scu_pll/pllcon2.rs
index fbb23ced..2de8e9e7 100644
--- a/src/scu_pll/pllcon2.rs
+++ b/src/scu_pll/pllcon2.rs
@@ -123,13 +123,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - P-Divider Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn pinsel(&mut self) -> PINSEL_W<PLLCON2_SPEC> {
         PINSEL_W::new(self, 0)
     }
     #[doc = "Bit 8 - K1-Divider Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn k1insel(&mut self) -> K1INSEL_W<PLLCON2_SPEC> {
         K1INSEL_W::new(self, 8)
     }
diff --git a/src/scu_pll/usbpllcon.rs b/src/scu_pll/usbpllcon.rs
index 419976b1..e19907b6 100644
--- a/src/scu_pll/usbpllcon.rs
+++ b/src/scu_pll/usbpllcon.rs
@@ -375,55 +375,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - VCO Bypass"]
     #[inline(always)]
-    #[must_use]
     pub fn vcobyp(&mut self) -> VCOBYP_W<USBPLLCON_SPEC> {
         VCOBYP_W::new(self, 0)
     }
     #[doc = "Bit 1 - VCO Power Saving Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn vcopwd(&mut self) -> VCOPWD_W<USBPLLCON_SPEC> {
         VCOPWD_W::new(self, 1)
     }
     #[doc = "Bit 2 - VCO Trim Control"]
     #[inline(always)]
-    #[must_use]
     pub fn vcotr(&mut self) -> VCOTR_W<USBPLLCON_SPEC> {
         VCOTR_W::new(self, 2)
     }
     #[doc = "Bit 4 - Disconnect Oscillator from VCO"]
     #[inline(always)]
-    #[must_use]
     pub fn findis(&mut self) -> FINDIS_W<USBPLLCON_SPEC> {
         FINDIS_W::new(self, 4)
     }
     #[doc = "Bit 6 - Oscillator Disconnect Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W<USBPLLCON_SPEC> {
         OSCDISCDIS_W::new(self, 6)
     }
     #[doc = "Bits 8:14 - N-Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ndiv(&mut self) -> NDIV_W<USBPLLCON_SPEC> {
         NDIV_W::new(self, 8)
     }
     #[doc = "Bit 16 - PLL Power Saving Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn pllpwd(&mut self) -> PLLPWD_W<USBPLLCON_SPEC> {
         PLLPWD_W::new(self, 16)
     }
     #[doc = "Bit 18 - Restart VCO Lock Detection"]
     #[inline(always)]
-    #[must_use]
     pub fn resld(&mut self) -> RESLD_W<USBPLLCON_SPEC> {
         RESLD_W::new(self, 18)
     }
     #[doc = "Bits 24:27 - P-Divider Value"]
     #[inline(always)]
-    #[must_use]
     pub fn pdiv(&mut self) -> PDIV_W<USBPLLCON_SPEC> {
         PDIV_W::new(self, 24)
     }
diff --git a/src/scu_power/pwrclr.rs b/src/scu_power/pwrclr.rs
index 260e5a5b..898f5d74 100644
--- a/src/scu_power/pwrclr.rs
+++ b/src/scu_power/pwrclr.rs
@@ -96,19 +96,16 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Disable Hibernate Domain"]
     #[inline(always)]
-    #[must_use]
     pub fn hib(&mut self) -> HIB_W<PWRCLR_SPEC> {
         HIB_W::new(self, 0)
     }
     #[doc = "Bit 16 - Clear USB PHY Transceiver Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn usbphypdq(&mut self) -> USBPHYPDQ_W<PWRCLR_SPEC> {
         USBPHYPDQ_W::new(self, 16)
     }
     #[doc = "Bit 18 - Clear USB Weak Pull-Up at PADN Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn usbpuwq(&mut self) -> USBPUWQ_W<PWRCLR_SPEC> {
         USBPUWQ_W::new(self, 18)
     }
diff --git a/src/scu_power/pwrmon.rs b/src/scu_power/pwrmon.rs
index 116c6e8a..724d1cea 100644
--- a/src/scu_power/pwrmon.rs
+++ b/src/scu_power/pwrmon.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Threshold"]
     #[inline(always)]
-    #[must_use]
     pub fn thrs(&mut self) -> THRS_W<PWRMON_SPEC> {
         THRS_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Interval"]
     #[inline(always)]
-    #[must_use]
     pub fn intv(&mut self) -> INTV_W<PWRMON_SPEC> {
         INTV_W::new(self, 8)
     }
     #[doc = "Bit 16 - Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn enb(&mut self) -> ENB_W<PWRMON_SPEC> {
         ENB_W::new(self, 16)
     }
diff --git a/src/scu_power/pwrset.rs b/src/scu_power/pwrset.rs
index aaa00bd9..d753e7df 100644
--- a/src/scu_power/pwrset.rs
+++ b/src/scu_power/pwrset.rs
@@ -96,19 +96,16 @@ where
 impl W {
     #[doc = "Bit 0 - Set Hibernate Domain Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn hib(&mut self) -> HIB_W<PWRSET_SPEC> {
         HIB_W::new(self, 0)
     }
     #[doc = "Bit 16 - Set USB PHY Transceiver Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn usbphypdq(&mut self) -> USBPHYPDQ_W<PWRSET_SPEC> {
         USBPHYPDQ_W::new(self, 16)
     }
     #[doc = "Bit 18 - Set USB Weak Pull-Up at PADN Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn usbpuwq(&mut self) -> USBPUWQ_W<PWRSET_SPEC> {
         USBPUWQ_W::new(self, 18)
     }
diff --git a/src/scu_reset/prclr0.rs b/src/scu_reset/prclr0.rs
index 8e38faf9..882ee64a 100644
--- a/src/scu_reset/prclr0.rs
+++ b/src/scu_reset/prclr0.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - VADC Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn vadcrs(&mut self) -> VADCRS_W<PRCLR0_SPEC> {
         VADCRS_W::new(self, 0)
     }
     #[doc = "Bit 2 - CCU40 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu40rs(&mut self) -> CCU40RS_W<PRCLR0_SPEC> {
         CCU40RS_W::new(self, 2)
     }
     #[doc = "Bit 3 - CCU41 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu41rs(&mut self) -> CCU41RS_W<PRCLR0_SPEC> {
         CCU41RS_W::new(self, 3)
     }
     #[doc = "Bit 7 - CCU80 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu80rs(&mut self) -> CCU80RS_W<PRCLR0_SPEC> {
         CCU80RS_W::new(self, 7)
     }
     #[doc = "Bit 9 - POSIF0 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn posif0rs(&mut self) -> POSIF0RS_W<PRCLR0_SPEC> {
         POSIF0RS_W::new(self, 9)
     }
     #[doc = "Bit 11 - USIC0 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn usic0rs(&mut self) -> USIC0RS_W<PRCLR0_SPEC> {
         USIC0RS_W::new(self, 11)
     }
     #[doc = "Bit 16 - ERU1 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn eru1rs(&mut self) -> ERU1RS_W<PRCLR0_SPEC> {
         ERU1RS_W::new(self, 16)
     }
     #[doc = "Bit 23 - HRPWM0 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn hrpwm0rs(&mut self) -> HRPWM0RS_W<PRCLR0_SPEC> {
         HRPWM0RS_W::new(self, 23)
     }
diff --git a/src/scu_reset/prclr1.rs b/src/scu_reset/prclr1.rs
index cd709aaa..528d0a92 100644
--- a/src/scu_reset/prclr1.rs
+++ b/src/scu_reset/prclr1.rs
@@ -158,31 +158,26 @@ where
 impl W {
     #[doc = "Bit 3 - LEDTS Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W<PRCLR1_SPEC> {
         LEDTSCU0RS_W::new(self, 3)
     }
     #[doc = "Bit 4 - MultiCAN Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn mcan0rs(&mut self) -> MCAN0RS_W<PRCLR1_SPEC> {
         MCAN0RS_W::new(self, 4)
     }
     #[doc = "Bit 5 - DAC Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn dacrs(&mut self) -> DACRS_W<PRCLR1_SPEC> {
         DACRS_W::new(self, 5)
     }
     #[doc = "Bit 7 - USIC1 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn usic1rs(&mut self) -> USIC1RS_W<PRCLR1_SPEC> {
         USIC1RS_W::new(self, 7)
     }
     #[doc = "Bit 9 - PORTS Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn pportsrs(&mut self) -> PPORTSRS_W<PRCLR1_SPEC> {
         PPORTSRS_W::new(self, 9)
     }
diff --git a/src/scu_reset/prclr2.rs b/src/scu_reset/prclr2.rs
index f58f569c..ca4bf4e8 100644
--- a/src/scu_reset/prclr2.rs
+++ b/src/scu_reset/prclr2.rs
@@ -127,25 +127,21 @@ where
 impl W {
     #[doc = "Bit 1 - WDT Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtrs(&mut self) -> WDTRS_W<PRCLR2_SPEC> {
         WDTRS_W::new(self, 1)
     }
     #[doc = "Bit 4 - DMA0 Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn dma0rs(&mut self) -> DMA0RS_W<PRCLR2_SPEC> {
         DMA0RS_W::new(self, 4)
     }
     #[doc = "Bit 6 - FCE Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn fcers(&mut self) -> FCERS_W<PRCLR2_SPEC> {
         FCERS_W::new(self, 6)
     }
     #[doc = "Bit 7 - USB Reset Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn usbrs(&mut self) -> USBRS_W<PRCLR2_SPEC> {
         USBRS_W::new(self, 7)
     }
diff --git a/src/scu_reset/prset0.rs b/src/scu_reset/prset0.rs
index 740a76e5..01dea986 100644
--- a/src/scu_reset/prset0.rs
+++ b/src/scu_reset/prset0.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - VADC Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn vadcrs(&mut self) -> VADCRS_W<PRSET0_SPEC> {
         VADCRS_W::new(self, 0)
     }
     #[doc = "Bit 2 - CCU40 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu40rs(&mut self) -> CCU40RS_W<PRSET0_SPEC> {
         CCU40RS_W::new(self, 2)
     }
     #[doc = "Bit 3 - CCU41 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu41rs(&mut self) -> CCU41RS_W<PRSET0_SPEC> {
         CCU41RS_W::new(self, 3)
     }
     #[doc = "Bit 7 - CCU80 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn ccu80rs(&mut self) -> CCU80RS_W<PRSET0_SPEC> {
         CCU80RS_W::new(self, 7)
     }
     #[doc = "Bit 9 - POSIF0 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn posif0rs(&mut self) -> POSIF0RS_W<PRSET0_SPEC> {
         POSIF0RS_W::new(self, 9)
     }
     #[doc = "Bit 11 - USIC0 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn usic0rs(&mut self) -> USIC0RS_W<PRSET0_SPEC> {
         USIC0RS_W::new(self, 11)
     }
     #[doc = "Bit 16 - ERU1 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn eru1rs(&mut self) -> ERU1RS_W<PRSET0_SPEC> {
         ERU1RS_W::new(self, 16)
     }
     #[doc = "Bit 23 - HRPWM0 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn hrpwm0rs(&mut self) -> HRPWM0RS_W<PRSET0_SPEC> {
         HRPWM0RS_W::new(self, 23)
     }
diff --git a/src/scu_reset/prset1.rs b/src/scu_reset/prset1.rs
index 112f0e1d..b022d52c 100644
--- a/src/scu_reset/prset1.rs
+++ b/src/scu_reset/prset1.rs
@@ -158,31 +158,26 @@ where
 impl W {
     #[doc = "Bit 3 - LEDTS Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W<PRSET1_SPEC> {
         LEDTSCU0RS_W::new(self, 3)
     }
     #[doc = "Bit 4 - MultiCAN Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn mcan0rs(&mut self) -> MCAN0RS_W<PRSET1_SPEC> {
         MCAN0RS_W::new(self, 4)
     }
     #[doc = "Bit 5 - DAC Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn dacrs(&mut self) -> DACRS_W<PRSET1_SPEC> {
         DACRS_W::new(self, 5)
     }
     #[doc = "Bit 7 - USIC1 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn usic1rs(&mut self) -> USIC1RS_W<PRSET1_SPEC> {
         USIC1RS_W::new(self, 7)
     }
     #[doc = "Bit 9 - PORTS Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn pportsrs(&mut self) -> PPORTSRS_W<PRSET1_SPEC> {
         PPORTSRS_W::new(self, 9)
     }
diff --git a/src/scu_reset/prset2.rs b/src/scu_reset/prset2.rs
index ec770847..2aae1785 100644
--- a/src/scu_reset/prset2.rs
+++ b/src/scu_reset/prset2.rs
@@ -127,25 +127,21 @@ where
 impl W {
     #[doc = "Bit 1 - WDT Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn wdtrs(&mut self) -> WDTRS_W<PRSET2_SPEC> {
         WDTRS_W::new(self, 1)
     }
     #[doc = "Bit 4 - DMA0 Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn dma0rs(&mut self) -> DMA0RS_W<PRSET2_SPEC> {
         DMA0RS_W::new(self, 4)
     }
     #[doc = "Bit 6 - FCE Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn fcers(&mut self) -> FCERS_W<PRSET2_SPEC> {
         FCERS_W::new(self, 6)
     }
     #[doc = "Bit 7 - USB Reset Assert"]
     #[inline(always)]
-    #[must_use]
     pub fn usbrs(&mut self) -> USBRS_W<PRSET2_SPEC> {
         USBRS_W::new(self, 7)
     }
diff --git a/src/scu_reset/rstclr.rs b/src/scu_reset/rstclr.rs
index 0175d07c..fd23e612 100644
--- a/src/scu_reset/rstclr.rs
+++ b/src/scu_reset/rstclr.rs
@@ -127,25 +127,21 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Reset Status"]
     #[inline(always)]
-    #[must_use]
     pub fn rsclr(&mut self) -> RSCLR_W<RSTCLR_SPEC> {
         RSCLR_W::new(self, 0)
     }
     #[doc = "Bit 8 - Clear Hibernate Wake-up Reset Status"]
     #[inline(always)]
-    #[must_use]
     pub fn hibwk(&mut self) -> HIBWK_W<RSTCLR_SPEC> {
         HIBWK_W::new(self, 8)
     }
     #[doc = "Bit 9 - Clear Hibernate Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn hibrs(&mut self) -> HIBRS_W<RSTCLR_SPEC> {
         HIBRS_W::new(self, 9)
     }
     #[doc = "Bit 10 - Enable Lockup Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn lcken(&mut self) -> LCKEN_W<RSTCLR_SPEC> {
         LCKEN_W::new(self, 10)
     }
diff --git a/src/scu_reset/rstset.rs b/src/scu_reset/rstset.rs
index 9af87b8a..6be7299e 100644
--- a/src/scu_reset/rstset.rs
+++ b/src/scu_reset/rstset.rs
@@ -96,19 +96,16 @@ where
 impl W {
     #[doc = "Bit 8 - Set Hibernate Wake-up Reset Status"]
     #[inline(always)]
-    #[must_use]
     pub fn hibwk(&mut self) -> HIBWK_W<RSTSET_SPEC> {
         HIBWK_W::new(self, 8)
     }
     #[doc = "Bit 9 - Set Hibernate Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn hibrs(&mut self) -> HIBRS_W<RSTSET_SPEC> {
         HIBRS_W::new(self, 9)
     }
     #[doc = "Bit 10 - Enable Lockup Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn lcken(&mut self) -> LCKEN_W<RSTSET_SPEC> {
         LCKEN_W::new(self, 10)
     }
diff --git a/src/scu_trap/trapclr.rs b/src/scu_trap/trapclr.rs
index 9f802bf2..963d7389 100644
--- a/src/scu_trap/trapclr.rs
+++ b/src/scu_trap/trapclr.rs
@@ -313,61 +313,51 @@ where
 impl W {
     #[doc = "Bit 0 - System OSC WDT Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn soscwdgt(&mut self) -> SOSCWDGT_W<TRAPCLR_SPEC> {
         SOSCWDGT_W::new(self, 0)
     }
     #[doc = "Bit 2 - System VCO Lock Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn svcolckt(&mut self) -> SVCOLCKT_W<TRAPCLR_SPEC> {
         SVCOLCKT_W::new(self, 2)
     }
     #[doc = "Bit 3 - USB VCO Lock Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn uvcolckt(&mut self) -> UVCOLCKT_W<TRAPCLR_SPEC> {
         UVCOLCKT_W::new(self, 3)
     }
     #[doc = "Bit 4 - Parity Error Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn pet(&mut self) -> PET_W<TRAPCLR_SPEC> {
         PET_W::new(self, 4)
     }
     #[doc = "Bit 5 - Brown Out Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn brwnt(&mut self) -> BRWNT_W<TRAPCLR_SPEC> {
         BRWNT_W::new(self, 5)
     }
     #[doc = "Bit 6 - OSC_ULP WDG Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn ulpwdgt(&mut self) -> ULPWDGT_W<TRAPCLR_SPEC> {
         ULPWDGT_W::new(self, 6)
     }
     #[doc = "Bit 7 - Peripheral Bridge 0 Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn bwerr0t(&mut self) -> BWERR0T_W<TRAPCLR_SPEC> {
         BWERR0T_W::new(self, 7)
     }
     #[doc = "Bit 8 - Peripheral Bridge 1 Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn bwerr1t(&mut self) -> BWERR1T_W<TRAPCLR_SPEC> {
         BWERR1T_W::new(self, 8)
     }
     #[doc = "Bit 12 - Die Temperature Too High Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn temphit(&mut self) -> TEMPHIT_W<TRAPCLR_SPEC> {
         TEMPHIT_W::new(self, 12)
     }
     #[doc = "Bit 13 - Die Temperature Too Low Trap Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn templot(&mut self) -> TEMPLOT_W<TRAPCLR_SPEC> {
         TEMPLOT_W::new(self, 13)
     }
diff --git a/src/scu_trap/trapdis.rs b/src/scu_trap/trapdis.rs
index 660819b8..846ceb23 100644
--- a/src/scu_trap/trapdis.rs
+++ b/src/scu_trap/trapdis.rs
@@ -587,61 +587,51 @@ impl R {
 impl W {
     #[doc = "Bit 0 - System OSC WDT Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn soscwdgt(&mut self) -> SOSCWDGT_W<TRAPDIS_SPEC> {
         SOSCWDGT_W::new(self, 0)
     }
     #[doc = "Bit 2 - System VCO Lock Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn svcolckt(&mut self) -> SVCOLCKT_W<TRAPDIS_SPEC> {
         SVCOLCKT_W::new(self, 2)
     }
     #[doc = "Bit 3 - USB VCO Lock Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn uvcolckt(&mut self) -> UVCOLCKT_W<TRAPDIS_SPEC> {
         UVCOLCKT_W::new(self, 3)
     }
     #[doc = "Bit 4 - Parity Error Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn pet(&mut self) -> PET_W<TRAPDIS_SPEC> {
         PET_W::new(self, 4)
     }
     #[doc = "Bit 5 - Brown Out Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn brwnt(&mut self) -> BRWNT_W<TRAPDIS_SPEC> {
         BRWNT_W::new(self, 5)
     }
     #[doc = "Bit 6 - Wake-up Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn ulpwdgt(&mut self) -> ULPWDGT_W<TRAPDIS_SPEC> {
         ULPWDGT_W::new(self, 6)
     }
     #[doc = "Bit 7 - Peripheral Bridge 0 Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn bwerr0t(&mut self) -> BWERR0T_W<TRAPDIS_SPEC> {
         BWERR0T_W::new(self, 7)
     }
     #[doc = "Bit 8 - Peripheral Bridge 1 Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn bwerr1t(&mut self) -> BWERR1T_W<TRAPDIS_SPEC> {
         BWERR1T_W::new(self, 8)
     }
     #[doc = "Bit 12 - Die Temperature Too High Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn temphit(&mut self) -> TEMPHIT_W<TRAPDIS_SPEC> {
         TEMPHIT_W::new(self, 12)
     }
     #[doc = "Bit 13 - Die Temperature Too Low Trap Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn templot(&mut self) -> TEMPLOT_W<TRAPDIS_SPEC> {
         TEMPLOT_W::new(self, 13)
     }
diff --git a/src/scu_trap/trapset.rs b/src/scu_trap/trapset.rs
index 6b22c114..0f7bbc54 100644
--- a/src/scu_trap/trapset.rs
+++ b/src/scu_trap/trapset.rs
@@ -313,61 +313,51 @@ where
 impl W {
     #[doc = "Bit 0 - System OSC WDT Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn soscwdgt(&mut self) -> SOSCWDGT_W<TRAPSET_SPEC> {
         SOSCWDGT_W::new(self, 0)
     }
     #[doc = "Bit 2 - System VCO Lock Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn svcolckt(&mut self) -> SVCOLCKT_W<TRAPSET_SPEC> {
         SVCOLCKT_W::new(self, 2)
     }
     #[doc = "Bit 3 - USB VCO Lock Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn uvcolckt(&mut self) -> UVCOLCKT_W<TRAPSET_SPEC> {
         UVCOLCKT_W::new(self, 3)
     }
     #[doc = "Bit 4 - Parity Error Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn pet(&mut self) -> PET_W<TRAPSET_SPEC> {
         PET_W::new(self, 4)
     }
     #[doc = "Bit 5 - Brown Out Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn brwnt(&mut self) -> BRWNT_W<TRAPSET_SPEC> {
         BRWNT_W::new(self, 5)
     }
     #[doc = "Bit 6 - OSC_ULP WDG Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn ulpwdt(&mut self) -> ULPWDT_W<TRAPSET_SPEC> {
         ULPWDT_W::new(self, 6)
     }
     #[doc = "Bit 7 - Peripheral Bridge 0 Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn bwerr0t(&mut self) -> BWERR0T_W<TRAPSET_SPEC> {
         BWERR0T_W::new(self, 7)
     }
     #[doc = "Bit 8 - Peripheral Bridge 1 Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn bwerr1t(&mut self) -> BWERR1T_W<TRAPSET_SPEC> {
         BWERR1T_W::new(self, 8)
     }
     #[doc = "Bit 12 - Die Temperature Too High Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn temphit(&mut self) -> TEMPHIT_W<TRAPSET_SPEC> {
         TEMPHIT_W::new(self, 12)
     }
     #[doc = "Bit 13 - Die Temperature Too Low Trap Set"]
     #[inline(always)]
-    #[must_use]
     pub fn templot(&mut self) -> TEMPLOT_W<TRAPSET_SPEC> {
         TEMPLOT_W::new(self, 13)
     }
diff --git a/src/usb0/daintmsk.rs b/src/usb0/daintmsk.rs
index e3088800..2c129327 100644
--- a/src/usb0/daintmsk.rs
+++ b/src/usb0/daintmsk.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN EP Interrupt Mask Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn in_ep_msk(&mut self) -> IN_EP_MSK_W<DAINTMSK_SPEC> {
         IN_EP_MSK_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - OUT EP Interrupt Mask Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn out_ep_msk(&mut self) -> OUT_EP_MSK_W<DAINTMSK_SPEC> {
         OUT_EP_MSK_W::new(self, 16)
     }
diff --git a/src/usb0/dcfg.rs b/src/usb0/dcfg.rs
index 819c4424..890eaa63 100644
--- a/src/usb0/dcfg.rs
+++ b/src/usb0/dcfg.rs
@@ -304,37 +304,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Device Speed"]
     #[inline(always)]
-    #[must_use]
     pub fn dev_spd(&mut self) -> DEV_SPD_W<DCFG_SPEC> {
         DEV_SPD_W::new(self, 0)
     }
     #[doc = "Bit 2 - Non-Zero-Length Status OUT Handshake"]
     #[inline(always)]
-    #[must_use]
     pub fn nzsts_outhshk(&mut self) -> NZSTS_OUTHSHK_W<DCFG_SPEC> {
         NZSTS_OUTHSHK_W::new(self, 2)
     }
     #[doc = "Bits 4:10 - Device Address"]
     #[inline(always)]
-    #[must_use]
     pub fn dev_addr(&mut self) -> DEV_ADDR_W<DCFG_SPEC> {
         DEV_ADDR_W::new(self, 4)
     }
     #[doc = "Bits 11:12 - Periodic Frame Interval"]
     #[inline(always)]
-    #[must_use]
     pub fn per_fr_int(&mut self) -> PER_FR_INT_W<DCFG_SPEC> {
         PER_FR_INT_W::new(self, 11)
     }
     #[doc = "Bit 23 - Enable Scatter/Gather DMA in Device mode."]
     #[inline(always)]
-    #[must_use]
     pub fn desc_dma(&mut self) -> DESC_DMA_W<DCFG_SPEC> {
         DESC_DMA_W::new(self, 23)
     }
     #[doc = "Bits 24:25 - Periodic Scheduling Interval"]
     #[inline(always)]
-    #[must_use]
     pub fn per_sch_intvl(&mut self) -> PER_SCH_INTVL_W<DCFG_SPEC> {
         PER_SCH_INTVL_W::new(self, 24)
     }
diff --git a/src/usb0/dctl.rs b/src/usb0/dctl.rs
index 2d80dd3f..66195685 100644
--- a/src/usb0/dctl.rs
+++ b/src/usb0/dctl.rs
@@ -380,61 +380,51 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Remote Wakeup Signaling"]
     #[inline(always)]
-    #[must_use]
     pub fn rmt_wk_up_sig(&mut self) -> RMT_WK_UP_SIG_W<DCTL_SPEC> {
         RMT_WK_UP_SIG_W::new(self, 0)
     }
     #[doc = "Bit 1 - Soft Disconnect"]
     #[inline(always)]
-    #[must_use]
     pub fn sft_discon(&mut self) -> SFT_DISCON_W<DCTL_SPEC> {
         SFT_DISCON_W::new(self, 1)
     }
     #[doc = "Bit 7 - Set Global Non-periodic IN NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn sgnpin_nak(&mut self) -> SGNPIN_NAK_W<DCTL_SPEC> {
         SGNPIN_NAK_W::new(self, 7)
     }
     #[doc = "Bit 8 - Clear Global Non-periodic IN NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn cgnpin_nak(&mut self) -> CGNPIN_NAK_W<DCTL_SPEC> {
         CGNPIN_NAK_W::new(self, 8)
     }
     #[doc = "Bit 9 - Set Global OUT NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn sgoutnak(&mut self) -> SGOUTNAK_W<DCTL_SPEC> {
         SGOUTNAK_W::new(self, 9)
     }
     #[doc = "Bit 10 - Clear Global OUT NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn cgoutnak(&mut self) -> CGOUTNAK_W<DCTL_SPEC> {
         CGOUTNAK_W::new(self, 10)
     }
     #[doc = "Bits 13:14 - Global Multi Count"]
     #[inline(always)]
-    #[must_use]
     pub fn gmc(&mut self) -> GMC_W<DCTL_SPEC> {
         GMC_W::new(self, 13)
     }
     #[doc = "Bit 15 - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"]
     #[inline(always)]
-    #[must_use]
     pub fn ignr_frm_num(&mut self) -> IGNR_FRM_NUM_W<DCTL_SPEC> {
         IGNR_FRM_NUM_W::new(self, 15)
     }
     #[doc = "Bit 16 - Set NAK automatically on babble"]
     #[inline(always)]
-    #[must_use]
     pub fn nak_on_bble(&mut self) -> NAK_ON_BBLE_W<DCTL_SPEC> {
         NAK_ON_BBLE_W::new(self, 16)
     }
     #[doc = "Bit 17 - Enable continue on BNA"]
     #[inline(always)]
-    #[must_use]
     pub fn en_cont_on_bna(&mut self) -> EN_CONT_ON_BNA_W<DCTL_SPEC> {
         EN_CONT_ON_BNA_W::new(self, 17)
     }
diff --git a/src/usb0/diepempmsk.rs b/src/usb0/diepempmsk.rs
index c9acf879..4fa70c78 100644
--- a/src/usb0/diepempmsk.rs
+++ b/src/usb0/diepempmsk.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN EP Tx FIFO Empty Interrupt Mask Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn in_ep_txf_emp_msk(&mut self) -> IN_EP_TXF_EMP_MSK_W<DIEPEMPMSK_SPEC> {
         IN_EP_TXF_EMP_MSK_W::new(self, 0)
     }
diff --git a/src/usb0/diepmsk.rs b/src/usb0/diepmsk.rs
index 3804c2b1..71c78402 100644
--- a/src/usb0/diepmsk.rs
+++ b/src/usb0/diepmsk.rs
@@ -88,55 +88,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transfer Completed Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W<DIEPMSK_SPEC> {
         XFER_COMPL_MSK_W::new(self, 0)
     }
     #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn epdisbld_msk(&mut self) -> EPDISBLD_MSK_W<DIEPMSK_SPEC> {
         EPDISBLD_MSK_W::new(self, 1)
     }
     #[doc = "Bit 2 - AHB Error Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W<DIEPMSK_SPEC> {
         AHBERR_MSK_W::new(self, 2)
     }
     #[doc = "Bit 3 - Timeout Condition Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn time_outmsk(&mut self) -> TIME_OUTMSK_W<DIEPMSK_SPEC> {
         TIME_OUTMSK_W::new(self, 3)
     }
     #[doc = "Bit 4 - IN Token Received When TxFIFO Empty Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn intkn_txfemp_msk(&mut self) -> INTKN_TXFEMP_MSK_W<DIEPMSK_SPEC> {
         INTKN_TXFEMP_MSK_W::new(self, 4)
     }
     #[doc = "Bit 6 - IN Endpoint NAK Effective Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn inepnak_eff_msk(&mut self) -> INEPNAK_EFF_MSK_W<DIEPMSK_SPEC> {
         INEPNAK_EFF_MSK_W::new(self, 6)
     }
     #[doc = "Bit 8 - Fifo Underrun Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn txfifo_undrn_msk(&mut self) -> TXFIFO_UNDRN_MSK_W<DIEPMSK_SPEC> {
         TXFIFO_UNDRN_MSK_W::new(self, 8)
     }
     #[doc = "Bit 9 - BNA Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn bnain_intr_msk(&mut self) -> BNAIN_INTR_MSK_W<DIEPMSK_SPEC> {
         BNAIN_INTR_MSK_W::new(self, 9)
     }
     #[doc = "Bit 13 - NAK interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn nakmsk(&mut self) -> NAKMSK_W<DIEPMSK_SPEC> {
         NAKMSK_W::new(self, 13)
     }
diff --git a/src/usb0/dieptxf1.rs b/src/usb0/dieptxf1.rs
index a1f74c39..061783cc 100644
--- a/src/usb0/dieptxf1.rs
+++ b/src/usb0/dieptxf1.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W<DIEPTXF1_SPEC> {
         INEPN_TX_FST_ADDR_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W<DIEPTXF1_SPEC> {
         INEPN_TX_FDEP_W::new(self, 16)
     }
diff --git a/src/usb0/dieptxf2.rs b/src/usb0/dieptxf2.rs
index 6e5b2512..d2cbe3ca 100644
--- a/src/usb0/dieptxf2.rs
+++ b/src/usb0/dieptxf2.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W<DIEPTXF2_SPEC> {
         INEPN_TX_FST_ADDR_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W<DIEPTXF2_SPEC> {
         INEPN_TX_FDEP_W::new(self, 16)
     }
diff --git a/src/usb0/dieptxf3.rs b/src/usb0/dieptxf3.rs
index c7b6a5de..0d590fe3 100644
--- a/src/usb0/dieptxf3.rs
+++ b/src/usb0/dieptxf3.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W<DIEPTXF3_SPEC> {
         INEPN_TX_FST_ADDR_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W<DIEPTXF3_SPEC> {
         INEPN_TX_FDEP_W::new(self, 16)
     }
diff --git a/src/usb0/dieptxf4.rs b/src/usb0/dieptxf4.rs
index 1ad58acb..27b2dfc6 100644
--- a/src/usb0/dieptxf4.rs
+++ b/src/usb0/dieptxf4.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W<DIEPTXF4_SPEC> {
         INEPN_TX_FST_ADDR_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W<DIEPTXF4_SPEC> {
         INEPN_TX_FDEP_W::new(self, 16)
     }
diff --git a/src/usb0/dieptxf5.rs b/src/usb0/dieptxf5.rs
index e8e6d41d..2e6f1087 100644
--- a/src/usb0/dieptxf5.rs
+++ b/src/usb0/dieptxf5.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W<DIEPTXF5_SPEC> {
         INEPN_TX_FST_ADDR_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W<DIEPTXF5_SPEC> {
         INEPN_TX_FDEP_W::new(self, 16)
     }
diff --git a/src/usb0/dieptxf6.rs b/src/usb0/dieptxf6.rs
index e8259d60..e2d66a2e 100644
--- a/src/usb0/dieptxf6.rs
+++ b/src/usb0/dieptxf6.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W<DIEPTXF6_SPEC> {
         INEPN_TX_FST_ADDR_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"]
     #[inline(always)]
-    #[must_use]
     pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W<DIEPTXF6_SPEC> {
         INEPN_TX_FDEP_W::new(self, 16)
     }
diff --git a/src/usb0/doepmsk.rs b/src/usb0/doepmsk.rs
index ba72e390..f97d18c6 100644
--- a/src/usb0/doepmsk.rs
+++ b/src/usb0/doepmsk.rs
@@ -106,67 +106,56 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transfer Completed Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W<DOEPMSK_SPEC> {
         XFER_COMPL_MSK_W::new(self, 0)
     }
     #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn epdisbld_msk(&mut self) -> EPDISBLD_MSK_W<DOEPMSK_SPEC> {
         EPDISBLD_MSK_W::new(self, 1)
     }
     #[doc = "Bit 2 - AHB Error"]
     #[inline(always)]
-    #[must_use]
     pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W<DOEPMSK_SPEC> {
         AHBERR_MSK_W::new(self, 2)
     }
     #[doc = "Bit 3 - SETUP Phase Done Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn set_upmsk(&mut self) -> SET_UPMSK_W<DOEPMSK_SPEC> {
         SET_UPMSK_W::new(self, 3)
     }
     #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn outtkn_epdis_msk(&mut self) -> OUTTKN_EPDIS_MSK_W<DOEPMSK_SPEC> {
         OUTTKN_EPDIS_MSK_W::new(self, 4)
     }
     #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W<DOEPMSK_SPEC> {
         BACK2BACK_SETUP_W::new(self, 6)
     }
     #[doc = "Bit 8 - OUT Packet Error Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn out_pkt_err_msk(&mut self) -> OUT_PKT_ERR_MSK_W<DOEPMSK_SPEC> {
         OUT_PKT_ERR_MSK_W::new(self, 8)
     }
     #[doc = "Bit 9 - BNA interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn bna_out_intr_msk(&mut self) -> BNA_OUT_INTR_MSK_W<DOEPMSK_SPEC> {
         BNA_OUT_INTR_MSK_W::new(self, 9)
     }
     #[doc = "Bit 12 - Babble Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn bble_err_msk(&mut self) -> BBLE_ERR_MSK_W<DOEPMSK_SPEC> {
         BBLE_ERR_MSK_W::new(self, 12)
     }
     #[doc = "Bit 13 - NAK Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn nakmsk(&mut self) -> NAKMSK_W<DOEPMSK_SPEC> {
         NAKMSK_W::new(self, 13)
     }
     #[doc = "Bit 14 - NYET Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn nyetmsk(&mut self) -> NYETMSK_W<DOEPMSK_SPEC> {
         NYETMSK_W::new(self, 14)
     }
diff --git a/src/usb0/dvbusdis.rs b/src/usb0/dvbusdis.rs
index f6df7d4a..7f270fdf 100644
--- a/src/usb0/dvbusdis.rs
+++ b/src/usb0/dvbusdis.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Device Vbus Discharge Time"]
     #[inline(always)]
-    #[must_use]
     pub fn dvbusdis(&mut self) -> DVBUSDIS_W<DVBUSDIS_SPEC> {
         DVBUSDIS_W::new(self, 0)
     }
diff --git a/src/usb0/dvbuspulse.rs b/src/usb0/dvbuspulse.rs
index 089b1bbd..11323868 100644
--- a/src/usb0/dvbuspulse.rs
+++ b/src/usb0/dvbuspulse.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - Device Vbus Pulsing Time"]
     #[inline(always)]
-    #[must_use]
     pub fn dvbuspulse(&mut self) -> DVBUSPULSE_W<DVBUSPULSE_SPEC> {
         DVBUSPULSE_W::new(self, 0)
     }
diff --git a/src/usb0/gahbcfg.rs b/src/usb0/gahbcfg.rs
index 1eef07b1..ae1aaac6 100644
--- a/src/usb0/gahbcfg.rs
+++ b/src/usb0/gahbcfg.rs
@@ -343,31 +343,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Global Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn glbl_intr_msk(&mut self) -> GLBL_INTR_MSK_W<GAHBCFG_SPEC> {
         GLBL_INTR_MSK_W::new(self, 0)
     }
     #[doc = "Bits 1:4 - Burst Length/Type"]
     #[inline(always)]
-    #[must_use]
     pub fn hbst_len(&mut self) -> HBST_LEN_W<GAHBCFG_SPEC> {
         HBST_LEN_W::new(self, 1)
     }
     #[doc = "Bit 5 - DMA Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dmaen(&mut self) -> DMAEN_W<GAHBCFG_SPEC> {
         DMAEN_W::new(self, 5)
     }
     #[doc = "Bit 7 - Non-Periodic TxFIFO Empty Level"]
     #[inline(always)]
-    #[must_use]
     pub fn nptx_femp_lvl(&mut self) -> NPTX_FEMP_LVL_W<GAHBCFG_SPEC> {
         NPTX_FEMP_LVL_W::new(self, 7)
     }
     #[doc = "Bit 23 - AHB Single Support"]
     #[inline(always)]
-    #[must_use]
     pub fn ahbsingle(&mut self) -> AHBSINGLE_W<GAHBCFG_SPEC> {
         AHBSINGLE_W::new(self, 23)
     }
diff --git a/src/usb0/gdfifocfg.rs b/src/usb0/gdfifocfg.rs
index 76f28f6c..736d5f7e 100644
--- a/src/usb0/gdfifocfg.rs
+++ b/src/usb0/gdfifocfg.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - GDFIFOCfg"]
     #[inline(always)]
-    #[must_use]
     pub fn gdfifocfg(&mut self) -> GDFIFOCFG_W<GDFIFOCFG_SPEC> {
         GDFIFOCFG_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - EPInfoBaseAddr"]
     #[inline(always)]
-    #[must_use]
     pub fn epinfo_base_addr(&mut self) -> EPINFO_BASE_ADDR_W<GDFIFOCFG_SPEC> {
         EPINFO_BASE_ADDR_W::new(self, 16)
     }
diff --git a/src/usb0/gintmsk.rs b/src/usb0/gintmsk.rs
index 9bc806b0..7e69aec2 100644
--- a/src/usb0/gintmsk.rs
+++ b/src/usb0/gintmsk.rs
@@ -142,91 +142,76 @@ impl R {
 impl W {
     #[doc = "Bit 3 - Start of Frame Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn sof_msk(&mut self) -> SOF_MSK_W<GINTMSK_SPEC> {
         SOF_MSK_W::new(self, 3)
     }
     #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn rx_flvl_msk(&mut self) -> RX_FLVL_MSK_W<GINTMSK_SPEC> {
         RX_FLVL_MSK_W::new(self, 4)
     }
     #[doc = "Bit 6 - Global Non-periodic IN NAK Effective Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn ginnak_eff_msk(&mut self) -> GINNAK_EFF_MSK_W<GINTMSK_SPEC> {
         GINNAK_EFF_MSK_W::new(self, 6)
     }
     #[doc = "Bit 7 - Global OUT NAK Effective Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn goutnak_eff_msk(&mut self) -> GOUTNAK_EFF_MSK_W<GINTMSK_SPEC> {
         GOUTNAK_EFF_MSK_W::new(self, 7)
     }
     #[doc = "Bit 10 - Early Suspend Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn erly_susp_msk(&mut self) -> ERLY_SUSP_MSK_W<GINTMSK_SPEC> {
         ERLY_SUSP_MSK_W::new(self, 10)
     }
     #[doc = "Bit 11 - USB Suspend Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn usbsusp_msk(&mut self) -> USBSUSP_MSK_W<GINTMSK_SPEC> {
         USBSUSP_MSK_W::new(self, 11)
     }
     #[doc = "Bit 12 - USB Reset Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn usbrst_msk(&mut self) -> USBRST_MSK_W<GINTMSK_SPEC> {
         USBRST_MSK_W::new(self, 12)
     }
     #[doc = "Bit 13 - Enumeration Done Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn enum_done_msk(&mut self) -> ENUM_DONE_MSK_W<GINTMSK_SPEC> {
         ENUM_DONE_MSK_W::new(self, 13)
     }
     #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn isoout_drop_msk(&mut self) -> ISOOUT_DROP_MSK_W<GINTMSK_SPEC> {
         ISOOUT_DROP_MSK_W::new(self, 14)
     }
     #[doc = "Bit 15 - End of Periodic Frame Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn eopfmsk(&mut self) -> EOPFMSK_W<GINTMSK_SPEC> {
         EOPFMSK_W::new(self, 15)
     }
     #[doc = "Bit 18 - IN Endpoints Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn iepint_msk(&mut self) -> IEPINT_MSK_W<GINTMSK_SPEC> {
         IEPINT_MSK_W::new(self, 18)
     }
     #[doc = "Bit 19 - OUT Endpoints Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn oepint_msk(&mut self) -> OEPINT_MSK_W<GINTMSK_SPEC> {
         OEPINT_MSK_W::new(self, 19)
     }
     #[doc = "Bit 20 - Incomplete Isochronous IN Transfer Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn incomp_isoinmsk(&mut self) -> INCOMP_ISOINMSK_W<GINTMSK_SPEC> {
         INCOMP_ISOINMSK_W::new(self, 20)
     }
     #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn incompl_sooutmsk(&mut self) -> INCOMPL_SOOUTMSK_W<GINTMSK_SPEC> {
         INCOMPL_SOOUTMSK_W::new(self, 21)
     }
     #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"]
     #[inline(always)]
-    #[must_use]
     pub fn wk_up_int_msk(&mut self) -> WK_UP_INT_MSK_W<GINTMSK_SPEC> {
         WK_UP_INT_MSK_W::new(self, 31)
     }
diff --git a/src/usb0/gintsts.rs b/src/usb0/gintsts.rs
index 97cf1846..700a4fd4 100644
--- a/src/usb0/gintsts.rs
+++ b/src/usb0/gintsts.rs
@@ -166,61 +166,51 @@ impl R {
 impl W {
     #[doc = "Bit 3 - Start of Frame"]
     #[inline(always)]
-    #[must_use]
     pub fn sof(&mut self) -> SOF_W<GINTSTS_SPEC> {
         SOF_W::new(self, 3)
     }
     #[doc = "Bit 10 - Early Suspend"]
     #[inline(always)]
-    #[must_use]
     pub fn erly_susp(&mut self) -> ERLY_SUSP_W<GINTSTS_SPEC> {
         ERLY_SUSP_W::new(self, 10)
     }
     #[doc = "Bit 11 - USB Suspend"]
     #[inline(always)]
-    #[must_use]
     pub fn usbsusp(&mut self) -> USBSUSP_W<GINTSTS_SPEC> {
         USBSUSP_W::new(self, 11)
     }
     #[doc = "Bit 12 - USB Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn usbrst(&mut self) -> USBRST_W<GINTSTS_SPEC> {
         USBRST_W::new(self, 12)
     }
     #[doc = "Bit 13 - Enumeration Done"]
     #[inline(always)]
-    #[must_use]
     pub fn enum_done(&mut self) -> ENUM_DONE_W<GINTSTS_SPEC> {
         ENUM_DONE_W::new(self, 13)
     }
     #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn isoout_drop(&mut self) -> ISOOUT_DROP_W<GINTSTS_SPEC> {
         ISOOUT_DROP_W::new(self, 14)
     }
     #[doc = "Bit 15 - End of Periodic Frame Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn eopf(&mut self) -> EOPF_W<GINTSTS_SPEC> {
         EOPF_W::new(self, 15)
     }
     #[doc = "Bit 20 - Incomplete Isochronous IN Transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn incomp_isoin(&mut self) -> INCOMP_ISOIN_W<GINTSTS_SPEC> {
         INCOMP_ISOIN_W::new(self, 20)
     }
     #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer"]
     #[inline(always)]
-    #[must_use]
     pub fn incompl_soout(&mut self) -> INCOMPL_SOOUT_W<GINTSTS_SPEC> {
         INCOMPL_SOOUT_W::new(self, 21)
     }
     #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn wk_up_int(&mut self) -> WK_UP_INT_W<GINTSTS_SPEC> {
         WK_UP_INT_W::new(self, 31)
     }
diff --git a/src/usb0/gnptxfsiz.rs b/src/usb0/gnptxfsiz.rs
index bee2d8b3..8e9d756c 100644
--- a/src/usb0/gnptxfsiz.rs
+++ b/src/usb0/gnptxfsiz.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - IN Endpoint FIFO0 Transmit RAM Start Address"]
     #[inline(always)]
-    #[must_use]
     pub fn ineptx_f0st_addr(&mut self) -> INEPTX_F0ST_ADDR_W<GNPTXFSIZ_SPEC> {
         INEPTX_F0ST_ADDR_W::new(self, 0)
     }
     #[doc = "Bits 16:31 - IN Endpoint TxFIFO 0 Depth"]
     #[inline(always)]
-    #[must_use]
     pub fn ineptx_f0dep(&mut self) -> INEPTX_F0DEP_W<GNPTXFSIZ_SPEC> {
         INEPTX_F0DEP_W::new(self, 16)
     }
diff --git a/src/usb0/grstctl.rs b/src/usb0/grstctl.rs
index d6ac0bb9..b39e6f0c 100644
--- a/src/usb0/grstctl.rs
+++ b/src/usb0/grstctl.rs
@@ -152,25 +152,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Core Soft Reset"]
     #[inline(always)]
-    #[must_use]
     pub fn csft_rst(&mut self) -> CSFT_RST_W<GRSTCTL_SPEC> {
         CSFT_RST_W::new(self, 0)
     }
     #[doc = "Bit 4 - RxFIFO Flush"]
     #[inline(always)]
-    #[must_use]
     pub fn rx_fflsh(&mut self) -> RX_FFLSH_W<GRSTCTL_SPEC> {
         RX_FFLSH_W::new(self, 4)
     }
     #[doc = "Bit 5 - TxFIFO Flush"]
     #[inline(always)]
-    #[must_use]
     pub fn tx_fflsh(&mut self) -> TX_FFLSH_W<GRSTCTL_SPEC> {
         TX_FFLSH_W::new(self, 5)
     }
     #[doc = "Bits 6:10 - TxFIFO Number"]
     #[inline(always)]
-    #[must_use]
     pub fn tx_fnum(&mut self) -> TX_FNUM_W<GRSTCTL_SPEC> {
         TX_FNUM_W::new(self, 6)
     }
diff --git a/src/usb0/grxfsiz.rs b/src/usb0/grxfsiz.rs
index d560025b..783bd25f 100644
--- a/src/usb0/grxfsiz.rs
+++ b/src/usb0/grxfsiz.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - RxFIFO Depth"]
     #[inline(always)]
-    #[must_use]
     pub fn rx_fdep(&mut self) -> RX_FDEP_W<GRXFSIZ_SPEC> {
         RX_FDEP_W::new(self, 0)
     }
diff --git a/src/usb0/guid.rs b/src/usb0/guid.rs
index 0bdbace0..53395dd2 100644
--- a/src/usb0/guid.rs
+++ b/src/usb0/guid.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Module Revision"]
     #[inline(always)]
-    #[must_use]
     pub fn mod_rev(&mut self) -> MOD_REV_W<GUID_SPEC> {
         MOD_REV_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - Module Type"]
     #[inline(always)]
-    #[must_use]
     pub fn mod_type(&mut self) -> MOD_TYPE_W<GUID_SPEC> {
         MOD_TYPE_W::new(self, 8)
     }
     #[doc = "Bits 16:31 - Module Number"]
     #[inline(always)]
-    #[must_use]
     pub fn mod_number(&mut self) -> MOD_NUMBER_W<GUID_SPEC> {
         MOD_NUMBER_W::new(self, 16)
     }
diff --git a/src/usb0/gusbcfg.rs b/src/usb0/gusbcfg.rs
index 28733962..c1143574 100644
--- a/src/usb0/gusbcfg.rs
+++ b/src/usb0/gusbcfg.rs
@@ -184,31 +184,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - FS Timeout Calibration"]
     #[inline(always)]
-    #[must_use]
     pub fn tout_cal(&mut self) -> TOUT_CAL_W<GUSBCFG_SPEC> {
         TOUT_CAL_W::new(self, 0)
     }
     #[doc = "Bits 10:13 - USB Turnaround Time"]
     #[inline(always)]
-    #[must_use]
     pub fn usbtrd_tim(&mut self) -> USBTRD_TIM_W<GUSBCFG_SPEC> {
         USBTRD_TIM_W::new(self, 10)
     }
     #[doc = "Bit 28 - Tx End Delay"]
     #[inline(always)]
-    #[must_use]
     pub fn tx_end_delay(&mut self) -> TX_END_DELAY_W<GUSBCFG_SPEC> {
         TX_END_DELAY_W::new(self, 28)
     }
     #[doc = "Bit 30 - Force Device Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn force_dev_mode(&mut self) -> FORCE_DEV_MODE_W<GUSBCFG_SPEC> {
         FORCE_DEV_MODE_W::new(self, 30)
     }
     #[doc = "Bit 31 - Corrupt Tx packet"]
     #[inline(always)]
-    #[must_use]
     pub fn ctp(&mut self) -> CTP_W<GUSBCFG_SPEC> {
         CTP_W::new(self, 31)
     }
diff --git a/src/usb0/pcgcctl.rs b/src/usb0/pcgcctl.rs
index 582a6784..58b75df0 100644
--- a/src/usb0/pcgcctl.rs
+++ b/src/usb0/pcgcctl.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Stop Pclk"]
     #[inline(always)]
-    #[must_use]
     pub fn stop_pclk(&mut self) -> STOP_PCLK_W<PCGCCTL_SPEC> {
         STOP_PCLK_W::new(self, 0)
     }
     #[doc = "Bit 1 - Gate Hclk"]
     #[inline(always)]
-    #[must_use]
     pub fn gate_hclk(&mut self) -> GATE_HCLK_W<PCGCCTL_SPEC> {
         GATE_HCLK_W::new(self, 1)
     }
diff --git a/src/usb0_ep0/diepctl0.rs b/src/usb0_ep0/diepctl0.rs
index 2d21e517..9865b6df 100644
--- a/src/usb0_ep0/diepctl0.rs
+++ b/src/usb0_ep0/diepctl0.rs
@@ -193,43 +193,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Maximum Packet Size"]
     #[inline(always)]
-    #[must_use]
     pub fn mps(&mut self) -> MPS_W<DIEPCTL0_SPEC> {
         MPS_W::new(self, 0)
     }
     #[doc = "Bit 21 - STALL Handshake"]
     #[inline(always)]
-    #[must_use]
     pub fn stall(&mut self) -> STALL_W<DIEPCTL0_SPEC> {
         STALL_W::new(self, 21)
     }
     #[doc = "Bits 22:25 - TxFIFO Number"]
     #[inline(always)]
-    #[must_use]
     pub fn tx_fnum(&mut self) -> TX_FNUM_W<DIEPCTL0_SPEC> {
         TX_FNUM_W::new(self, 22)
     }
     #[doc = "Bit 26 - Clear NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn cnak(&mut self) -> CNAK_W<DIEPCTL0_SPEC> {
         CNAK_W::new(self, 26)
     }
     #[doc = "Bit 27 - Set NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn snak(&mut self) -> SNAK_W<DIEPCTL0_SPEC> {
         SNAK_W::new(self, 27)
     }
     #[doc = "Bit 30 - Endpoint Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn epdis(&mut self) -> EPDIS_W<DIEPCTL0_SPEC> {
         EPDIS_W::new(self, 30)
     }
     #[doc = "Bit 31 - Endpoint Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn epena(&mut self) -> EPENA_W<DIEPCTL0_SPEC> {
         EPENA_W::new(self, 31)
     }
diff --git a/src/usb0_ep0/diepdma0.rs b/src/usb0_ep0/diepdma0.rs
index ea895738..7c08fd6e 100644
--- a/src/usb0_ep0/diepdma0.rs
+++ b/src/usb0_ep0/diepdma0.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - DMA Address"]
     #[inline(always)]
-    #[must_use]
     pub fn dmaaddr(&mut self) -> DMAADDR_W<DIEPDMA0_SPEC> {
         DMAADDR_W::new(self, 0)
     }
diff --git a/src/usb0_ep0/diepint0.rs b/src/usb0_ep0/diepint0.rs
index 13241c3b..bdabc316 100644
--- a/src/usb0_ep0/diepint0.rs
+++ b/src/usb0_ep0/diepint0.rs
@@ -77,43 +77,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transfer Completed Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_compl(&mut self) -> XFER_COMPL_W<DIEPINT0_SPEC> {
         XFER_COMPL_W::new(self, 0)
     }
     #[doc = "Bit 1 - Endpoint Disabled Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn epdisbld(&mut self) -> EPDISBLD_W<DIEPINT0_SPEC> {
         EPDISBLD_W::new(self, 1)
     }
     #[doc = "Bit 2 - AHB Error"]
     #[inline(always)]
-    #[must_use]
     pub fn ahberr(&mut self) -> AHBERR_W<DIEPINT0_SPEC> {
         AHBERR_W::new(self, 2)
     }
     #[doc = "Bit 3 - Timeout Condition"]
     #[inline(always)]
-    #[must_use]
     pub fn time_out(&mut self) -> TIME_OUT_W<DIEPINT0_SPEC> {
         TIME_OUT_W::new(self, 3)
     }
     #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"]
     #[inline(always)]
-    #[must_use]
     pub fn intkn_txfemp(&mut self) -> INTKN_TXFEMP_W<DIEPINT0_SPEC> {
         INTKN_TXFEMP_W::new(self, 4)
     }
     #[doc = "Bit 6 - IN Endpoint NAK Effective"]
     #[inline(always)]
-    #[must_use]
     pub fn inepnak_eff(&mut self) -> INEPNAK_EFF_W<DIEPINT0_SPEC> {
         INEPNAK_EFF_W::new(self, 6)
     }
     #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn bnaintr(&mut self) -> BNAINTR_W<DIEPINT0_SPEC> {
         BNAINTR_W::new(self, 9)
     }
diff --git a/src/usb0_ep0/dieptsiz0.rs b/src/usb0_ep0/dieptsiz0.rs
index 806450a0..167912c4 100644
--- a/src/usb0_ep0/dieptsiz0.rs
+++ b/src/usb0_ep0/dieptsiz0.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:6 - Transfer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_size(&mut self) -> XFER_SIZE_W<DIEPTSIZ0_SPEC> {
         XFER_SIZE_W::new(self, 0)
     }
     #[doc = "Bits 19:20 - Packet Count"]
     #[inline(always)]
-    #[must_use]
     pub fn pkt_cnt(&mut self) -> PKT_CNT_W<DIEPTSIZ0_SPEC> {
         PKT_CNT_W::new(self, 19)
     }
diff --git a/src/usb0_ep0/doepctl0.rs b/src/usb0_ep0/doepctl0.rs
index bb11db50..bd573291 100644
--- a/src/usb0_ep0/doepctl0.rs
+++ b/src/usb0_ep0/doepctl0.rs
@@ -163,31 +163,26 @@ impl R {
 impl W {
     #[doc = "Bit 20 - Snoop Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn snp(&mut self) -> SNP_W<DOEPCTL0_SPEC> {
         SNP_W::new(self, 20)
     }
     #[doc = "Bit 21 - STALL Handshake"]
     #[inline(always)]
-    #[must_use]
     pub fn stall(&mut self) -> STALL_W<DOEPCTL0_SPEC> {
         STALL_W::new(self, 21)
     }
     #[doc = "Bit 26 - Clear NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn cnak(&mut self) -> CNAK_W<DOEPCTL0_SPEC> {
         CNAK_W::new(self, 26)
     }
     #[doc = "Bit 27 - Set NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn snak(&mut self) -> SNAK_W<DOEPCTL0_SPEC> {
         SNAK_W::new(self, 27)
     }
     #[doc = "Bit 31 - Endpoint Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn epena(&mut self) -> EPENA_W<DOEPCTL0_SPEC> {
         EPENA_W::new(self, 31)
     }
diff --git a/src/usb0_ep0/doepdma0.rs b/src/usb0_ep0/doepdma0.rs
index 97ec7c03..fa62c351 100644
--- a/src/usb0_ep0/doepdma0.rs
+++ b/src/usb0_ep0/doepdma0.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - DMA Address"]
     #[inline(always)]
-    #[must_use]
     pub fn dmaaddr(&mut self) -> DMAADDR_W<DOEPDMA0_SPEC> {
         DMAADDR_W::new(self, 0)
     }
diff --git a/src/usb0_ep0/doepint0.rs b/src/usb0_ep0/doepint0.rs
index 989701f4..32a9c6ae 100644
--- a/src/usb0_ep0/doepint0.rs
+++ b/src/usb0_ep0/doepint0.rs
@@ -115,73 +115,61 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transfer Completed Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_compl(&mut self) -> XFER_COMPL_W<DOEPINT0_SPEC> {
         XFER_COMPL_W::new(self, 0)
     }
     #[doc = "Bit 1 - Endpoint Disabled Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn epdisbld(&mut self) -> EPDISBLD_W<DOEPINT0_SPEC> {
         EPDISBLD_W::new(self, 1)
     }
     #[doc = "Bit 2 - AHB Error"]
     #[inline(always)]
-    #[must_use]
     pub fn ahberr(&mut self) -> AHBERR_W<DOEPINT0_SPEC> {
         AHBERR_W::new(self, 2)
     }
     #[doc = "Bit 3 - SETUP Phase Done"]
     #[inline(always)]
-    #[must_use]
     pub fn set_up(&mut self) -> SET_UP_W<DOEPINT0_SPEC> {
         SET_UP_W::new(self, 3)
     }
     #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"]
     #[inline(always)]
-    #[must_use]
     pub fn outtkn_epdis(&mut self) -> OUTTKN_EPDIS_W<DOEPINT0_SPEC> {
         OUTTKN_EPDIS_W::new(self, 4)
     }
     #[doc = "Bit 5 - Status Phase Received For Control Write"]
     #[inline(always)]
-    #[must_use]
     pub fn sts_phse_rcvd(&mut self) -> STS_PHSE_RCVD_W<DOEPINT0_SPEC> {
         STS_PHSE_RCVD_W::new(self, 5)
     }
     #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"]
     #[inline(always)]
-    #[must_use]
     pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W<DOEPINT0_SPEC> {
         BACK2BACK_SETUP_W::new(self, 6)
     }
     #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn bnaintr(&mut self) -> BNAINTR_W<DOEPINT0_SPEC> {
         BNAINTR_W::new(self, 9)
     }
     #[doc = "Bit 11 - Packet Dropped Status"]
     #[inline(always)]
-    #[must_use]
     pub fn pkt_drp_sts(&mut self) -> PKT_DRP_STS_W<DOEPINT0_SPEC> {
         PKT_DRP_STS_W::new(self, 11)
     }
     #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn bble_err_intrpt(&mut self) -> BBLE_ERR_INTRPT_W<DOEPINT0_SPEC> {
         BBLE_ERR_INTRPT_W::new(self, 12)
     }
     #[doc = "Bit 13 - NAK interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn nakintrpt(&mut self) -> NAKINTRPT_W<DOEPINT0_SPEC> {
         NAKINTRPT_W::new(self, 13)
     }
     #[doc = "Bit 14 - NYET interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn nyetintrpt(&mut self) -> NYETINTRPT_W<DOEPINT0_SPEC> {
         NYETINTRPT_W::new(self, 14)
     }
diff --git a/src/usb0_ep0/doeptsiz0.rs b/src/usb0_ep0/doeptsiz0.rs
index a2dcb269..c48cb653 100644
--- a/src/usb0_ep0/doeptsiz0.rs
+++ b/src/usb0_ep0/doeptsiz0.rs
@@ -103,19 +103,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:6 - Transfer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_size(&mut self) -> XFER_SIZE_W<DOEPTSIZ0_SPEC> {
         XFER_SIZE_W::new(self, 0)
     }
     #[doc = "Bits 19:20 - Packet Count"]
     #[inline(always)]
-    #[must_use]
     pub fn pkt_cnt(&mut self) -> PKT_CNT_W<DOEPTSIZ0_SPEC> {
         PKT_CNT_W::new(self, 19)
     }
     #[doc = "Bits 29:30 - SETUP Packet Count"]
     #[inline(always)]
-    #[must_use]
     pub fn supcnt(&mut self) -> SUPCNT_W<DOEPTSIZ0_SPEC> {
         SUPCNT_W::new(self, 29)
     }
diff --git a/src/usb0_ep1.rs b/src/usb0_ep1.rs
index 51917522..1a1286b3 100644
--- a/src/usb0_ep1.rs
+++ b/src/usb0_ep1.rs
@@ -23,12 +23,12 @@ impl RegisterBlock {
     #[doc = "0x00 - Device Endpoint Control Register \\[INTBULK\\]"]
     #[inline(always)]
     pub const fn diepctl_intbulk(&self) -> &DIEPCTL_INTBULK {
-        unsafe { &*(self as *const Self).cast::<u8>().add(0).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().cast() }
     }
     #[doc = "0x00 - Device Endpoint Control Register \\[ISOCONT\\]"]
     #[inline(always)]
     pub const fn diepctl_isocont(&self) -> &DIEPCTL_ISOCONT {
-        unsafe { &*(self as *const Self).cast::<u8>().add(0).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().cast() }
     }
     #[doc = "0x08 - Device Endpoint Interrupt Register"]
     #[inline(always)]
@@ -58,12 +58,12 @@ impl RegisterBlock {
     #[doc = "0x200 - Device Endpoint Control Register \\[INTBULK\\]"]
     #[inline(always)]
     pub const fn doepctl_intbulk(&self) -> &DOEPCTL_INTBULK {
-        unsafe { &*(self as *const Self).cast::<u8>().add(512).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(512).cast() }
     }
     #[doc = "0x200 - Device Endpoint Control Register \\[ISOCONT\\]"]
     #[inline(always)]
     pub const fn doepctl_isocont(&self) -> &DOEPCTL_ISOCONT {
-        unsafe { &*(self as *const Self).cast::<u8>().add(512).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(512).cast() }
     }
     #[doc = "0x208 - Device Endpoint Interrupt Register"]
     #[inline(always)]
@@ -73,12 +73,12 @@ impl RegisterBlock {
     #[doc = "0x210 - Device Endpoint Transfer Size Register \\[CONT\\]"]
     #[inline(always)]
     pub const fn doeptsiz_control(&self) -> &DOEPTSIZ_CONTROL {
-        unsafe { &*(self as *const Self).cast::<u8>().add(528).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(528).cast() }
     }
     #[doc = "0x210 - Device Endpoint Transfer Size Register \\[ISO\\]"]
     #[inline(always)]
     pub const fn doeptsiz_iso(&self) -> &DOEPTSIZ_ISO {
-        unsafe { &*(self as *const Self).cast::<u8>().add(528).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(528).cast() }
     }
     #[doc = "0x214 - Device Endpoint DMA Address Register"]
     #[inline(always)]
diff --git a/src/usb0_ep1/diepctl_intbulk.rs b/src/usb0_ep1/diepctl_intbulk.rs
index c22f3a0f..ee5f6cfd 100644
--- a/src/usb0_ep1/diepctl_intbulk.rs
+++ b/src/usb0_ep1/diepctl_intbulk.rs
@@ -251,73 +251,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:10 - Maximum Packet Size"]
     #[inline(always)]
-    #[must_use]
     pub fn mps(&mut self) -> MPS_W<DIEPCTL_INTBULK_SPEC> {
         MPS_W::new(self, 0)
     }
     #[doc = "Bit 15 - USB Active Endpoint"]
     #[inline(always)]
-    #[must_use]
     pub fn usbact_ep(&mut self) -> USBACT_EP_W<DIEPCTL_INTBULK_SPEC> {
         USBACT_EP_W::new(self, 15)
     }
     #[doc = "Bits 18:19 - Endpoint Type"]
     #[inline(always)]
-    #[must_use]
     pub fn eptype(&mut self) -> EPTYPE_W<DIEPCTL_INTBULK_SPEC> {
         EPTYPE_W::new(self, 18)
     }
     #[doc = "Bit 20 - Snoop Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn snp(&mut self) -> SNP_W<DIEPCTL_INTBULK_SPEC> {
         SNP_W::new(self, 20)
     }
     #[doc = "Bit 21 - STALL Handshake"]
     #[inline(always)]
-    #[must_use]
     pub fn stall(&mut self) -> STALL_W<DIEPCTL_INTBULK_SPEC> {
         STALL_W::new(self, 21)
     }
     #[doc = "Bits 22:25 - TxFIFO Number"]
     #[inline(always)]
-    #[must_use]
     pub fn tx_fnum(&mut self) -> TX_FNUM_W<DIEPCTL_INTBULK_SPEC> {
         TX_FNUM_W::new(self, 22)
     }
     #[doc = "Bit 26 - Clear NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn cnak(&mut self) -> CNAK_W<DIEPCTL_INTBULK_SPEC> {
         CNAK_W::new(self, 26)
     }
     #[doc = "Bit 27 - Set NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn snak(&mut self) -> SNAK_W<DIEPCTL_INTBULK_SPEC> {
         SNAK_W::new(self, 27)
     }
     #[doc = "Bit 28 - Set DATA0 PID"]
     #[inline(always)]
-    #[must_use]
     pub fn set_d0pid(&mut self) -> SET_D0PID_W<DIEPCTL_INTBULK_SPEC> {
         SET_D0PID_W::new(self, 28)
     }
     #[doc = "Bit 29 - 29 Set DATA1 PID"]
     #[inline(always)]
-    #[must_use]
     pub fn set_d1pid(&mut self) -> SET_D1PID_W<DIEPCTL_INTBULK_SPEC> {
         SET_D1PID_W::new(self, 29)
     }
     #[doc = "Bit 30 - Endpoint Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn epdis(&mut self) -> EPDIS_W<DIEPCTL_INTBULK_SPEC> {
         EPDIS_W::new(self, 30)
     }
     #[doc = "Bit 31 - Endpoint Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn epena(&mut self) -> EPENA_W<DIEPCTL_INTBULK_SPEC> {
         EPENA_W::new(self, 31)
     }
diff --git a/src/usb0_ep1/diepctl_isocont.rs b/src/usb0_ep1/diepctl_isocont.rs
index 97543e7d..2b8e2a2c 100644
--- a/src/usb0_ep1/diepctl_isocont.rs
+++ b/src/usb0_ep1/diepctl_isocont.rs
@@ -251,73 +251,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:10 - Maximum Packet Size"]
     #[inline(always)]
-    #[must_use]
     pub fn mps(&mut self) -> MPS_W<DIEPCTL_ISOCONT_SPEC> {
         MPS_W::new(self, 0)
     }
     #[doc = "Bit 15 - USB Active Endpoint"]
     #[inline(always)]
-    #[must_use]
     pub fn usbact_ep(&mut self) -> USBACT_EP_W<DIEPCTL_ISOCONT_SPEC> {
         USBACT_EP_W::new(self, 15)
     }
     #[doc = "Bits 18:19 - Endpoint Type"]
     #[inline(always)]
-    #[must_use]
     pub fn eptype(&mut self) -> EPTYPE_W<DIEPCTL_ISOCONT_SPEC> {
         EPTYPE_W::new(self, 18)
     }
     #[doc = "Bit 20 - Snoop Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn snp(&mut self) -> SNP_W<DIEPCTL_ISOCONT_SPEC> {
         SNP_W::new(self, 20)
     }
     #[doc = "Bit 21 - STALL Handshake"]
     #[inline(always)]
-    #[must_use]
     pub fn stall(&mut self) -> STALL_W<DIEPCTL_ISOCONT_SPEC> {
         STALL_W::new(self, 21)
     }
     #[doc = "Bits 22:25 - TxFIFO Number"]
     #[inline(always)]
-    #[must_use]
     pub fn tx_fnum(&mut self) -> TX_FNUM_W<DIEPCTL_ISOCONT_SPEC> {
         TX_FNUM_W::new(self, 22)
     }
     #[doc = "Bit 26 - Clear NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn cnak(&mut self) -> CNAK_W<DIEPCTL_ISOCONT_SPEC> {
         CNAK_W::new(self, 26)
     }
     #[doc = "Bit 27 - Set NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn snak(&mut self) -> SNAK_W<DIEPCTL_ISOCONT_SPEC> {
         SNAK_W::new(self, 27)
     }
     #[doc = "Bit 28 - In non-Scatter/Gather DMA mode: Set Even frame"]
     #[inline(always)]
-    #[must_use]
     pub fn set_even_fr(&mut self) -> SET_EVEN_FR_W<DIEPCTL_ISOCONT_SPEC> {
         SET_EVEN_FR_W::new(self, 28)
     }
     #[doc = "Bit 29 - Set Odd frame"]
     #[inline(always)]
-    #[must_use]
     pub fn set_odd_fr(&mut self) -> SET_ODD_FR_W<DIEPCTL_ISOCONT_SPEC> {
         SET_ODD_FR_W::new(self, 29)
     }
     #[doc = "Bit 30 - Endpoint Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn epdis(&mut self) -> EPDIS_W<DIEPCTL_ISOCONT_SPEC> {
         EPDIS_W::new(self, 30)
     }
     #[doc = "Bit 31 - Endpoint Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn epena(&mut self) -> EPENA_W<DIEPCTL_ISOCONT_SPEC> {
         EPENA_W::new(self, 31)
     }
diff --git a/src/usb0_ep1/diepdma.rs b/src/usb0_ep1/diepdma.rs
index 535143ff..eb97b7da 100644
--- a/src/usb0_ep1/diepdma.rs
+++ b/src/usb0_ep1/diepdma.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - DMA Address"]
     #[inline(always)]
-    #[must_use]
     pub fn dmaaddr(&mut self) -> DMAADDR_W<DIEPDMA_SPEC> {
         DMAADDR_W::new(self, 0)
     }
diff --git a/src/usb0_ep1/diepint.rs b/src/usb0_ep1/diepint.rs
index abf99acc..c49f0398 100644
--- a/src/usb0_ep1/diepint.rs
+++ b/src/usb0_ep1/diepint.rs
@@ -77,43 +77,36 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transfer Completed Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_compl(&mut self) -> XFER_COMPL_W<DIEPINT_SPEC> {
         XFER_COMPL_W::new(self, 0)
     }
     #[doc = "Bit 1 - Endpoint Disabled Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn epdisbld(&mut self) -> EPDISBLD_W<DIEPINT_SPEC> {
         EPDISBLD_W::new(self, 1)
     }
     #[doc = "Bit 2 - AHB Error"]
     #[inline(always)]
-    #[must_use]
     pub fn ahberr(&mut self) -> AHBERR_W<DIEPINT_SPEC> {
         AHBERR_W::new(self, 2)
     }
     #[doc = "Bit 3 - Timeout Condition"]
     #[inline(always)]
-    #[must_use]
     pub fn time_out(&mut self) -> TIME_OUT_W<DIEPINT_SPEC> {
         TIME_OUT_W::new(self, 3)
     }
     #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"]
     #[inline(always)]
-    #[must_use]
     pub fn intkn_txfemp(&mut self) -> INTKN_TXFEMP_W<DIEPINT_SPEC> {
         INTKN_TXFEMP_W::new(self, 4)
     }
     #[doc = "Bit 6 - IN Endpoint NAK Effective"]
     #[inline(always)]
-    #[must_use]
     pub fn inepnak_eff(&mut self) -> INEPNAK_EFF_W<DIEPINT_SPEC> {
         INEPNAK_EFF_W::new(self, 6)
     }
     #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn bnaintr(&mut self) -> BNAINTR_W<DIEPINT_SPEC> {
         BNAINTR_W::new(self, 9)
     }
diff --git a/src/usb0_ep1/dieptsiz.rs b/src/usb0_ep1/dieptsiz.rs
index 15b5c443..53ab966b 100644
--- a/src/usb0_ep1/dieptsiz.rs
+++ b/src/usb0_ep1/dieptsiz.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:18 - Transfer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_size(&mut self) -> XFER_SIZE_W<DIEPTSIZ_SPEC> {
         XFER_SIZE_W::new(self, 0)
     }
     #[doc = "Bits 19:28 - Packet Count"]
     #[inline(always)]
-    #[must_use]
     pub fn pkt_cnt(&mut self) -> PKT_CNT_W<DIEPTSIZ_SPEC> {
         PKT_CNT_W::new(self, 19)
     }
diff --git a/src/usb0_ep1/doepctl_intbulk.rs b/src/usb0_ep1/doepctl_intbulk.rs
index d9dfddd4..e807fb57 100644
--- a/src/usb0_ep1/doepctl_intbulk.rs
+++ b/src/usb0_ep1/doepctl_intbulk.rs
@@ -251,73 +251,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:10 - Maximum Packet Size"]
     #[inline(always)]
-    #[must_use]
     pub fn mps(&mut self) -> MPS_W<DOEPCTL_INTBULK_SPEC> {
         MPS_W::new(self, 0)
     }
     #[doc = "Bit 15 - USB Active Endpoint"]
     #[inline(always)]
-    #[must_use]
     pub fn usbact_ep(&mut self) -> USBACT_EP_W<DOEPCTL_INTBULK_SPEC> {
         USBACT_EP_W::new(self, 15)
     }
     #[doc = "Bits 18:19 - Endpoint Type"]
     #[inline(always)]
-    #[must_use]
     pub fn eptype(&mut self) -> EPTYPE_W<DOEPCTL_INTBULK_SPEC> {
         EPTYPE_W::new(self, 18)
     }
     #[doc = "Bit 20 - Snoop Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn snp(&mut self) -> SNP_W<DOEPCTL_INTBULK_SPEC> {
         SNP_W::new(self, 20)
     }
     #[doc = "Bit 21 - STALL Handshake"]
     #[inline(always)]
-    #[must_use]
     pub fn stall(&mut self) -> STALL_W<DOEPCTL_INTBULK_SPEC> {
         STALL_W::new(self, 21)
     }
     #[doc = "Bits 22:25 - TxFIFO Number"]
     #[inline(always)]
-    #[must_use]
     pub fn tx_fnum(&mut self) -> TX_FNUM_W<DOEPCTL_INTBULK_SPEC> {
         TX_FNUM_W::new(self, 22)
     }
     #[doc = "Bit 26 - Clear NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn cnak(&mut self) -> CNAK_W<DOEPCTL_INTBULK_SPEC> {
         CNAK_W::new(self, 26)
     }
     #[doc = "Bit 27 - Set NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn snak(&mut self) -> SNAK_W<DOEPCTL_INTBULK_SPEC> {
         SNAK_W::new(self, 27)
     }
     #[doc = "Bit 28 - Set DATA0 PID"]
     #[inline(always)]
-    #[must_use]
     pub fn set_d0pid(&mut self) -> SET_D0PID_W<DOEPCTL_INTBULK_SPEC> {
         SET_D0PID_W::new(self, 28)
     }
     #[doc = "Bit 29 - 29 Set DATA1 PID"]
     #[inline(always)]
-    #[must_use]
     pub fn set_d1pid(&mut self) -> SET_D1PID_W<DOEPCTL_INTBULK_SPEC> {
         SET_D1PID_W::new(self, 29)
     }
     #[doc = "Bit 30 - Endpoint Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn epdis(&mut self) -> EPDIS_W<DOEPCTL_INTBULK_SPEC> {
         EPDIS_W::new(self, 30)
     }
     #[doc = "Bit 31 - Endpoint Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn epena(&mut self) -> EPENA_W<DOEPCTL_INTBULK_SPEC> {
         EPENA_W::new(self, 31)
     }
diff --git a/src/usb0_ep1/doepctl_isocont.rs b/src/usb0_ep1/doepctl_isocont.rs
index fe9261aa..e8a6a0ec 100644
--- a/src/usb0_ep1/doepctl_isocont.rs
+++ b/src/usb0_ep1/doepctl_isocont.rs
@@ -251,73 +251,61 @@ impl R {
 impl W {
     #[doc = "Bits 0:10 - Maximum Packet Size"]
     #[inline(always)]
-    #[must_use]
     pub fn mps(&mut self) -> MPS_W<DOEPCTL_ISOCONT_SPEC> {
         MPS_W::new(self, 0)
     }
     #[doc = "Bit 15 - USB Active Endpoint"]
     #[inline(always)]
-    #[must_use]
     pub fn usbact_ep(&mut self) -> USBACT_EP_W<DOEPCTL_ISOCONT_SPEC> {
         USBACT_EP_W::new(self, 15)
     }
     #[doc = "Bits 18:19 - Endpoint Type"]
     #[inline(always)]
-    #[must_use]
     pub fn eptype(&mut self) -> EPTYPE_W<DOEPCTL_ISOCONT_SPEC> {
         EPTYPE_W::new(self, 18)
     }
     #[doc = "Bit 20 - Snoop Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn snp(&mut self) -> SNP_W<DOEPCTL_ISOCONT_SPEC> {
         SNP_W::new(self, 20)
     }
     #[doc = "Bit 21 - STALL Handshake"]
     #[inline(always)]
-    #[must_use]
     pub fn stall(&mut self) -> STALL_W<DOEPCTL_ISOCONT_SPEC> {
         STALL_W::new(self, 21)
     }
     #[doc = "Bits 22:25 - TxFIFO Number"]
     #[inline(always)]
-    #[must_use]
     pub fn tx_fnum(&mut self) -> TX_FNUM_W<DOEPCTL_ISOCONT_SPEC> {
         TX_FNUM_W::new(self, 22)
     }
     #[doc = "Bit 26 - Clear NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn cnak(&mut self) -> CNAK_W<DOEPCTL_ISOCONT_SPEC> {
         CNAK_W::new(self, 26)
     }
     #[doc = "Bit 27 - Set NAK"]
     #[inline(always)]
-    #[must_use]
     pub fn snak(&mut self) -> SNAK_W<DOEPCTL_ISOCONT_SPEC> {
         SNAK_W::new(self, 27)
     }
     #[doc = "Bit 28 - In non-Scatter/Gather DMA mode: Set Even frame"]
     #[inline(always)]
-    #[must_use]
     pub fn set_even_fr(&mut self) -> SET_EVEN_FR_W<DOEPCTL_ISOCONT_SPEC> {
         SET_EVEN_FR_W::new(self, 28)
     }
     #[doc = "Bit 29 - Set Odd frame"]
     #[inline(always)]
-    #[must_use]
     pub fn set_odd_fr(&mut self) -> SET_ODD_FR_W<DOEPCTL_ISOCONT_SPEC> {
         SET_ODD_FR_W::new(self, 29)
     }
     #[doc = "Bit 30 - Endpoint Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn epdis(&mut self) -> EPDIS_W<DOEPCTL_ISOCONT_SPEC> {
         EPDIS_W::new(self, 30)
     }
     #[doc = "Bit 31 - Endpoint Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn epena(&mut self) -> EPENA_W<DOEPCTL_ISOCONT_SPEC> {
         EPENA_W::new(self, 31)
     }
diff --git a/src/usb0_ep1/doepdma.rs b/src/usb0_ep1/doepdma.rs
index 21356edb..e1ec0119 100644
--- a/src/usb0_ep1/doepdma.rs
+++ b/src/usb0_ep1/doepdma.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - DMA Address"]
     #[inline(always)]
-    #[must_use]
     pub fn dmaaddr(&mut self) -> DMAADDR_W<DOEPDMA_SPEC> {
         DMAADDR_W::new(self, 0)
     }
diff --git a/src/usb0_ep1/doepint.rs b/src/usb0_ep1/doepint.rs
index dc1f8660..aee1d2b1 100644
--- a/src/usb0_ep1/doepint.rs
+++ b/src/usb0_ep1/doepint.rs
@@ -115,73 +115,61 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transfer Completed Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_compl(&mut self) -> XFER_COMPL_W<DOEPINT_SPEC> {
         XFER_COMPL_W::new(self, 0)
     }
     #[doc = "Bit 1 - Endpoint Disabled Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn epdisbld(&mut self) -> EPDISBLD_W<DOEPINT_SPEC> {
         EPDISBLD_W::new(self, 1)
     }
     #[doc = "Bit 2 - AHB Error"]
     #[inline(always)]
-    #[must_use]
     pub fn ahberr(&mut self) -> AHBERR_W<DOEPINT_SPEC> {
         AHBERR_W::new(self, 2)
     }
     #[doc = "Bit 3 - SETUP Phase Done"]
     #[inline(always)]
-    #[must_use]
     pub fn set_up(&mut self) -> SET_UP_W<DOEPINT_SPEC> {
         SET_UP_W::new(self, 3)
     }
     #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"]
     #[inline(always)]
-    #[must_use]
     pub fn outtkn_epdis(&mut self) -> OUTTKN_EPDIS_W<DOEPINT_SPEC> {
         OUTTKN_EPDIS_W::new(self, 4)
     }
     #[doc = "Bit 5 - Status Phase Received For Control Write"]
     #[inline(always)]
-    #[must_use]
     pub fn sts_phse_rcvd(&mut self) -> STS_PHSE_RCVD_W<DOEPINT_SPEC> {
         STS_PHSE_RCVD_W::new(self, 5)
     }
     #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"]
     #[inline(always)]
-    #[must_use]
     pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W<DOEPINT_SPEC> {
         BACK2BACK_SETUP_W::new(self, 6)
     }
     #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn bnaintr(&mut self) -> BNAINTR_W<DOEPINT_SPEC> {
         BNAINTR_W::new(self, 9)
     }
     #[doc = "Bit 11 - Packet Dropped Status"]
     #[inline(always)]
-    #[must_use]
     pub fn pkt_drp_sts(&mut self) -> PKT_DRP_STS_W<DOEPINT_SPEC> {
         PKT_DRP_STS_W::new(self, 11)
     }
     #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn bble_err_intrpt(&mut self) -> BBLE_ERR_INTRPT_W<DOEPINT_SPEC> {
         BBLE_ERR_INTRPT_W::new(self, 12)
     }
     #[doc = "Bit 13 - NAK interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn nakintrpt(&mut self) -> NAKINTRPT_W<DOEPINT_SPEC> {
         NAKINTRPT_W::new(self, 13)
     }
     #[doc = "Bit 14 - NYET interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn nyetintrpt(&mut self) -> NYETINTRPT_W<DOEPINT_SPEC> {
         NYETINTRPT_W::new(self, 14)
     }
diff --git a/src/usb0_ep1/doeptsiz_control.rs b/src/usb0_ep1/doeptsiz_control.rs
index 893da263..ffa50091 100644
--- a/src/usb0_ep1/doeptsiz_control.rs
+++ b/src/usb0_ep1/doeptsiz_control.rs
@@ -103,19 +103,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:18 - Transfer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_size(&mut self) -> XFER_SIZE_W<DOEPTSIZ_CONTROL_SPEC> {
         XFER_SIZE_W::new(self, 0)
     }
     #[doc = "Bits 19:28 - Packet Count"]
     #[inline(always)]
-    #[must_use]
     pub fn pkt_cnt(&mut self) -> PKT_CNT_W<DOEPTSIZ_CONTROL_SPEC> {
         PKT_CNT_W::new(self, 19)
     }
     #[doc = "Bits 29:30 - SETUP Packet Count"]
     #[inline(always)]
-    #[must_use]
     pub fn supcnt(&mut self) -> SUPCNT_W<DOEPTSIZ_CONTROL_SPEC> {
         SUPCNT_W::new(self, 29)
     }
diff --git a/src/usb0_ep1/doeptsiz_iso.rs b/src/usb0_ep1/doeptsiz_iso.rs
index 68ad84bc..b4ba3e9f 100644
--- a/src/usb0_ep1/doeptsiz_iso.rs
+++ b/src/usb0_ep1/doeptsiz_iso.rs
@@ -88,13 +88,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:18 - Transfer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn xfer_size(&mut self) -> XFER_SIZE_W<DOEPTSIZ_ISO_SPEC> {
         XFER_SIZE_W::new(self, 0)
     }
     #[doc = "Bits 19:28 - Packet Count"]
     #[inline(always)]
-    #[must_use]
     pub fn pkt_cnt(&mut self) -> PKT_CNT_W<DOEPTSIZ_ISO_SPEC> {
         PKT_CNT_W::new(self, 19)
     }
diff --git a/src/usic0_ch0.rs b/src/usic0_ch0.rs
index 577c0dbe..9eace0f4 100644
--- a/src/usic0_ch0.rs
+++ b/src/usic0_ch0.rs
@@ -111,27 +111,27 @@ impl RegisterBlock {
     #[doc = "0x3c - Protocol Control Register \\[IIS Mode\\]"]
     #[inline(always)]
     pub const fn pcr_iismode(&self) -> &PCR_IISMODE {
-        unsafe { &*(self as *const Self).cast::<u8>().add(60).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
     }
     #[doc = "0x3c - Protocol Control Register \\[IIC Mode\\]"]
     #[inline(always)]
     pub const fn pcr_iicmode(&self) -> &PCR_IICMODE {
-        unsafe { &*(self as *const Self).cast::<u8>().add(60).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
     }
     #[doc = "0x3c - Protocol Control Register \\[SSC Mode\\]"]
     #[inline(always)]
     pub const fn pcr_sscmode(&self) -> &PCR_SSCMODE {
-        unsafe { &*(self as *const Self).cast::<u8>().add(60).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
     }
     #[doc = "0x3c - Protocol Control Register \\[ASC Mode\\]"]
     #[inline(always)]
     pub const fn pcr_ascmode(&self) -> &PCR_ASCMODE {
-        unsafe { &*(self as *const Self).cast::<u8>().add(60).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
     }
     #[doc = "0x3c - Protocol Control Register"]
     #[inline(always)]
     pub const fn pcr(&self) -> &PCR {
-        unsafe { &*(self as *const Self).cast::<u8>().add(60).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
     }
     #[doc = "0x40 - Channel Control Register"]
     #[inline(always)]
@@ -146,27 +146,27 @@ impl RegisterBlock {
     #[doc = "0x48 - Protocol Status Register \\[IIS Mode\\]"]
     #[inline(always)]
     pub const fn psr_iismode(&self) -> &PSR_IISMODE {
-        unsafe { &*(self as *const Self).cast::<u8>().add(72).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
     }
     #[doc = "0x48 - Protocol Status Register \\[IIC Mode\\]"]
     #[inline(always)]
     pub const fn psr_iicmode(&self) -> &PSR_IICMODE {
-        unsafe { &*(self as *const Self).cast::<u8>().add(72).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
     }
     #[doc = "0x48 - Protocol Status Register \\[SSC Mode\\]"]
     #[inline(always)]
     pub const fn psr_sscmode(&self) -> &PSR_SSCMODE {
-        unsafe { &*(self as *const Self).cast::<u8>().add(72).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
     }
     #[doc = "0x48 - Protocol Status Register \\[ASC Mode\\]"]
     #[inline(always)]
     pub const fn psr_ascmode(&self) -> &PSR_ASCMODE {
-        unsafe { &*(self as *const Self).cast::<u8>().add(72).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
     }
     #[doc = "0x48 - Protocol Status Register"]
     #[inline(always)]
     pub const fn psr(&self) -> &PSR {
-        unsafe { &*(self as *const Self).cast::<u8>().add(72).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
     }
     #[doc = "0x4c - Protocol Status Clear Register"]
     #[inline(always)]
diff --git a/src/usic0_ch0/brg.rs b/src/usic0_ch0/brg.rs
index f061d7a5..df60edda 100644
--- a/src/usic0_ch0/brg.rs
+++ b/src/usic0_ch0/brg.rs
@@ -526,61 +526,51 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Clock Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn clksel(&mut self) -> CLKSEL_W<BRG_SPEC> {
         CLKSEL_W::new(self, 0)
     }
     #[doc = "Bit 3 - Timing Measurement Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tmen(&mut self) -> TMEN_W<BRG_SPEC> {
         TMEN_W::new(self, 3)
     }
     #[doc = "Bit 4 - Enable 2:1 Divider for fPPP"]
     #[inline(always)]
-    #[must_use]
     pub fn pppen(&mut self) -> PPPEN_W<BRG_SPEC> {
         PPPEN_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Input Selection for CTQ"]
     #[inline(always)]
-    #[must_use]
     pub fn ctqsel(&mut self) -> CTQSEL_W<BRG_SPEC> {
         CTQSEL_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Pre-Divider for Time Quanta Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn pctq(&mut self) -> PCTQ_W<BRG_SPEC> {
         PCTQ_W::new(self, 8)
     }
     #[doc = "Bits 10:14 - Denominator for Time Quanta Counter"]
     #[inline(always)]
-    #[must_use]
     pub fn dctq(&mut self) -> DCTQ_W<BRG_SPEC> {
         DCTQ_W::new(self, 10)
     }
     #[doc = "Bits 16:25 - Divider Mode: Divider Factor to Generate fPDIV"]
     #[inline(always)]
-    #[must_use]
     pub fn pdiv(&mut self) -> PDIV_W<BRG_SPEC> {
         PDIV_W::new(self, 16)
     }
     #[doc = "Bit 28 - Shift Clock Output Select"]
     #[inline(always)]
-    #[must_use]
     pub fn sclkosel(&mut self) -> SCLKOSEL_W<BRG_SPEC> {
         SCLKOSEL_W::new(self, 28)
     }
     #[doc = "Bit 29 - Master Clock Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn mclkcfg(&mut self) -> MCLKCFG_W<BRG_SPEC> {
         MCLKCFG_W::new(self, 29)
     }
     #[doc = "Bits 30:31 - Shift Clock Output Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn sclkcfg(&mut self) -> SCLKCFG_W<BRG_SPEC> {
         SCLKCFG_W::new(self, 30)
     }
diff --git a/src/usic0_ch0/byp.rs b/src/usic0_ch0/byp.rs
index 4fe75804..fe38bb34 100644
--- a/src/usic0_ch0/byp.rs
+++ b/src/usic0_ch0/byp.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Bypass Data"]
     #[inline(always)]
-    #[must_use]
     pub fn bdata(&mut self) -> BDATA_W<BYP_SPEC> {
         BDATA_W::new(self, 0)
     }
diff --git a/src/usic0_ch0/bypcr.rs b/src/usic0_ch0/bypcr.rs
index c94c13a9..653a7ab9 100644
--- a/src/usic0_ch0/bypcr.rs
+++ b/src/usic0_ch0/bypcr.rs
@@ -340,43 +340,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Bypass Word Length"]
     #[inline(always)]
-    #[must_use]
     pub fn bwle(&mut self) -> BWLE_W<BYPCR_SPEC> {
         BWLE_W::new(self, 0)
     }
     #[doc = "Bit 8 - Bypass Data Single Shot Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn bdssm(&mut self) -> BDSSM_W<BYPCR_SPEC> {
         BDSSM_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - Bypass Data Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn bden(&mut self) -> BDEN_W<BYPCR_SPEC> {
         BDEN_W::new(self, 10)
     }
     #[doc = "Bit 12 - Bypass Data Valid Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn bdvtr(&mut self) -> BDVTR_W<BYPCR_SPEC> {
         BDVTR_W::new(self, 12)
     }
     #[doc = "Bit 13 - Bypass Priority"]
     #[inline(always)]
-    #[must_use]
     pub fn bprio(&mut self) -> BPRIO_W<BYPCR_SPEC> {
         BPRIO_W::new(self, 13)
     }
     #[doc = "Bits 16:20 - Bypass Select Outputs"]
     #[inline(always)]
-    #[must_use]
     pub fn bselo(&mut self) -> BSELO_W<BYPCR_SPEC> {
         BSELO_W::new(self, 16)
     }
     #[doc = "Bits 21:23 - Bypass Hardware Port Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bhpc(&mut self) -> BHPC_W<BYPCR_SPEC> {
         BHPC_W::new(self, 21)
     }
diff --git a/src/usic0_ch0/ccr.rs b/src/usic0_ch0/ccr.rs
index 22464ba5..9e924c65 100644
--- a/src/usic0_ch0/ccr.rs
+++ b/src/usic0_ch0/ccr.rs
@@ -689,61 +689,51 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Operating Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn mode(&mut self) -> MODE_W<CCR_SPEC> {
         MODE_W::new(self, 0)
     }
     #[doc = "Bits 6:7 - Hardware Port Control Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn hpcen(&mut self) -> HPCEN_W<CCR_SPEC> {
         HPCEN_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Parity Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn pm(&mut self) -> PM_W<CCR_SPEC> {
         PM_W::new(self, 8)
     }
     #[doc = "Bit 10 - Receiver Start Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rsien(&mut self) -> RSIEN_W<CCR_SPEC> {
         RSIEN_W::new(self, 10)
     }
     #[doc = "Bit 11 - Data Lost Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dlien(&mut self) -> DLIEN_W<CCR_SPEC> {
         DLIEN_W::new(self, 11)
     }
     #[doc = "Bit 12 - Transmit Shift Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tsien(&mut self) -> TSIEN_W<CCR_SPEC> {
         TSIEN_W::new(self, 12)
     }
     #[doc = "Bit 13 - Transmit Buffer Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tbien(&mut self) -> TBIEN_W<CCR_SPEC> {
         TBIEN_W::new(self, 13)
     }
     #[doc = "Bit 14 - Receive Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rien(&mut self) -> RIEN_W<CCR_SPEC> {
         RIEN_W::new(self, 14)
     }
     #[doc = "Bit 15 - Alternative Receive Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn aien(&mut self) -> AIEN_W<CCR_SPEC> {
         AIEN_W::new(self, 15)
     }
     #[doc = "Bit 16 - Baud Rate Generator Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn brgien(&mut self) -> BRGIEN_W<CCR_SPEC> {
         BRGIEN_W::new(self, 16)
     }
diff --git a/src/usic0_ch0/cmtr.rs b/src/usic0_ch0/cmtr.rs
index 0db3b5ad..e5b65d10 100644
--- a/src/usic0_ch0/cmtr.rs
+++ b/src/usic0_ch0/cmtr.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:9 - Captured Timer Value"]
     #[inline(always)]
-    #[must_use]
     pub fn ctv(&mut self) -> CTV_W<CMTR_SPEC> {
         CTV_W::new(self, 0)
     }
diff --git a/src/usic0_ch0/dx0cr.rs b/src/usic0_ch0/dx0cr.rs
index 129f4094..42aa7a8f 100644
--- a/src/usic0_ch0/dx0cr.rs
+++ b/src/usic0_ch0/dx0cr.rs
@@ -572,43 +572,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Data Selection for Input Signal"]
     #[inline(always)]
-    #[must_use]
     pub fn dsel(&mut self) -> DSEL_W<DX0CR_SPEC> {
         DSEL_W::new(self, 0)
     }
     #[doc = "Bit 4 - Input Switch"]
     #[inline(always)]
-    #[must_use]
     pub fn insw(&mut self) -> INSW_W<DX0CR_SPEC> {
         INSW_W::new(self, 4)
     }
     #[doc = "Bit 5 - Digital Filter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dfen(&mut self) -> DFEN_W<DX0CR_SPEC> {
         DFEN_W::new(self, 5)
     }
     #[doc = "Bit 6 - Data Synchronization Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dsen(&mut self) -> DSEN_W<DX0CR_SPEC> {
         DSEN_W::new(self, 6)
     }
     #[doc = "Bit 8 - Data Polarity for DXn"]
     #[inline(always)]
-    #[must_use]
     pub fn dpol(&mut self) -> DPOL_W<DX0CR_SPEC> {
         DPOL_W::new(self, 8)
     }
     #[doc = "Bit 9 - Sampling Frequency Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn sfsel(&mut self) -> SFSEL_W<DX0CR_SPEC> {
         SFSEL_W::new(self, 9)
     }
     #[doc = "Bits 10:11 - Combination Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn cm(&mut self) -> CM_W<DX0CR_SPEC> {
         CM_W::new(self, 10)
     }
diff --git a/src/usic0_ch0/dx1cr.rs b/src/usic0_ch0/dx1cr.rs
index 707c6902..6c7192ba 100644
--- a/src/usic0_ch0/dx1cr.rs
+++ b/src/usic0_ch0/dx1cr.rs
@@ -630,49 +630,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Data Selection for Input Signal"]
     #[inline(always)]
-    #[must_use]
     pub fn dsel(&mut self) -> DSEL_W<DX1CR_SPEC> {
         DSEL_W::new(self, 0)
     }
     #[doc = "Bit 3 - Delay Compensation Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dcen(&mut self) -> DCEN_W<DX1CR_SPEC> {
         DCEN_W::new(self, 3)
     }
     #[doc = "Bit 4 - Input Switch"]
     #[inline(always)]
-    #[must_use]
     pub fn insw(&mut self) -> INSW_W<DX1CR_SPEC> {
         INSW_W::new(self, 4)
     }
     #[doc = "Bit 5 - Digital Filter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dfen(&mut self) -> DFEN_W<DX1CR_SPEC> {
         DFEN_W::new(self, 5)
     }
     #[doc = "Bit 6 - Data Synchronization Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dsen(&mut self) -> DSEN_W<DX1CR_SPEC> {
         DSEN_W::new(self, 6)
     }
     #[doc = "Bit 8 - Data Polarity for DXn"]
     #[inline(always)]
-    #[must_use]
     pub fn dpol(&mut self) -> DPOL_W<DX1CR_SPEC> {
         DPOL_W::new(self, 8)
     }
     #[doc = "Bit 9 - Sampling Frequency Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn sfsel(&mut self) -> SFSEL_W<DX1CR_SPEC> {
         SFSEL_W::new(self, 9)
     }
     #[doc = "Bits 10:11 - Combination Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn cm(&mut self) -> CM_W<DX1CR_SPEC> {
         CM_W::new(self, 10)
     }
diff --git a/src/usic0_ch0/dx2cr.rs b/src/usic0_ch0/dx2cr.rs
index 6390e4a1..3ffc3a67 100644
--- a/src/usic0_ch0/dx2cr.rs
+++ b/src/usic0_ch0/dx2cr.rs
@@ -572,43 +572,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Data Selection for Input Signal"]
     #[inline(always)]
-    #[must_use]
     pub fn dsel(&mut self) -> DSEL_W<DX2CR_SPEC> {
         DSEL_W::new(self, 0)
     }
     #[doc = "Bit 4 - Input Switch"]
     #[inline(always)]
-    #[must_use]
     pub fn insw(&mut self) -> INSW_W<DX2CR_SPEC> {
         INSW_W::new(self, 4)
     }
     #[doc = "Bit 5 - Digital Filter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dfen(&mut self) -> DFEN_W<DX2CR_SPEC> {
         DFEN_W::new(self, 5)
     }
     #[doc = "Bit 6 - Data Synchronization Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dsen(&mut self) -> DSEN_W<DX2CR_SPEC> {
         DSEN_W::new(self, 6)
     }
     #[doc = "Bit 8 - Data Polarity for DXn"]
     #[inline(always)]
-    #[must_use]
     pub fn dpol(&mut self) -> DPOL_W<DX2CR_SPEC> {
         DPOL_W::new(self, 8)
     }
     #[doc = "Bit 9 - Sampling Frequency Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn sfsel(&mut self) -> SFSEL_W<DX2CR_SPEC> {
         SFSEL_W::new(self, 9)
     }
     #[doc = "Bits 10:11 - Combination Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn cm(&mut self) -> CM_W<DX2CR_SPEC> {
         CM_W::new(self, 10)
     }
diff --git a/src/usic0_ch0/dx3cr.rs b/src/usic0_ch0/dx3cr.rs
index 808069e6..8ee5ca1c 100644
--- a/src/usic0_ch0/dx3cr.rs
+++ b/src/usic0_ch0/dx3cr.rs
@@ -572,43 +572,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Data Selection for Input Signal"]
     #[inline(always)]
-    #[must_use]
     pub fn dsel(&mut self) -> DSEL_W<DX3CR_SPEC> {
         DSEL_W::new(self, 0)
     }
     #[doc = "Bit 4 - Input Switch"]
     #[inline(always)]
-    #[must_use]
     pub fn insw(&mut self) -> INSW_W<DX3CR_SPEC> {
         INSW_W::new(self, 4)
     }
     #[doc = "Bit 5 - Digital Filter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dfen(&mut self) -> DFEN_W<DX3CR_SPEC> {
         DFEN_W::new(self, 5)
     }
     #[doc = "Bit 6 - Data Synchronization Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dsen(&mut self) -> DSEN_W<DX3CR_SPEC> {
         DSEN_W::new(self, 6)
     }
     #[doc = "Bit 8 - Data Polarity for DXn"]
     #[inline(always)]
-    #[must_use]
     pub fn dpol(&mut self) -> DPOL_W<DX3CR_SPEC> {
         DPOL_W::new(self, 8)
     }
     #[doc = "Bit 9 - Sampling Frequency Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn sfsel(&mut self) -> SFSEL_W<DX3CR_SPEC> {
         SFSEL_W::new(self, 9)
     }
     #[doc = "Bits 10:11 - Combination Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn cm(&mut self) -> CM_W<DX3CR_SPEC> {
         CM_W::new(self, 10)
     }
diff --git a/src/usic0_ch0/dx4cr.rs b/src/usic0_ch0/dx4cr.rs
index 4d76b492..87840a58 100644
--- a/src/usic0_ch0/dx4cr.rs
+++ b/src/usic0_ch0/dx4cr.rs
@@ -572,43 +572,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Data Selection for Input Signal"]
     #[inline(always)]
-    #[must_use]
     pub fn dsel(&mut self) -> DSEL_W<DX4CR_SPEC> {
         DSEL_W::new(self, 0)
     }
     #[doc = "Bit 4 - Input Switch"]
     #[inline(always)]
-    #[must_use]
     pub fn insw(&mut self) -> INSW_W<DX4CR_SPEC> {
         INSW_W::new(self, 4)
     }
     #[doc = "Bit 5 - Digital Filter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dfen(&mut self) -> DFEN_W<DX4CR_SPEC> {
         DFEN_W::new(self, 5)
     }
     #[doc = "Bit 6 - Data Synchronization Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dsen(&mut self) -> DSEN_W<DX4CR_SPEC> {
         DSEN_W::new(self, 6)
     }
     #[doc = "Bit 8 - Data Polarity for DXn"]
     #[inline(always)]
-    #[must_use]
     pub fn dpol(&mut self) -> DPOL_W<DX4CR_SPEC> {
         DPOL_W::new(self, 8)
     }
     #[doc = "Bit 9 - Sampling Frequency Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn sfsel(&mut self) -> SFSEL_W<DX4CR_SPEC> {
         SFSEL_W::new(self, 9)
     }
     #[doc = "Bits 10:11 - Combination Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn cm(&mut self) -> CM_W<DX4CR_SPEC> {
         CM_W::new(self, 10)
     }
diff --git a/src/usic0_ch0/dx5cr.rs b/src/usic0_ch0/dx5cr.rs
index fe654b46..5a3782ec 100644
--- a/src/usic0_ch0/dx5cr.rs
+++ b/src/usic0_ch0/dx5cr.rs
@@ -572,43 +572,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Data Selection for Input Signal"]
     #[inline(always)]
-    #[must_use]
     pub fn dsel(&mut self) -> DSEL_W<DX5CR_SPEC> {
         DSEL_W::new(self, 0)
     }
     #[doc = "Bit 4 - Input Switch"]
     #[inline(always)]
-    #[must_use]
     pub fn insw(&mut self) -> INSW_W<DX5CR_SPEC> {
         INSW_W::new(self, 4)
     }
     #[doc = "Bit 5 - Digital Filter Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dfen(&mut self) -> DFEN_W<DX5CR_SPEC> {
         DFEN_W::new(self, 5)
     }
     #[doc = "Bit 6 - Data Synchronization Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dsen(&mut self) -> DSEN_W<DX5CR_SPEC> {
         DSEN_W::new(self, 6)
     }
     #[doc = "Bit 8 - Data Polarity for DXn"]
     #[inline(always)]
-    #[must_use]
     pub fn dpol(&mut self) -> DPOL_W<DX5CR_SPEC> {
         DPOL_W::new(self, 8)
     }
     #[doc = "Bit 9 - Sampling Frequency Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn sfsel(&mut self) -> SFSEL_W<DX5CR_SPEC> {
         SFSEL_W::new(self, 9)
     }
     #[doc = "Bits 10:11 - Combination Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn cm(&mut self) -> CM_W<DX5CR_SPEC> {
         CM_W::new(self, 10)
     }
diff --git a/src/usic0_ch0/fdr.rs b/src/usic0_ch0/fdr.rs
index 119ab9bc..f9b5bb48 100644
--- a/src/usic0_ch0/fdr.rs
+++ b/src/usic0_ch0/fdr.rs
@@ -114,13 +114,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:9 - Step Value"]
     #[inline(always)]
-    #[must_use]
     pub fn step(&mut self) -> STEP_W<FDR_SPEC> {
         STEP_W::new(self, 0)
     }
     #[doc = "Bits 14:15 - Divider Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn dm(&mut self) -> DM_W<FDR_SPEC> {
         DM_W::new(self, 14)
     }
diff --git a/src/usic0_ch0/fmr.rs b/src/usic0_ch0/fmr.rs
index 3622ae70..a291777f 100644
--- a/src/usic0_ch0/fmr.rs
+++ b/src/usic0_ch0/fmr.rs
@@ -326,61 +326,51 @@ where
 impl W {
     #[doc = "Bits 0:1 - Modify Transmit Data Valid"]
     #[inline(always)]
-    #[must_use]
     pub fn mtdv(&mut self) -> MTDV_W<FMR_SPEC> {
         MTDV_W::new(self, 0)
     }
     #[doc = "Bit 4 - Activate Bit TVC"]
     #[inline(always)]
-    #[must_use]
     pub fn atvc(&mut self) -> ATVC_W<FMR_SPEC> {
         ATVC_W::new(self, 4)
     }
     #[doc = "Bit 14 - Clear Bits RDV for RBUF0"]
     #[inline(always)]
-    #[must_use]
     pub fn crdv0(&mut self) -> CRDV0_W<FMR_SPEC> {
         CRDV0_W::new(self, 14)
     }
     #[doc = "Bit 15 - Clear Bit RDV for RBUF1"]
     #[inline(always)]
-    #[must_use]
     pub fn crdv1(&mut self) -> CRDV1_W<FMR_SPEC> {
         CRDV1_W::new(self, 15)
     }
     #[doc = "Bit 16 - Set Interrupt Output SRx"]
     #[inline(always)]
-    #[must_use]
     pub fn sio0(&mut self) -> SIO0_W<FMR_SPEC> {
         SIO0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Set Interrupt Output SRx"]
     #[inline(always)]
-    #[must_use]
     pub fn sio1(&mut self) -> SIO1_W<FMR_SPEC> {
         SIO1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Set Interrupt Output SRx"]
     #[inline(always)]
-    #[must_use]
     pub fn sio2(&mut self) -> SIO2_W<FMR_SPEC> {
         SIO2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Set Interrupt Output SRx"]
     #[inline(always)]
-    #[must_use]
     pub fn sio3(&mut self) -> SIO3_W<FMR_SPEC> {
         SIO3_W::new(self, 19)
     }
     #[doc = "Bit 20 - Set Interrupt Output SRx"]
     #[inline(always)]
-    #[must_use]
     pub fn sio4(&mut self) -> SIO4_W<FMR_SPEC> {
         SIO4_W::new(self, 20)
     }
     #[doc = "Bit 21 - Set Interrupt Output SRx"]
     #[inline(always)]
-    #[must_use]
     pub fn sio5(&mut self) -> SIO5_W<FMR_SPEC> {
         SIO5_W::new(self, 21)
     }
diff --git a/src/usic0_ch0/in_.rs b/src/usic0_ch0/in_.rs
index 2a977840..fb810665 100644
--- a/src/usic0_ch0/in_.rs
+++ b/src/usic0_ch0/in_.rs
@@ -5,7 +5,6 @@ pub type TDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
 impl W {
     #[doc = "Bits 0:15 - Transmit Data"]
     #[inline(always)]
-    #[must_use]
     pub fn tdata(&mut self) -> TDATA_W<IN_SPEC> {
         TDATA_W::new(self, 0)
     }
diff --git a/src/usic0_ch0/inpr.rs b/src/usic0_ch0/inpr.rs
index 6e3b89c0..73144f71 100644
--- a/src/usic0_ch0/inpr.rs
+++ b/src/usic0_ch0/inpr.rs
@@ -160,31 +160,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Transmit Shift Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn tsinp(&mut self) -> TSINP_W<INPR_SPEC> {
         TSINP_W::new(self, 0)
     }
     #[doc = "Bits 4:6 - Transmit Buffer Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn tbinp(&mut self) -> TBINP_W<INPR_SPEC> {
         TBINP_W::new(self, 4)
     }
     #[doc = "Bits 8:10 - Receive Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn rinp(&mut self) -> RINP_W<INPR_SPEC> {
         RINP_W::new(self, 8)
     }
     #[doc = "Bits 12:14 - Alternative Receive Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn ainp(&mut self) -> AINP_W<INPR_SPEC> {
         AINP_W::new(self, 12)
     }
     #[doc = "Bits 16:18 - Transmit Shift Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn pinp(&mut self) -> PINP_W<INPR_SPEC> {
         PINP_W::new(self, 16)
     }
diff --git a/src/usic0_ch0/kscfg.rs b/src/usic0_ch0/kscfg.rs
index 3822a424..8d678c5b 100644
--- a/src/usic0_ch0/kscfg.rs
+++ b/src/usic0_ch0/kscfg.rs
@@ -258,37 +258,31 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Module Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn moden(&mut self) -> MODEN_W<KSCFG_SPEC> {
         MODEN_W::new(self, 0)
     }
     #[doc = "Bit 1 - Bit Protection for MODEN"]
     #[inline(always)]
-    #[must_use]
     pub fn bpmoden(&mut self) -> BPMODEN_W<KSCFG_SPEC> {
         BPMODEN_W::new(self, 1)
     }
     #[doc = "Bits 4:5 - Normal Operation Mode Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn nomcfg(&mut self) -> NOMCFG_W<KSCFG_SPEC> {
         NOMCFG_W::new(self, 4)
     }
     #[doc = "Bit 7 - Bit Protection for NOMCFG"]
     #[inline(always)]
-    #[must_use]
     pub fn bpnom(&mut self) -> BPNOM_W<KSCFG_SPEC> {
         BPNOM_W::new(self, 7)
     }
     #[doc = "Bits 8:9 - Suspend Mode Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn sumcfg(&mut self) -> SUMCFG_W<KSCFG_SPEC> {
         SUMCFG_W::new(self, 8)
     }
     #[doc = "Bit 11 - Bit Protection for SUMCFG"]
     #[inline(always)]
-    #[must_use]
     pub fn bpsum(&mut self) -> BPSUM_W<KSCFG_SPEC> {
         BPSUM_W::new(self, 11)
     }
diff --git a/src/usic0_ch0/pcr.rs b/src/usic0_ch0/pcr.rs
index ed7a6187..e0236de6 100644
--- a/src/usic0_ch0/pcr.rs
+++ b/src/usic0_ch0/pcr.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Protocol Control Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr0(&mut self) -> CTR0_W<PCR_SPEC> {
         CTR0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Protocol Control Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr1(&mut self) -> CTR1_W<PCR_SPEC> {
         CTR1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Protocol Control Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr2(&mut self) -> CTR2_W<PCR_SPEC> {
         CTR2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Protocol Control Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr3(&mut self) -> CTR3_W<PCR_SPEC> {
         CTR3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Protocol Control Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr4(&mut self) -> CTR4_W<PCR_SPEC> {
         CTR4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Protocol Control Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr5(&mut self) -> CTR5_W<PCR_SPEC> {
         CTR5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Protocol Control Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr6(&mut self) -> CTR6_W<PCR_SPEC> {
         CTR6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Protocol Control Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr7(&mut self) -> CTR7_W<PCR_SPEC> {
         CTR7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Protocol Control Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr8(&mut self) -> CTR8_W<PCR_SPEC> {
         CTR8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Protocol Control Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr9(&mut self) -> CTR9_W<PCR_SPEC> {
         CTR9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Protocol Control Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr10(&mut self) -> CTR10_W<PCR_SPEC> {
         CTR10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Protocol Control Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr11(&mut self) -> CTR11_W<PCR_SPEC> {
         CTR11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Protocol Control Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr12(&mut self) -> CTR12_W<PCR_SPEC> {
         CTR12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Protocol Control Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr13(&mut self) -> CTR13_W<PCR_SPEC> {
         CTR13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Protocol Control Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr14(&mut self) -> CTR14_W<PCR_SPEC> {
         CTR14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Protocol Control Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr15(&mut self) -> CTR15_W<PCR_SPEC> {
         CTR15_W::new(self, 15)
     }
     #[doc = "Bit 16 - Protocol Control Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr16(&mut self) -> CTR16_W<PCR_SPEC> {
         CTR16_W::new(self, 16)
     }
     #[doc = "Bit 17 - Protocol Control Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr17(&mut self) -> CTR17_W<PCR_SPEC> {
         CTR17_W::new(self, 17)
     }
     #[doc = "Bit 18 - Protocol Control Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr18(&mut self) -> CTR18_W<PCR_SPEC> {
         CTR18_W::new(self, 18)
     }
     #[doc = "Bit 19 - Protocol Control Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr19(&mut self) -> CTR19_W<PCR_SPEC> {
         CTR19_W::new(self, 19)
     }
     #[doc = "Bit 20 - Protocol Control Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr20(&mut self) -> CTR20_W<PCR_SPEC> {
         CTR20_W::new(self, 20)
     }
     #[doc = "Bit 21 - Protocol Control Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr21(&mut self) -> CTR21_W<PCR_SPEC> {
         CTR21_W::new(self, 21)
     }
     #[doc = "Bit 22 - Protocol Control Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr22(&mut self) -> CTR22_W<PCR_SPEC> {
         CTR22_W::new(self, 22)
     }
     #[doc = "Bit 23 - Protocol Control Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr23(&mut self) -> CTR23_W<PCR_SPEC> {
         CTR23_W::new(self, 23)
     }
     #[doc = "Bit 24 - Protocol Control Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr24(&mut self) -> CTR24_W<PCR_SPEC> {
         CTR24_W::new(self, 24)
     }
     #[doc = "Bit 25 - Protocol Control Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr25(&mut self) -> CTR25_W<PCR_SPEC> {
         CTR25_W::new(self, 25)
     }
     #[doc = "Bit 26 - Protocol Control Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr26(&mut self) -> CTR26_W<PCR_SPEC> {
         CTR26_W::new(self, 26)
     }
     #[doc = "Bit 27 - Protocol Control Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr27(&mut self) -> CTR27_W<PCR_SPEC> {
         CTR27_W::new(self, 27)
     }
     #[doc = "Bit 28 - Protocol Control Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr28(&mut self) -> CTR28_W<PCR_SPEC> {
         CTR28_W::new(self, 28)
     }
     #[doc = "Bit 29 - Protocol Control Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr29(&mut self) -> CTR29_W<PCR_SPEC> {
         CTR29_W::new(self, 29)
     }
     #[doc = "Bit 30 - Protocol Control Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr30(&mut self) -> CTR30_W<PCR_SPEC> {
         CTR30_W::new(self, 30)
     }
     #[doc = "Bit 31 - Protocol Control Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn ctr31(&mut self) -> CTR31_W<PCR_SPEC> {
         CTR31_W::new(self, 31)
     }
diff --git a/src/usic0_ch0/pcr_ascmode.rs b/src/usic0_ch0/pcr_ascmode.rs
index 1b3d473d..3ac39040 100644
--- a/src/usic0_ch0/pcr_ascmode.rs
+++ b/src/usic0_ch0/pcr_ascmode.rs
@@ -757,79 +757,66 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Sample Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn smd(&mut self) -> SMD_W<PCR_ASCMODE_SPEC> {
         SMD_W::new(self, 0)
     }
     #[doc = "Bit 1 - Stop Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn stpb(&mut self) -> STPB_W<PCR_ASCMODE_SPEC> {
         STPB_W::new(self, 1)
     }
     #[doc = "Bit 2 - Idle Detection Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn idm(&mut self) -> IDM_W<PCR_ASCMODE_SPEC> {
         IDM_W::new(self, 2)
     }
     #[doc = "Bit 3 - Synchronization Break Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn sbien(&mut self) -> SBIEN_W<PCR_ASCMODE_SPEC> {
         SBIEN_W::new(self, 3)
     }
     #[doc = "Bit 4 - Collision Detection Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cden(&mut self) -> CDEN_W<PCR_ASCMODE_SPEC> {
         CDEN_W::new(self, 4)
     }
     #[doc = "Bit 5 - Receiver Noise Detection Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rnien(&mut self) -> RNIEN_W<PCR_ASCMODE_SPEC> {
         RNIEN_W::new(self, 5)
     }
     #[doc = "Bit 6 - Format Error Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn feien(&mut self) -> FEIEN_W<PCR_ASCMODE_SPEC> {
         FEIEN_W::new(self, 6)
     }
     #[doc = "Bit 7 - Frame Finished Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ffien(&mut self) -> FFIEN_W<PCR_ASCMODE_SPEC> {
         FFIEN_W::new(self, 7)
     }
     #[doc = "Bits 8:12 - Sample Point"]
     #[inline(always)]
-    #[must_use]
     pub fn sp(&mut self) -> SP_W<PCR_ASCMODE_SPEC> {
         SP_W::new(self, 8)
     }
     #[doc = "Bits 13:15 - Pulse Length"]
     #[inline(always)]
-    #[must_use]
     pub fn pl(&mut self) -> PL_W<PCR_ASCMODE_SPEC> {
         PL_W::new(self, 13)
     }
     #[doc = "Bit 16 - Receiver Status Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rsten(&mut self) -> RSTEN_W<PCR_ASCMODE_SPEC> {
         RSTEN_W::new(self, 16)
     }
     #[doc = "Bit 17 - Transmitter Status Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tsten(&mut self) -> TSTEN_W<PCR_ASCMODE_SPEC> {
         TSTEN_W::new(self, 17)
     }
     #[doc = "Bit 31 - Master Clock Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mclk(&mut self) -> MCLK_W<PCR_ASCMODE_SPEC> {
         MCLK_W::new(self, 31)
     }
diff --git a/src/usic0_ch0/pcr_iicmode.rs b/src/usic0_ch0/pcr_iicmode.rs
index a833776b..0e76399a 100644
--- a/src/usic0_ch0/pcr_iicmode.rs
+++ b/src/usic0_ch0/pcr_iicmode.rs
@@ -721,85 +721,71 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Slave Address"]
     #[inline(always)]
-    #[must_use]
     pub fn slad(&mut self) -> SLAD_W<PCR_IICMODE_SPEC> {
         SLAD_W::new(self, 0)
     }
     #[doc = "Bit 16 - Acknowledge 00H"]
     #[inline(always)]
-    #[must_use]
     pub fn ack00(&mut self) -> ACK00_W<PCR_IICMODE_SPEC> {
         ACK00_W::new(self, 16)
     }
     #[doc = "Bit 17 - Symbol Timing"]
     #[inline(always)]
-    #[must_use]
     pub fn stim(&mut self) -> STIM_W<PCR_IICMODE_SPEC> {
         STIM_W::new(self, 17)
     }
     #[doc = "Bit 18 - Start Condition Received Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn scrien(&mut self) -> SCRIEN_W<PCR_IICMODE_SPEC> {
         SCRIEN_W::new(self, 18)
     }
     #[doc = "Bit 19 - Repeated Start Condition Received Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rscrien(&mut self) -> RSCRIEN_W<PCR_IICMODE_SPEC> {
         RSCRIEN_W::new(self, 19)
     }
     #[doc = "Bit 20 - Stop Condition Received Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pcrien(&mut self) -> PCRIEN_W<PCR_IICMODE_SPEC> {
         PCRIEN_W::new(self, 20)
     }
     #[doc = "Bit 21 - Non-Acknowledge Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn nackien(&mut self) -> NACKIEN_W<PCR_IICMODE_SPEC> {
         NACKIEN_W::new(self, 21)
     }
     #[doc = "Bit 22 - Arbitration Lost Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn arlien(&mut self) -> ARLIEN_W<PCR_IICMODE_SPEC> {
         ARLIEN_W::new(self, 22)
     }
     #[doc = "Bit 23 - Slave Read Request Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn srrien(&mut self) -> SRRIEN_W<PCR_IICMODE_SPEC> {
         SRRIEN_W::new(self, 23)
     }
     #[doc = "Bit 24 - Error Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn errien(&mut self) -> ERRIEN_W<PCR_IICMODE_SPEC> {
         ERRIEN_W::new(self, 24)
     }
     #[doc = "Bit 25 - Slave Acknowledge Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn sackdis(&mut self) -> SACKDIS_W<PCR_IICMODE_SPEC> {
         SACKDIS_W::new(self, 25)
     }
     #[doc = "Bits 26:29 - Hardware Delay"]
     #[inline(always)]
-    #[must_use]
     pub fn hdel(&mut self) -> HDEL_W<PCR_IICMODE_SPEC> {
         HDEL_W::new(self, 26)
     }
     #[doc = "Bit 30 - Acknowledge Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn ackien(&mut self) -> ACKIEN_W<PCR_IICMODE_SPEC> {
         ACKIEN_W::new(self, 30)
     }
     #[doc = "Bit 31 - Master Clock Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mclk(&mut self) -> MCLK_W<PCR_IICMODE_SPEC> {
         MCLK_W::new(self, 31)
     }
diff --git a/src/usic0_ch0/pcr_iismode.rs b/src/usic0_ch0/pcr_iismode.rs
index 2b18c4a9..99d1097c 100644
--- a/src/usic0_ch0/pcr_iismode.rs
+++ b/src/usic0_ch0/pcr_iismode.rs
@@ -480,55 +480,46 @@ impl R {
 impl W {
     #[doc = "Bit 0 - WA Generation Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn wagen(&mut self) -> WAGEN_W<PCR_IISMODE_SPEC> {
         WAGEN_W::new(self, 0)
     }
     #[doc = "Bit 1 - Data Transfers Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dten(&mut self) -> DTEN_W<PCR_IISMODE_SPEC> {
         DTEN_W::new(self, 1)
     }
     #[doc = "Bit 2 - Select Inversion"]
     #[inline(always)]
-    #[must_use]
     pub fn selinv(&mut self) -> SELINV_W<PCR_IISMODE_SPEC> {
         SELINV_W::new(self, 2)
     }
     #[doc = "Bit 4 - WA Falling Edge Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn wafeien(&mut self) -> WAFEIEN_W<PCR_IISMODE_SPEC> {
         WAFEIEN_W::new(self, 4)
     }
     #[doc = "Bit 5 - WA Rising Edge Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn wareien(&mut self) -> WAREIEN_W<PCR_IISMODE_SPEC> {
         WAREIEN_W::new(self, 5)
     }
     #[doc = "Bit 6 - END Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn endien(&mut self) -> ENDIEN_W<PCR_IISMODE_SPEC> {
         ENDIEN_W::new(self, 6)
     }
     #[doc = "Bit 15 - DX2T Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dx2tien(&mut self) -> DX2TIEN_W<PCR_IISMODE_SPEC> {
         DX2TIEN_W::new(self, 15)
     }
     #[doc = "Bits 16:21 - Transfer Delay"]
     #[inline(always)]
-    #[must_use]
     pub fn tdel(&mut self) -> TDEL_W<PCR_IISMODE_SPEC> {
         TDEL_W::new(self, 16)
     }
     #[doc = "Bit 31 - Master Clock Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mclk(&mut self) -> MCLK_W<PCR_IISMODE_SPEC> {
         MCLK_W::new(self, 31)
     }
diff --git a/src/usic0_ch0/pcr_sscmode.rs b/src/usic0_ch0/pcr_sscmode.rs
index 6904186e..6ad8be0f 100644
--- a/src/usic0_ch0/pcr_sscmode.rs
+++ b/src/usic0_ch0/pcr_sscmode.rs
@@ -761,85 +761,71 @@ impl R {
 impl W {
     #[doc = "Bit 0 - MSLS Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mslsen(&mut self) -> MSLSEN_W<PCR_SSCMODE_SPEC> {
         MSLSEN_W::new(self, 0)
     }
     #[doc = "Bit 1 - Select Control"]
     #[inline(always)]
-    #[must_use]
     pub fn selctr(&mut self) -> SELCTR_W<PCR_SSCMODE_SPEC> {
         SELCTR_W::new(self, 1)
     }
     #[doc = "Bit 2 - Select Inversion"]
     #[inline(always)]
-    #[must_use]
     pub fn selinv(&mut self) -> SELINV_W<PCR_SSCMODE_SPEC> {
         SELINV_W::new(self, 2)
     }
     #[doc = "Bit 3 - Frame End Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn fem(&mut self) -> FEM_W<PCR_SSCMODE_SPEC> {
         FEM_W::new(self, 3)
     }
     #[doc = "Bits 4:5 - Input Frequency Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn ctqsel1(&mut self) -> CTQSEL1_W<PCR_SSCMODE_SPEC> {
         CTQSEL1_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Divider Factor PCTQ1 for Tiw and Tnf"]
     #[inline(always)]
-    #[must_use]
     pub fn pctq1(&mut self) -> PCTQ1_W<PCR_SSCMODE_SPEC> {
         PCTQ1_W::new(self, 6)
     }
     #[doc = "Bits 8:12 - Divider Factor DCTQ1 for Tiw and Tnf"]
     #[inline(always)]
-    #[must_use]
     pub fn dctq1(&mut self) -> DCTQ1_W<PCR_SSCMODE_SPEC> {
         DCTQ1_W::new(self, 8)
     }
     #[doc = "Bit 13 - Parity Error Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn parien(&mut self) -> PARIEN_W<PCR_SSCMODE_SPEC> {
         PARIEN_W::new(self, 13)
     }
     #[doc = "Bit 14 - MSLS Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mslsien(&mut self) -> MSLSIEN_W<PCR_SSCMODE_SPEC> {
         MSLSIEN_W::new(self, 14)
     }
     #[doc = "Bit 15 - DX2T Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn dx2tien(&mut self) -> DX2TIEN_W<PCR_SSCMODE_SPEC> {
         DX2TIEN_W::new(self, 15)
     }
     #[doc = "Bits 16:23 - Select Output"]
     #[inline(always)]
-    #[must_use]
     pub fn selo(&mut self) -> SELO_W<PCR_SSCMODE_SPEC> {
         SELO_W::new(self, 16)
     }
     #[doc = "Bit 24 - Enable Inter-Word Delay Tiw"]
     #[inline(always)]
-    #[must_use]
     pub fn tiwen(&mut self) -> TIWEN_W<PCR_SSCMODE_SPEC> {
         TIWEN_W::new(self, 24)
     }
     #[doc = "Bit 25 - Slave Mode Clock Phase Select"]
     #[inline(always)]
-    #[must_use]
     pub fn slphsel(&mut self) -> SLPHSEL_W<PCR_SSCMODE_SPEC> {
         SLPHSEL_W::new(self, 25)
     }
     #[doc = "Bit 31 - Master Clock Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn mclk(&mut self) -> MCLK_W<PCR_SSCMODE_SPEC> {
         MCLK_W::new(self, 31)
     }
diff --git a/src/usic0_ch0/pscr.rs b/src/usic0_ch0/pscr.rs
index 67f11c5c..e83096d5 100644
--- a/src/usic0_ch0/pscr.rs
+++ b/src/usic0_ch0/pscr.rs
@@ -530,103 +530,86 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Status Flag 0 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst0(&mut self) -> CST0_W<PSCR_SPEC> {
         CST0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Status Flag 1 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst1(&mut self) -> CST1_W<PSCR_SPEC> {
         CST1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Status Flag 2 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst2(&mut self) -> CST2_W<PSCR_SPEC> {
         CST2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Clear Status Flag 3 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst3(&mut self) -> CST3_W<PSCR_SPEC> {
         CST3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Clear Status Flag 4 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst4(&mut self) -> CST4_W<PSCR_SPEC> {
         CST4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Clear Status Flag 5 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst5(&mut self) -> CST5_W<PSCR_SPEC> {
         CST5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Clear Status Flag 6 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst6(&mut self) -> CST6_W<PSCR_SPEC> {
         CST6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Clear Status Flag 7 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst7(&mut self) -> CST7_W<PSCR_SPEC> {
         CST7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Clear Status Flag 8 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst8(&mut self) -> CST8_W<PSCR_SPEC> {
         CST8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Clear Status Flag 9 in PSR"]
     #[inline(always)]
-    #[must_use]
     pub fn cst9(&mut self) -> CST9_W<PSCR_SPEC> {
         CST9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Clear Receiver Start Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn crsif(&mut self) -> CRSIF_W<PSCR_SPEC> {
         CRSIF_W::new(self, 10)
     }
     #[doc = "Bit 11 - Clear Data Lost Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn cdlif(&mut self) -> CDLIF_W<PSCR_SPEC> {
         CDLIF_W::new(self, 11)
     }
     #[doc = "Bit 12 - Clear Transmit Shift Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn ctsif(&mut self) -> CTSIF_W<PSCR_SPEC> {
         CTSIF_W::new(self, 12)
     }
     #[doc = "Bit 13 - Clear Transmit Buffer Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn ctbif(&mut self) -> CTBIF_W<PSCR_SPEC> {
         CTBIF_W::new(self, 13)
     }
     #[doc = "Bit 14 - Clear Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn crif(&mut self) -> CRIF_W<PSCR_SPEC> {
         CRIF_W::new(self, 14)
     }
     #[doc = "Bit 15 - Clear Alternative Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn caif(&mut self) -> CAIF_W<PSCR_SPEC> {
         CAIF_W::new(self, 15)
     }
     #[doc = "Bit 16 - Clear Baud Rate Generator Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn cbrgif(&mut self) -> CBRGIF_W<PSCR_SPEC> {
         CBRGIF_W::new(self, 16)
     }
diff --git a/src/usic0_ch0/psr.rs b/src/usic0_ch0/psr.rs
index 4743cef0..4c905ef1 100644
--- a/src/usic0_ch0/psr.rs
+++ b/src/usic0_ch0/psr.rs
@@ -503,103 +503,86 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Protocol Status Flag 0"]
     #[inline(always)]
-    #[must_use]
     pub fn st0(&mut self) -> ST0_W<PSR_SPEC> {
         ST0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Protocol Status Flag 1"]
     #[inline(always)]
-    #[must_use]
     pub fn st1(&mut self) -> ST1_W<PSR_SPEC> {
         ST1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Protocol Status Flag 2"]
     #[inline(always)]
-    #[must_use]
     pub fn st2(&mut self) -> ST2_W<PSR_SPEC> {
         ST2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Protocol Status Flag 3"]
     #[inline(always)]
-    #[must_use]
     pub fn st3(&mut self) -> ST3_W<PSR_SPEC> {
         ST3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Protocol Status Flag 4"]
     #[inline(always)]
-    #[must_use]
     pub fn st4(&mut self) -> ST4_W<PSR_SPEC> {
         ST4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Protocol Status Flag 5"]
     #[inline(always)]
-    #[must_use]
     pub fn st5(&mut self) -> ST5_W<PSR_SPEC> {
         ST5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Protocol Status Flag 6"]
     #[inline(always)]
-    #[must_use]
     pub fn st6(&mut self) -> ST6_W<PSR_SPEC> {
         ST6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Protocol Status Flag 7"]
     #[inline(always)]
-    #[must_use]
     pub fn st7(&mut self) -> ST7_W<PSR_SPEC> {
         ST7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Protocol Status Flag 8"]
     #[inline(always)]
-    #[must_use]
     pub fn st8(&mut self) -> ST8_W<PSR_SPEC> {
         ST8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Protocol Status Flag 9"]
     #[inline(always)]
-    #[must_use]
     pub fn st9(&mut self) -> ST9_W<PSR_SPEC> {
         ST9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Receiver Start Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rsif(&mut self) -> RSIF_W<PSR_SPEC> {
         RSIF_W::new(self, 10)
     }
     #[doc = "Bit 11 - Data Lost Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn dlif(&mut self) -> DLIF_W<PSR_SPEC> {
         DLIF_W::new(self, 11)
     }
     #[doc = "Bit 12 - Transmit Shift Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tsif(&mut self) -> TSIF_W<PSR_SPEC> {
         TSIF_W::new(self, 12)
     }
     #[doc = "Bit 13 - Transmit Buffer Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tbif(&mut self) -> TBIF_W<PSR_SPEC> {
         TBIF_W::new(self, 13)
     }
     #[doc = "Bit 14 - Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rif(&mut self) -> RIF_W<PSR_SPEC> {
         RIF_W::new(self, 14)
     }
     #[doc = "Bit 15 - Alternative Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn aif(&mut self) -> AIF_W<PSR_SPEC> {
         AIF_W::new(self, 15)
     }
     #[doc = "Bit 16 - Baud Rate Generator Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn brgif(&mut self) -> BRGIF_W<PSR_SPEC> {
         BRGIF_W::new(self, 16)
     }
diff --git a/src/usic0_ch0/psr_ascmode.rs b/src/usic0_ch0/psr_ascmode.rs
index 9ec6f072..c7a21d64 100644
--- a/src/usic0_ch0/psr_ascmode.rs
+++ b/src/usic0_ch0/psr_ascmode.rs
@@ -976,97 +976,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transmission Idle"]
     #[inline(always)]
-    #[must_use]
     pub fn txidle(&mut self) -> TXIDLE_W<PSR_ASCMODE_SPEC> {
         TXIDLE_W::new(self, 0)
     }
     #[doc = "Bit 1 - Reception Idle"]
     #[inline(always)]
-    #[must_use]
     pub fn rxidle(&mut self) -> RXIDLE_W<PSR_ASCMODE_SPEC> {
         RXIDLE_W::new(self, 1)
     }
     #[doc = "Bit 2 - Synchronization Break Detected"]
     #[inline(always)]
-    #[must_use]
     pub fn sbd(&mut self) -> SBD_W<PSR_ASCMODE_SPEC> {
         SBD_W::new(self, 2)
     }
     #[doc = "Bit 3 - Collision Detected"]
     #[inline(always)]
-    #[must_use]
     pub fn col(&mut self) -> COL_W<PSR_ASCMODE_SPEC> {
         COL_W::new(self, 3)
     }
     #[doc = "Bit 4 - Receiver Noise Detected"]
     #[inline(always)]
-    #[must_use]
     pub fn rns(&mut self) -> RNS_W<PSR_ASCMODE_SPEC> {
         RNS_W::new(self, 4)
     }
     #[doc = "Bit 5 - Format Error in Stop Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn fer0(&mut self) -> FER0_W<PSR_ASCMODE_SPEC> {
         FER0_W::new(self, 5)
     }
     #[doc = "Bit 6 - Format Error in Stop Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn fer1(&mut self) -> FER1_W<PSR_ASCMODE_SPEC> {
         FER1_W::new(self, 6)
     }
     #[doc = "Bit 7 - Receive Frame Finished"]
     #[inline(always)]
-    #[must_use]
     pub fn rff(&mut self) -> RFF_W<PSR_ASCMODE_SPEC> {
         RFF_W::new(self, 7)
     }
     #[doc = "Bit 8 - Transmitter Frame Finished"]
     #[inline(always)]
-    #[must_use]
     pub fn tff(&mut self) -> TFF_W<PSR_ASCMODE_SPEC> {
         TFF_W::new(self, 8)
     }
     #[doc = "Bit 10 - Receiver Start Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rsif(&mut self) -> RSIF_W<PSR_ASCMODE_SPEC> {
         RSIF_W::new(self, 10)
     }
     #[doc = "Bit 11 - Data Lost Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn dlif(&mut self) -> DLIF_W<PSR_ASCMODE_SPEC> {
         DLIF_W::new(self, 11)
     }
     #[doc = "Bit 12 - Transmit Shift Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tsif(&mut self) -> TSIF_W<PSR_ASCMODE_SPEC> {
         TSIF_W::new(self, 12)
     }
     #[doc = "Bit 13 - Transmit Buffer Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tbif(&mut self) -> TBIF_W<PSR_ASCMODE_SPEC> {
         TBIF_W::new(self, 13)
     }
     #[doc = "Bit 14 - Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rif(&mut self) -> RIF_W<PSR_ASCMODE_SPEC> {
         RIF_W::new(self, 14)
     }
     #[doc = "Bit 15 - Alternative Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn aif(&mut self) -> AIF_W<PSR_ASCMODE_SPEC> {
         AIF_W::new(self, 15)
     }
     #[doc = "Bit 16 - Baud Rate Generator Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn brgif(&mut self) -> BRGIF_W<PSR_ASCMODE_SPEC> {
         BRGIF_W::new(self, 16)
     }
diff --git a/src/usic0_ch0/psr_iicmode.rs b/src/usic0_ch0/psr_iicmode.rs
index eff9fb29..1aac69c2 100644
--- a/src/usic0_ch0/psr_iicmode.rs
+++ b/src/usic0_ch0/psr_iicmode.rs
@@ -993,103 +993,86 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Slave Select"]
     #[inline(always)]
-    #[must_use]
     pub fn slsel(&mut self) -> SLSEL_W<PSR_IICMODE_SPEC> {
         SLSEL_W::new(self, 0)
     }
     #[doc = "Bit 1 - Wrong TDF Code Found"]
     #[inline(always)]
-    #[must_use]
     pub fn wtdf(&mut self) -> WTDF_W<PSR_IICMODE_SPEC> {
         WTDF_W::new(self, 1)
     }
     #[doc = "Bit 2 - Start Condition Received"]
     #[inline(always)]
-    #[must_use]
     pub fn scr(&mut self) -> SCR_W<PSR_IICMODE_SPEC> {
         SCR_W::new(self, 2)
     }
     #[doc = "Bit 3 - Repeated Start Condition Received"]
     #[inline(always)]
-    #[must_use]
     pub fn rscr(&mut self) -> RSCR_W<PSR_IICMODE_SPEC> {
         RSCR_W::new(self, 3)
     }
     #[doc = "Bit 4 - Stop Condition Received"]
     #[inline(always)]
-    #[must_use]
     pub fn pcr(&mut self) -> PCR_W<PSR_IICMODE_SPEC> {
         PCR_W::new(self, 4)
     }
     #[doc = "Bit 5 - Non-Acknowledge Received"]
     #[inline(always)]
-    #[must_use]
     pub fn nack(&mut self) -> NACK_W<PSR_IICMODE_SPEC> {
         NACK_W::new(self, 5)
     }
     #[doc = "Bit 6 - Arbitration Lost"]
     #[inline(always)]
-    #[must_use]
     pub fn arl(&mut self) -> ARL_W<PSR_IICMODE_SPEC> {
         ARL_W::new(self, 6)
     }
     #[doc = "Bit 7 - Slave Read Request"]
     #[inline(always)]
-    #[must_use]
     pub fn srr(&mut self) -> SRR_W<PSR_IICMODE_SPEC> {
         SRR_W::new(self, 7)
     }
     #[doc = "Bit 8 - Error"]
     #[inline(always)]
-    #[must_use]
     pub fn err(&mut self) -> ERR_W<PSR_IICMODE_SPEC> {
         ERR_W::new(self, 8)
     }
     #[doc = "Bit 9 - Acknowledge Received"]
     #[inline(always)]
-    #[must_use]
     pub fn ack(&mut self) -> ACK_W<PSR_IICMODE_SPEC> {
         ACK_W::new(self, 9)
     }
     #[doc = "Bit 10 - Receiver Start Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rsif(&mut self) -> RSIF_W<PSR_IICMODE_SPEC> {
         RSIF_W::new(self, 10)
     }
     #[doc = "Bit 11 - Data Lost Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn dlif(&mut self) -> DLIF_W<PSR_IICMODE_SPEC> {
         DLIF_W::new(self, 11)
     }
     #[doc = "Bit 12 - Transmit Shift Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tsif(&mut self) -> TSIF_W<PSR_IICMODE_SPEC> {
         TSIF_W::new(self, 12)
     }
     #[doc = "Bit 13 - Transmit Buffer Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tbif(&mut self) -> TBIF_W<PSR_IICMODE_SPEC> {
         TBIF_W::new(self, 13)
     }
     #[doc = "Bit 14 - Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rif(&mut self) -> RIF_W<PSR_IICMODE_SPEC> {
         RIF_W::new(self, 14)
     }
     #[doc = "Bit 15 - Alternative Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn aif(&mut self) -> AIF_W<PSR_IICMODE_SPEC> {
         AIF_W::new(self, 15)
     }
     #[doc = "Bit 16 - Baud Rate Generator Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn brgif(&mut self) -> BRGIF_W<PSR_IICMODE_SPEC> {
         BRGIF_W::new(self, 16)
     }
diff --git a/src/usic0_ch0/psr_iismode.rs b/src/usic0_ch0/psr_iismode.rs
index 01085450..9af9a4bc 100644
--- a/src/usic0_ch0/psr_iismode.rs
+++ b/src/usic0_ch0/psr_iismode.rs
@@ -761,79 +761,66 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Word Address"]
     #[inline(always)]
-    #[must_use]
     pub fn wa(&mut self) -> WA_W<PSR_IISMODE_SPEC> {
         WA_W::new(self, 0)
     }
     #[doc = "Bit 1 - DX2S Status"]
     #[inline(always)]
-    #[must_use]
     pub fn dx2s(&mut self) -> DX2S_W<PSR_IISMODE_SPEC> {
         DX2S_W::new(self, 1)
     }
     #[doc = "Bit 3 - DX2T Event Detected"]
     #[inline(always)]
-    #[must_use]
     pub fn dx2tev(&mut self) -> DX2TEV_W<PSR_IISMODE_SPEC> {
         DX2TEV_W::new(self, 3)
     }
     #[doc = "Bit 4 - WA Falling Edge Event"]
     #[inline(always)]
-    #[must_use]
     pub fn wafe(&mut self) -> WAFE_W<PSR_IISMODE_SPEC> {
         WAFE_W::new(self, 4)
     }
     #[doc = "Bit 5 - WA Rising Edge Event"]
     #[inline(always)]
-    #[must_use]
     pub fn ware(&mut self) -> WARE_W<PSR_IISMODE_SPEC> {
         WARE_W::new(self, 5)
     }
     #[doc = "Bit 6 - WA Generation End"]
     #[inline(always)]
-    #[must_use]
     pub fn end(&mut self) -> END_W<PSR_IISMODE_SPEC> {
         END_W::new(self, 6)
     }
     #[doc = "Bit 10 - Receiver Start Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rsif(&mut self) -> RSIF_W<PSR_IISMODE_SPEC> {
         RSIF_W::new(self, 10)
     }
     #[doc = "Bit 11 - Data Lost Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn dlif(&mut self) -> DLIF_W<PSR_IISMODE_SPEC> {
         DLIF_W::new(self, 11)
     }
     #[doc = "Bit 12 - Transmit Shift Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tsif(&mut self) -> TSIF_W<PSR_IISMODE_SPEC> {
         TSIF_W::new(self, 12)
     }
     #[doc = "Bit 13 - Transmit Buffer Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tbif(&mut self) -> TBIF_W<PSR_IISMODE_SPEC> {
         TBIF_W::new(self, 13)
     }
     #[doc = "Bit 14 - Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rif(&mut self) -> RIF_W<PSR_IISMODE_SPEC> {
         RIF_W::new(self, 14)
     }
     #[doc = "Bit 15 - Alternative Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn aif(&mut self) -> AIF_W<PSR_IISMODE_SPEC> {
         AIF_W::new(self, 15)
     }
     #[doc = "Bit 16 - Baud Rate Generator Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn brgif(&mut self) -> BRGIF_W<PSR_IISMODE_SPEC> {
         BRGIF_W::new(self, 16)
     }
diff --git a/src/usic0_ch0/psr_sscmode.rs b/src/usic0_ch0/psr_sscmode.rs
index 69857d16..53aa7b2b 100644
--- a/src/usic0_ch0/psr_sscmode.rs
+++ b/src/usic0_ch0/psr_sscmode.rs
@@ -703,73 +703,61 @@ impl R {
 impl W {
     #[doc = "Bit 0 - MSLS Status"]
     #[inline(always)]
-    #[must_use]
     pub fn msls(&mut self) -> MSLS_W<PSR_SSCMODE_SPEC> {
         MSLS_W::new(self, 0)
     }
     #[doc = "Bit 1 - DX2S Status"]
     #[inline(always)]
-    #[must_use]
     pub fn dx2s(&mut self) -> DX2S_W<PSR_SSCMODE_SPEC> {
         DX2S_W::new(self, 1)
     }
     #[doc = "Bit 2 - MSLS Event Detected"]
     #[inline(always)]
-    #[must_use]
     pub fn mslsev(&mut self) -> MSLSEV_W<PSR_SSCMODE_SPEC> {
         MSLSEV_W::new(self, 2)
     }
     #[doc = "Bit 3 - DX2T Event Detected"]
     #[inline(always)]
-    #[must_use]
     pub fn dx2tev(&mut self) -> DX2TEV_W<PSR_SSCMODE_SPEC> {
         DX2TEV_W::new(self, 3)
     }
     #[doc = "Bit 4 - Parity Error Event Detected"]
     #[inline(always)]
-    #[must_use]
     pub fn parerr(&mut self) -> PARERR_W<PSR_SSCMODE_SPEC> {
         PARERR_W::new(self, 4)
     }
     #[doc = "Bit 10 - Receiver Start Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rsif(&mut self) -> RSIF_W<PSR_SSCMODE_SPEC> {
         RSIF_W::new(self, 10)
     }
     #[doc = "Bit 11 - Data Lost Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn dlif(&mut self) -> DLIF_W<PSR_SSCMODE_SPEC> {
         DLIF_W::new(self, 11)
     }
     #[doc = "Bit 12 - Transmit Shift Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tsif(&mut self) -> TSIF_W<PSR_SSCMODE_SPEC> {
         TSIF_W::new(self, 12)
     }
     #[doc = "Bit 13 - Transmit Buffer Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn tbif(&mut self) -> TBIF_W<PSR_SSCMODE_SPEC> {
         TBIF_W::new(self, 13)
     }
     #[doc = "Bit 14 - Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn rif(&mut self) -> RIF_W<PSR_SSCMODE_SPEC> {
         RIF_W::new(self, 14)
     }
     #[doc = "Bit 15 - Alternative Receive Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn aif(&mut self) -> AIF_W<PSR_SSCMODE_SPEC> {
         AIF_W::new(self, 15)
     }
     #[doc = "Bit 16 - Baud Rate Generator Indication Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn brgif(&mut self) -> BRGIF_W<PSR_SSCMODE_SPEC> {
         BRGIF_W::new(self, 16)
     }
diff --git a/src/usic0_ch0/rbctr.rs b/src/usic0_ch0/rbctr.rs
index f38026a3..69bec67a 100644
--- a/src/usic0_ch0/rbctr.rs
+++ b/src/usic0_ch0/rbctr.rs
@@ -915,79 +915,66 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Data Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn dptr(&mut self) -> DPTR_W<RBCTR_SPEC> {
         DPTR_W::new(self, 0)
     }
     #[doc = "Bits 8:13 - Limit For Interrupt Generation"]
     #[inline(always)]
-    #[must_use]
     pub fn limit(&mut self) -> LIMIT_W<RBCTR_SPEC> {
         LIMIT_W::new(self, 8)
     }
     #[doc = "Bit 14 - Standard Receive Buffer Trigger Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn srbtm(&mut self) -> SRBTM_W<RBCTR_SPEC> {
         SRBTM_W::new(self, 14)
     }
     #[doc = "Bit 15 - Standard Receive Buffer Trigger Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn srbten(&mut self) -> SRBTEN_W<RBCTR_SPEC> {
         SRBTEN_W::new(self, 15)
     }
     #[doc = "Bits 16:18 - Standard Receive Buffer Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn srbinp(&mut self) -> SRBINP_W<RBCTR_SPEC> {
         SRBINP_W::new(self, 16)
     }
     #[doc = "Bits 19:21 - Alternative Receive Buffer Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn arbinp(&mut self) -> ARBINP_W<RBCTR_SPEC> {
         ARBINP_W::new(self, 19)
     }
     #[doc = "Bits 22:23 - Receiver Control Information Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn rcim(&mut self) -> RCIM_W<RBCTR_SPEC> {
         RCIM_W::new(self, 22)
     }
     #[doc = "Bits 24:26 - Buffer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn size(&mut self) -> SIZE_W<RBCTR_SPEC> {
         SIZE_W::new(self, 24)
     }
     #[doc = "Bit 27 - Receiver Notification Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn rnm(&mut self) -> RNM_W<RBCTR_SPEC> {
         RNM_W::new(self, 27)
     }
     #[doc = "Bit 28 - Buffer Event on Limit Overflow"]
     #[inline(always)]
-    #[must_use]
     pub fn lof(&mut self) -> LOF_W<RBCTR_SPEC> {
         LOF_W::new(self, 28)
     }
     #[doc = "Bit 29 - Alternative Receive Buffer Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn arbien(&mut self) -> ARBIEN_W<RBCTR_SPEC> {
         ARBIEN_W::new(self, 29)
     }
     #[doc = "Bit 30 - Standard Receive Buffer Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn srbien(&mut self) -> SRBIEN_W<RBCTR_SPEC> {
         SRBIEN_W::new(self, 30)
     }
     #[doc = "Bit 31 - Receive Buffer Error Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rberien(&mut self) -> RBERIEN_W<RBCTR_SPEC> {
         RBERIEN_W::new(self, 31)
     }
diff --git a/src/usic0_ch0/sctr.rs b/src/usic0_ch0/sctr.rs
index 01502342..457c15a4 100644
--- a/src/usic0_ch0/sctr.rs
+++ b/src/usic0_ch0/sctr.rs
@@ -521,49 +521,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Shift Direction"]
     #[inline(always)]
-    #[must_use]
     pub fn sdir(&mut self) -> SDIR_W<SCTR_SPEC> {
         SDIR_W::new(self, 0)
     }
     #[doc = "Bit 1 - Passive Data Level"]
     #[inline(always)]
-    #[must_use]
     pub fn pdl(&mut self) -> PDL_W<SCTR_SPEC> {
         PDL_W::new(self, 1)
     }
     #[doc = "Bits 2:3 - Data Shift Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn dsm(&mut self) -> DSM_W<SCTR_SPEC> {
         DSM_W::new(self, 2)
     }
     #[doc = "Bit 4 - Port Control Direction"]
     #[inline(always)]
-    #[must_use]
     pub fn hpcdir(&mut self) -> HPCDIR_W<SCTR_SPEC> {
         HPCDIR_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Data Output Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn docfg(&mut self) -> DOCFG_W<SCTR_SPEC> {
         DOCFG_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Transmission Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn trm(&mut self) -> TRM_W<SCTR_SPEC> {
         TRM_W::new(self, 8)
     }
     #[doc = "Bits 16:21 - Frame Length"]
     #[inline(always)]
-    #[must_use]
     pub fn fle(&mut self) -> FLE_W<SCTR_SPEC> {
         FLE_W::new(self, 16)
     }
     #[doc = "Bits 24:27 - Word Length"]
     #[inline(always)]
-    #[must_use]
     pub fn wle(&mut self) -> WLE_W<SCTR_SPEC> {
         WLE_W::new(self, 24)
     }
diff --git a/src/usic0_ch0/tbctr.rs b/src/usic0_ch0/tbctr.rs
index efc913d7..5f294e41 100644
--- a/src/usic0_ch0/tbctr.rs
+++ b/src/usic0_ch0/tbctr.rs
@@ -672,61 +672,51 @@ impl R {
 impl W {
     #[doc = "Bits 0:5 - Data Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn dptr(&mut self) -> DPTR_W<TBCTR_SPEC> {
         DPTR_W::new(self, 0)
     }
     #[doc = "Bits 8:13 - Limit For Interrupt Generation"]
     #[inline(always)]
-    #[must_use]
     pub fn limit(&mut self) -> LIMIT_W<TBCTR_SPEC> {
         LIMIT_W::new(self, 8)
     }
     #[doc = "Bit 14 - Standard Transmit Buffer Trigger Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn stbtm(&mut self) -> STBTM_W<TBCTR_SPEC> {
         STBTM_W::new(self, 14)
     }
     #[doc = "Bit 15 - Standard Transmit Buffer Trigger Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn stbten(&mut self) -> STBTEN_W<TBCTR_SPEC> {
         STBTEN_W::new(self, 15)
     }
     #[doc = "Bits 16:18 - Standard Transmit Buffer Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn stbinp(&mut self) -> STBINP_W<TBCTR_SPEC> {
         STBINP_W::new(self, 16)
     }
     #[doc = "Bits 19:21 - Alternative Transmit Buffer Interrupt Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn atbinp(&mut self) -> ATBINP_W<TBCTR_SPEC> {
         ATBINP_W::new(self, 19)
     }
     #[doc = "Bits 24:26 - Buffer Size"]
     #[inline(always)]
-    #[must_use]
     pub fn size(&mut self) -> SIZE_W<TBCTR_SPEC> {
         SIZE_W::new(self, 24)
     }
     #[doc = "Bit 28 - Buffer Event on Limit Overflow"]
     #[inline(always)]
-    #[must_use]
     pub fn lof(&mut self) -> LOF_W<TBCTR_SPEC> {
         LOF_W::new(self, 28)
     }
     #[doc = "Bit 30 - Standard Transmit Buffer Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn stbien(&mut self) -> STBIEN_W<TBCTR_SPEC> {
         STBIEN_W::new(self, 30)
     }
     #[doc = "Bit 31 - Transmit Buffer Error Interrupt Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tberien(&mut self) -> TBERIEN_W<TBCTR_SPEC> {
         TBERIEN_W::new(self, 31)
     }
diff --git a/src/usic0_ch0/tbuf.rs b/src/usic0_ch0/tbuf.rs
index 78006e7d..35b306b0 100644
--- a/src/usic0_ch0/tbuf.rs
+++ b/src/usic0_ch0/tbuf.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Transmit Data"]
     #[inline(always)]
-    #[must_use]
     pub fn tdata(&mut self) -> TDATA_W<TBUF_SPEC> {
         TDATA_W::new(self, 0)
     }
diff --git a/src/usic0_ch0/tcsr.rs b/src/usic0_ch0/tcsr.rs
index 33ba2036..00f2cd75 100644
--- a/src/usic0_ch0/tcsr.rs
+++ b/src/usic0_ch0/tcsr.rs
@@ -889,67 +889,56 @@ impl R {
 impl W {
     #[doc = "Bit 0 - WLE Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn wlemd(&mut self) -> WLEMD_W<TCSR_SPEC> {
         WLEMD_W::new(self, 0)
     }
     #[doc = "Bit 1 - Select Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn selmd(&mut self) -> SELMD_W<TCSR_SPEC> {
         SELMD_W::new(self, 1)
     }
     #[doc = "Bit 2 - FLE Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn flemd(&mut self) -> FLEMD_W<TCSR_SPEC> {
         FLEMD_W::new(self, 2)
     }
     #[doc = "Bit 3 - WA Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn wamd(&mut self) -> WAMD_W<TCSR_SPEC> {
         WAMD_W::new(self, 3)
     }
     #[doc = "Bit 4 - Hardware Port Control Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn hpcmd(&mut self) -> HPCMD_W<TCSR_SPEC> {
         HPCMD_W::new(self, 4)
     }
     #[doc = "Bit 5 - Start Of Frame"]
     #[inline(always)]
-    #[must_use]
     pub fn sof(&mut self) -> SOF_W<TCSR_SPEC> {
         SOF_W::new(self, 5)
     }
     #[doc = "Bit 6 - End Of Frame"]
     #[inline(always)]
-    #[must_use]
     pub fn eof(&mut self) -> EOF_W<TCSR_SPEC> {
         EOF_W::new(self, 6)
     }
     #[doc = "Bit 8 - TBUF Data Single Shot Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tdssm(&mut self) -> TDSSM_W<TCSR_SPEC> {
         TDSSM_W::new(self, 8)
     }
     #[doc = "Bits 10:11 - TBUF Data Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tden(&mut self) -> TDEN_W<TCSR_SPEC> {
         TDEN_W::new(self, 10)
     }
     #[doc = "Bit 12 - TBUF Data Valid Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn tdvtr(&mut self) -> TDVTR_W<TCSR_SPEC> {
         TDVTR_W::new(self, 12)
     }
     #[doc = "Bit 13 - Word Address"]
     #[inline(always)]
-    #[must_use]
     pub fn wa(&mut self) -> WA_W<TCSR_SPEC> {
         WA_W::new(self, 13)
     }
diff --git a/src/usic0_ch0/trbscr.rs b/src/usic0_ch0/trbscr.rs
index 61d99c08..988689b6 100644
--- a/src/usic0_ch0/trbscr.rs
+++ b/src/usic0_ch0/trbscr.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Standard Receive Buffer Event"]
     #[inline(always)]
-    #[must_use]
     pub fn csrbi(&mut self) -> CSRBI_W<TRBSCR_SPEC> {
         CSRBI_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Receive Buffer Error Event"]
     #[inline(always)]
-    #[must_use]
     pub fn crberi(&mut self) -> CRBERI_W<TRBSCR_SPEC> {
         CRBERI_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Alternative Receive Buffer Event"]
     #[inline(always)]
-    #[must_use]
     pub fn carbi(&mut self) -> CARBI_W<TRBSCR_SPEC> {
         CARBI_W::new(self, 2)
     }
     #[doc = "Bit 8 - Clear Standard Transmit Buffer Event"]
     #[inline(always)]
-    #[must_use]
     pub fn cstbi(&mut self) -> CSTBI_W<TRBSCR_SPEC> {
         CSTBI_W::new(self, 8)
     }
     #[doc = "Bit 9 - Clear Transmit Buffer Error Event"]
     #[inline(always)]
-    #[must_use]
     pub fn ctberi(&mut self) -> CTBERI_W<TRBSCR_SPEC> {
         CTBERI_W::new(self, 9)
     }
     #[doc = "Bit 10 - Clear Bypass Data Valid"]
     #[inline(always)]
-    #[must_use]
     pub fn cbdv(&mut self) -> CBDV_W<TRBSCR_SPEC> {
         CBDV_W::new(self, 10)
     }
     #[doc = "Bit 14 - Flush Receive Buffer"]
     #[inline(always)]
-    #[must_use]
     pub fn flushrb(&mut self) -> FLUSHRB_W<TRBSCR_SPEC> {
         FLUSHRB_W::new(self, 14)
     }
     #[doc = "Bit 15 - Flush Transmit Buffer"]
     #[inline(always)]
-    #[must_use]
     pub fn flushtb(&mut self) -> FLUSHTB_W<TRBSCR_SPEC> {
         FLUSHTB_W::new(self, 15)
     }
diff --git a/src/usic0_ch0/trbsr.rs b/src/usic0_ch0/trbsr.rs
index 6234275c..8db05232 100644
--- a/src/usic0_ch0/trbsr.rs
+++ b/src/usic0_ch0/trbsr.rs
@@ -639,31 +639,26 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Standard Receive Buffer Event"]
     #[inline(always)]
-    #[must_use]
     pub fn srbi(&mut self) -> SRBI_W<TRBSR_SPEC> {
         SRBI_W::new(self, 0)
     }
     #[doc = "Bit 1 - Receive Buffer Error Event"]
     #[inline(always)]
-    #[must_use]
     pub fn rberi(&mut self) -> RBERI_W<TRBSR_SPEC> {
         RBERI_W::new(self, 1)
     }
     #[doc = "Bit 2 - Alternative Receive Buffer Event"]
     #[inline(always)]
-    #[must_use]
     pub fn arbi(&mut self) -> ARBI_W<TRBSR_SPEC> {
         ARBI_W::new(self, 2)
     }
     #[doc = "Bit 8 - Standard Transmit Buffer Event"]
     #[inline(always)]
-    #[must_use]
     pub fn stbi(&mut self) -> STBI_W<TRBSR_SPEC> {
         STBI_W::new(self, 8)
     }
     #[doc = "Bit 9 - Transmit Buffer Error Event"]
     #[inline(always)]
-    #[must_use]
     pub fn tberi(&mut self) -> TBERI_W<TRBSR_SPEC> {
         TBERI_W::new(self, 9)
     }
diff --git a/src/vadc/brsctrl.rs b/src/vadc/brsctrl.rs
index 896b800f..aceecead 100644
--- a/src/vadc/brsctrl.rs
+++ b/src/vadc/brsctrl.rs
@@ -270,37 +270,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Source-specific Result Register"]
     #[inline(always)]
-    #[must_use]
     pub fn srcresreg(&mut self) -> SRCRESREG_W<BRSCTRL_SPEC> {
         SRCRESREG_W::new(self, 0)
     }
     #[doc = "Bits 8:11 - External Trigger Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn xtsel(&mut self) -> XTSEL_W<BRSCTRL_SPEC> {
         XTSEL_W::new(self, 8)
     }
     #[doc = "Bits 13:14 - Trigger Operating Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn xtmode(&mut self) -> XTMODE_W<BRSCTRL_SPEC> {
         XTMODE_W::new(self, 13)
     }
     #[doc = "Bit 15 - Write Control for Trigger Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn xtwc(&mut self) -> XTWC_W<BRSCTRL_SPEC> {
         XTWC_W::new(self, 15)
     }
     #[doc = "Bits 16:19 - Gate Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn gtsel(&mut self) -> GTSEL_W<BRSCTRL_SPEC> {
         GTSEL_W::new(self, 16)
     }
     #[doc = "Bit 23 - Write Control for Gate Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn gtwc(&mut self) -> GTWC_W<BRSCTRL_SPEC> {
         GTWC_W::new(self, 23)
     }
diff --git a/src/vadc/brsmr.rs b/src/vadc/brsmr.rs
index 5241d160..8dd4f74f 100644
--- a/src/vadc/brsmr.rs
+++ b/src/vadc/brsmr.rs
@@ -491,49 +491,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Enable Gate"]
     #[inline(always)]
-    #[must_use]
     pub fn engt(&mut self) -> ENGT_W<BRSMR_SPEC> {
         ENGT_W::new(self, 0)
     }
     #[doc = "Bit 2 - Enable External Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn entr(&mut self) -> ENTR_W<BRSMR_SPEC> {
         ENTR_W::new(self, 2)
     }
     #[doc = "Bit 3 - Enable Source Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn ensi(&mut self) -> ENSI_W<BRSMR_SPEC> {
         ENSI_W::new(self, 3)
     }
     #[doc = "Bit 4 - Autoscan Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn scan(&mut self) -> SCAN_W<BRSMR_SPEC> {
         SCAN_W::new(self, 4)
     }
     #[doc = "Bit 5 - Autoscan Source Load Event Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn ldm(&mut self) -> LDM_W<BRSMR_SPEC> {
         LDM_W::new(self, 5)
     }
     #[doc = "Bit 8 - Clear Pending Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn clrpnd(&mut self) -> CLRPND_W<BRSMR_SPEC> {
         CLRPND_W::new(self, 8)
     }
     #[doc = "Bit 9 - Generate Load Event"]
     #[inline(always)]
-    #[must_use]
     pub fn ldev(&mut self) -> LDEV_W<BRSMR_SPEC> {
         LDEV_W::new(self, 9)
     }
     #[doc = "Bit 16 - Repeat Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn rptdis(&mut self) -> RPTDIS_W<BRSMR_SPEC> {
         RPTDIS_W::new(self, 16)
     }
diff --git a/src/vadc/brspnd.rs b/src/vadc/brspnd.rs
index dcce6d87..8f76366c 100644
--- a/src/vadc/brspnd.rs
+++ b/src/vadc/brspnd.rs
@@ -471,49 +471,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channels Pending Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chpndg0(&mut self) -> CHPNDG0_W<BRSPND_SPEC> {
         CHPNDG0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Channels Pending Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chpndg1(&mut self) -> CHPNDG1_W<BRSPND_SPEC> {
         CHPNDG1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Channels Pending Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chpndg2(&mut self) -> CHPNDG2_W<BRSPND_SPEC> {
         CHPNDG2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Channels Pending Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chpndg3(&mut self) -> CHPNDG3_W<BRSPND_SPEC> {
         CHPNDG3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Channels Pending Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chpndg4(&mut self) -> CHPNDG4_W<BRSPND_SPEC> {
         CHPNDG4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Channels Pending Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chpndg5(&mut self) -> CHPNDG5_W<BRSPND_SPEC> {
         CHPNDG5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Channels Pending Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chpndg6(&mut self) -> CHPNDG6_W<BRSPND_SPEC> {
         CHPNDG6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Channels Pending Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chpndg7(&mut self) -> CHPNDG7_W<BRSPND_SPEC> {
         CHPNDG7_W::new(self, 7)
     }
diff --git a/src/vadc/brssel.rs b/src/vadc/brssel.rs
index 21ad8ceb..e10b4b55 100644
--- a/src/vadc/brssel.rs
+++ b/src/vadc/brssel.rs
@@ -471,49 +471,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel Selection Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chselg0(&mut self) -> CHSELG0_W<BRSSEL_SPEC> {
         CHSELG0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel Selection Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chselg1(&mut self) -> CHSELG1_W<BRSSEL_SPEC> {
         CHSELG1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel Selection Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chselg2(&mut self) -> CHSELG2_W<BRSSEL_SPEC> {
         CHSELG2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel Selection Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chselg3(&mut self) -> CHSELG3_W<BRSSEL_SPEC> {
         CHSELG3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Channel Selection Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chselg4(&mut self) -> CHSELG4_W<BRSSEL_SPEC> {
         CHSELG4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Channel Selection Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chselg5(&mut self) -> CHSELG5_W<BRSSEL_SPEC> {
         CHSELG5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Channel Selection Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chselg6(&mut self) -> CHSELG6_W<BRSSEL_SPEC> {
         CHSELG6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Channel Selection Group x"]
     #[inline(always)]
-    #[must_use]
     pub fn chselg7(&mut self) -> CHSELG7_W<BRSSEL_SPEC> {
         CHSELG7_W::new(self, 7)
     }
diff --git a/src/vadc/clc.rs b/src/vadc/clc.rs
index e1613540..19cf2cea 100644
--- a/src/vadc/clc.rs
+++ b/src/vadc/clc.rs
@@ -164,13 +164,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Module Disable Request Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn disr(&mut self) -> DISR_W<CLC_SPEC> {
         DISR_W::new(self, 0)
     }
     #[doc = "Bit 3 - Sleep Mode Enable Control"]
     #[inline(always)]
-    #[must_use]
     pub fn edis(&mut self) -> EDIS_W<CLC_SPEC> {
         EDIS_W::new(self, 3)
     }
diff --git a/src/vadc/emuxsel.rs b/src/vadc/emuxsel.rs
index abc1c7d8..c5fb1c47 100644
--- a/src/vadc/emuxsel.rs
+++ b/src/vadc/emuxsel.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - External Multiplexer Group for Interface x"]
     #[inline(always)]
-    #[must_use]
     pub fn emuxgrp0(&mut self) -> EMUXGRP0_W<EMUXSEL_SPEC> {
         EMUXGRP0_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - External Multiplexer Group for Interface x"]
     #[inline(always)]
-    #[must_use]
     pub fn emuxgrp1(&mut self) -> EMUXGRP1_W<EMUXSEL_SPEC> {
         EMUXGRP1_W::new(self, 4)
     }
diff --git a/src/vadc/globbound.rs b/src/vadc/globbound.rs
index 94700203..713df314 100644
--- a/src/vadc/globbound.rs
+++ b/src/vadc/globbound.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"]
     #[inline(always)]
-    #[must_use]
     pub fn boundary0(&mut self) -> BOUNDARY0_W<GLOBBOUND_SPEC> {
         BOUNDARY0_W::new(self, 0)
     }
     #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"]
     #[inline(always)]
-    #[must_use]
     pub fn boundary1(&mut self) -> BOUNDARY1_W<GLOBBOUND_SPEC> {
         BOUNDARY1_W::new(self, 16)
     }
diff --git a/src/vadc/globcfg.rs b/src/vadc/globcfg.rs
index 3c718764..75159bde 100644
--- a/src/vadc/globcfg.rs
+++ b/src/vadc/globcfg.rs
@@ -541,55 +541,46 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Divider Factor for the Analog Internal Clock"]
     #[inline(always)]
-    #[must_use]
     pub fn diva(&mut self) -> DIVA_W<GLOBCFG_SPEC> {
         DIVA_W::new(self, 0)
     }
     #[doc = "Bit 7 - Double Clock for the MSB Conversion"]
     #[inline(always)]
-    #[must_use]
     pub fn dcmsb(&mut self) -> DCMSB_W<GLOBCFG_SPEC> {
         DCMSB_W::new(self, 7)
     }
     #[doc = "Bits 8:9 - Divider Factor for the Arbiter Clock"]
     #[inline(always)]
-    #[must_use]
     pub fn divd(&mut self) -> DIVD_W<GLOBCFG_SPEC> {
         DIVD_W::new(self, 8)
     }
     #[doc = "Bit 15 - Write Control for Divider Parameters"]
     #[inline(always)]
-    #[must_use]
     pub fn divwc(&mut self) -> DIVWC_W<GLOBCFG_SPEC> {
         DIVWC_W::new(self, 15)
     }
     #[doc = "Bit 16 - Disable Post-Calibration"]
     #[inline(always)]
-    #[must_use]
     pub fn dpcal0(&mut self) -> DPCAL0_W<GLOBCFG_SPEC> {
         DPCAL0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Disable Post-Calibration"]
     #[inline(always)]
-    #[must_use]
     pub fn dpcal1(&mut self) -> DPCAL1_W<GLOBCFG_SPEC> {
         DPCAL1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Disable Post-Calibration"]
     #[inline(always)]
-    #[must_use]
     pub fn dpcal2(&mut self) -> DPCAL2_W<GLOBCFG_SPEC> {
         DPCAL2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Disable Post-Calibration"]
     #[inline(always)]
-    #[must_use]
     pub fn dpcal3(&mut self) -> DPCAL3_W<GLOBCFG_SPEC> {
         DPCAL3_W::new(self, 19)
     }
     #[doc = "Bit 31 - Start-Up Calibration"]
     #[inline(always)]
-    #[must_use]
     pub fn sucal(&mut self) -> SUCAL_W<GLOBCFG_SPEC> {
         SUCAL_W::new(self, 31)
     }
diff --git a/src/vadc/globeflag.rs b/src/vadc/globeflag.rs
index 258f9e3c..e24bd250 100644
--- a/src/vadc/globeflag.rs
+++ b/src/vadc/globeflag.rs
@@ -185,25 +185,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Source Event (Background)"]
     #[inline(always)]
-    #[must_use]
     pub fn sevglb(&mut self) -> SEVGLB_W<GLOBEFLAG_SPEC> {
         SEVGLB_W::new(self, 0)
     }
     #[doc = "Bit 8 - Global Result Event"]
     #[inline(always)]
-    #[must_use]
     pub fn revglb(&mut self) -> REVGLB_W<GLOBEFLAG_SPEC> {
         REVGLB_W::new(self, 8)
     }
     #[doc = "Bit 16 - Clear Source Event (Background)"]
     #[inline(always)]
-    #[must_use]
     pub fn sevglbclr(&mut self) -> SEVGLBCLR_W<GLOBEFLAG_SPEC> {
         SEVGLBCLR_W::new(self, 16)
     }
     #[doc = "Bit 24 - Clear Global Result Event"]
     #[inline(always)]
-    #[must_use]
     pub fn revglbclr(&mut self) -> REVGLBCLR_W<GLOBEFLAG_SPEC> {
         REVGLBCLR_W::new(self, 24)
     }
diff --git a/src/vadc/globevnp.rs b/src/vadc/globevnp.rs
index f5cb453b..40021062 100644
--- a/src/vadc/globevnp.rs
+++ b/src/vadc/globevnp.rs
@@ -189,13 +189,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Service Request Node Pointer Backgr. Source"]
     #[inline(always)]
-    #[must_use]
     pub fn sev0np(&mut self) -> SEV0NP_W<GLOBEVNP_SPEC> {
         SEV0NP_W::new(self, 0)
     }
     #[doc = "Bits 16:19 - Service Request Node Pointer Backgr. Result"]
     #[inline(always)]
-    #[must_use]
     pub fn rev0np(&mut self) -> REV0NP_W<GLOBEVNP_SPEC> {
         REV0NP_W::new(self, 16)
     }
diff --git a/src/vadc/globiclass.rs b/src/vadc/globiclass.rs
index e7300997..93c4a061 100644
--- a/src/vadc/globiclass.rs
+++ b/src/vadc/globiclass.rs
@@ -207,25 +207,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"]
     #[inline(always)]
-    #[must_use]
     pub fn stcs(&mut self) -> STCS_W<GLOBICLASS_SPEC> {
         STCS_W::new(self, 0)
     }
     #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"]
     #[inline(always)]
-    #[must_use]
     pub fn cms(&mut self) -> CMS_W<GLOBICLASS_SPEC> {
         CMS_W::new(self, 8)
     }
     #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"]
     #[inline(always)]
-    #[must_use]
     pub fn stce(&mut self) -> STCE_W<GLOBICLASS_SPEC> {
         STCE_W::new(self, 16)
     }
     #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"]
     #[inline(always)]
-    #[must_use]
     pub fn cme(&mut self) -> CME_W<GLOBICLASS_SPEC> {
         CME_W::new(self, 24)
     }
diff --git a/src/vadc/globrcr.rs b/src/vadc/globrcr.rs
index 3b3e3388..e714aaec 100644
--- a/src/vadc/globrcr.rs
+++ b/src/vadc/globrcr.rs
@@ -175,19 +175,16 @@ impl R {
 impl W {
     #[doc = "Bits 16:19 - Data Reduction Control"]
     #[inline(always)]
-    #[must_use]
     pub fn drctr(&mut self) -> DRCTR_W<GLOBRCR_SPEC> {
         DRCTR_W::new(self, 16)
     }
     #[doc = "Bit 24 - Wait-for-Read Mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn wfr(&mut self) -> WFR_W<GLOBRCR_SPEC> {
         WFR_W::new(self, 24)
     }
     #[doc = "Bit 31 - Service Request Generation Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn srgen(&mut self) -> SRGEN_W<GLOBRCR_SPEC> {
         SRGEN_W::new(self, 31)
     }
diff --git a/src/vadc/globres.rs b/src/vadc/globres.rs
index 019b9ee8..563302f0 100644
--- a/src/vadc/globres.rs
+++ b/src/vadc/globres.rs
@@ -143,13 +143,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Result of most recent conversion"]
     #[inline(always)]
-    #[must_use]
     pub fn result(&mut self) -> RESULT_W<GLOBRES_SPEC> {
         RESULT_W::new(self, 0)
     }
     #[doc = "Bit 31 - Valid Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn vf(&mut self) -> VF_W<GLOBRES_SPEC> {
         VF_W::new(self, 31)
     }
diff --git a/src/vadc/globresd.rs b/src/vadc/globresd.rs
index edfff83e..d09f940f 100644
--- a/src/vadc/globresd.rs
+++ b/src/vadc/globresd.rs
@@ -143,13 +143,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Result of most recent conversion"]
     #[inline(always)]
-    #[must_use]
     pub fn result(&mut self) -> RESULT_W<GLOBRESD_SPEC> {
         RESULT_W::new(self, 0)
     }
     #[doc = "Bit 31 - Valid Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn vf(&mut self) -> VF_W<GLOBRESD_SPEC> {
         VF_W::new(self, 31)
     }
diff --git a/src/vadc/globtf.rs b/src/vadc/globtf.rs
index 9d8aacec..974f42f8 100644
--- a/src/vadc/globtf.rs
+++ b/src/vadc/globtf.rs
@@ -285,37 +285,31 @@ impl R {
 impl W {
     #[doc = "Bits 4:7 - Converter Diagnostics Group"]
     #[inline(always)]
-    #[must_use]
     pub fn cdgr(&mut self) -> CDGR_W<GLOBTF_SPEC> {
         CDGR_W::new(self, 4)
     }
     #[doc = "Bit 8 - Converter Diagnostics Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn cden(&mut self) -> CDEN_W<GLOBTF_SPEC> {
         CDEN_W::new(self, 8)
     }
     #[doc = "Bits 9:10 - Converter Diagnostics Pull-Devices Select"]
     #[inline(always)]
-    #[must_use]
     pub fn cdsel(&mut self) -> CDSEL_W<GLOBTF_SPEC> {
         CDSEL_W::new(self, 9)
     }
     #[doc = "Bit 15 - Write Control for Conversion Diagnostics"]
     #[inline(always)]
-    #[must_use]
     pub fn cdwc(&mut self) -> CDWC_W<GLOBTF_SPEC> {
         CDWC_W::new(self, 15)
     }
     #[doc = "Bit 16 - Pull-Down Diagnostics Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn pdd(&mut self) -> PDD_W<GLOBTF_SPEC> {
         PDD_W::new(self, 16)
     }
     #[doc = "Bit 23 - Write Control for Multiplexer Diagnostics"]
     #[inline(always)]
-    #[must_use]
     pub fn mdwc(&mut self) -> MDWC_W<GLOBTF_SPEC> {
         MDWC_W::new(self, 23)
     }
diff --git a/src/vadc/ocs.rs b/src/vadc/ocs.rs
index f95037fd..d695ca8a 100644
--- a/src/vadc/ocs.rs
+++ b/src/vadc/ocs.rs
@@ -266,31 +266,26 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Trigger Set for OTGB0/1"]
     #[inline(always)]
-    #[must_use]
     pub fn tgs(&mut self) -> TGS_W<OCS_SPEC> {
         TGS_W::new(self, 0)
     }
     #[doc = "Bit 2 - OTGB0/1 Bus Select"]
     #[inline(always)]
-    #[must_use]
     pub fn tgb(&mut self) -> TGB_W<OCS_SPEC> {
         TGB_W::new(self, 2)
     }
     #[doc = "Bit 3 - TGS, TGB Write Protection"]
     #[inline(always)]
-    #[must_use]
     pub fn tg_p(&mut self) -> TG_P_W<OCS_SPEC> {
         TG_P_W::new(self, 3)
     }
     #[doc = "Bits 24:27 - OCDS Suspend Control"]
     #[inline(always)]
-    #[must_use]
     pub fn sus(&mut self) -> SUS_W<OCS_SPEC> {
         SUS_W::new(self, 24)
     }
     #[doc = "Bit 28 - SUS Write Protection"]
     #[inline(always)]
-    #[must_use]
     pub fn sus_p(&mut self) -> SUS_P_W<OCS_SPEC> {
         SUS_P_W::new(self, 28)
     }
diff --git a/src/vadc_g0.rs b/src/vadc_g0.rs
index 0d4a3067..b8a27c8d 100644
--- a/src/vadc_g0.rs
+++ b/src/vadc_g0.rs
@@ -144,12 +144,12 @@ impl RegisterBlock {
     #[doc = "0x110 - Queue 0 Backup Register"]
     #[inline(always)]
     pub const fn qbur0(&self) -> &QBUR0 {
-        unsafe { &*(self as *const Self).cast::<u8>().add(272).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(272).cast() }
     }
     #[doc = "0x110 - Queue 0 Input Register"]
     #[inline(always)]
     pub const fn qinr0(&self) -> &QINR0 {
-        unsafe { &*(self as *const Self).cast::<u8>().add(272).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(272).cast() }
     }
     #[doc = "0x120 - Autoscan Source Control Register"]
     #[inline(always)]
diff --git a/src/vadc_g0/alias.rs b/src/vadc_g0/alias.rs
index 3029b53d..efbbd1a9 100644
--- a/src/vadc_g0/alias.rs
+++ b/src/vadc_g0/alias.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Alias Value for CH0 Conversion Requests"]
     #[inline(always)]
-    #[must_use]
     pub fn alias0(&mut self) -> ALIAS0_W<ALIAS_SPEC> {
         ALIAS0_W::new(self, 0)
     }
     #[doc = "Bits 8:12 - Alias Value for CH1 Conversion Requests"]
     #[inline(always)]
-    #[must_use]
     pub fn alias1(&mut self) -> ALIAS1_W<ALIAS_SPEC> {
         ALIAS1_W::new(self, 8)
     }
diff --git a/src/vadc_g0/arbcfg.rs b/src/vadc_g0/arbcfg.rs
index 633b6356..9aa26f2a 100644
--- a/src/vadc_g0/arbcfg.rs
+++ b/src/vadc_g0/arbcfg.rs
@@ -335,19 +335,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Analog Converter Control"]
     #[inline(always)]
-    #[must_use]
     pub fn anonc(&mut self) -> ANONC_W<ARBCFG_SPEC> {
         ANONC_W::new(self, 0)
     }
     #[doc = "Bits 4:5 - Arbitration Round Length"]
     #[inline(always)]
-    #[must_use]
     pub fn arbrnd(&mut self) -> ARBRND_W<ARBCFG_SPEC> {
         ARBRND_W::new(self, 4)
     }
     #[doc = "Bit 7 - Arbitration Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn arbm(&mut self) -> ARBM_W<ARBCFG_SPEC> {
         ARBM_W::new(self, 7)
     }
diff --git a/src/vadc_g0/arbpr.rs b/src/vadc_g0/arbpr.rs
index fdb1c9ec..9679cfcf 100644
--- a/src/vadc_g0/arbpr.rs
+++ b/src/vadc_g0/arbpr.rs
@@ -550,55 +550,46 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Priority of Request Source x"]
     #[inline(always)]
-    #[must_use]
     pub fn prio0(&mut self) -> PRIO0_W<ARBPR_SPEC> {
         PRIO0_W::new(self, 0)
     }
     #[doc = "Bit 3 - Conversion Start Mode of Request Source x"]
     #[inline(always)]
-    #[must_use]
     pub fn csm0(&mut self) -> CSM0_W<ARBPR_SPEC> {
         CSM0_W::new(self, 3)
     }
     #[doc = "Bits 4:5 - Priority of Request Source x"]
     #[inline(always)]
-    #[must_use]
     pub fn prio1(&mut self) -> PRIO1_W<ARBPR_SPEC> {
         PRIO1_W::new(self, 4)
     }
     #[doc = "Bit 7 - Conversion Start Mode of Request Source x"]
     #[inline(always)]
-    #[must_use]
     pub fn csm1(&mut self) -> CSM1_W<ARBPR_SPEC> {
         CSM1_W::new(self, 7)
     }
     #[doc = "Bits 8:9 - Priority of Request Source x"]
     #[inline(always)]
-    #[must_use]
     pub fn prio2(&mut self) -> PRIO2_W<ARBPR_SPEC> {
         PRIO2_W::new(self, 8)
     }
     #[doc = "Bit 11 - Conversion Start Mode of Request Source x"]
     #[inline(always)]
-    #[must_use]
     pub fn csm2(&mut self) -> CSM2_W<ARBPR_SPEC> {
         CSM2_W::new(self, 11)
     }
     #[doc = "Bit 24 - Arbitration Slot 0 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn asen0(&mut self) -> ASEN0_W<ARBPR_SPEC> {
         ASEN0_W::new(self, 24)
     }
     #[doc = "Bit 25 - Arbitration Slot 1 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn asen1(&mut self) -> ASEN1_W<ARBPR_SPEC> {
         ASEN1_W::new(self, 25)
     }
     #[doc = "Bit 26 - Arbitration Slot 2 Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn asen2(&mut self) -> ASEN2_W<ARBPR_SPEC> {
         ASEN2_W::new(self, 26)
     }
diff --git a/src/vadc_g0/asctrl.rs b/src/vadc_g0/asctrl.rs
index a8c19c4f..dc4ae8f2 100644
--- a/src/vadc_g0/asctrl.rs
+++ b/src/vadc_g0/asctrl.rs
@@ -359,49 +359,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Source-specific Result Register"]
     #[inline(always)]
-    #[must_use]
     pub fn srcresreg(&mut self) -> SRCRESREG_W<ASCTRL_SPEC> {
         SRCRESREG_W::new(self, 0)
     }
     #[doc = "Bits 8:11 - External Trigger Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn xtsel(&mut self) -> XTSEL_W<ASCTRL_SPEC> {
         XTSEL_W::new(self, 8)
     }
     #[doc = "Bits 13:14 - Trigger Operating Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn xtmode(&mut self) -> XTMODE_W<ASCTRL_SPEC> {
         XTMODE_W::new(self, 13)
     }
     #[doc = "Bit 15 - Write Control for Trigger Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn xtwc(&mut self) -> XTWC_W<ASCTRL_SPEC> {
         XTWC_W::new(self, 15)
     }
     #[doc = "Bits 16:19 - Gate Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn gtsel(&mut self) -> GTSEL_W<ASCTRL_SPEC> {
         GTSEL_W::new(self, 16)
     }
     #[doc = "Bit 23 - Write Control for Gate Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn gtwc(&mut self) -> GTWC_W<ASCTRL_SPEC> {
         GTWC_W::new(self, 23)
     }
     #[doc = "Bit 28 - Timer Mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tmen(&mut self) -> TMEN_W<ASCTRL_SPEC> {
         TMEN_W::new(self, 28)
     }
     #[doc = "Bit 31 - Write Control for Timer Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tmwc(&mut self) -> TMWC_W<ASCTRL_SPEC> {
         TMWC_W::new(self, 31)
     }
diff --git a/src/vadc_g0/asmr.rs b/src/vadc_g0/asmr.rs
index 0cd23894..53614027 100644
--- a/src/vadc_g0/asmr.rs
+++ b/src/vadc_g0/asmr.rs
@@ -491,49 +491,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Enable Gate"]
     #[inline(always)]
-    #[must_use]
     pub fn engt(&mut self) -> ENGT_W<ASMR_SPEC> {
         ENGT_W::new(self, 0)
     }
     #[doc = "Bit 2 - Enable External Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn entr(&mut self) -> ENTR_W<ASMR_SPEC> {
         ENTR_W::new(self, 2)
     }
     #[doc = "Bit 3 - Enable Source Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn ensi(&mut self) -> ENSI_W<ASMR_SPEC> {
         ENSI_W::new(self, 3)
     }
     #[doc = "Bit 4 - Autoscan Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn scan(&mut self) -> SCAN_W<ASMR_SPEC> {
         SCAN_W::new(self, 4)
     }
     #[doc = "Bit 5 - Autoscan Source Load Event Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn ldm(&mut self) -> LDM_W<ASMR_SPEC> {
         LDM_W::new(self, 5)
     }
     #[doc = "Bit 8 - Clear Pending Bits"]
     #[inline(always)]
-    #[must_use]
     pub fn clrpnd(&mut self) -> CLRPND_W<ASMR_SPEC> {
         CLRPND_W::new(self, 8)
     }
     #[doc = "Bit 9 - Generate Load Event"]
     #[inline(always)]
-    #[must_use]
     pub fn ldev(&mut self) -> LDEV_W<ASMR_SPEC> {
         LDEV_W::new(self, 9)
     }
     #[doc = "Bit 16 - Repeat Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn rptdis(&mut self) -> RPTDIS_W<ASMR_SPEC> {
         RPTDIS_W::new(self, 16)
     }
diff --git a/src/vadc_g0/aspnd.rs b/src/vadc_g0/aspnd.rs
index 1ac92e4f..c487e87b 100644
--- a/src/vadc_g0/aspnd.rs
+++ b/src/vadc_g0/aspnd.rs
@@ -471,49 +471,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channels Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn chpnd0(&mut self) -> CHPND0_W<ASPND_SPEC> {
         CHPND0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Channels Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn chpnd1(&mut self) -> CHPND1_W<ASPND_SPEC> {
         CHPND1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Channels Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn chpnd2(&mut self) -> CHPND2_W<ASPND_SPEC> {
         CHPND2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Channels Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn chpnd3(&mut self) -> CHPND3_W<ASPND_SPEC> {
         CHPND3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Channels Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn chpnd4(&mut self) -> CHPND4_W<ASPND_SPEC> {
         CHPND4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Channels Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn chpnd5(&mut self) -> CHPND5_W<ASPND_SPEC> {
         CHPND5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Channels Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn chpnd6(&mut self) -> CHPND6_W<ASPND_SPEC> {
         CHPND6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Channels Pending"]
     #[inline(always)]
-    #[must_use]
     pub fn chpnd7(&mut self) -> CHPND7_W<ASPND_SPEC> {
         CHPND7_W::new(self, 7)
     }
diff --git a/src/vadc_g0/assel.rs b/src/vadc_g0/assel.rs
index d92af792..b2505d07 100644
--- a/src/vadc_g0/assel.rs
+++ b/src/vadc_g0/assel.rs
@@ -471,49 +471,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn chsel0(&mut self) -> CHSEL0_W<ASSEL_SPEC> {
         CHSEL0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn chsel1(&mut self) -> CHSEL1_W<ASSEL_SPEC> {
         CHSEL1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn chsel2(&mut self) -> CHSEL2_W<ASSEL_SPEC> {
         CHSEL2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn chsel3(&mut self) -> CHSEL3_W<ASSEL_SPEC> {
         CHSEL3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Channel Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn chsel4(&mut self) -> CHSEL4_W<ASSEL_SPEC> {
         CHSEL4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Channel Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn chsel5(&mut self) -> CHSEL5_W<ASSEL_SPEC> {
         CHSEL5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Channel Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn chsel6(&mut self) -> CHSEL6_W<ASSEL_SPEC> {
         CHSEL6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Channel Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn chsel7(&mut self) -> CHSEL7_W<ASSEL_SPEC> {
         CHSEL7_W::new(self, 7)
     }
diff --git a/src/vadc_g0/bfl.rs b/src/vadc_g0/bfl.rs
index d793de95..0e22b3ef 100644
--- a/src/vadc_g0/bfl.rs
+++ b/src/vadc_g0/bfl.rs
@@ -635,49 +635,41 @@ impl R {
 impl W {
     #[doc = "Bit 8 - Boundary Flag 0 Activation Select"]
     #[inline(always)]
-    #[must_use]
     pub fn bfa0(&mut self) -> BFA0_W<BFL_SPEC> {
         BFA0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Boundary Flag 1 Activation Select"]
     #[inline(always)]
-    #[must_use]
     pub fn bfa1(&mut self) -> BFA1_W<BFL_SPEC> {
         BFA1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Boundary Flag 2 Activation Select"]
     #[inline(always)]
-    #[must_use]
     pub fn bfa2(&mut self) -> BFA2_W<BFL_SPEC> {
         BFA2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Boundary Flag 3 Activation Select"]
     #[inline(always)]
-    #[must_use]
     pub fn bfa3(&mut self) -> BFA3_W<BFL_SPEC> {
         BFA3_W::new(self, 11)
     }
     #[doc = "Bit 16 - Boundary Flag 0 Inversion Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bfi0(&mut self) -> BFI0_W<BFL_SPEC> {
         BFI0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Boundary Flag 1 Inversion Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bfi1(&mut self) -> BFI1_W<BFL_SPEC> {
         BFI1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Boundary Flag 2 Inversion Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bfi2(&mut self) -> BFI2_W<BFL_SPEC> {
         BFI2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Boundary Flag 3 Inversion Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bfi3(&mut self) -> BFI3_W<BFL_SPEC> {
         BFI3_W::new(self, 19)
     }
diff --git a/src/vadc_g0/bflc.rs b/src/vadc_g0/bflc.rs
index 8037fe27..ea9ee979 100644
--- a/src/vadc_g0/bflc.rs
+++ b/src/vadc_g0/bflc.rs
@@ -371,25 +371,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Boundary Flag y Mode Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bfm0(&mut self) -> BFM0_W<BFLC_SPEC> {
         BFM0_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Boundary Flag y Mode Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bfm1(&mut self) -> BFM1_W<BFLC_SPEC> {
         BFM1_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Boundary Flag y Mode Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bfm2(&mut self) -> BFM2_W<BFLC_SPEC> {
         BFM2_W::new(self, 8)
     }
     #[doc = "Bits 12:15 - Boundary Flag y Mode Control"]
     #[inline(always)]
-    #[must_use]
     pub fn bfm3(&mut self) -> BFM3_W<BFLC_SPEC> {
         BFM3_W::new(self, 12)
     }
diff --git a/src/vadc_g0/bflnp.rs b/src/vadc_g0/bflnp.rs
index 2523f3dc..9fa28967 100644
--- a/src/vadc_g0/bflnp.rs
+++ b/src/vadc_g0/bflnp.rs
@@ -423,25 +423,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Boundary Flag y Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn bfl0np(&mut self) -> BFL0NP_W<BFLNP_SPEC> {
         BFL0NP_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Boundary Flag y Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn bfl1np(&mut self) -> BFL1NP_W<BFLNP_SPEC> {
         BFL1NP_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Boundary Flag y Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn bfl2np(&mut self) -> BFL2NP_W<BFLNP_SPEC> {
         BFL2NP_W::new(self, 8)
     }
     #[doc = "Bits 12:15 - Boundary Flag y Node Pointer"]
     #[inline(always)]
-    #[must_use]
     pub fn bfl3np(&mut self) -> BFL3NP_W<BFLNP_SPEC> {
         BFL3NP_W::new(self, 12)
     }
diff --git a/src/vadc_g0/bfls.rs b/src/vadc_g0/bfls.rs
index fb781ac2..35fafb0c 100644
--- a/src/vadc_g0/bfls.rs
+++ b/src/vadc_g0/bfls.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Boundary Flag 0 Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn bfc0(&mut self) -> BFC0_W<BFLS_SPEC> {
         BFC0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Boundary Flag 1 Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn bfc1(&mut self) -> BFC1_W<BFLS_SPEC> {
         BFC1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Boundary Flag 2 Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn bfc2(&mut self) -> BFC2_W<BFLS_SPEC> {
         BFC2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Boundary Flag 3 Clear"]
     #[inline(always)]
-    #[must_use]
     pub fn bfc3(&mut self) -> BFC3_W<BFLS_SPEC> {
         BFC3_W::new(self, 3)
     }
     #[doc = "Bit 16 - Boundary Flag 0 Set"]
     #[inline(always)]
-    #[must_use]
     pub fn bfs0(&mut self) -> BFS0_W<BFLS_SPEC> {
         BFS0_W::new(self, 16)
     }
     #[doc = "Bit 17 - Boundary Flag 1 Set"]
     #[inline(always)]
-    #[must_use]
     pub fn bfs1(&mut self) -> BFS1_W<BFLS_SPEC> {
         BFS1_W::new(self, 17)
     }
     #[doc = "Bit 18 - Boundary Flag 2 Set"]
     #[inline(always)]
-    #[must_use]
     pub fn bfs2(&mut self) -> BFS2_W<BFLS_SPEC> {
         BFS2_W::new(self, 18)
     }
     #[doc = "Bit 19 - Boundary Flag 3 Set"]
     #[inline(always)]
-    #[must_use]
     pub fn bfs3(&mut self) -> BFS3_W<BFLS_SPEC> {
         BFS3_W::new(self, 19)
     }
diff --git a/src/vadc_g0/bound.rs b/src/vadc_g0/bound.rs
index 0bc27916..6bff3c98 100644
--- a/src/vadc_g0/bound.rs
+++ b/src/vadc_g0/bound.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"]
     #[inline(always)]
-    #[must_use]
     pub fn boundary0(&mut self) -> BOUNDARY0_W<BOUND_SPEC> {
         BOUNDARY0_W::new(self, 0)
     }
     #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"]
     #[inline(always)]
-    #[must_use]
     pub fn boundary1(&mut self) -> BOUNDARY1_W<BOUND_SPEC> {
         BOUNDARY1_W::new(self, 16)
     }
diff --git a/src/vadc_g0/cefclr.rs b/src/vadc_g0/cefclr.rs
index 190a9eb6..95f9ae09 100644
--- a/src/vadc_g0/cefclr.rs
+++ b/src/vadc_g0/cefclr.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Channel Event for Channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn cev0(&mut self) -> CEV0_W<CEFCLR_SPEC> {
         CEV0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Channel Event for Channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn cev1(&mut self) -> CEV1_W<CEFCLR_SPEC> {
         CEV1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Channel Event for Channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn cev2(&mut self) -> CEV2_W<CEFCLR_SPEC> {
         CEV2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Clear Channel Event for Channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn cev3(&mut self) -> CEV3_W<CEFCLR_SPEC> {
         CEV3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Clear Channel Event for Channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn cev4(&mut self) -> CEV4_W<CEFCLR_SPEC> {
         CEV4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Clear Channel Event for Channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn cev5(&mut self) -> CEV5_W<CEFCLR_SPEC> {
         CEV5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Clear Channel Event for Channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn cev6(&mut self) -> CEV6_W<CEFCLR_SPEC> {
         CEV6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Clear Channel Event for Channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn cev7(&mut self) -> CEV7_W<CEFCLR_SPEC> {
         CEV7_W::new(self, 7)
     }
diff --git a/src/vadc_g0/ceflag.rs b/src/vadc_g0/ceflag.rs
index 7c50801a..58f4ff68 100644
--- a/src/vadc_g0/ceflag.rs
+++ b/src/vadc_g0/ceflag.rs
@@ -471,49 +471,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Channel Event for Channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn cev0(&mut self) -> CEV0_W<CEFLAG_SPEC> {
         CEV0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Channel Event for Channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn cev1(&mut self) -> CEV1_W<CEFLAG_SPEC> {
         CEV1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Channel Event for Channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn cev2(&mut self) -> CEV2_W<CEFLAG_SPEC> {
         CEV2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Channel Event for Channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn cev3(&mut self) -> CEV3_W<CEFLAG_SPEC> {
         CEV3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Channel Event for Channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn cev4(&mut self) -> CEV4_W<CEFLAG_SPEC> {
         CEV4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Channel Event for Channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn cev5(&mut self) -> CEV5_W<CEFLAG_SPEC> {
         CEV5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Channel Event for Channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn cev6(&mut self) -> CEV6_W<CEFLAG_SPEC> {
         CEV6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Channel Event for Channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn cev7(&mut self) -> CEV7_W<CEFLAG_SPEC> {
         CEV7_W::new(self, 7)
     }
diff --git a/src/vadc_g0/cevnp0.rs b/src/vadc_g0/cevnp0.rs
index aef85d3c..be7c95a5 100644
--- a/src/vadc_g0/cevnp0.rs
+++ b/src/vadc_g0/cevnp0.rs
@@ -735,49 +735,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Service Request Node Pointer Channel Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn cev0np(&mut self) -> CEV0NP_W<CEVNP0_SPEC> {
         CEV0NP_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Service Request Node Pointer Channel Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn cev1np(&mut self) -> CEV1NP_W<CEVNP0_SPEC> {
         CEV1NP_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Service Request Node Pointer Channel Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn cev2np(&mut self) -> CEV2NP_W<CEVNP0_SPEC> {
         CEV2NP_W::new(self, 8)
     }
     #[doc = "Bits 12:15 - Service Request Node Pointer Channel Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn cev3np(&mut self) -> CEV3NP_W<CEVNP0_SPEC> {
         CEV3NP_W::new(self, 12)
     }
     #[doc = "Bits 16:19 - Service Request Node Pointer Channel Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn cev4np(&mut self) -> CEV4NP_W<CEVNP0_SPEC> {
         CEV4NP_W::new(self, 16)
     }
     #[doc = "Bits 20:23 - Service Request Node Pointer Channel Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn cev5np(&mut self) -> CEV5NP_W<CEVNP0_SPEC> {
         CEV5NP_W::new(self, 20)
     }
     #[doc = "Bits 24:27 - Service Request Node Pointer Channel Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn cev6np(&mut self) -> CEV6NP_W<CEVNP0_SPEC> {
         CEV6NP_W::new(self, 24)
     }
     #[doc = "Bits 28:31 - Service Request Node Pointer Channel Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn cev7np(&mut self) -> CEV7NP_W<CEVNP0_SPEC> {
         CEV7NP_W::new(self, 28)
     }
diff --git a/src/vadc_g0/chass.rs b/src/vadc_g0/chass.rs
index 21aca02a..2bd2aee8 100644
--- a/src/vadc_g0/chass.rs
+++ b/src/vadc_g0/chass.rs
@@ -471,49 +471,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Assignment for Channel 0"]
     #[inline(always)]
-    #[must_use]
     pub fn assch0(&mut self) -> ASSCH0_W<CHASS_SPEC> {
         ASSCH0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Assignment for Channel 1"]
     #[inline(always)]
-    #[must_use]
     pub fn assch1(&mut self) -> ASSCH1_W<CHASS_SPEC> {
         ASSCH1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Assignment for Channel 2"]
     #[inline(always)]
-    #[must_use]
     pub fn assch2(&mut self) -> ASSCH2_W<CHASS_SPEC> {
         ASSCH2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Assignment for Channel 3"]
     #[inline(always)]
-    #[must_use]
     pub fn assch3(&mut self) -> ASSCH3_W<CHASS_SPEC> {
         ASSCH3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Assignment for Channel 4"]
     #[inline(always)]
-    #[must_use]
     pub fn assch4(&mut self) -> ASSCH4_W<CHASS_SPEC> {
         ASSCH4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Assignment for Channel 5"]
     #[inline(always)]
-    #[must_use]
     pub fn assch5(&mut self) -> ASSCH5_W<CHASS_SPEC> {
         ASSCH5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Assignment for Channel 6"]
     #[inline(always)]
-    #[must_use]
     pub fn assch6(&mut self) -> ASSCH6_W<CHASS_SPEC> {
         ASSCH6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Assignment for Channel 7"]
     #[inline(always)]
-    #[must_use]
     pub fn assch7(&mut self) -> ASSCH7_W<CHASS_SPEC> {
         ASSCH7_W::new(self, 7)
     }
diff --git a/src/vadc_g0/chctr.rs b/src/vadc_g0/chctr.rs
index 744f1fc8..bbbe1ca2 100644
--- a/src/vadc_g0/chctr.rs
+++ b/src/vadc_g0/chctr.rs
@@ -791,67 +791,56 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Input Class Select"]
     #[inline(always)]
-    #[must_use]
     pub fn iclsel(&mut self) -> ICLSEL_W<CHCTR_SPEC> {
         ICLSEL_W::new(self, 0)
     }
     #[doc = "Bits 4:5 - Lower Boundary Select"]
     #[inline(always)]
-    #[must_use]
     pub fn bndsell(&mut self) -> BNDSELL_W<CHCTR_SPEC> {
         BNDSELL_W::new(self, 4)
     }
     #[doc = "Bits 6:7 - Upper Boundary Select"]
     #[inline(always)]
-    #[must_use]
     pub fn bndselu(&mut self) -> BNDSELU_W<CHCTR_SPEC> {
         BNDSELU_W::new(self, 6)
     }
     #[doc = "Bits 8:9 - Channel Event Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn chevmode(&mut self) -> CHEVMODE_W<CHCTR_SPEC> {
         CHEVMODE_W::new(self, 8)
     }
     #[doc = "Bit 10 - Synchronization Request"]
     #[inline(always)]
-    #[must_use]
     pub fn sync(&mut self) -> SYNC_W<CHCTR_SPEC> {
         SYNC_W::new(self, 10)
     }
     #[doc = "Bit 11 - Reference Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn refsel(&mut self) -> REFSEL_W<CHCTR_SPEC> {
         REFSEL_W::new(self, 11)
     }
     #[doc = "Bits 16:19 - Result Register"]
     #[inline(always)]
-    #[must_use]
     pub fn resreg(&mut self) -> RESREG_W<CHCTR_SPEC> {
         RESREG_W::new(self, 16)
     }
     #[doc = "Bit 20 - Result Target for Background Source"]
     #[inline(always)]
-    #[must_use]
     pub fn restbs(&mut self) -> RESTBS_W<CHCTR_SPEC> {
         RESTBS_W::new(self, 20)
     }
     #[doc = "Bit 21 - Result Position"]
     #[inline(always)]
-    #[must_use]
     pub fn respos(&mut self) -> RESPOS_W<CHCTR_SPEC> {
         RESPOS_W::new(self, 21)
     }
     #[doc = "Bits 28:29 - Broken Wire Detection Channel"]
     #[inline(always)]
-    #[must_use]
     pub fn bwdch(&mut self) -> BWDCH_W<CHCTR_SPEC> {
         BWDCH_W::new(self, 28)
     }
     #[doc = "Bit 30 - Broken Wire Detection Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn bwden(&mut self) -> BWDEN_W<CHCTR_SPEC> {
         BWDEN_W::new(self, 30)
     }
diff --git a/src/vadc_g0/emuxctr.rs b/src/vadc_g0/emuxctr.rs
index 12f586ad..6910b8ea 100644
--- a/src/vadc_g0/emuxctr.rs
+++ b/src/vadc_g0/emuxctr.rs
@@ -311,37 +311,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - External Multiplexer Start Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn emuxset(&mut self) -> EMUXSET_W<EMUXCTR_SPEC> {
         EMUXSET_W::new(self, 0)
     }
     #[doc = "Bits 16:25 - External Multiplexer Channel Select"]
     #[inline(always)]
-    #[must_use]
     pub fn emuxch(&mut self) -> EMUXCH_W<EMUXCTR_SPEC> {
         EMUXCH_W::new(self, 16)
     }
     #[doc = "Bits 26:27 - External Multiplexer Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn emuxmode(&mut self) -> EMUXMODE_W<EMUXCTR_SPEC> {
         EMUXMODE_W::new(self, 26)
     }
     #[doc = "Bit 28 - External Multiplexer Coding Scheme"]
     #[inline(always)]
-    #[must_use]
     pub fn emxcod(&mut self) -> EMXCOD_W<EMUXCTR_SPEC> {
         EMXCOD_W::new(self, 28)
     }
     #[doc = "Bit 29 - External Multiplexer Sample Time Control"]
     #[inline(always)]
-    #[must_use]
     pub fn emxst(&mut self) -> EMXST_W<EMUXCTR_SPEC> {
         EMXST_W::new(self, 29)
     }
     #[doc = "Bit 31 - Write Control for EMUX Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn emxwc(&mut self) -> EMXWC_W<EMUXCTR_SPEC> {
         EMXWC_W::new(self, 31)
     }
diff --git a/src/vadc_g0/iclass.rs b/src/vadc_g0/iclass.rs
index 8dd2fd7a..a03055a9 100644
--- a/src/vadc_g0/iclass.rs
+++ b/src/vadc_g0/iclass.rs
@@ -207,25 +207,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"]
     #[inline(always)]
-    #[must_use]
     pub fn stcs(&mut self) -> STCS_W<ICLASS_SPEC> {
         STCS_W::new(self, 0)
     }
     #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"]
     #[inline(always)]
-    #[must_use]
     pub fn cms(&mut self) -> CMS_W<ICLASS_SPEC> {
         CMS_W::new(self, 8)
     }
     #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"]
     #[inline(always)]
-    #[must_use]
     pub fn stce(&mut self) -> STCE_W<ICLASS_SPEC> {
         STCE_W::new(self, 16)
     }
     #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"]
     #[inline(always)]
-    #[must_use]
     pub fn cme(&mut self) -> CME_W<ICLASS_SPEC> {
         CME_W::new(self, 24)
     }
diff --git a/src/vadc_g0/qctrl0.rs b/src/vadc_g0/qctrl0.rs
index c50c4161..6e084370 100644
--- a/src/vadc_g0/qctrl0.rs
+++ b/src/vadc_g0/qctrl0.rs
@@ -359,49 +359,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Source-specific Result Register"]
     #[inline(always)]
-    #[must_use]
     pub fn srcresreg(&mut self) -> SRCRESREG_W<QCTRL0_SPEC> {
         SRCRESREG_W::new(self, 0)
     }
     #[doc = "Bits 8:11 - External Trigger Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn xtsel(&mut self) -> XTSEL_W<QCTRL0_SPEC> {
         XTSEL_W::new(self, 8)
     }
     #[doc = "Bits 13:14 - Trigger Operating Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn xtmode(&mut self) -> XTMODE_W<QCTRL0_SPEC> {
         XTMODE_W::new(self, 13)
     }
     #[doc = "Bit 15 - Write Control for Trigger Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn xtwc(&mut self) -> XTWC_W<QCTRL0_SPEC> {
         XTWC_W::new(self, 15)
     }
     #[doc = "Bits 16:19 - Gate Input Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn gtsel(&mut self) -> GTSEL_W<QCTRL0_SPEC> {
         GTSEL_W::new(self, 16)
     }
     #[doc = "Bit 23 - Write Control for Gate Configuration"]
     #[inline(always)]
-    #[must_use]
     pub fn gtwc(&mut self) -> GTWC_W<QCTRL0_SPEC> {
         GTWC_W::new(self, 23)
     }
     #[doc = "Bit 28 - Timer Mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn tmen(&mut self) -> TMEN_W<QCTRL0_SPEC> {
         TMEN_W::new(self, 28)
     }
     #[doc = "Bit 31 - Write Control for Timer Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn tmwc(&mut self) -> TMWC_W<QCTRL0_SPEC> {
         TMWC_W::new(self, 31)
     }
diff --git a/src/vadc_g0/qinr0.rs b/src/vadc_g0/qinr0.rs
index f9ddfb71..65f02c89 100644
--- a/src/vadc_g0/qinr0.rs
+++ b/src/vadc_g0/qinr0.rs
@@ -98,25 +98,21 @@ where
 impl W {
     #[doc = "Bits 0:4 - Request Channel Number"]
     #[inline(always)]
-    #[must_use]
     pub fn reqchnr(&mut self) -> REQCHNR_W<QINR0_SPEC> {
         REQCHNR_W::new(self, 0)
     }
     #[doc = "Bit 5 - Refill"]
     #[inline(always)]
-    #[must_use]
     pub fn rf(&mut self) -> RF_W<QINR0_SPEC> {
         RF_W::new(self, 5)
     }
     #[doc = "Bit 6 - Enable Source Interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn ensi(&mut self) -> ENSI_W<QINR0_SPEC> {
         ENSI_W::new(self, 6)
     }
     #[doc = "Bit 7 - External Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn extr(&mut self) -> EXTR_W<QINR0_SPEC> {
         EXTR_W::new(self, 7)
     }
diff --git a/src/vadc_g0/qmr0.rs b/src/vadc_g0/qmr0.rs
index 2ae9b3bd..b45f6a83 100644
--- a/src/vadc_g0/qmr0.rs
+++ b/src/vadc_g0/qmr0.rs
@@ -338,43 +338,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Enable Gate"]
     #[inline(always)]
-    #[must_use]
     pub fn engt(&mut self) -> ENGT_W<QMR0_SPEC> {
         ENGT_W::new(self, 0)
     }
     #[doc = "Bit 2 - Enable External Trigger"]
     #[inline(always)]
-    #[must_use]
     pub fn entr(&mut self) -> ENTR_W<QMR0_SPEC> {
         ENTR_W::new(self, 2)
     }
     #[doc = "Bit 8 - Clear Valid Bit"]
     #[inline(always)]
-    #[must_use]
     pub fn clrv(&mut self) -> CLRV_W<QMR0_SPEC> {
         CLRV_W::new(self, 8)
     }
     #[doc = "Bit 9 - Trigger Event"]
     #[inline(always)]
-    #[must_use]
     pub fn trev(&mut self) -> TREV_W<QMR0_SPEC> {
         TREV_W::new(self, 9)
     }
     #[doc = "Bit 10 - Flush Queue"]
     #[inline(always)]
-    #[must_use]
     pub fn flush(&mut self) -> FLUSH_W<QMR0_SPEC> {
         FLUSH_W::new(self, 10)
     }
     #[doc = "Bit 11 - Clear Event Flag"]
     #[inline(always)]
-    #[must_use]
     pub fn cev(&mut self) -> CEV_W<QMR0_SPEC> {
         CEV_W::new(self, 11)
     }
     #[doc = "Bit 16 - Repeat Disable"]
     #[inline(always)]
-    #[must_use]
     pub fn rptdis(&mut self) -> RPTDIS_W<QMR0_SPEC> {
         RPTDIS_W::new(self, 16)
     }
diff --git a/src/vadc_g0/rcr.rs b/src/vadc_g0/rcr.rs
index c9145fd5..7dcb1a5f 100644
--- a/src/vadc_g0/rcr.rs
+++ b/src/vadc_g0/rcr.rs
@@ -275,31 +275,26 @@ impl R {
 impl W {
     #[doc = "Bits 16:19 - Data Reduction Control"]
     #[inline(always)]
-    #[must_use]
     pub fn drctr(&mut self) -> DRCTR_W<RCR_SPEC> {
         DRCTR_W::new(self, 16)
     }
     #[doc = "Bits 20:21 - Data Modification Mode"]
     #[inline(always)]
-    #[must_use]
     pub fn dmm(&mut self) -> DMM_W<RCR_SPEC> {
         DMM_W::new(self, 20)
     }
     #[doc = "Bit 24 - Wait-for-Read Mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn wfr(&mut self) -> WFR_W<RCR_SPEC> {
         WFR_W::new(self, 24)
     }
     #[doc = "Bits 25:26 - FIFO Mode Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn fen(&mut self) -> FEN_W<RCR_SPEC> {
         FEN_W::new(self, 25)
     }
     #[doc = "Bit 31 - Service Request Generation Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn srgen(&mut self) -> SRGEN_W<RCR_SPEC> {
         SRGEN_W::new(self, 31)
     }
diff --git a/src/vadc_g0/refclr.rs b/src/vadc_g0/refclr.rs
index db8e1dc8..79d14f2a 100644
--- a/src/vadc_g0/refclr.rs
+++ b/src/vadc_g0/refclr.rs
@@ -499,97 +499,81 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Result Event for Result Register 0"]
     #[inline(always)]
-    #[must_use]
     pub fn rev0(&mut self) -> REV0_W<REFCLR_SPEC> {
         REV0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Result Event for Result Register 1"]
     #[inline(always)]
-    #[must_use]
     pub fn rev1(&mut self) -> REV1_W<REFCLR_SPEC> {
         REV1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Clear Result Event for Result Register 2"]
     #[inline(always)]
-    #[must_use]
     pub fn rev2(&mut self) -> REV2_W<REFCLR_SPEC> {
         REV2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Clear Result Event for Result Register 3"]
     #[inline(always)]
-    #[must_use]
     pub fn rev3(&mut self) -> REV3_W<REFCLR_SPEC> {
         REV3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Clear Result Event for Result Register 4"]
     #[inline(always)]
-    #[must_use]
     pub fn rev4(&mut self) -> REV4_W<REFCLR_SPEC> {
         REV4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Clear Result Event for Result Register 5"]
     #[inline(always)]
-    #[must_use]
     pub fn rev5(&mut self) -> REV5_W<REFCLR_SPEC> {
         REV5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Clear Result Event for Result Register 6"]
     #[inline(always)]
-    #[must_use]
     pub fn rev6(&mut self) -> REV6_W<REFCLR_SPEC> {
         REV6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Clear Result Event for Result Register 7"]
     #[inline(always)]
-    #[must_use]
     pub fn rev7(&mut self) -> REV7_W<REFCLR_SPEC> {
         REV7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Clear Result Event for Result Register 8"]
     #[inline(always)]
-    #[must_use]
     pub fn rev8(&mut self) -> REV8_W<REFCLR_SPEC> {
         REV8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Clear Result Event for Result Register 9"]
     #[inline(always)]
-    #[must_use]
     pub fn rev9(&mut self) -> REV9_W<REFCLR_SPEC> {
         REV9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Clear Result Event for Result Register 10"]
     #[inline(always)]
-    #[must_use]
     pub fn rev10(&mut self) -> REV10_W<REFCLR_SPEC> {
         REV10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Clear Result Event for Result Register 11"]
     #[inline(always)]
-    #[must_use]
     pub fn rev11(&mut self) -> REV11_W<REFCLR_SPEC> {
         REV11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Clear Result Event for Result Register 12"]
     #[inline(always)]
-    #[must_use]
     pub fn rev12(&mut self) -> REV12_W<REFCLR_SPEC> {
         REV12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Clear Result Event for Result Register 13"]
     #[inline(always)]
-    #[must_use]
     pub fn rev13(&mut self) -> REV13_W<REFCLR_SPEC> {
         REV13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Clear Result Event for Result Register 14"]
     #[inline(always)]
-    #[must_use]
     pub fn rev14(&mut self) -> REV14_W<REFCLR_SPEC> {
         REV14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Clear Result Event for Result Register 15"]
     #[inline(always)]
-    #[must_use]
     pub fn rev15(&mut self) -> REV15_W<REFCLR_SPEC> {
         REV15_W::new(self, 15)
     }
diff --git a/src/vadc_g0/reflag.rs b/src/vadc_g0/reflag.rs
index 6ad27888..2d65ea21 100644
--- a/src/vadc_g0/reflag.rs
+++ b/src/vadc_g0/reflag.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Result Event for Result Register 0"]
     #[inline(always)]
-    #[must_use]
     pub fn rev0(&mut self) -> REV0_W<REFLAG_SPEC> {
         REV0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Result Event for Result Register 1"]
     #[inline(always)]
-    #[must_use]
     pub fn rev1(&mut self) -> REV1_W<REFLAG_SPEC> {
         REV1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Result Event for Result Register 2"]
     #[inline(always)]
-    #[must_use]
     pub fn rev2(&mut self) -> REV2_W<REFLAG_SPEC> {
         REV2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Result Event for Result Register 3"]
     #[inline(always)]
-    #[must_use]
     pub fn rev3(&mut self) -> REV3_W<REFLAG_SPEC> {
         REV3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Result Event for Result Register 4"]
     #[inline(always)]
-    #[must_use]
     pub fn rev4(&mut self) -> REV4_W<REFLAG_SPEC> {
         REV4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Result Event for Result Register 5"]
     #[inline(always)]
-    #[must_use]
     pub fn rev5(&mut self) -> REV5_W<REFLAG_SPEC> {
         REV5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Result Event for Result Register 6"]
     #[inline(always)]
-    #[must_use]
     pub fn rev6(&mut self) -> REV6_W<REFLAG_SPEC> {
         REV6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Result Event for Result Register 7"]
     #[inline(always)]
-    #[must_use]
     pub fn rev7(&mut self) -> REV7_W<REFLAG_SPEC> {
         REV7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Result Event for Result Register 8"]
     #[inline(always)]
-    #[must_use]
     pub fn rev8(&mut self) -> REV8_W<REFLAG_SPEC> {
         REV8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Result Event for Result Register 9"]
     #[inline(always)]
-    #[must_use]
     pub fn rev9(&mut self) -> REV9_W<REFLAG_SPEC> {
         REV9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Result Event for Result Register 10"]
     #[inline(always)]
-    #[must_use]
     pub fn rev10(&mut self) -> REV10_W<REFLAG_SPEC> {
         REV10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Result Event for Result Register 11"]
     #[inline(always)]
-    #[must_use]
     pub fn rev11(&mut self) -> REV11_W<REFLAG_SPEC> {
         REV11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Result Event for Result Register 12"]
     #[inline(always)]
-    #[must_use]
     pub fn rev12(&mut self) -> REV12_W<REFLAG_SPEC> {
         REV12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Result Event for Result Register 13"]
     #[inline(always)]
-    #[must_use]
     pub fn rev13(&mut self) -> REV13_W<REFLAG_SPEC> {
         REV13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Result Event for Result Register 14"]
     #[inline(always)]
-    #[must_use]
     pub fn rev14(&mut self) -> REV14_W<REFLAG_SPEC> {
         REV14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Result Event for Result Register 15"]
     #[inline(always)]
-    #[must_use]
     pub fn rev15(&mut self) -> REV15_W<REFLAG_SPEC> {
         REV15_W::new(self, 15)
     }
diff --git a/src/vadc_g0/res.rs b/src/vadc_g0/res.rs
index f2aedcf7..584b8d89 100644
--- a/src/vadc_g0/res.rs
+++ b/src/vadc_g0/res.rs
@@ -174,7 +174,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15 - Result of Most Recent Conversion"]
     #[inline(always)]
-    #[must_use]
     pub fn result(&mut self) -> RESULT_W<RES_SPEC> {
         RESULT_W::new(self, 0)
     }
diff --git a/src/vadc_g0/revnp0.rs b/src/vadc_g0/revnp0.rs
index 9a094113..3025ee34 100644
--- a/src/vadc_g0/revnp0.rs
+++ b/src/vadc_g0/revnp0.rs
@@ -735,49 +735,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev0np(&mut self) -> REV0NP_W<REVNP0_SPEC> {
         REV0NP_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev1np(&mut self) -> REV1NP_W<REVNP0_SPEC> {
         REV1NP_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev2np(&mut self) -> REV2NP_W<REVNP0_SPEC> {
         REV2NP_W::new(self, 8)
     }
     #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev3np(&mut self) -> REV3NP_W<REVNP0_SPEC> {
         REV3NP_W::new(self, 12)
     }
     #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev4np(&mut self) -> REV4NP_W<REVNP0_SPEC> {
         REV4NP_W::new(self, 16)
     }
     #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev5np(&mut self) -> REV5NP_W<REVNP0_SPEC> {
         REV5NP_W::new(self, 20)
     }
     #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev6np(&mut self) -> REV6NP_W<REVNP0_SPEC> {
         REV6NP_W::new(self, 24)
     }
     #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev7np(&mut self) -> REV7NP_W<REVNP0_SPEC> {
         REV7NP_W::new(self, 28)
     }
diff --git a/src/vadc_g0/revnp1.rs b/src/vadc_g0/revnp1.rs
index 2c75b2b9..a8da8d6e 100644
--- a/src/vadc_g0/revnp1.rs
+++ b/src/vadc_g0/revnp1.rs
@@ -735,49 +735,41 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev8np(&mut self) -> REV8NP_W<REVNP1_SPEC> {
         REV8NP_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev9np(&mut self) -> REV9NP_W<REVNP1_SPEC> {
         REV9NP_W::new(self, 4)
     }
     #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev10np(&mut self) -> REV10NP_W<REVNP1_SPEC> {
         REV10NP_W::new(self, 8)
     }
     #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev11np(&mut self) -> REV11NP_W<REVNP1_SPEC> {
         REV11NP_W::new(self, 12)
     }
     #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev12np(&mut self) -> REV12NP_W<REVNP1_SPEC> {
         REV12NP_W::new(self, 16)
     }
     #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev13np(&mut self) -> REV13NP_W<REVNP1_SPEC> {
         REV13NP_W::new(self, 20)
     }
     #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev14np(&mut self) -> REV14NP_W<REVNP1_SPEC> {
         REV14NP_W::new(self, 24)
     }
     #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn rev15np(&mut self) -> REV15NP_W<REVNP1_SPEC> {
         REV15NP_W::new(self, 28)
     }
diff --git a/src/vadc_g0/sefclr.rs b/src/vadc_g0/sefclr.rs
index 200e14df..b3d61fcc 100644
--- a/src/vadc_g0/sefclr.rs
+++ b/src/vadc_g0/sefclr.rs
@@ -65,13 +65,11 @@ where
 impl W {
     #[doc = "Bit 0 - Clear Source Event 0/1"]
     #[inline(always)]
-    #[must_use]
     pub fn sev0(&mut self) -> SEV0_W<SEFCLR_SPEC> {
         SEV0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Clear Source Event 0/1"]
     #[inline(always)]
-    #[must_use]
     pub fn sev1(&mut self) -> SEV1_W<SEFCLR_SPEC> {
         SEV1_W::new(self, 1)
     }
diff --git a/src/vadc_g0/seflag.rs b/src/vadc_g0/seflag.rs
index 3b080447..6690897c 100644
--- a/src/vadc_g0/seflag.rs
+++ b/src/vadc_g0/seflag.rs
@@ -123,13 +123,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Source Event 0/1"]
     #[inline(always)]
-    #[must_use]
     pub fn sev0(&mut self) -> SEV0_W<SEFLAG_SPEC> {
         SEV0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Source Event 0/1"]
     #[inline(always)]
-    #[must_use]
     pub fn sev1(&mut self) -> SEV1_W<SEFLAG_SPEC> {
         SEV1_W::new(self, 1)
     }
diff --git a/src/vadc_g0/sevnp.rs b/src/vadc_g0/sevnp.rs
index 8306dff0..2089fab4 100644
--- a/src/vadc_g0/sevnp.rs
+++ b/src/vadc_g0/sevnp.rs
@@ -189,13 +189,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:3 - Service Request Node Pointer Source Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn sev0np(&mut self) -> SEV0NP_W<SEVNP_SPEC> {
         SEV0NP_W::new(self, 0)
     }
     #[doc = "Bits 4:7 - Service Request Node Pointer Source Event i"]
     #[inline(always)]
-    #[must_use]
     pub fn sev1np(&mut self) -> SEV1NP_W<SEVNP_SPEC> {
         SEV1NP_W::new(self, 4)
     }
diff --git a/src/vadc_g0/sract.rs b/src/vadc_g0/sract.rs
index e2f077b6..0e94a695 100644
--- a/src/vadc_g0/sract.rs
+++ b/src/vadc_g0/sract.rs
@@ -251,49 +251,41 @@ where
 impl W {
     #[doc = "Bit 0 - Activate Group Service Request Node 0"]
     #[inline(always)]
-    #[must_use]
     pub fn agsr0(&mut self) -> AGSR0_W<SRACT_SPEC> {
         AGSR0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Activate Group Service Request Node 1"]
     #[inline(always)]
-    #[must_use]
     pub fn agsr1(&mut self) -> AGSR1_W<SRACT_SPEC> {
         AGSR1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Activate Group Service Request Node 2"]
     #[inline(always)]
-    #[must_use]
     pub fn agsr2(&mut self) -> AGSR2_W<SRACT_SPEC> {
         AGSR2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Activate Group Service Request Node 3"]
     #[inline(always)]
-    #[must_use]
     pub fn agsr3(&mut self) -> AGSR3_W<SRACT_SPEC> {
         AGSR3_W::new(self, 3)
     }
     #[doc = "Bit 8 - Activate Shared Service Request Node 0"]
     #[inline(always)]
-    #[must_use]
     pub fn assr0(&mut self) -> ASSR0_W<SRACT_SPEC> {
         ASSR0_W::new(self, 8)
     }
     #[doc = "Bit 9 - Activate Shared Service Request Node 1"]
     #[inline(always)]
-    #[must_use]
     pub fn assr1(&mut self) -> ASSR1_W<SRACT_SPEC> {
         ASSR1_W::new(self, 9)
     }
     #[doc = "Bit 10 - Activate Shared Service Request Node 2"]
     #[inline(always)]
-    #[must_use]
     pub fn assr2(&mut self) -> ASSR2_W<SRACT_SPEC> {
         ASSR2_W::new(self, 10)
     }
     #[doc = "Bit 11 - Activate Shared Service Request Node 3"]
     #[inline(always)]
-    #[must_use]
     pub fn assr3(&mut self) -> ASSR3_W<SRACT_SPEC> {
         ASSR3_W::new(self, 11)
     }
diff --git a/src/vadc_g0/synctr.rs b/src/vadc_g0/synctr.rs
index 6762b273..a3a1d9b5 100644
--- a/src/vadc_g0/synctr.rs
+++ b/src/vadc_g0/synctr.rs
@@ -272,25 +272,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Start Selection"]
     #[inline(always)]
-    #[must_use]
     pub fn stsel(&mut self) -> STSEL_W<SYNCTR_SPEC> {
         STSEL_W::new(self, 0)
     }
     #[doc = "Bit 4 - Evaluate Ready Input Rx"]
     #[inline(always)]
-    #[must_use]
     pub fn evalr1(&mut self) -> EVALR1_W<SYNCTR_SPEC> {
         EVALR1_W::new(self, 4)
     }
     #[doc = "Bit 5 - Evaluate Ready Input Rx"]
     #[inline(always)]
-    #[must_use]
     pub fn evalr2(&mut self) -> EVALR2_W<SYNCTR_SPEC> {
         EVALR2_W::new(self, 5)
     }
     #[doc = "Bit 6 - Evaluate Ready Input Rx"]
     #[inline(always)]
-    #[must_use]
     pub fn evalr3(&mut self) -> EVALR3_W<SYNCTR_SPEC> {
         EVALR3_W::new(self, 6)
     }
diff --git a/src/vadc_g0/vfr.rs b/src/vadc_g0/vfr.rs
index 6b8d00e5..b5ec4f2f 100644
--- a/src/vadc_g0/vfr.rs
+++ b/src/vadc_g0/vfr.rs
@@ -935,97 +935,81 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf0(&mut self) -> VF0_W<VFR_SPEC> {
         VF0_W::new(self, 0)
     }
     #[doc = "Bit 1 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf1(&mut self) -> VF1_W<VFR_SPEC> {
         VF1_W::new(self, 1)
     }
     #[doc = "Bit 2 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf2(&mut self) -> VF2_W<VFR_SPEC> {
         VF2_W::new(self, 2)
     }
     #[doc = "Bit 3 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf3(&mut self) -> VF3_W<VFR_SPEC> {
         VF3_W::new(self, 3)
     }
     #[doc = "Bit 4 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf4(&mut self) -> VF4_W<VFR_SPEC> {
         VF4_W::new(self, 4)
     }
     #[doc = "Bit 5 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf5(&mut self) -> VF5_W<VFR_SPEC> {
         VF5_W::new(self, 5)
     }
     #[doc = "Bit 6 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf6(&mut self) -> VF6_W<VFR_SPEC> {
         VF6_W::new(self, 6)
     }
     #[doc = "Bit 7 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf7(&mut self) -> VF7_W<VFR_SPEC> {
         VF7_W::new(self, 7)
     }
     #[doc = "Bit 8 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf8(&mut self) -> VF8_W<VFR_SPEC> {
         VF8_W::new(self, 8)
     }
     #[doc = "Bit 9 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf9(&mut self) -> VF9_W<VFR_SPEC> {
         VF9_W::new(self, 9)
     }
     #[doc = "Bit 10 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf10(&mut self) -> VF10_W<VFR_SPEC> {
         VF10_W::new(self, 10)
     }
     #[doc = "Bit 11 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf11(&mut self) -> VF11_W<VFR_SPEC> {
         VF11_W::new(self, 11)
     }
     #[doc = "Bit 12 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf12(&mut self) -> VF12_W<VFR_SPEC> {
         VF12_W::new(self, 12)
     }
     #[doc = "Bit 13 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf13(&mut self) -> VF13_W<VFR_SPEC> {
         VF13_W::new(self, 13)
     }
     #[doc = "Bit 14 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf14(&mut self) -> VF14_W<VFR_SPEC> {
         VF14_W::new(self, 14)
     }
     #[doc = "Bit 15 - Valid Flag of Result Register x"]
     #[inline(always)]
-    #[must_use]
     pub fn vf15(&mut self) -> VF15_W<VFR_SPEC> {
         VF15_W::new(self, 15)
     }
diff --git a/src/wdt/ctr.rs b/src/wdt/ctr.rs
index 55d830dd..b2e2173a 100644
--- a/src/wdt/ctr.rs
+++ b/src/wdt/ctr.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Enable"]
     #[inline(always)]
-    #[must_use]
     pub fn enb(&mut self) -> ENB_W<CTR_SPEC> {
         ENB_W::new(self, 0)
     }
     #[doc = "Bit 1 - Pre-warning"]
     #[inline(always)]
-    #[must_use]
     pub fn pre(&mut self) -> PRE_W<CTR_SPEC> {
         PRE_W::new(self, 1)
     }
     #[doc = "Bit 4 - Debug Suspend"]
     #[inline(always)]
-    #[must_use]
     pub fn dsp(&mut self) -> DSP_W<CTR_SPEC> {
         DSP_W::new(self, 4)
     }
     #[doc = "Bits 8:15 - Service Indication Pulse Width"]
     #[inline(always)]
-    #[must_use]
     pub fn spw(&mut self) -> SPW_W<CTR_SPEC> {
         SPW_W::new(self, 8)
     }
diff --git a/src/wdt/srv.rs b/src/wdt/srv.rs
index c462cc9d..40df64a2 100644
--- a/src/wdt/srv.rs
+++ b/src/wdt/srv.rs
@@ -5,7 +5,6 @@ pub type SRV_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
 impl W {
     #[doc = "Bits 0:31 - Service"]
     #[inline(always)]
-    #[must_use]
     pub fn srv(&mut self) -> SRV_W<SRV_SPEC> {
         SRV_W::new(self, 0)
     }
diff --git a/src/wdt/wdtclr.rs b/src/wdt/wdtclr.rs
index 47272913..d7959b5a 100644
--- a/src/wdt/wdtclr.rs
+++ b/src/wdt/wdtclr.rs
@@ -5,7 +5,6 @@ pub type ALMC_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Pre-warning Alarm"]
     #[inline(always)]
-    #[must_use]
     pub fn almc(&mut self) -> ALMC_W<WDTCLR_SPEC> {
         ALMC_W::new(self, 0)
     }
diff --git a/src/wdt/wlb.rs b/src/wdt/wlb.rs
index 6a98f715..4abbf7bf 100644
--- a/src/wdt/wlb.rs
+++ b/src/wdt/wlb.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Window Lower Bound"]
     #[inline(always)]
-    #[must_use]
     pub fn wlb(&mut self) -> WLB_W<WLB_SPEC> {
         WLB_W::new(self, 0)
     }
diff --git a/src/wdt/wub.rs b/src/wdt/wub.rs
index 093eb369..a30c31da 100644
--- a/src/wdt/wub.rs
+++ b/src/wdt/wub.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:31 - Window Upper Bound"]
     #[inline(always)]
-    #[must_use]
     pub fn wub(&mut self) -> WUB_W<WUB_SPEC> {
         WUB_W::new(self, 0)
     }