#

24h-clock

Here is 1 public repository matching this topic...

michellavezzo / clock_verilog

First and Last Project for STRUCTURED DESIGN OF INTEGRATED CIRCUITS discipline at UFPB. 24h clock with system verilog + Functional verification.

verilog systemverilog testbench system-verilog functional-verification 24h-clock

Updated Nov 11, 2023
SystemVerilog

Improve this page

Add a description, image, and links to the 24h-clock topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the 24h-clock topic, visit your repo's landing page and select "manage topics."