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Port Optimized Legacy Reduce-Scatter (Width Dim, Interleaved, Tile, Multi-Tile High Tensor) To Reduce-Scatter Async #18739

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SeanNijjar opened this issue Mar 6, 2025 · 0 comments
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Port Optimized Legacy Reduce-Scatter (Width Dim, Interleaved, Tile, Multi-Tile High Tensor) To Reduce-Scatter Async #18739

SeanNijjar opened this issue Mar 6, 2025 · 0 comments
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llm_t3000 P1 perf for issues tracking performance problems/improvements

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Model Machine Type In Shape Out Shape Dim DF Tensor # Devices
Llama 8B N300 [128,4096] [128,2048] 3 bfp8 Interleaved, Tile 2
* Prefill T3K Y=128, 2048, 4096, 8192, 16384 3 fp16, bfp8 Interleaved, Tile 8
@SeanNijjar SeanNijjar added llm_t3000 P1 perf for issues tracking performance problems/improvements labels Mar 6, 2025
@SeanNijjar SeanNijjar self-assigned this Mar 6, 2025
@SeanNijjar SeanNijjar mentioned this issue Mar 6, 2025
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