From 04bfd7950999ce9b9b916e9518a8603be2752e62 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 10 Jan 2024 19:00:59 +0100 Subject: [PATCH 1/6] chore: update STM32_WPAN from Cube version v1.18.0 Signed-off-by: Frederic Pillon --- src/utility/STM32_WPAN/README.md | 4 +- src/utility/STM32_WPAN/app_conf_default.h | 153 ++++++---------------- src/utility/STM32_WPAN/ble_bufsize.h | 7 - src/utility/STM32_WPAN/hw.h | 13 +- src/utility/STM32_WPAN/hw_ipcc.c | 5 +- src/utility/STM32_WPAN/shci.c | 23 +++- src/utility/STM32_WPAN/shci.h | 59 ++++++--- src/utility/STM32_WPAN/shci_tl.c | 28 +--- src/utility/STM32_WPAN/stm_list.c | 7 +- src/utility/STM32_WPAN/tl.h | 2 +- src/utility/STM32_WPAN/tl_mbox.c | 7 +- 11 files changed, 119 insertions(+), 189 deletions(-) diff --git a/src/utility/STM32_WPAN/README.md b/src/utility/STM32_WPAN/README.md index 0d39a3ef..97c4ceba 100644 --- a/src/utility/STM32_WPAN/README.md +++ b/src/utility/STM32_WPAN/README.md @@ -1,6 +1,6 @@ ## Source -[STMicroelectronics/STM32CubeWB Release v1.17.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.17.0) -- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.17.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode) +[STMicroelectronics/STM32CubeWB Release v1.18.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.18.0) +- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.18.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode) diff --git a/src/utility/STM32_WPAN/app_conf_default.h b/src/utility/STM32_WPAN/app_conf_default.h index d39492ea..846be3c9 100644 --- a/src/utility/STM32_WPAN/app_conf_default.h +++ b/src/utility/STM32_WPAN/app_conf_default.h @@ -1,9 +1,9 @@ /* USER CODE BEGIN Header */ /** ****************************************************************************** - * @file app_conf_default.h + * @file app_conf.h * @author MCD Application Team - * @brief Default application configuration file for STM32WPAN Middleware. + * @brief Application configuration file for STM32WPAN Middleware. ****************************************************************************** * @attention * @@ -19,40 +19,18 @@ /* USER CODE END Header */ /* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef APP_CONF_DEFAULT_H -#define APP_CONF_DEFAULT_H -#if 0 +#ifndef APP_CONF_H +#define APP_CONF_H + #include "hw.h" #include "hw_conf.h" #include "hw_if.h" #include "ble_bufsize.h" -#endif + /****************************************************************************** * Application Config ******************************************************************************/ -/**< generic parameters ******************************************************/ -/* HCI related defines */ - -#define ACI_HAL_SET_TX_POWER_LEVEL 0xFC0F -#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C -#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D -#define MAX_HCI_ACL_PACKET_SIZE (sizeof(TL_PacketHeader_t) + 5 + 251) -#define HCI_RESET 0x0C03 - -#ifndef BLE_SHARED_MEM_BYTE_ORDER - #define BLE_SHARED_MEM_BYTE_ORDER MSBFIRST -#endif -#define BLE_MODULE_SHARED_MEM_BUFFER_SIZE 128 - -/** - * Define Tx Power - */ -#ifndef CFG_TX_POWER - #define CFG_TX_POWER (0x18) /* -0.15dBm */ -#endif - -#if 0 /** * Define Secure Connections Support */ @@ -83,14 +61,14 @@ #define CFG_GAP_DEVICE_NAME_LENGTH (8) /** -* Identity root key used to derive LTK and CSRK +* Identity root key used to derive IRK and DHK(Legacy) */ -#define CFG_BLE_IRK {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0} +#define CFG_BLE_IR {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0} /** -* Encryption root key used to derive LTK and CSRK +* Encryption root key used to derive LTK(Legacy) and CSRK */ -#define CFG_BLE_ERK {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21} +#define CFG_BLE_ER {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21} /** * SMPS supply @@ -126,7 +104,7 @@ #define CFG_FW_SUBVERSION (1) #define CFG_FW_BRANCH (0) #define CFG_FW_BUILD (0) -#endif + /****************************************************************************** * BLE Stack ******************************************************************************/ @@ -134,25 +112,13 @@ * Maximum number of simultaneous connections that the device will support. * Valid values are from 1 to 8 */ -#ifndef CFG_BLE_NUM_LINK -#ifdef STM32WB15xx - #define CFG_BLE_NUM_LINK 3 -#else - #define CFG_BLE_NUM_LINK 8 -#endif -#endif +#define CFG_BLE_NUM_LINK 8 /** * Maximum number of Services that can be stored in the GATT database. * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services */ -#ifndef CFG_BLE_NUM_GATT_SERVICES -#ifdef STM32WB15xx - #define CFG_BLE_NUM_GATT_SERVICES 4 -#else - #define CFG_BLE_NUM_GATT_SERVICES 8 -#endif -#endif +#define CFG_BLE_NUM_GATT_SERVICES 8 /** * Maximum number of Attributes @@ -161,21 +127,13 @@ * Note that certain characteristics and relative descriptors are added automatically during device initialization * so this parameters should be 9 plus the number of user Attributes */ -#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES -#ifdef STM32WB15xx - #define CFG_BLE_NUM_GATT_ATTRIBUTES 30 -#else - #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 -#endif -#endif +#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 /** * Maximum supported ATT_MTU size * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ -#ifndef CFG_BLE_MAX_ATT_MTU - #define CFG_BLE_MAX_ATT_MTU (156) -#endif +#define CFG_BLE_MAX_ATT_MTU (156) /** * Size of the storage area for Attribute values @@ -188,46 +146,32 @@ * The total amount of memory needed is the sum of the above quantities for each attribute. * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ -#ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE -#ifdef STM32WB15xx - #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1290) -#else - #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) -#endif -#endif +#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) /** * Prepare Write List size in terms of number of packet * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ -// #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) -#ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE - #define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) -#endif +#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) /** * Number of allocated memory blocks * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ -//#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) -#define CFG_BLE_MBLOCK_COUNT (0x79) +#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) /** * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. */ -#ifndef CFG_BLE_DATA_LENGTH_EXTENSION - #define CFG_BLE_DATA_LENGTH_EXTENSION 1 -#endif +#define CFG_BLE_DATA_LENGTH_EXTENSION 1 /** - * Sleep clock accuracy in Slave mode (ppm value) + * Sleep clock accuracy in Peripheral mode (ppm value) */ -#ifndef CFG_BLE_SLAVE_SCA - #define CFG_BLE_SLAVE_SCA 500 -#endif +#define CFG_BLE_PERIPHERAL_SCA 500 /** - * Sleep clock accuracy in Master mode + * Sleep clock accuracy in Central mode * 0 : 251 ppm to 500 ppm * 1 : 151 ppm to 250 ppm * 2 : 101 ppm to 150 ppm @@ -237,9 +181,7 @@ * 6 : 21 ppm to 30 ppm * 7 : 0 ppm to 20 ppm */ -#ifndef CFG_BLE_MASTER_SCA - #define CFG_BLE_MASTER_SCA 0 -#endif +#define CFG_BLE_CENTRAL_SCA 0 /** * LsSource @@ -248,27 +190,21 @@ * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config */ -#ifndef CFG_BLE_LS_SOURCE - #if defined(STM32WB5Mxx) - #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) - #else - #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) - #endif +#if defined(STM32WB5Mxx) + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) +#else + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) #endif /** * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) */ -#ifndef CFG_BLE_HSE_STARTUP_TIME - #define CFG_BLE_HSE_STARTUP_TIME 0x148 -#endif +#define CFG_BLE_HSE_STARTUP_TIME 0x148 /** - * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) + * Maximum duration of the connection event when the device is in Peripheral mode in units of 625/256 us (~2.44 us) */ -#ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH - #define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) -#endif +#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) /** * Viterbi Mode @@ -314,7 +250,7 @@ * 0: LE Power Class 2-3 * other bits: complete with Options_extension flag */ -#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY) +#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3) /** * BLE stack Options_extension flags to be configured with: @@ -356,11 +292,7 @@ * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set */ -#if defined(STM32WB15xx) - #define CFG_BLE_MAX_ADV_SET_NBR (3) -#else - #define CFG_BLE_MAX_ADV_SET_NBR (8) -#endif +#define CFG_BLE_MAX_ADV_SET_NBR (8) /* Maximum advertising data length (in bytes) * Range: 31 .. 1650 with limitation: @@ -369,11 +301,7 @@ * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set */ -#if defined(STM32WB15xx) - #define CFG_BLE_MAX_ADV_DATA_LEN (414) -#else - #define CFG_BLE_MAX_ADV_DATA_LEN (207) -#endif +#define CFG_BLE_MAX_ADV_DATA_LEN (207) /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. * Range: -1280 .. 1280 @@ -390,12 +318,12 @@ /* BLE core version (16-bit signed integer). * - SHCI_C2_BLE_INIT_BLE_CORE_5_2 * - SHCI_C2_BLE_INIT_BLE_CORE_5_3 - * which are used to set: 11(5.2), 12(5.3). + * - SHCI_C2_BLE_INIT_BLE_CORE_5_4 + * which are used to set: 11(5.2), 12(5.3), 13(5.4). */ -#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_3) +#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_4) -#if 0 /****************************************************************************** * Transport Layer ******************************************************************************/ @@ -559,13 +487,13 @@ typedef enum * Debug ******************************************************************************/ /** - * When set, this resets some hw resources to set the device in the same state than the power up - * The FW resets only register that may prevent the FW to run properly + * When set, this resets some hw resources to put the device in the same state as at power up. + * It resets only register that may prevent the FW to run properly. * * This shall be set to 0 in a final product * */ -#define CFG_HW_RESET_BY_FW 1 +#define CFG_HW_RESET_BY_FW 0 /** * keep debugger enabled while in any low power mode when set to 1 @@ -731,5 +659,4 @@ typedef enum #define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR -#endif -#endif /*APP_CONF_DEFAULT_H */ +#endif /*APP_CONF_H */ diff --git a/src/utility/STM32_WPAN/ble_bufsize.h b/src/utility/STM32_WPAN/ble_bufsize.h index d4d28907..b9935c0b 100644 --- a/src/utility/STM32_WPAN/ble_bufsize.h +++ b/src/utility/STM32_WPAN/ble_bufsize.h @@ -75,13 +75,6 @@ ((pw) + MAX(BLE_MEM_BLOCK_X_MTU(mtu, n_link), \ BLE_MBLOCKS_SECURE_CONNECTIONS)) -/* - * BLE_DEFAULT_MBLOCKS_COUNT: default memory blocks count - */ -#define BLE_DEFAULT_MBLOCKS_COUNT(n_link) \ - BLE_MBLOCKS_CALC(BLE_DEFAULT_PREP_WRITE_LIST_SIZE, \ - BLE_DEFAULT_MAX_ATT_MTU, n_link) - /* * BLE_FIXED_BUFFER_SIZE_BYTES: * A part of the RAM, is dynamically allocated by initializing all the pointers diff --git a/src/utility/STM32_WPAN/hw.h b/src/utility/STM32_WPAN/hw.h index 1472a5e8..651e1f17 100644 --- a/src/utility/STM32_WPAN/hw.h +++ b/src/utility/STM32_WPAN/hw.h @@ -26,23 +26,14 @@ extern "C" { #endif /* Includes ------------------------------------------------------------------*/ -#include "stm32_def.h" -#include "stm32wbxx_ll_bus.h" -#include "stm32wbxx_ll_exti.h" -#include "stm32wbxx_ll_system.h" -#include "stm32wbxx_ll_rcc.h" -#include "stm32wbxx_ll_ipcc.h" -#include "stm32wbxx_ll_cortex.h" -#include "stm32wbxx_ll_utils.h" -#include "stm32wbxx_ll_pwr.h" /****************************************************************************** * HW IPCC ******************************************************************************/ void HW_IPCC_Enable( void ); void HW_IPCC_Init( void ); -#define HW_IPCC_Rx_Handler IPCC_C1_RX_IRQHandler -#define HW_IPCC_Tx_Handler IPCC_C1_TX_IRQHandler + void HW_IPCC_Rx_Handler( void ); + void HW_IPCC_Tx_Handler( void ); void HW_IPCC_BLE_Init( void ); void HW_IPCC_BLE_SendCmd( void ); diff --git a/src/utility/STM32_WPAN/hw_ipcc.c b/src/utility/STM32_WPAN/hw_ipcc.c index c7304823..fd620b85 100644 --- a/src/utility/STM32_WPAN/hw_ipcc.c +++ b/src/utility/STM32_WPAN/hw_ipcc.c @@ -17,9 +17,9 @@ ****************************************************************************** */ /* USER CODE END Header */ -#if defined(STM32WBxx) + /* Includes ------------------------------------------------------------------*/ -#include "hw.h" +#include "app_common.h" #include "mbox_def.h" /* Global variables ---------------------------------------------------------*/ @@ -667,4 +667,3 @@ static void HW_IPCC_TRACES_EvtHandler( void ) } __weak void HW_IPCC_TRACES_EvtNot( void ){}; -#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/shci.c b/src/utility/STM32_WPAN/shci.c index 4525656e..5c32555e 100644 --- a/src/utility/STM32_WPAN/shci.c +++ b/src/utility/STM32_WPAN/shci.c @@ -16,7 +16,7 @@ ****************************************************************************** */ -#if defined(STM32WBxx) + /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" @@ -644,6 +644,26 @@ SHCI_CmdStatus_t SHCI_C2_802_15_4_DeInit( void ) return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } +SHCI_CmdStatus_t SHCI_C2_SetSystemClock( SHCI_C2_SET_SYSTEM_CLOCK_Cmd_Param_t clockSel ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = (uint8_t)clockSel; + + shci_send( SHCI_OPCODE_C2_SET_SYSTEM_CLOCK, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + /** * Local System COMMAND * These commands are NOT sent to the CPU2 @@ -739,4 +759,3 @@ SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) return (SHCI_Success); } -#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/shci.h b/src/utility/STM32_WPAN/shci.h index 750fa972..30ae10cb 100644 --- a/src/utility/STM32_WPAN/shci.h +++ b/src/utility/STM32_WPAN/shci.h @@ -227,6 +227,7 @@ extern "C" { SHCI_OCF_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME, SHCI_OCF_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION, SHCI_OCF_C2_802_15_4_DEINIT, + SHCI_OCF_C2_SET_SYSTEM_CLOCK, } SHCI_OCF_t; #define SHCI_OPCODE_C2_FUS_GET_STATE (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_GET_STATE) @@ -436,7 +437,7 @@ extern "C" { * PrWriteListSize * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) * - * Maximum number of supported “prepare write request” + * Maximum number of supported "prepare write request" * - Min value: given by the macro DEFAULT_PREP_WRITE_LIST_SIZE * - Max value: a value higher than the minimum required can be specified, but it is not recommended */ @@ -464,20 +465,20 @@ extern "C" { uint16_t AttMtu; /** - * SlaveSca - * The sleep clock accuracy (ppm value) that used in BLE connected slave mode to calculate the window widening + * PeripheralSca + * The sleep clock accuracy (ppm value) that used in BLE connected Peripheral mode to calculate the window widening * (in combination with the sleep clock accuracy sent by master in CONNECT_REQ PDU), * refer to BLE 5.0 specifications - Vol 6 - Part B - chap 4.5.7 and 4.2.2 * - Min value: 0 * - Max value: 500 (worst possible admitted by specification) */ - uint16_t SlaveSca; + uint16_t PeripheralSca; /** - * MasterSca - * The sleep clock accuracy handled in master mode. It is used to determine the connection and advertising events timing. + * CentralSca + * The sleep clock accuracy handled in Central mode. It is used to determine the connection and advertising events timing. * It is transmitted to the slave in CONNEC_REQ PDU used by the slave to calculate the window widening, - * see SlaveSca and Bluetooth Core Specification v5.0 Vol 6 - Part B - chap 4.5.7 and 4.2.2 + * see PeripheralSca and Bluetooth Core Specification v5.0 Vol 6 - Part B - chap 4.5.7 and 4.2.2 * Possible values: * - 251 ppm to 500 ppm: 0 * - 151 ppm to 250 ppm: 1 @@ -488,7 +489,7 @@ extern "C" { * - 21 ppm to 30 ppm: 6 * - 0 ppm to 20 ppm: 7 */ - uint8_t MasterSca; + uint8_t CentralSca; /** * LsSource @@ -503,7 +504,7 @@ extern "C" { * MaxConnEventLength * This parameter determines the maximum duration of a slave connection event. When this duration is reached the slave closes * the current connections event (whatever is the CE_length parameter specified by the master in HCI_CREATE_CONNECTION HCI command), - * expressed in units of 625/256 µs (~2.44 µs) + * expressed in units of 625/256 us (~2.44 us) * - Min value: 0 (if 0 is specified, the master and slave perform only a single TX-RX exchange per connection event) * - Max value: 1638400 (4000 ms). A higher value can be specified (max 0xFFFFFFFF) but results in a maximum connection time * of 4000 ms as specified. In this case the parameter is not applied, and the predicted CE length calculated on slave is not shortened @@ -512,7 +513,7 @@ extern "C" { /** * HsStartupTime - * Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 µs (~2.44 µs). + * Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us). * - Min value: 0 * - Max value: 820 (~2 ms). A higher value can be specified, but the value that implemented in stack is forced to ~2 ms */ @@ -598,7 +599,7 @@ extern "C" { int16_t rx_path_compens; /* BLE core specification version (8-bit unsigned integer). - * values as: 11(5.2), 12(5.3) + * values as: 11(5.2), 12(5.3), 13(5.4) */ uint8_t ble_core_version; @@ -829,6 +830,7 @@ extern "C" { /** No response parameters*/ #define SHCI_OPCODE_C2_CONFIG (( SHCI_OGF << 10) + SHCI_OCF_C2_CONFIG) + /** Command parameters */ typedef PACKED_STRUCT{ uint8_t PayloadCmdSize; @@ -843,6 +845,15 @@ extern "C" { #define SHCI_OPCODE_C2_802_15_4_DEINIT (( SHCI_OGF << 10) + SHCI_OCF_C2_802_15_4_DEINIT) +#define SHCI_OPCODE_C2_SET_SYSTEM_CLOCK (( SHCI_OGF << 10) + SHCI_OCF_C2_SET_SYSTEM_CLOCK) + /** Command parameters */ + typedef enum + { + SET_SYSTEM_CLOCK_HSE_TO_PLL, + SET_SYSTEM_CLOCK_PLL_ON_TO_HSE, + SET_SYSTEM_CLOCK_PLL_OFF_TO_HSE, + }SHCI_C2_SET_SYSTEM_CLOCK_Cmd_Param_t; + /** * PayloadCmdSize * Value that shall be used @@ -859,8 +870,8 @@ extern "C" { /** * Device ID */ -#define SHCI_C2_CONFIG_STM32WB55xx (0x495) -#define SHCI_C2_CONFIG_STM32WB15xx (0x494) +#define SHCI_C2_CONFIG_STM32WB55xx (0x495) +#define SHCI_C2_CONFIG_STM32WB15xx (0x494) /** * Config1 @@ -878,7 +889,7 @@ extern "C" { */ #define SHCI_C2_CONFIG_EVTMASK1_BIT0_ERROR_NOTIF_ENABLE (1<<0) #define SHCI_C2_CONFIG_EVTMASK1_BIT1_BLE_NVM_RAM_UPDATE_ENABLE (1<<1) -#define SHCI_C2_CONFIG_EVTMASK1_BIT2_THREAD_NVM_RAM_UPDATE_ENABLE (1<<2) +#define SHCI_C2_CONFIG_EVTMASK1_BIT2_THREAD_NVM_RAM_UPDATE_ENABLE (1<<2) #define SHCI_C2_CONFIG_EVTMASK1_BIT3_NVM_START_WRITE_ENABLE (1<<3) #define SHCI_C2_CONFIG_EVTMASK1_BIT4_NVM_END_WRITE_ENABLE (1<<4) #define SHCI_C2_CONFIG_EVTMASK1_BIT5_NVM_START_ERASE_ENABLE (1<<5) @@ -965,7 +976,8 @@ extern "C" { #define INFO_STACK_TYPE_ZIGBEE_RFD 0x31 #define INFO_STACK_TYPE_MAC 0x40 #define INFO_STACK_TYPE_BLE_THREAD_FTD_STATIC 0x50 -#define INFO_STACK_TYPE_BLE_THREAD_FTD_DYAMIC 0x51 +#define INFO_STACK_TYPE_BLE_THREAD_FTD_DYNAMIC 0x51 +#define INFO_STACK_TYPE_BLE_THREAD_LIGHT_DYNAMIC 0x52 #define INFO_STACK_TYPE_802154_LLD_TESTS 0x60 #define INFO_STACK_TYPE_802154_PHY_VALID 0x61 #define INFO_STACK_TYPE_BLE_PHY_VALID 0x62 @@ -1364,9 +1376,24 @@ typedef struct { */ SHCI_CmdStatus_t SHCI_C2_802_15_4_DeInit( void ); - #ifdef __cplusplus + /** + * SHCI_C2_SetSystemClock + * @brief Request CPU2 to change system clock + * + * @param clockSel: It can be one of the following list + * - SET_SYSTEM_CLOCK_HSE_TO_PLL : CPU2 set system clock to PLL, PLL must be configured and started before. + * - SET_SYSTEM_CLOCK_PLL_ON_TO_HSE : CPU2 set System clock to HSE, PLL is still ON after command execution. + * - SET_SYSTEM_CLOCK_PLL_OFF_TO_HSE : CPU2 set System clock to HSE, PLL is turned OFF after command execution. + * + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_SetSystemClock( SHCI_C2_SET_SYSTEM_CLOCK_Cmd_Param_t clockSel ); + + +#ifdef __cplusplus } #endif #endif /*__SHCI_H */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32_WPAN/shci_tl.c b/src/utility/STM32_WPAN/shci_tl.c index 60380251..0f604300 100644 --- a/src/utility/STM32_WPAN/shci_tl.c +++ b/src/utility/STM32_WPAN/shci_tl.c @@ -16,14 +16,12 @@ ****************************************************************************** */ -#if defined(STM32WBxx) + /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" #include "stm_list.h" #include "shci_tl.h" -#include "stm32_def.h" -#include "wiring_time.h" /* Private typedef -----------------------------------------------------------*/ typedef enum @@ -170,20 +168,6 @@ void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payl return; } -void shci_notify_asynch_evt(void *pdata) -{ - UNUSED(pdata); - /* Need to parse data in future version */ - shci_user_evt_proc(); -} - -void shci_register_io_bus(tSHciIO *fops) -{ - /* Register IO bus services */ - fops->Init = TL_SYS_Init; - fops->Send = TL_SYS_SendCmd; -} - /* Private functions ---------------------------------------------------------*/ static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) { @@ -251,11 +235,10 @@ static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) /* Weak implementation ----------------------------------------------------------------*/ __WEAK void shci_cmd_resp_wait(uint32_t timeout) { - for (unsigned long start = millis(); (millis() - start) < timeout;) { - if (CmdRspStatusFlag == SHCI_TL_CMD_RESP_RELEASE) { - break; - } - } + (void)timeout; + + while(CmdRspStatusFlag != SHCI_TL_CMD_RESP_RELEASE); + return; } @@ -267,4 +250,3 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) return; } -#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/stm_list.c b/src/utility/STM32_WPAN/stm_list.c index 4e8c3643..4c928647 100644 --- a/src/utility/STM32_WPAN/stm_list.c +++ b/src/utility/STM32_WPAN/stm_list.c @@ -16,13 +16,11 @@ ****************************************************************************** */ -#if defined(STM32WBxx) + /****************************************************************************** * Include Files ******************************************************************************/ -#include "stdint.h" -#include "cmsis_gcc.h" -#include "stm32_wpan_common.h" +#include "utilities_common.h" #include "stm_list.h" @@ -206,4 +204,3 @@ void LST_get_prev_node (tListNode * ref_node, tListNode ** node) __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ } -#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/tl.h b/src/utility/STM32_WPAN/tl.h index 74520878..8e8c6cbc 100644 --- a/src/utility/STM32_WPAN/tl.h +++ b/src/utility/STM32_WPAN/tl.h @@ -108,7 +108,7 @@ typedef PACKED_STRUCT { uint8_t evtcode; uint8_t plen; - uint8_t payload[4]; + uint8_t payload[2]; } TL_Evt_t; typedef PACKED_STRUCT diff --git a/src/utility/STM32_WPAN/tl_mbox.c b/src/utility/STM32_WPAN/tl_mbox.c index 11393162..27a998a3 100644 --- a/src/utility/STM32_WPAN/tl_mbox.c +++ b/src/utility/STM32_WPAN/tl_mbox.c @@ -16,7 +16,6 @@ ****************************************************************************** */ -#if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" #include "hw.h" @@ -52,10 +51,9 @@ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleLldTable_t TL_BleLldTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_SysTable_t TL_SysTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_MemManagerTable_t TL_MemManagerTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_TracesTable_t TL_TracesTable; -#if 0 PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_Mac_802_15_4_t TL_Mac_802_15_4_Table; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_ZigbeeTable_t TL_Zigbee_Table; -#endif + /**< tables */ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode FreeBufQueue; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode TracesEvtQueue; @@ -99,10 +97,8 @@ void TL_Init( void ) TL_RefTable.p_sys_table = &TL_SysTable; TL_RefTable.p_mem_manager_table = &TL_MemManagerTable; TL_RefTable.p_traces_table = &TL_TracesTable; -#if 0 TL_RefTable.p_mac_802_15_4_table = &TL_Mac_802_15_4_Table; TL_RefTable.p_zigbee_table = &TL_Zigbee_Table; -#endif HW_IPCC_Init(); return; @@ -850,4 +846,3 @@ static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) return; } -#endif /* STM32WBxx */ From 56fcc8eb10d304d3fd2711f6fb6a72eba733bf12 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Thu, 11 Jan 2024 11:36:05 +0100 Subject: [PATCH 2/6] chore: update CFG_BLE_*_SCA name Signed-off-by: Frederic Pillon --- src/utility/HCISharedMemTransport.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/utility/HCISharedMemTransport.cpp b/src/utility/HCISharedMemTransport.cpp index 8ced5f67..412d0b06 100644 --- a/src/utility/HCISharedMemTransport.cpp +++ b/src/utility/HCISharedMemTransport.cpp @@ -642,8 +642,8 @@ int HCISharedMemTransportClass::stm32wb_start_ble(void) CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MBLOCK_COUNT, CFG_BLE_MAX_ATT_MTU, - CFG_BLE_SLAVE_SCA, - CFG_BLE_MASTER_SCA, + CFG_BLE_PERIPHERAL_SCA, + CFG_BLE_CENTRAL_SCA, CFG_BLE_LS_SOURCE, CFG_BLE_MAX_CONN_EVENT_LENGTH, CFG_BLE_HSE_STARTUP_TIME, From fb5d4148420e4f0dcc78005be6a7f723e0ea6f09 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 10 Jan 2024 18:16:01 +0100 Subject: [PATCH 3/6] chore: adapt STM32_WPAN sources Signed-off-by: Frederic Pillon --- src/utility/STM32_WPAN/app_conf_default.h | 49 +++++++++++++++++++---- src/utility/STM32_WPAN/hw.h | 13 +++++- src/utility/STM32_WPAN/hw_ipcc.c | 4 +- src/utility/STM32_WPAN/shci.c | 2 + src/utility/STM32_WPAN/shci_tl.c | 17 ++++++++ src/utility/STM32_WPAN/stm_list.c | 6 ++- src/utility/STM32_WPAN/tl_mbox.c | 6 +++ 7 files changed, 85 insertions(+), 12 deletions(-) diff --git a/src/utility/STM32_WPAN/app_conf_default.h b/src/utility/STM32_WPAN/app_conf_default.h index 846be3c9..6c9beb3b 100644 --- a/src/utility/STM32_WPAN/app_conf_default.h +++ b/src/utility/STM32_WPAN/app_conf_default.h @@ -1,9 +1,9 @@ /* USER CODE BEGIN Header */ /** ****************************************************************************** - * @file app_conf.h + * @file app_conf_default.h * @author MCD Application Team - * @brief Application configuration file for STM32WPAN Middleware. + * @brief Default application configuration file for STM32WPAN Middleware. ****************************************************************************** * @attention * @@ -19,18 +19,40 @@ /* USER CODE END Header */ /* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef APP_CONF_H -#define APP_CONF_H +#ifndef APP_CONF_DEFAULT_H +#define APP_CONF_DEFAULT_H +#if 0 #include "hw.h" #include "hw_conf.h" #include "hw_if.h" #include "ble_bufsize.h" +#endif /****************************************************************************** * Application Config ******************************************************************************/ +/**< generic parameters ******************************************************/ +/* HCI related defines */ + +#define ACI_HAL_SET_TX_POWER_LEVEL 0xFC0F +#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C +#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D +#define MAX_HCI_ACL_PACKET_SIZE (sizeof(TL_PacketHeader_t) + 5 + 251) +#define HCI_RESET 0x0C03 + +#ifndef BLE_SHARED_MEM_BYTE_ORDER + #define BLE_SHARED_MEM_BYTE_ORDER MSBFIRST +#endif +#define BLE_MODULE_SHARED_MEM_BUFFER_SIZE 128 + +/** + * Define Tx Power + */ +#define CFG_TX_POWER (0x18) /* -0.15dBm */ + +#if 0 /** * Define Secure Connections Support */ @@ -104,6 +126,7 @@ #define CFG_FW_SUBVERSION (1) #define CFG_FW_BRANCH (0) #define CFG_FW_BUILD (0) +#endif /****************************************************************************** * BLE Stack @@ -250,7 +273,7 @@ * 0: LE Power Class 2-3 * other bits: complete with Options_extension flag */ -#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3) +#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3) /** * BLE stack Options_extension flags to be configured with: @@ -292,7 +315,11 @@ * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set */ -#define CFG_BLE_MAX_ADV_SET_NBR (8) +#if defined(STM32WB15xx) + #define CFG_BLE_MAX_ADV_SET_NBR (3) +#else + #define CFG_BLE_MAX_ADV_SET_NBR (8) +#endif /* Maximum advertising data length (in bytes) * Range: 31 .. 1650 with limitation: @@ -301,7 +328,11 @@ * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set */ -#define CFG_BLE_MAX_ADV_DATA_LEN (207) +#if defined(STM32WB15xx) + #define CFG_BLE_MAX_ADV_DATA_LEN (414) +#else + #define CFG_BLE_MAX_ADV_DATA_LEN (207) +#endif /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. * Range: -1280 .. 1280 @@ -324,6 +355,7 @@ #define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_4) +#if 0 /****************************************************************************** * Transport Layer ******************************************************************************/ @@ -659,4 +691,5 @@ typedef enum #define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR -#endif /*APP_CONF_H */ +#endif +#endif /*APP_CONF_DEFAULT_H */ diff --git a/src/utility/STM32_WPAN/hw.h b/src/utility/STM32_WPAN/hw.h index 651e1f17..1472a5e8 100644 --- a/src/utility/STM32_WPAN/hw.h +++ b/src/utility/STM32_WPAN/hw.h @@ -26,14 +26,23 @@ extern "C" { #endif /* Includes ------------------------------------------------------------------*/ +#include "stm32_def.h" +#include "stm32wbxx_ll_bus.h" +#include "stm32wbxx_ll_exti.h" +#include "stm32wbxx_ll_system.h" +#include "stm32wbxx_ll_rcc.h" +#include "stm32wbxx_ll_ipcc.h" +#include "stm32wbxx_ll_cortex.h" +#include "stm32wbxx_ll_utils.h" +#include "stm32wbxx_ll_pwr.h" /****************************************************************************** * HW IPCC ******************************************************************************/ void HW_IPCC_Enable( void ); void HW_IPCC_Init( void ); - void HW_IPCC_Rx_Handler( void ); - void HW_IPCC_Tx_Handler( void ); +#define HW_IPCC_Rx_Handler IPCC_C1_RX_IRQHandler +#define HW_IPCC_Tx_Handler IPCC_C1_TX_IRQHandler void HW_IPCC_BLE_Init( void ); void HW_IPCC_BLE_SendCmd( void ); diff --git a/src/utility/STM32_WPAN/hw_ipcc.c b/src/utility/STM32_WPAN/hw_ipcc.c index fd620b85..3461cbed 100644 --- a/src/utility/STM32_WPAN/hw_ipcc.c +++ b/src/utility/STM32_WPAN/hw_ipcc.c @@ -18,8 +18,9 @@ */ /* USER CODE END Header */ +#if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ -#include "app_common.h" +#include "hw.h" #include "mbox_def.h" /* Global variables ---------------------------------------------------------*/ @@ -667,3 +668,4 @@ static void HW_IPCC_TRACES_EvtHandler( void ) } __weak void HW_IPCC_TRACES_EvtNot( void ){}; +#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/shci.c b/src/utility/STM32_WPAN/shci.c index 5c32555e..40110f42 100644 --- a/src/utility/STM32_WPAN/shci.c +++ b/src/utility/STM32_WPAN/shci.c @@ -17,6 +17,7 @@ */ +#if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" @@ -759,3 +760,4 @@ SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) return (SHCI_Success); } +#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/shci_tl.c b/src/utility/STM32_WPAN/shci_tl.c index 0f604300..daa988c1 100644 --- a/src/utility/STM32_WPAN/shci_tl.c +++ b/src/utility/STM32_WPAN/shci_tl.c @@ -17,11 +17,13 @@ */ +#if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" #include "stm_list.h" #include "shci_tl.h" +#include "stm32_def.h" /* Private typedef -----------------------------------------------------------*/ typedef enum @@ -168,6 +170,20 @@ void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payl return; } +void shci_notify_asynch_evt(void *pdata) +{ + UNUSED(pdata); + /* Need to parse data in future version */ + shci_user_evt_proc(); +} + +void shci_register_io_bus(tSHciIO *fops) +{ + /* Register IO bus services */ + fops->Init = TL_SYS_Init; + fops->Send = TL_SYS_SendCmd; +} + /* Private functions ---------------------------------------------------------*/ static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) { @@ -250,3 +266,4 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) return; } +#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/stm_list.c b/src/utility/STM32_WPAN/stm_list.c index 4c928647..df6c2155 100644 --- a/src/utility/STM32_WPAN/stm_list.c +++ b/src/utility/STM32_WPAN/stm_list.c @@ -17,10 +17,13 @@ */ +#if defined(STM32WBxx) /****************************************************************************** * Include Files ******************************************************************************/ -#include "utilities_common.h" +#include "stdint.h" +#include "cmsis_gcc.h" +#include "stm32_wpan_common.h" #include "stm_list.h" @@ -204,3 +207,4 @@ void LST_get_prev_node (tListNode * ref_node, tListNode ** node) __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ } +#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/tl_mbox.c b/src/utility/STM32_WPAN/tl_mbox.c index 27a998a3..40c96793 100644 --- a/src/utility/STM32_WPAN/tl_mbox.c +++ b/src/utility/STM32_WPAN/tl_mbox.c @@ -16,6 +16,7 @@ ****************************************************************************** */ +#if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" #include "hw.h" @@ -51,8 +52,10 @@ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleLldTable_t TL_BleLldTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_SysTable_t TL_SysTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_MemManagerTable_t TL_MemManagerTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_TracesTable_t TL_TracesTable; +#if 0 PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_Mac_802_15_4_t TL_Mac_802_15_4_Table; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_ZigbeeTable_t TL_Zigbee_Table; +#endif /**< tables */ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode FreeBufQueue; @@ -97,8 +100,10 @@ void TL_Init( void ) TL_RefTable.p_sys_table = &TL_SysTable; TL_RefTable.p_mem_manager_table = &TL_MemManagerTable; TL_RefTable.p_traces_table = &TL_TracesTable; +#if 0 TL_RefTable.p_mac_802_15_4_table = &TL_Mac_802_15_4_Table; TL_RefTable.p_zigbee_table = &TL_Zigbee_Table; +#endif HW_IPCC_Init(); return; @@ -846,3 +851,4 @@ static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) return; } +#endif /* STM32WBxx */ From 545cd735637d98b94953ca752b814107e58f0b8d Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Thu, 13 Jul 2023 17:16:40 +0200 Subject: [PATCH 4/6] fix: include a timeout when waiting for the cmd_resp Signed-off-by: Frederic Pillon --- src/utility/STM32_WPAN/shci_tl.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/utility/STM32_WPAN/shci_tl.c b/src/utility/STM32_WPAN/shci_tl.c index daa988c1..25e1a214 100644 --- a/src/utility/STM32_WPAN/shci_tl.c +++ b/src/utility/STM32_WPAN/shci_tl.c @@ -24,6 +24,7 @@ #include "stm_list.h" #include "shci_tl.h" #include "stm32_def.h" +#include "wiring_time.h" /* Private typedef -----------------------------------------------------------*/ typedef enum @@ -251,10 +252,11 @@ static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) /* Weak implementation ----------------------------------------------------------------*/ __WEAK void shci_cmd_resp_wait(uint32_t timeout) { - (void)timeout; - - while(CmdRspStatusFlag != SHCI_TL_CMD_RESP_RELEASE); - + for (unsigned long start = millis(); (millis() - start) < timeout;) { + if (CmdRspStatusFlag == SHCI_TL_CMD_RESP_RELEASE) { + break; + } + } return; } From 787f3fa8e404bfcf18a897016ebb3644fc92f740 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 10 Jan 2024 18:45:17 +0100 Subject: [PATCH 5/6] chore: add support for customize app_conf_default.h Signed-off-by: Frederic Pillon --- src/utility/STM32_WPAN/app_conf_default.h | 58 ++++++++++++++++++----- 1 file changed, 45 insertions(+), 13 deletions(-) diff --git a/src/utility/STM32_WPAN/app_conf_default.h b/src/utility/STM32_WPAN/app_conf_default.h index 6c9beb3b..9509a0f5 100644 --- a/src/utility/STM32_WPAN/app_conf_default.h +++ b/src/utility/STM32_WPAN/app_conf_default.h @@ -50,7 +50,9 @@ /** * Define Tx Power */ -#define CFG_TX_POWER (0x18) /* -0.15dBm */ +#ifndef CFG_TX_POWER + #define CFG_TX_POWER (0x18) /* -0.15dBm */ +#endif #if 0 /** @@ -135,13 +137,25 @@ * Maximum number of simultaneous connections that the device will support. * Valid values are from 1 to 8 */ -#define CFG_BLE_NUM_LINK 8 +#ifndef CFG_BLE_NUM_LINK +#ifdef STM32WB15xx + #define CFG_BLE_NUM_LINK 3 +#else + #define CFG_BLE_NUM_LINK 8 +#endif +#endif /** * Maximum number of Services that can be stored in the GATT database. * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services */ -#define CFG_BLE_NUM_GATT_SERVICES 8 +#ifndef CFG_BLE_NUM_GATT_SERVICES +#ifdef STM32WB15xx + #define CFG_BLE_NUM_GATT_SERVICES 4 +#else + #define CFG_BLE_NUM_GATT_SERVICES 8 +#endif +#endif /** * Maximum number of Attributes @@ -150,7 +164,13 @@ * Note that certain characteristics and relative descriptors are added automatically during device initialization * so this parameters should be 9 plus the number of user Attributes */ -#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 +#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES +#ifdef STM32WB15xx + #define CFG_BLE_NUM_GATT_ATTRIBUTES 30 +#else + #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 +#endif +#endif /** * Maximum supported ATT_MTU size @@ -186,12 +206,16 @@ /** * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. */ -#define CFG_BLE_DATA_LENGTH_EXTENSION 1 +#ifndef CFG_BLE_DATA_LENGTH_EXTENSION + #define CFG_BLE_DATA_LENGTH_EXTENSION 1 +#endif /** * Sleep clock accuracy in Peripheral mode (ppm value) */ -#define CFG_BLE_PERIPHERAL_SCA 500 +#ifndef CFG_BLE_PERIPHERAL_SCA + #define CFG_BLE_PERIPHERAL_SCA 500 +#endif /** * Sleep clock accuracy in Central mode @@ -204,7 +228,9 @@ * 6 : 21 ppm to 30 ppm * 7 : 0 ppm to 20 ppm */ -#define CFG_BLE_CENTRAL_SCA 0 +#ifndef CFG_BLE_CENTRAL_SCA + #define CFG_BLE_CENTRAL_SCA 0 +#endif /** * LsSource @@ -213,21 +239,27 @@ * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config */ -#if defined(STM32WB5Mxx) - #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) -#else - #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) +#ifndef CFG_BLE_LS_SOURCE + #if defined(STM32WB5Mxx) + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) + #else + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) + #endif #endif /** * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) */ -#define CFG_BLE_HSE_STARTUP_TIME 0x148 +#ifndef CFG_BLE_HSE_STARTUP_TIME + #define CFG_BLE_HSE_STARTUP_TIME 0x148 +#endif /** * Maximum duration of the connection event when the device is in Peripheral mode in units of 625/256 us (~2.44 us) */ -#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) +#ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH + #define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) +#endif /** * Viterbi Mode From c8dfa1c0e50c17863d3b79c9e15c37872dce93b8 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 24 Jul 2023 10:55:20 +0200 Subject: [PATCH 6/6] fix: TL_Evt_t payload size for reset Within STM32CubeWB v1.17.0 update TL_Evt_t payload size was reduced. This produce a warning -Warray-bounds due to the reset management which require 4 bytes. Signed-off-by: Frederic Pillon --- src/utility/STM32_WPAN/tl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/utility/STM32_WPAN/tl.h b/src/utility/STM32_WPAN/tl.h index 8e8c6cbc..74520878 100644 --- a/src/utility/STM32_WPAN/tl.h +++ b/src/utility/STM32_WPAN/tl.h @@ -108,7 +108,7 @@ typedef PACKED_STRUCT { uint8_t evtcode; uint8_t plen; - uint8_t payload[2]; + uint8_t payload[4]; } TL_Evt_t; typedef PACKED_STRUCT