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gateware: bootloader: rev2: Hooked up slot_changed properly and als…
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…o ensured that the `dl_ready` signal was hooked to the PSRAM's `ready` signal
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lethalbit committed Dec 24, 2024
1 parent 22c0c77 commit 48af3ab
Showing 1 changed file with 9 additions and 3 deletions.
12 changes: 9 additions & 3 deletions squishy/gateware/bootloader/rev2.py
Original file line number Diff line number Diff line change
Expand Up @@ -165,22 +165,28 @@ def elaborate(self, platform: SquishyPlatformType | None) -> Module:
regs.ctrl_rst.eq(0),
spi.active_mode.eq(bus_hold), # We should always be a peripheral unless we're explicitly writing to the PSRAM

dl_ready.eq(0),
dl_ready.eq(psram.ready),
slot_ack.eq(0),
]

with m.FSM(name = 'storage'):
with m.State('RESET'):
m.d.sync += [
regs.slot.dest.eq(slot_selection),
regs.slot.boot.eq(slot_selection),
regs.txlen.eq(0),
psram.rst_addrs.eq(1),
]
m.next = 'IDLE'

with m.State('IDLE'):
m.d.sync += [ psram.rst_addrs.eq(0), ]
with m.If(slot_changed):
m.d.sync += [
regs.slot.dest.eq(slot_selection),
regs.slot.boot.eq(slot_selection),
]
m.d.comb += [
slot_ack.eq(1),
]
with m.If(dl_start):
m.d.sync += [
bus_hold.eq(1),
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