Update README.adoc

Signed-off-by: Ved Shanbhogue <91900059+ved-rivos@users.noreply.github.com>
sifive · Nov 1, 2024 · dd3cff2 · dd3cff2
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 = RISC-V CFI specification
 
+This specification is integrated into the Priv. and Unpriv. specifications. This repo is no
+longer maintained. Please refer to the Priv. and Unpriv. specifications at 
+https://github.com/riscv/riscv-isa-manual
+
 This document is capturing discussions at the Shadow Stacks and Landing Pads TG and attempts
 to document the baseline. This is not official specification and everything in this document
 may change. Control-flow Integrity (CFI) provides CPU instruction set architecture (ISA)