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support tile builtins #623

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support tile builtins #623

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6d765b7
support tile builtins
g4titanx Feb 7, 2025
d444c59
support tile builtins
g4titanx Feb 8, 2025
86d3b91
fix fmt errors
g4titanx Feb 8, 2025
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3 changes: 1 addition & 2 deletions .github/workflows/stdarch.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -102,8 +102,7 @@ jobs:
run: |
# FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro.
# TODO: remove --skip test_mm512_stream_ps when stdarch is updated in rustc.
# TODO: remove --skip test_tile_ when it's implemented.
STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features --cfg stdarch_intel_sde" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_mm512_stream_ps --skip test_tile_
STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features --cfg stdarch_intel_sde" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_mm512_stream_ps

# Summary job for the merge queue.
# ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB!
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57 changes: 40 additions & 17 deletions src/intrinsic/llvm.rs
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Expand Up @@ -808,6 +808,46 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function

#[cfg(feature = "master")]
pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function<'gcc> {
if matches!(
name,
"llvm.x86.ldtilecfg"
| "llvm.x86.sttilecfg"
| "llvm.x86.tileloadd64"
| "llvm.x86.tilestored64"
| "llvm.x86.tilerelease"
| "llvm.x86.tileloaddt164"
| "llvm.x86.tilezero"
| "llvm.x86.tdpbf16ps"
| "llvm.x86.tdpbssd"
| "llvm.x86.tdpbsud"
| "llvm.x86.tdpbusd"
| "llvm.x86.tdpfp16ps"
| "llvm.x86.tdpbuud"
| "llvm.x86.tcmmimfp16ps"
| "llvm.x86.tcmmrlfp16ps"
) {
let gcc_name = match name {
"llvm.x86.ldtilecfg" => "__builtin_ia32_ldtilecfg",
"llvm.x86.sttilecfg" => "__builtin_ia32_sttilecfg",
"llvm.x86.tileloadd64" => "__builtin_ia32_tileloadd64",
"llvm.x86.tilestored64" => "__builtin_ia32_tilestored64",
"llvm.x86.tilerelease" => "__builtin_ia32_tilerelease",
"llvm.x86.tileloaddt164" => "__builtin_ia32_tileloaddt164",
"llvm.x86.tilezero" => "__builtin_ia32_tilezero",
"llvm.x86.tdpbf16ps" => "__builtin_ia32_tdpbf16ps",
"llvm.x86.tdpbssd" => "__builtin_ia32_tdpbssd",
"llvm.x86.tdpbsud" => "__builtin_ia32_tdpbsud",
"llvm.x86.tdpbusd" => "__builtin_ia32_tdpbusd",
"llvm.x86.tdpbuud" => "__builtin_ia32_tdpbuud",
"llvm.x86.tdpfp16ps" => "__builtin_ia32_tdpfp16ps",
"llvm.x86.tcmmimfp16ps" => "__builtin_ia32_tcmmimfp16ps",
"llvm.x86.tcmmrlfp16ps" => "__builtin_ia32_tcmmrlfp16ps",
_ => unreachable!(),
};
let func = cx.context.get_target_builtin_function(gcc_name);
cx.functions.borrow_mut().insert(gcc_name.to_string(), func);
return func;
}
let gcc_name = match name {
"llvm.prefetch" => {
let gcc_name = "__builtin_prefetch";
Expand Down Expand Up @@ -1323,23 +1363,6 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function
"llvm.x86.avx512fp16.mask.vfcmadd.cph.128" => "__builtin_ia32_vfcmaddcph128_mask3",
"llvm.x86.avx512fp16.mask.vfmadd.cph.128" => "__builtin_ia32_vfmaddcph128_mask3",

// TODO: support the tile builtins:
"llvm.x86.ldtilecfg" => "__builtin_trap",
"llvm.x86.sttilecfg" => "__builtin_trap",
"llvm.x86.tileloadd64" => "__builtin_trap",
"llvm.x86.tilerelease" => "__builtin_trap",
"llvm.x86.tilestored64" => "__builtin_trap",
"llvm.x86.tileloaddt164" => "__builtin_trap",
"llvm.x86.tilezero" => "__builtin_trap",
"llvm.x86.tdpbf16ps" => "__builtin_trap",
"llvm.x86.tdpbssd" => "__builtin_trap",
"llvm.x86.tdpbsud" => "__builtin_trap",
"llvm.x86.tdpbusd" => "__builtin_trap",
"llvm.x86.tdpbuud" => "__builtin_trap",
"llvm.x86.tdpfp16ps" => "__builtin_trap",
"llvm.x86.tcmmimfp16ps" => "__builtin_trap",
"llvm.x86.tcmmrlfp16ps" => "__builtin_trap",

// NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py
_ => include!("archs.rs"),
};
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