Each hart supporting a matrix extension defines four parameters:
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The maximum size in bits of a matrix element that any operation can produce or consume, \$\rm{ELEN} \ge 8\$, which must be a power of 2.
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The number of bits in a single matrix tile register, MLEN, which must be a power of 2, and must be no greater than 232.
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The number of bits in a row of a single matrix tile register, RLEN, which must be a power of 2, and must be no greater than 216.
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The multiple of length for matrix accumulation registers, AMUL, where the number of bits in a row of a single matrix accumulation register is \$\rm{RLEN} \times \rm{AMUL}\$, and the number of bits in a single matrix accumulation register is \$\rm{MLEN} \times \rm{AMUL}\$.
Some constraints on these parameters are defined as following.
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\$\rm{ELEN} \le \rm{RLEN} \le \rm{MLEN}\$, this supports matrix tile size from \$1 \times 1\$ to \$2^{16} \times 2^{16}\$.
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For implmentations without widening accumulation space, \$\rm{AMUL} = 1\$.
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For implmentations with double-widening accumulation space, \$\rm{AMUL} = 2\$.
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For implmentations with quadruple-widening accumulation space, \$\rm{AMUL} = 4\$.
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For implmentations with octuple-widening accumulation space, \$\rm{AMUL} = 8\$.
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AMUL with any other value is not allowed.