The instructions in the matrix extension use 32-bit encoding and a new major opcode OP-M32 (1110111).
Instruction formats are listed below.
Configuration instructions, where the imm
field supports 10-bit immediate operand.
Load & store instructions, where ls
field indicates the type (load or store), and tr
field indicates if the operand in register is transposed. eew
field (000-011) indicates the effective element width.
Data move instructions, where di
field indicates the moving direction.
Arithmetic and logic instructions, where fp
field indicates if the operation is float point, sa
field indicates if the result is saturated, and sn
field indicates if the source operands are signed (for integer). eew
field indicates the effective element width (000-011 for int8-int64, 111 for int4, and 100 to use mtype.msew
).
Type-convert instructions, where fd
field indicates if the destination elements are float point, and sn
field indicates if the integer operand is signed. eew
field indicates the effective element width (000-011 for int8-int64, 111 for int4, and 100 to use mtype.msew
). nw
field indicates if the destination elements are narrowed or widen.