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Update I-CNT overflow handing (in BTM mode).
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mipsrobert committed Mar 8, 2024
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51 changes: 26 additions & 25 deletions docs/RISC-V-N-Trace.adoc
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Expand Up @@ -1218,6 +1218,8 @@ When I-CNT counter is full (reaches it's maximum value) it may be reported in on

* The <<msg_ResourceFull,ResourceFull>> message with <<field_RCODE,RCODE>>=0 should be generated.
* Optionally I-CNT counter full may be reported using a <<Synchronizing Messages,synchronizing message>> with *SYNC=4 (Sequential Instruction Counter)*.
** This method may be only used in <<mode_BTM,BTM>> mode.
** Reporting HIST overflow requires to use <<msg_ResourceFull,ResourceFull>> message (as corresponding SYNC code is not defined) so I-CNT overflows should be reported in the same way.

==== Example of I-CNT Handling in BTM mode

Expand Down Expand Up @@ -1294,50 +1296,49 @@ Let's consider the following example code:

0x100: c.add ... ; 16-bit instruction
0x102: b... 0x200 ; 32-bit instruction (direct conditional branch)
0x106: c.add ... ; 16-bit instruction
0x108: add ... ; 32-bit instruction
0x10c: add ... ; 32-bit instruction
0x110: add ... ; 32-bit instruction
0x114: add ... ; 32-bit instruction
0x118: add ... ; 32-bit instruction
0x106: add ... ; 32-bit instruction
0x10A: add ... ; 32-bit instruction
0x10E: add ... ; 32-bit instruction
0x112: add ... ; 32-bit instruction
0x116: add ... ; 32-bit instruction
0x11A: c.add ... ; 16-bit instruction
0x11C: c.ebreak ; 16-bit breakpoint (to stop the code)

and let's assume (for simplicity) that the I-CNT counter is 4-bit wide (most significant bit being an overflow flag) and that direct conditional branch at an address 0x102 is not-taken (so code will run from address 0x100 till breakpoint at address 0x11C).

Trace with *Resource Full* message:
Trace with *Resource Full* message (HTM mode shown):

* <<msg2_ProgTraceSync,ProgTraceSync>> (start of trace)
** SYNC=3 (Exit from Debug Mode), I-CNT=0 (nothing executed as we are starting)
** F-ADDR=0x80 (encoding starting address 0x100)
* <<msg2_ResourceFull,ResourceFull>> (I-CNT overflown to 8 after processing address 0x10C)
** RCODE=0 (I-CNT counter is full), *RDATA[0]=0x8* (I-CNT value overflown value)
* <<msg2_ProgTraceCorrelation,ProgTraceCorrelation>> (from address 0x100 till end of trace at 0x11C)
** EVCODE=0 (Entry into Debug Mode), CDF=1 (HIST field present after I-CNT)
** *I-CNT=6* (see note below), HIST=0x2 (one not taken direct conditional branch)
* <<msg2_ResourceFull,ResourceFull>> (I-CNT overflown to 9 at an address 0x112)
** RCODE=0 (I-CNT counter is full), *RDATA[0]=9* (I-CNT value overflown value)
* <<msg2_ProgTraceCorrelation,ProgTraceCorrelation>> (describes entire <0x100..0x11C> range)
** EVCODE=0 (Entry into Debug Mode), CDF=1 (I-CNT and HIST fields follow)
** *I-CNT=5* (see note below), HIST=0x2 (one not taken direct conditional branch)

Trace with *SYNC=Sequential Instruction Counter*:
Trace with *SYNC=Sequential Instruction Counter* (BTM mode only):

* <<msg2_ProgTraceSync,ProgTraceSync>> (start of trace)
** SYNC=3 (Exit from Debug Mode), I-CNT=0 (nothing executed as we are starting)
** F-ADDR=0x80 (encoding starting address 0x100)
* <<msg2_IndirectBranchHistSync,IndirectBranchHistSync>> (I-CNT overflown to 8 after processing address 0x10C)
** SYNC=4 (Sequential Instruction Counter), *I-CNT=8* (see note below), HIST=0x2 (one not taken branch)
** F-ADDR=0x88 (encoding address 0x110)
* <<msg2_ProgTraceCorrelation,ProgTraceCorrelation>> (from address 0x110 till end of trace at 0x11C)
** EVCODE=0 (Entry into Debug Mode), CDF=1 (HIST field present after I-CNT)
** *I-CNT=6* (see note below), HIST=0x1 (no branches)
* <<msg2_ProgramTraceSync,ProgramTraceSync>> (I-CNT overflown to 9 at an address 0x112)
** SYNC=4 (Sequential Instruction Counter), *I-CNT=9* (see note below)
** F-ADDR=0x89 (encoding address 0x112)
* <<msg2_ProgTraceCorrelation,ProgTraceCorrelation>> (describes <0x112..0x11C> range)
** EVCODE=0 (Entry into Debug Mode), CDF=0 (only I-CNT field follows)
** *I-CNT=5* (see note below), HIST=0x1 (no branches)

*Notes (for both above examples)*
*Notes (for both trace options)*

====
* Overflown *I-CNT=8* (or *RDATA[0]=0x8*) field decodes instructions from instruction at an addresses 0x100 to instruction at address 0x10C (16 bytes long address range).
* The *I-CNT=6* field decodes instructions from addresses 0x110 to 0x118 (12 bytes long address range).
* In both cases total I-CNT is 6+8=14, what corresponds to all addresses from 0x100 till 0x11C
* Overflown *I-CNT=9* (or *RDATA[0]=9*) field describes <0x100..0x112> range (18 bytes long).
* The *I-CNT=5* field describes <0x112..0x11C> range (12 bytes long).
* In both cases total I-CNT is 9+5=14, what describes the entire <0x100..0x11C> range.
** Debug Mode is entered before c.ebreak instruction (as it never retires), so c.ebreak is NOT included in I-CNT.
* Using *ResourceFull* generates smaller, more compressed trace.
** In real life examples it will allow generation of repeated history patterns and even better trace compression.
* Using *SYNC=Sequential Instruction Counter* generates bigger trace (as F-ADDR is reported in the middle).
** It may be easier to implement as each encoder must implement 'periodic sync' (and may implement triggers as well). These would need to generate synchronizing messages at any moment. The only difference would be a different values of the SYNC field. It means a lot of already present (and required) logic can be reused.
* Using *SYNC=Sequential Instruction Counter* generates bigger trace (as potentially long F-ADDR field is reported).
====

=== Synchronizing Messages
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