Merge pull request #485 from ved-rivos/0217

G bit is only defined for VS-stage
riscv-non-isa · Feb 17, 2025 · 5e7bf12 · 5e7bf12
2 parents aac13c1 + 05906f6
commit 5e7bf12
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/iommu_ref_model/libiommu/src/iommu_two_stage_trans.c b/iommu_ref_model/libiommu/src/iommu_two_stage_trans.c
@@ -35,9 +35,9 @@ two_stage_address_translation(
         i = 0;
         pte->raw = 0;
         pte->PPN = 0;
-        pte->D = pte->A = pte->U = 1;
+        pte->D = pte->A = pte->G = pte->U = 1;
         pte->X = pte->W = pte->R = pte->V = 1;
-        pte->N = pte->G = 0;
+        pte->N = 0;
         pte->PBMT = PMA;
         *pa = iova;
         // The translation range size returned in a Success response to