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.gitmodules
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[submodule "Components/WP3T31-01/edgesu"]
path = Components/WP3T31-01/edgesu
url = https://gitlab.bsc.es/caos_hw/hdl_ip/edgesu.git
[submodule "Components/WP3T34-01/edgesu"]
path = Components/WP3T34-01/edgesu
url = https://gitlab.bsc.es/caos_hw/hdl_ip/edgesu.git
[submodule "Components/WP3T34-02/sw-diverse-redundancy"]
path = Components/WP3T34-02/sw-diverse-redundancy
url = https://gitlab.bsc.es/mfernand/sw-diverse-redundancy.git
[submodule "Components/WP3T32-06/redundant_acceleration_scheme"]
path = Components/WP3T32-06/redundant_acceleration_scheme
url = https://gitlab.com/selene-riscv-platform/selene-hardware
[submodule "Components/WP3T34-03/WP3T34-03-Versal-Model-Deployment"]
path = Components/WP3T34-03/WP3T34-03-Versal-Model-Deployment
url = git@github.com:project-fractal/WP3T34-03-Versal-Model-Deployment.git
[submodule "Components/WP3T31-02/accelerators_interconnect"]
path = Components/WP3T31-02/accelerators_interconnect
url = https://gitlab.com/selene-riscv-platform/selene-hardware
[submodule "Components/WP3T35-02/HLSinf"]
path = Components/WP3T35-02/HLSinf
url = https://github.com/PEAK-UPV/HLSinf
[submodule "Components/WP3T32-10/WP3T32-10-Versal-accelerator-building-blocks"]
path = Components/WP3T32-10/WP3T32-10-Versal-accelerator-building-blocks
url = https://github.com/project-fractal/WP3T32-10-Versal-accelerator-building-blocks
[submodule "Components/WP3T31-03/Selene-RFR"]
path = Components/WP3T31-03/Selene-RFR
url = https://gitlab.com/selene-riscv-platform/selene-hardware.git
branch = regfile_randomization