use $ as variable delimiters

filters.lua

@@ -20,10 +20,16 @@ function change_meta(m)
   return m
 end
 
+function expand(s)
+  v = meta[s:sub(2, -2)]
+  if v then
+    return stringify(v)
+  end
+end
+
 function change_link_target(l)
-  if meta[l.target] then
-    l.target = stringify(meta[l.target])
-  elseif l.target:sub(1, 1) == "/" then
+  l.target = l.target:gsub("(%b$$)", expand)
+  if l.target:sub(1, 1) == "/" then
     l.target = meta.base_path .. l.target
   end
   return l

md/alpine.md

@@ -6,7 +6,7 @@ To simplify maintenance and distribution of the pre-built applications described
 
 ## Getting started
 
-- Download [SD card image zip file](release_image).
+- Download [SD card image zip file]($release_image$).
 - Copy the contents of the SD card image zip file to a micro SD card.
 - Optionally, to start one of the applications automatically at boot time, copy its `start.sh` file from `apps/<application>` to the topmost directory on the SD card.
 - Install the micro SD card in the Red Pitaya board and connect the power.
@@ -20,7 +20,7 @@ Wi-Fi is by default configured in hotspot mode with the network name (SSID) and
 
 The wired interface is by default configured to request an IP address via DHCP. If no IP address is provided by a DHCP server, then the wired interface falls back to a static IP address [192.168.1.100](http://192.168.1.100).
 
-The configuration of the IP addresses is in [/etc/dhcpcd.conf](https://github.com/pavel-demin/red-pitaya-notes/blob/master/alpine/etc/dhcpcd.conf). More information about [/etc/dhcpcd.conf](https://github.com/pavel-demin/red-pitaya-notes/blob/master/alpine/etc/dhcpcd.conf) can be found at [this link](https://www.mankier.com/5/dhcpcd.conf).
+The configuration of the IP addresses is in [/etc/dhcpcd.conf]($source$/alpine/etc/dhcpcd.conf). More information about [/etc/dhcpcd.conf]($source$/alpine/etc/dhcpcd.conf) can be found at [this link](https://www.mankier.com/5/dhcpcd.conf).
 
 From systems with enabled DNS Service Discovery (DNS-SD), Red Pitaya can be accessed as `rp-f0xxxx.local`, where `f0xxxx` are the last 6 characters from the MAC address written on the Ethernet connector.
 

md/axi-hub.md

@@ -17,7 +17,7 @@ To control, monitor and communicate with all parts of the applications, the foll
 
 The hub interface consists of all required registers and interfaces connected to the different parts of the applications and an AXI4 slave interface used to communicate with the CPU.
 
-The corresponding Verilog code can be found in [cores/axi_hub.v](https://github.com/pavel-demin/red-pitaya-notes/blob/master/cores/axi_hub.v).
+The corresponding Verilog code can be found in [cores/axi_hub.v]($source$/cores/axi_hub.v).
 
 ## Addresses
 
@@ -40,4 +40,4 @@ A basic project with the hub interface, ADC interface, and DAC interface is show
 
 ![Template project](/img/template-project.png)
 
-This template project can be used as a starting point for projects requiring ADC, DAC and hub interface. The Tcl code of this project can be found in [projects/template](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/template).
+This template project can be used as a starting point for projects requiring ADC, DAC and hub interface. The Tcl code of this project can be found in [projects/template]($source$/projects/template).

md/axi-interface-buffers.md

@@ -46,7 +46,7 @@ A circuit implementing this behavior is shown in the following diagram:
 
 ![Input buffer](/img/input-buffer.png)
 
-The corresponding Verilog code can be found in [modules/input_buffer.v](https://github.com/pavel-demin/red-pitaya-notes/tree/master/modules/input_buffer.v).
+The corresponding Verilog code can be found in [modules/input_buffer.v]($source$/modules/input_buffer.v).
 
 ## Output buffer
 
@@ -56,7 +56,7 @@ A circuit implementing this behavior is shown in the following diagram:
 
 ![Output buffer](/img/output-buffer.png)
 
-The corresponding Verilog code can be found in [modules/output_buffer.v](https://github.com/pavel-demin/red-pitaya-notes/tree/master/modules/output_buffer.v).
+The corresponding Verilog code can be found in [modules/output_buffer.v]($source$/modules/output_buffer.v).
 
 Since the `in_ready` signal is used to enable the data register, it can also be used to enable data registers outside the output buffer module. This feature can be useful when controlling a pipeline that provides enable inputs for its internal registers, like for example the internal registers in [DSP48E1](https://docs.xilinx.com/v/u/en-US/ug479_7Series_DSP48E1) as shown in the diagram below:
 
@@ -66,6 +66,6 @@ Since the `in_ready` signal is used to enable the data register, it can also be
 
 The Verilog code of the modules that use these input and output buffers can be found at the following links:
 
-- [AXI4 Hub](https://github.com/pavel-demin/red-pitaya-notes/blob/master/cores/axi_hub.v)
+- [AXI4 Hub]($source$/cores/axi_hub.v)
 
-- [AXI4-Stream IIR Filter](https://github.com/pavel-demin/red-pitaya-notes/blob/master/cores/axis_iir_filter.v)
+- [AXI4-Stream IIR Filter]($source$/cores/axis_iir_filter.v)

md/dma.md

@@ -64,21 +64,21 @@ The modules have two input ports for dynamically configurable parameters:
 
 The `sts_data` port outputs the current value of the address counter. It can be used to check what memory addresses the modules have already accessed.
 
-The Verilog code of these IP cores can be found in [cores/axis_ram_writer.v](https://github.com/pavel-demin/red-pitaya-notes/tree/master/cores/axis_ram_writer.v) and [cores/axis_ram_reader.v](https://github.com/pavel-demin/red-pitaya-notes/tree/master/cores/axis_ram_reader.v).
+The Verilog code of these IP cores can be found in [cores/axis_ram_writer.v]($source$/cores/axis_ram_writer.v) and [cores/axis_ram_reader.v]($source$/cores/axis_ram_reader.v).
 
 ## Custom Linux driver
 
 The custom Linux driver is used to allocate a memory buffer using contiguous memory allocator (CMA). The `ioctl` function is used to allocate a memory buffer and obtain its physical address. The `mmap` function is used to obtain the virtual address of the memory buffer.
 
-The source code of the custom Linux driver can be found in [patches/cma.c](https://github.com/pavel-demin/red-pitaya-notes/tree/master/patches/cma.c).
+The source code of the custom Linux driver can be found in [patches/cma.c]($source$/patches/cma.c).
 
 ## Usage examples
 
 The source code of projects using direct memory access can be found at the following links:
 
-- [projects/adc_recorder](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/adc_recorder)
-- [projects/adc_recorder_trigger](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/adc_recorder_trigger)
-- [projects/adc_test](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/adc_test)
-- [projects/dac_player](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/dac_player)
-- [projects/sdr_receiver_wide](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/sdr_receiver_wide)
-- [projects/sdr_receiver_wide_122_88](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/sdr_receiver_wide_122_88)
+- [projects/adc_recorder]($source$/projects/adc_recorder)
+- [projects/adc_recorder_trigger]($source$/projects/adc_recorder_trigger)
+- [projects/adc_test]($source$/projects/adc_test)
+- [projects/dac_player]($source$/projects/dac_player)
+- [projects/sdr_receiver_wide]($source$/projects/sdr_receiver_wide)
+- [projects/sdr_receiver_wide_122_88]($source$/projects/sdr_receiver_wide_122_88)

md/led-blinker.md

@@ -42,11 +42,11 @@ The source code is available at
 
 This repository contains the following components:
 
-- [Makefile](https://github.com/pavel-demin/red-pitaya-notes/blob/master/Makefile) that builds everything (almost)
-- [cfg](https://github.com/pavel-demin/red-pitaya-notes/tree/master/cfg) directory with constraints and board definition files
-- [cores](https://github.com/pavel-demin/red-pitaya-notes/tree/master/cores) directory with IP cores written in Verilog
-- [projects](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects) directory with Vivado projects written in Tcl
-- [scripts](https://github.com/pavel-demin/red-pitaya-notes/tree/master/scripts) directory with
+- [Makefile]($source$/Makefile) that builds everything (almost)
+- [cfg]($source$/cfg) directory with constraints and board definition files
+- [cores]($source$/cores) directory with IP cores written in Verilog
+- [projects]($source$/projects) directory with Vivado projects written in Tcl
+- [scripts]($source$/scripts) directory with
   - Tcl scripts for Vivado and SDK
   - shell scripts that build a bootable SD card and SD card image
 
@@ -56,7 +56,7 @@ All steps of the development chain and the corresponding scripts are shown in th
 
 ## Syntactic sugar for IP cores
 
-The [projects/led_blinker](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/led_blinker) directory contains one Tcl file [block_design.tcl](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/led_blinker/block_design.tcl) that instantiates, configures and interconnects all the needed IP cores.
+The [projects/led_blinker]($source$/projects/led_blinker) directory contains one Tcl file [block_design.tcl]($source$/projects/led_blinker/block_design.tcl) that instantiates, configures and interconnects all the needed IP cores.
 
 By default, the IP core instantiation and configuration commands are quite verbose:
 
@@ -78,7 +78,7 @@ cell xilinx.com:ip:processing_system7:5.5 ps_0 {
 }
 ```
 
-The `cell` command and other helper commands are defined in the [scripts/project.tcl](https://github.com/pavel-demin/red-pitaya-notes/blob/master/scripts/project.tcl) script.
+The `cell` command and other helper commands are defined in the [scripts/project.tcl]($source$/scripts/project.tcl) script.
 
 ## Getting started
 

md/mcpha.md

@@ -37,26 +37,26 @@ The embedded oscilloscope can be used to check the shape of the pulse at the inp
 
 The exponential pulse generator can be used to generate signals with specified time and amplitude distributions. It consists of an impulse generator module and two IIR filters. The impulse generator module outputs a 8 ns (1 clock cycle at 125 MHz) impulse of a required amplitude and after a required time interval. The two IIR filters are used to emulate the exponentially rising and exponentially decaying edges of the generated pulses.
 
-The [projects/mcpha](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/mcpha) directory contains five Tcl files: [block_design.tcl](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/mcpha/block_design.tcl), [pha.tcl](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/mcpha/pha.tcl), [hst.tcl](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/mcpha/hst.tcl), [osc.tcl](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/mcpha/osc.tcl), [gen.tcl](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/mcpha/gen.tcl). The code in these files instantiates, configures and interconnects all the needed IP cores.
+The [projects/mcpha]($source$/projects/mcpha) directory contains five Tcl files: [block_design.tcl]($source$/projects/mcpha/block_design.tcl), [pha.tcl]($source$/projects/mcpha/pha.tcl), [hst.tcl]($source$/projects/mcpha/hst.tcl), [osc.tcl]($source$/projects/mcpha/osc.tcl), [gen.tcl]($source$/projects/mcpha/gen.tcl). The code in these files instantiates, configures and interconnects all the needed IP cores.
 
-The source code of the [R](https://www.r-project.org) script used to calculate the coefficients of the FIR filter can be found in [projects/mcpha/filters/fir_0.r](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/mcpha/filters/fir_0.r).
+The source code of the [R](https://www.r-project.org) script used to calculate the coefficients of the FIR filter can be found in [projects/mcpha/filters/fir_0.r]($source$/projects/mcpha/filters/fir_0.r).
 
 ## Software
 
-The [projects/mcpha/server](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/mcpha/server) directory contains the source code of the TCP server ([mcpha-server.c](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/mcpha/server/mcpha-server.c)) that receives control commands and transmits the data to the control program running on a remote PC.
+The [projects/mcpha/server]($source$/projects/mcpha/server) directory contains the source code of the TCP server ([mcpha-server.c]($source$/projects/mcpha/server/mcpha-server.c)) that receives control commands and transmits the data to the control program running on a remote PC.
 
-The [projects/mcpha/client](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/mcpha/client) directory contains the source code of the control program ([mcpha.py](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/mcpha/client/mcpha.py)).
+The [projects/mcpha/client]($source$/projects/mcpha/client) directory contains the source code of the control program ([mcpha.py]($source$/projects/mcpha/client/mcpha.py)).
 
 ![MCPHA client](/img/mcpha-client.png)
 
 ## Getting started with MS Windows
 
 - Connect a signal source to the IN1 or IN2 connector on the Red Pitaya board.
-- Download [SD card image zip file](release_image) (more details about the SD card image can be found at [this link](/alpine/)).
+- Download [SD card image zip file]($release_image$) (more details about the SD card image can be found at [this link](/alpine/)).
 - Copy the contents of the SD card image zip file to a micro SD card.
 - Optionally, to start the application automatically at boot time, copy its `start.sh` file from `apps/mcpha` to the topmost directory on the SD card.
 - Install the micro SD card in the Red Pitaya board and connect the power.
-- Download and unpack the [release zip file](release_file).
+- Download and unpack the [release zip file]($release_file$).
 - Run the `mcpha.exe` program in the `control` directory.
 - Type in the IP address of the Red Pitaya board and press Connect button.
 - Select Spectrum histogram 1 or Spectrum histogram 2 tab.
@@ -66,7 +66,7 @@ The [projects/mcpha/client](https://github.com/pavel-demin/red-pitaya-notes/tree
 ## Getting started with GNU/Linux
 
 - Connect a signal source to the IN1 or IN2 connector on the Red Pitaya board.
-- Download [SD card image zip file](release_image) (more details about the SD card image can be found at [this link](/alpine/)).
+- Download [SD card image zip file]($release_image$) (more details about the SD card image can be found at [this link](/alpine/)).
 - Copy the contents of the SD card image zip file to a micro SD card.
 - Optionally, to start the application automatically at boot time, copy its `start.sh` file from `apps/mcpha` to the topmost directory on the SD card.
 - Install the micro SD card in the Red Pitaya board and connect the power.

md/playground.md

@@ -4,7 +4,7 @@
 
 The combination of Jupyter notebooks, the [pyhubio](https://github.com/pavel-demin/pyhubio) library and the [AXI4 hub](/axi-hub/) allows interactive communication with all parts of the FPGA configuration and visualization of input and output data, making testing and prototyping more dynamic.
 
-The [notebooks](https://github.com/pavel-demin/red-pitaya-notes/tree/master/notebooks) directory contains a few examples of Jupyter notebooks.
+The [notebooks]($source$/notebooks) directory contains a few examples of Jupyter notebooks.
 
 ![Jupyter notebooks](/img/jupyter-notebooks.png)
 
@@ -14,17 +14,17 @@ The basic blocks of the playground project are shown in the following diagram:
 
 ![Playground](/img/playground.png)
 
-The [projects/playground](https://github.com/pavel-demin/red-pitaya-notes/tree/master/projects/playground) directory contains one Tcl file [block_design.tcl](https://github.com/pavel-demin/red-pitaya-notes/blob/master/projects/playground/block_design.tcl) that instantiates, configures and interconnects all the needed IP cores.
+The [projects/playground]($source$/projects/playground) directory contains one Tcl file [block_design.tcl]($source$/projects/playground/block_design.tcl) that instantiates, configures and interconnects all the needed IP cores.
 
-A pre-built Vivado project can be found in the `playground` directory in the [release zip file](release_file).
+A pre-built Vivado project can be found in the `playground` directory in the [release zip file]($release_file$).
 
 ## Getting started
 
-- Download [SD card image zip file](release_image) (more details about the SD card image can be found at [this link](/alpine/))
+- Download [SD card image zip file]($release_image$) (more details about the SD card image can be found at [this link](/alpine/))
 - Copy the contents of the SD card image zip file to a micro SD card
 - Optionally, to start the application automatically at boot time, copy its `start.sh` file from `apps/playground` to the topmost directory on the SD card
 - Install the micro SD card in the Red Pitaya board and connect the power
-- Download and unpack the [release zip file](release_file)
+- Download and unpack the [release zip file]($release_file$)
 
 - Install Visual Studio Code following the platform-specific instructions below:
 
@@ -38,10 +38,10 @@ A pre-built Vivado project can be found in the `playground` directory in the [re
   - [Jupyter](https://marketplace.visualstudio.com/items?itemName=ms-toolsai.jupyter)
   - [Micromamba](https://marketplace.visualstudio.com/items?itemName=corker.vscode-micromamba)
 
-- Open [notebooks](https://github.com/pavel-demin/red-pitaya-notes/tree/master/notebooks) directory in Visual Studio Code:
+- Open [notebooks]($source$/notebooks) directory in Visual Studio Code:
 
   - From the "File" menu select "Open Folder"
-  - In the "Open Folder" dialog find and select [notebooks](https://github.com/pavel-demin/red-pitaya-notes/tree/master/notebooks) directory and click "Open"
+  - In the "Open Folder" dialog find and select [notebooks]($source$/notebooks) directory and click "Open"
 
 - Create micromamba environment:
   - From the "View" menu select "Command Palette"