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Remove expression type parameter from vector types
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118 files changed

+1569
-1876
lines changed

‎simdpp/core/bit_not.h

+8-8
Original file line numberDiff line numberDiff line change
@@ -37,24 +37,24 @@ typename detail::get_expr<V>::type
3737
}
3838

3939
/* FIXME
40-
template<unsigned N, class E> SIMDPP_INL
41-
mask_int32<N, expr_bit_not<mask_int32<N,E>>> bit_not(mask_int32<N,E> a)
40+
template<unsigned N> SIMDPP_INL
41+
mask_int32<N, expr_bit_not<mask_int32<N>>> bit_not(mask_int32<N> a)
4242
{
4343
return { { a } };
4444
}
45-
template<unsigned N, class E> SIMDPP_INL
46-
mask_int64<N, expr_bit_not<mask_int64<N,E>>> bit_not(mask_int64<N,E> a)
45+
template<unsigned N> SIMDPP_INL
46+
mask_int64<N, expr_bit_not<mask_int64<N>>> bit_not(mask_int64<N> a)
4747
{
4848
return { { a } };
4949
}
5050
51-
template<unsigned N, class E> SIMDPP_INL
52-
mask_float32<N, expr_bit_not<mask_float32<N,E>>> bit_not(mask_float32<N,E> a)
51+
template<unsigned N> SIMDPP_INL
52+
mask_float32<N, expr_bit_not<mask_float32<N>>> bit_not(mask_float32<N> a)
5353
{
5454
return { { a } };
5555
}
56-
template<unsigned N, class E> SIMDPP_INL
57-
mask_float64<N, expr_bit_not<mask_float64<N,E>>> bit_not(mask_float64<N,E> a)
56+
template<unsigned N> SIMDPP_INL
57+
mask_float64<N, expr_bit_not<mask_float64<N>>> bit_not(mask_float64<N> a)
5858
{
5959
return { { a } };
6060
}

‎simdpp/core/blend.h

+4-10
Original file line numberDiff line numberDiff line change
@@ -107,16 +107,10 @@ class get_expr_blend {
107107

108108

109109
public:
110-
using v1_final_type = typename type_of_tag<v12_type_tag + size_tag,
111-
V1::length_bytes, void>::type;
112-
113-
using v2_final_type = typename type_of_tag<v12_type_tag + size_tag,
114-
V1::length_bytes, void>::type;
115-
116-
using v3_final_type = typename type_of_tag<v3_type_tag + size_tag,
117-
V1::length_bytes, void>::type;
118-
119-
using type = typename type_of_tag<type_tag + size_tag, V1::length_bytes, void>::type;
110+
using v1_final_type = typename type_of_tag<v12_type_tag + size_tag, V1::length_bytes>::type;
111+
using v2_final_type = typename type_of_tag<v12_type_tag + size_tag, V1::length_bytes>::type;
112+
using v3_final_type = typename type_of_tag<v3_type_tag + size_tag, V1::length_bytes>::type;
113+
using type = typename type_of_tag<type_tag + size_tag, V1::length_bytes>::type;
120114
};
121115

122116
} // namespace detail

‎simdpp/core/cmp_ge.h

+20-20
Original file line numberDiff line numberDiff line change
@@ -27,64 +27,64 @@ namespace SIMDPP_ARCH_NAMESPACE {
2727
rN = (aN >= bN) ? ~0x0 : 0x0
2828
@endcode
2929
*/
30-
template<unsigned N, class E1, class E2> SIMDPP_INL
31-
mask_int8<N> cmp_ge(const int8<N,E1>& a, const int8<N,E2>& b)
30+
template<unsigned N> SIMDPP_INL
31+
mask_int8<N> cmp_ge(const int8<N>& a, const int8<N>& b)
3232
{
3333
return detail::insn::i_cmp_ge(a.eval(), b.eval());
3434
}
3535

3636
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_int8, int8)
3737

38-
template<unsigned N, class E1, class E2> SIMDPP_INL
39-
mask_int8<N> cmp_ge(const uint8<N,E1>& a, const uint8<N,E2>& b)
38+
template<unsigned N> SIMDPP_INL
39+
mask_int8<N> cmp_ge(const uint8<N>& a, const uint8<N>& b)
4040
{
4141
return detail::insn::i_cmp_ge(a.eval(), b.eval());
4242
}
4343

4444
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_int8, uint8)
4545

46-
template<unsigned N, class E1, class E2> SIMDPP_INL
47-
mask_int16<N> cmp_ge(const int16<N,E1>& a, const int16<N,E2>& b)
46+
template<unsigned N> SIMDPP_INL
47+
mask_int16<N> cmp_ge(const int16<N>& a, const int16<N>& b)
4848
{
4949
return detail::insn::i_cmp_ge(a.eval(), b.eval());
5050
}
5151

5252
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_int16, int16)
5353

54-
template<unsigned N, class E1, class E2> SIMDPP_INL
55-
mask_int16<N> cmp_ge(const uint16<N,E1>& a, const uint16<N,E2>& b)
54+
template<unsigned N> SIMDPP_INL
55+
mask_int16<N> cmp_ge(const uint16<N>& a, const uint16<N>& b)
5656
{
5757
return detail::insn::i_cmp_ge(a.eval(), b.eval());
5858
}
5959

6060
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_int16, uint16)
6161

62-
template<unsigned N, class E1, class E2> SIMDPP_INL
63-
mask_int32<N> cmp_ge(const int32<N,E1>& a, const int32<N,E2>& b)
62+
template<unsigned N> SIMDPP_INL
63+
mask_int32<N> cmp_ge(const int32<N>& a, const int32<N>& b)
6464
{
6565
return detail::insn::i_cmp_ge(a.eval(), b.eval());
6666
}
6767

6868
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_int32, int32)
6969

70-
template<unsigned N, class E1, class E2> SIMDPP_INL
71-
mask_int32<N> cmp_ge(const uint32<N,E1>& a, const uint32<N,E2>& b)
70+
template<unsigned N> SIMDPP_INL
71+
mask_int32<N> cmp_ge(const uint32<N>& a, const uint32<N>& b)
7272
{
7373
return detail::insn::i_cmp_ge(a.eval(), b.eval());
7474
}
7575

7676
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_int32, uint32)
7777

78-
template<unsigned N, class E1, class E2> SIMDPP_INL
79-
mask_int64<N> cmp_ge(const int64<N,E1>& a, const int64<N,E2>& b)
78+
template<unsigned N> SIMDPP_INL
79+
mask_int64<N> cmp_ge(const int64<N>& a, const int64<N>& b)
8080
{
8181
return detail::insn::i_cmp_ge(a.eval(), b.eval());
8282
}
8383

8484
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_int64, int64)
8585

86-
template<unsigned N, class E1, class E2> SIMDPP_INL
87-
mask_int64<N> cmp_ge(const uint64<N,E1>& a, const uint64<N,E2>& b)
86+
template<unsigned N> SIMDPP_INL
87+
mask_int64<N> cmp_ge(const uint64<N>& a, const uint64<N>& b)
8888
{
8989
return detail::insn::i_cmp_ge(a.eval(), b.eval());
9090
}
@@ -101,8 +101,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_int64, uint64)
101101
@par 256-bit version:
102102
@icost{SSE2-SSE4.1, NEON, ALTIVEC, 2}
103103
*/
104-
template<unsigned N, class E1, class E2> SIMDPP_INL
105-
mask_float32<N> cmp_ge(const float32<N,E1>& a, const float32<N,E2>& b)
104+
template<unsigned N> SIMDPP_INL
105+
mask_float32<N> cmp_ge(const float32<N>& a, const float32<N>& b)
106106
{
107107
return detail::insn::i_cmp_ge(a.eval(), b.eval());
108108
}
@@ -124,8 +124,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_ge, mask_float32, float32)
124124
@novec{NEON, ALTIVEC}
125125
@icost{SSE2-SSE4.1, 2}
126126
*/
127-
template<unsigned N, class E1, class E2> SIMDPP_INL
128-
mask_float64<N> cmp_ge(const float64<N,E1>& a, const float64<N,E2>& b)
127+
template<unsigned N> SIMDPP_INL
128+
mask_float64<N> cmp_ge(const float64<N>& a, const float64<N>& b)
129129
{
130130
return detail::insn::i_cmp_ge(a.eval(), b.eval());
131131
}

‎simdpp/core/cmp_gt.h

+20-20
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,8 @@ namespace SIMDPP_ARCH_NAMESPACE {
3030
@par 256-bit version:
3131
@icost{SSE2-AVX, NEON, ALTIVEC, 2}
3232
*/
33-
template<unsigned N, class E1, class E2> SIMDPP_INL
34-
mask_int8<N> cmp_gt(const int8<N,E1>& a, const int8<N,E2>& b)
33+
template<unsigned N> SIMDPP_INL
34+
mask_int8<N> cmp_gt(const int8<N>& a, const int8<N>& b)
3535
{
3636
return detail::insn::i_cmp_gt(a.eval(), b.eval());
3737
}
@@ -57,8 +57,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_int8, int8)
5757
@icost{XOP, 2}
5858
@icost{NEON, ALTIVEC, 2}
5959
*/
60-
template<unsigned N, class E1, class E2> SIMDPP_INL
61-
mask_int8<N> cmp_gt(const uint8<N,E1>& a, const uint8<N,E2>& b)
60+
template<unsigned N> SIMDPP_INL
61+
mask_int8<N> cmp_gt(const uint8<N>& a, const uint8<N>& b)
6262
{
6363
return detail::insn::i_cmp_gt(a.eval(), b.eval());
6464
}
@@ -76,8 +76,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_int8, uint8)
7676
@par 256-bit version:
7777
@icost{SSE2-AVX, NEON, ALTIVEC, 2}
7878
*/
79-
template<unsigned N, class E1, class E2> SIMDPP_INL
80-
mask_int16<N> cmp_gt(const int16<N,E1>& a, const int16<N,E2>& b)
79+
template<unsigned N> SIMDPP_INL
80+
mask_int16<N> cmp_gt(const int16<N>& a, const int16<N>& b)
8181
{
8282
return detail::insn::i_cmp_gt(a.eval(), b.eval());
8383
}
@@ -101,8 +101,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_int16, int16)
101101
@icost{AVX2, 3-4}
102102
@icost{XOP, NEON, ALTIVEC, 2}
103103
*/
104-
template<unsigned N, class E1, class E2> SIMDPP_INL
105-
mask_int16<N> cmp_gt(const uint16<N,E1>& a, const uint16<N,E2>& b)
104+
template<unsigned N> SIMDPP_INL
105+
mask_int16<N> cmp_gt(const uint16<N>& a, const uint16<N>& b)
106106
{
107107
return detail::insn::i_cmp_gt(a.eval(), b.eval());
108108
}
@@ -120,8 +120,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_int16, uint16)
120120
@par 256-bit version:
121121
@icost{SSE2-AVX, NEON, ALTIVEC, 2}
122122
*/
123-
template<unsigned N, class E1, class E2> SIMDPP_INL
124-
mask_int32<N> cmp_gt(const int32<N,E1>& a, const int32<N,E2>& b)
123+
template<unsigned N> SIMDPP_INL
124+
mask_int32<N> cmp_gt(const int32<N>& a, const int32<N>& b)
125125
{
126126
return detail::insn::i_cmp_gt(a.eval(), b.eval());
127127
}
@@ -145,8 +145,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_int32, int32)
145145
@icost{AVX2, 3-4}
146146
@icost{XOP, NEON, ALTIVEC, 2}
147147
*/
148-
template<unsigned N, class E1, class E2> SIMDPP_INL
149-
mask_int32<N> cmp_gt(const uint32<N,E1>& a, const uint32<N,E2>& b)
148+
template<unsigned N> SIMDPP_INL
149+
mask_int32<N> cmp_gt(const uint32<N>& a, const uint32<N>& b)
150150
{
151151
return detail::insn::i_cmp_gt(a.eval(), b.eval());
152152
}
@@ -163,8 +163,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_int32, uint32)
163163
164164
Supported since AVX2, NEON64. Not supported on ALTIVEC.
165165
*/
166-
template<unsigned N, class E1, class E2> SIMDPP_INL
167-
mask_int64<N> cmp_gt(const int64<N,E1>& a, const int64<N,E2>& b)
166+
template<unsigned N> SIMDPP_INL
167+
mask_int64<N> cmp_gt(const int64<N>& a, const int64<N>& b)
168168
{
169169
return detail::insn::i_cmp_gt(a.eval(), b.eval());
170170
}
@@ -181,8 +181,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_int64, int64)
181181
182182
Supported since AVX2, NEON64. Not supported on ALTIVEC.
183183
*/
184-
template<unsigned N, class E1, class E2> SIMDPP_INL
185-
mask_int64<N> cmp_gt(const uint64<N,E1>& a, const uint64<N,E2>& b)
184+
template<unsigned N> SIMDPP_INL
185+
mask_int64<N> cmp_gt(const uint64<N>& a, const uint64<N>& b)
186186
{
187187
return detail::insn::i_cmp_gt(a.eval(), b.eval());
188188
}
@@ -200,8 +200,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_int64, uint64)
200200
@par 256-bit version:
201201
@icost{SSE2-SSE4.1, NEON, ALTIVEC, 2}
202202
*/
203-
template<unsigned N, class E1, class E2>
204-
mask_float32<N> cmp_gt(const float32<N,E1>& a, const float32<N,E2>& b)
203+
template<unsigned N>
204+
mask_float32<N> cmp_gt(const float32<N>& a, const float32<N>& b)
205205
{
206206
return detail::insn::i_cmp_gt(a.eval(), b.eval());
207207
}
@@ -223,8 +223,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_gt, mask_float32, float32)
223223
@novec{NEON, ALTIVEC}
224224
@icost{SSE2-SSE4.1, 2}
225225
*/
226-
template<unsigned N, class E1, class E2> SIMDPP_INL
227-
mask_float64<N> cmp_gt(const float64<N,E1>& a, const float64<N,E2>& b)
226+
template<unsigned N> SIMDPP_INL
227+
mask_float64<N> cmp_gt(const float64<N>& a, const float64<N>& b)
228228
{
229229
return detail::insn::i_cmp_gt(a.eval(), b.eval());
230230
}

‎simdpp/core/cmp_le.h

+20-20
Original file line numberDiff line numberDiff line change
@@ -19,64 +19,64 @@
1919
namespace simdpp {
2020
namespace SIMDPP_ARCH_NAMESPACE {
2121

22-
template<unsigned N, class E1, class E2> SIMDPP_INL
23-
mask_int8<N> cmp_le(const int8<N,E1>& a, const int8<N,E2>& b)
22+
template<unsigned N> SIMDPP_INL
23+
mask_int8<N> cmp_le(const int8<N>& a, const int8<N>& b)
2424
{
2525
return detail::insn::i_cmp_le(a.eval(), b.eval());
2626
}
2727

2828
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_int8, int8)
2929

30-
template<unsigned N, class E1, class E2> SIMDPP_INL
31-
mask_int8<N> cmp_le(const uint8<N,E1>& a, const uint8<N,E2>& b)
30+
template<unsigned N> SIMDPP_INL
31+
mask_int8<N> cmp_le(const uint8<N>& a, const uint8<N>& b)
3232
{
3333
return detail::insn::i_cmp_le(a.eval(), b.eval());
3434
}
3535

3636
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_int8, uint8)
3737

38-
template<unsigned N, class E1, class E2> SIMDPP_INL
39-
mask_int16<N> cmp_le(const int16<N,E1>& a, const int16<N,E2>& b)
38+
template<unsigned N> SIMDPP_INL
39+
mask_int16<N> cmp_le(const int16<N>& a, const int16<N>& b)
4040
{
4141
return detail::insn::i_cmp_le(a.eval(), b.eval());
4242
}
4343

4444
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_int16, int16)
4545

46-
template<unsigned N, class E1, class E2> SIMDPP_INL
47-
mask_int16<N> cmp_le(const uint16<N,E1>& a, const uint16<N,E2>& b)
46+
template<unsigned N> SIMDPP_INL
47+
mask_int16<N> cmp_le(const uint16<N>& a, const uint16<N>& b)
4848
{
4949
return detail::insn::i_cmp_le(a.eval(), b.eval());
5050
}
5151

5252
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_int16, uint16)
5353

54-
template<unsigned N, class E1, class E2> SIMDPP_INL
55-
mask_int32<N> cmp_le(const int32<N,E1>& a, const int32<N,E2>& b)
54+
template<unsigned N> SIMDPP_INL
55+
mask_int32<N> cmp_le(const int32<N>& a, const int32<N>& b)
5656
{
5757
return detail::insn::i_cmp_le(a.eval(), b.eval());
5858
}
5959

6060
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_int32, int32)
6161

62-
template<unsigned N, class E1, class E2> SIMDPP_INL
63-
mask_int32<N> cmp_le(const uint32<N,E1>& a, const uint32<N,E2>& b)
62+
template<unsigned N> SIMDPP_INL
63+
mask_int32<N> cmp_le(const uint32<N>& a, const uint32<N>& b)
6464
{
6565
return detail::insn::i_cmp_le(a.eval(), b.eval());
6666
}
6767

6868
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_int32, uint32)
6969

70-
template<unsigned N, class E1, class E2> SIMDPP_INL
71-
mask_int64<N> cmp_le(const int64<N,E1>& a, const int64<N,E2>& b)
70+
template<unsigned N> SIMDPP_INL
71+
mask_int64<N> cmp_le(const int64<N>& a, const int64<N>& b)
7272
{
7373
return detail::insn::i_cmp_le(a.eval(), b.eval());
7474
}
7575

7676
SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_int64, int64)
7777

78-
template<unsigned N, class E1, class E2> SIMDPP_INL
79-
mask_int64<N> cmp_le(const uint64<N,E1>& a, const uint64<N,E2>& b)
78+
template<unsigned N> SIMDPP_INL
79+
mask_int64<N> cmp_le(const uint64<N>& a, const uint64<N>& b)
8080
{
8181
return detail::insn::i_cmp_le(a.eval(), b.eval());
8282
}
@@ -93,8 +93,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_int64, uint64)
9393
@par 256-bit version:
9494
@icost{SSE2-AVX, NEON, ALTIVEC, 2}
9595
*/
96-
template<unsigned N, class E1, class E2> SIMDPP_INL
97-
mask_float32<N> cmp_le(const float32<N,E1>& a, const float32<N,E2>& b)
96+
template<unsigned N> SIMDPP_INL
97+
mask_float32<N> cmp_le(const float32<N>& a, const float32<N>& b)
9898
{
9999
return detail::insn::i_cmp_le(a.eval(), b.eval());
100100
}
@@ -116,8 +116,8 @@ SIMDPP_SCALAR_ARG_IMPL_VEC(cmp_le, mask_float32, float32)
116116
@novec{NEON, ALTIVEC}
117117
@icost{SSE2-SSE4.1, 2}
118118
*/
119-
template<unsigned N, class E1, class E2> SIMDPP_INL
120-
mask_float64<N> cmp_le(const float64<N,E1>& a, const float64<N,E2>& b)
119+
template<unsigned N> SIMDPP_INL
120+
mask_float64<N> cmp_le(const float64<N>& a, const float64<N>& b)
121121
{
122122
return detail::insn::i_cmp_le(a.eval(), b.eval());
123123
}

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