MIPI Simulation Models

Merge pull request #61 from muhammadhamza15/main

MIPI Primitives

Simulation Models Updates

Merge pull request #59 from muhammadhamza15/main

Simulation Models Updates

Simulation Models Updates

This release includes:

• soc fpga intf dma model tb
• async fifo model with tb for 36k
• macro for specify block (EDA-3129)

Simulation Models Updates

This release includes:

• Change in the directory structure for FPGA_Primitives repo, removing model customer (EDA-2945)
• DSP38 fixes (EDA-3088)
• Addition of specify blocks in primitives (EDA-1800)

Simulation Models Fixes

This release includes:

• EDA-3045 fixes
• EDA-3046 fixes

Simulation Models Updates

This release includes:

• internal port control signal in yaml
• added clk_buf_sink to tdp (EDA-3016) fixes
• changed $stop in all models to $fatal
• new primitives I_FAB and O_FAB
• BRAM updates
• SOC_FPGA test benches

DSP simulation model update

Merge pull request #42 from muhammadhamza15/main

Removing $stop from DSP warning messages

Simulation Models Updates

This release includes:

• I/O DDR fixes
• Updates in DSP38
• Updates in DSP19x2

Simulation Models Updates

This release includes:

• Updated PLL model
• Few modifications in O_SERDES and I_SERDES

TDP_RAM Testbenches

Merge pull request #38 from anaszameer/tb_bram_models_verilator

Add Verilator Supported Testbench for TDP_RAM36K and TDP_RAM18KX2 Models