Add inout test case

os-fpga · Aug 27, 2024 · 913caee · 913caee
1 parent 79cd9d1
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diff --git a/EDA-2763/inout/top.sdc b/EDA-2763/inout/top.sdc
@@ -0,0 +1,7 @@
+set_pin_loc io HP_1_0_0P
+
+set_pin_loc ioz HP_1_2_1P
+
+set_pin_loc i HP_1_4_2P
+
+set_pin_loc o HP_1_6_3P
diff --git a/EDA-2763/inout/top.v b/EDA-2763/inout/top.v
@@ -0,0 +1,17 @@
+/////////////////////////////////////////
+//  Functionality:
+//  Author: Chung Shien
+////////////////////////////////////////
+// `timescale 1ns / 1ps
+
+module top (
+  inout io,
+  input ioz,
+  input i,
+  output o
+);
+
+assign io = ioz ? 1'bz : i;
+assign o = ioz ? io : i;
+
+endmodule