Rename arch_for_decode, remove lazy decode

include/remill/Arch/Arch.h

@@ -63,7 +63,7 @@ struct Register {
 
   std::string name;  // Name of the register.
   uint64_t offset;  // Byte offset in `State`.
-  uint64_t size;  // Size of this register.
+  uint64_t size;  // Size of this register (in bytes).
 
   // LLVM type associated with the field in `State`.
   llvm::Type *type;
@@ -199,12 +199,6 @@ class Arch {
     return this->DecodeInstruction(address, instr_bytes, inst);
   }
 
-  // Fully decode any control-flow transfer instructions, but only partially
-  // decode other instructions.
-  virtual bool LazyDecodeInstruction(uint64_t address,
-                                     std::string_view instr_bytes,
-                                     Instruction &inst) const;
-
   // Maximum number of bytes in an instruction for this particular architecture.
   virtual uint64_t MaxInstructionSize(void) const = 0;
 

include/remill/Arch/Instruction.h

@@ -135,8 +135,6 @@ class Instruction {
 
   void Reset(void);
 
-  bool FinalizeDecode(void);
-
   // Name of semantics function that implements this instruction.
   std::string function;
 
@@ -160,7 +158,7 @@ class Instruction {
 
   // Pointer to the `remill::Arch` used to complete the decoding of this
   // instruction.
-  const Arch *arch_for_decode;
+  const Arch *arch;
 
   // Does the instruction require the use of the `__remill_atomic_begin` and
   // `__remill_atomic_end`?

lib/Arch/AArch64/Arch.cpp

@@ -1193,6 +1193,7 @@ bool AArch64Arch::DecodeInstruction(uint64_t address,
   aarch64::InstData dinst = {};
   auto bytes = reinterpret_cast<const uint8_t *>(inst_bytes.data());
 
+  inst.arch = this;
   inst.arch_name = arch_name;
   inst.pc = address;
   inst.next_pc = address + kInstructionSize;

lib/Arch/Arch.cpp

@@ -103,11 +103,6 @@ Arch::Arch(llvm::LLVMContext *context_, OSName os_name_, ArchName arch_name_)
 
 Arch::~Arch(void) {}
 
-bool Arch::LazyDecodeInstruction(uint64_t address, std::string_view instr_bytes,
-                                 Instruction &inst) const {
-  return DecodeInstruction(address, instr_bytes, inst);
-}
-
 // Returns `true` if memory access are little endian byte ordered.
 bool Arch::MemoryAccessIsLittleEndian(void) const {
   return true;

lib/Arch/Instruction.cpp

@@ -223,7 +223,7 @@ Instruction::Instruction(void)
       branch_taken_pc(0),
       branch_not_taken_pc(0),
       arch_name(kArchInvalid),
-      arch_for_decode(nullptr),
+      arch(nullptr),
       is_atomic_read_modify_write(false),
       has_branch_taken_delay_slot(false),
       has_branch_not_taken_delay_slot(false),
@@ -242,24 +242,12 @@ void Instruction::Reset(void) {
   has_branch_not_taken_delay_slot = false;
   in_delay_slot = false;
   category = Instruction::kCategoryInvalid;
-  arch_for_decode = nullptr;
+  arch = nullptr;
   operands.clear();
   function.clear();
   bytes.clear();
 }
 
-bool Instruction::FinalizeDecode(void) {
-  if (!IsValid()) {
-    return false;
-  } else if (!arch_for_decode) {
-    return true;
-  } else {
-    auto ret = arch_for_decode->DecodeInstruction(pc, bytes, *this);
-    arch_for_decode = nullptr;
-    return ret;
-  }
-}
-
 std::string Instruction::Serialize(void) const {
   std::stringstream ss;
   ss << "(";

lib/Arch/SPARC32/Arch.cpp

@@ -447,6 +447,17 @@ bool SPARC32Arch::NextInstructionIsDelayed(const Instruction &inst,
 // Decode an instruction.
 bool SPARC32Arch::DecodeInstruction(
     uint64_t address, std::string_view inst_bytes, Instruction &inst) const {
+  inst.pc = address;
+  inst.arch_name = arch_name;
+  inst.arch = this;
+  inst.category = Instruction::kCategoryInvalid;
+  inst.operands.clear();
+  inst.next_pc = address + inst_bytes.size();  // Default fall-through.
+  inst.branch_taken_pc = 0;
+  inst.branch_not_taken_pc = 0;
+  inst.has_branch_taken_delay_slot = false;
+  inst.has_branch_not_taken_delay_slot = false;
+
   if (address % 4) {
     return false;
   }
@@ -455,17 +466,6 @@ bool SPARC32Arch::DecodeInstruction(
     return false;
   }
 
-  inst.pc = address;
-  inst.next_pc = address + inst_bytes.size();  // Default fall-through.
-  inst.branch_taken_pc = 0;
-  inst.branch_not_taken_pc = 0;
-  inst.has_branch_taken_delay_slot = false;
-  inst.has_branch_not_taken_delay_slot = false;
-  inst.arch_name = arch_name;
-  inst.arch_for_decode = nullptr;
-  inst.category = Instruction::kCategoryInvalid;
-  inst.operands.clear();
-
   if (!inst.bytes.empty() && inst.bytes.data() == inst_bytes.data()) {
     inst.bytes.resize(inst_bytes.size());
   } else {

lib/Arch/SPARC64/Arch.cpp

@@ -407,24 +407,25 @@ bool SPARC64Arch::NextInstructionIsDelayed(const Instruction &inst,
 // Decode an instruction.
 bool SPARC64Arch::DecodeInstruction(
     uint64_t address, std::string_view inst_bytes, Instruction &inst) const {
-  if (address % 4) {
-    return false;
-  }
-
-  if (inst_bytes.size() != 4 && inst_bytes.size() != 8) {
-    return false;
-  }
 
   inst.pc = address;
+  inst.arch_name = arch_name;
+  inst.arch = this;
+  inst.category = Instruction::kCategoryInvalid;
+  inst.operands.clear();
   inst.next_pc = address + inst_bytes.size();  // Default fall-through.
   inst.branch_taken_pc = 0;
   inst.branch_not_taken_pc = 0;
   inst.has_branch_taken_delay_slot = false;
   inst.has_branch_not_taken_delay_slot = false;
-  inst.arch_name = arch_name;
-  inst.arch_for_decode = nullptr;
-  inst.category = Instruction::kCategoryInvalid;
-  inst.operands.clear();
+
+  if (address % 4) {
+    return false;
+  }
+
+  if (inst_bytes.size() != 4 && inst_bytes.size() != 8) {
+    return false;
+  }
 
   if (!inst.bytes.empty() && inst.bytes.data() == inst_bytes.data()) {
     inst.bytes.resize(inst_bytes.size());