P16F15325.c

// Individual bit access constants
const char B0 = 0;
const char B1 = 1;
const char B2 = 2;
const char B3 = 3;
const char B4 = 4;
const char B5 = 5;
const char B6 = 6;
const char B7 = 7;

const unsigned long __FLASH_SIZE = 0x00002000;

// Working space registers
rx unsigned short R0  absolute 0x0070;
rx unsigned short R1  absolute 0x0071;
rx unsigned short R2  absolute 0x0072;
rx unsigned short R3  absolute 0x0073;
rx unsigned short R4  absolute 0x0074;
rx unsigned short R5  absolute 0x0075;
rx unsigned short R6  absolute 0x0076;
rx unsigned short R7  absolute 0x0077;
rx unsigned short R8  absolute 0x0078;
rx unsigned short R9  absolute 0x0079;
rx unsigned short R10 absolute 0x007A;
rx unsigned short R11 absolute 0x007B;
rx unsigned short R12 absolute 0x007C;
rx unsigned short R13 absolute 0x007D;
rx unsigned short R14 absolute 0x007E;
rx unsigned short R15 absolute 0x007F;

const register unsigned short int W = 0;
const register unsigned short int F = 1;

// Special function registers (SFRs)

const signed int   PORT_TO_TRIS_OFFSET    =     6;

const unsigned short ICS_AUTO                  =     0;
const unsigned short ICS_OFF                   =     3;

sfr unsigned short volatile INDF0            absolute 0x000;
sfr unsigned short volatile INDF1            absolute 0x001;
sfr unsigned short volatile PCL              absolute 0x002;
sfr unsigned short volatile STATUS           absolute 0x003;
    const register unsigned short int CARRY = 0;
    const register unsigned short int C = 0;
    sbit  CARRY_bit at STATUS.B0;
    sbit  C_bit at STATUS.B0;
    const register unsigned short int DC = 1;
    sbit  DC_bit at STATUS.B1;
    const register unsigned short int ZERO = 2;
    const register unsigned short int Z = 2;
    sbit  ZERO_bit at STATUS.B2;
    sbit  Z_bit at STATUS.B2;
    const register unsigned short int nPD = 3;
    sbit  nPD_bit at STATUS.B3;
    const register unsigned short int nTO = 4;
    sbit  nTO_bit at STATUS.B4;

sfr unsigned int            FSR0             absolute 0x004;
sfr unsigned short          FSR0L            absolute 0x004;
register unsigned short     *FSR0PTR         absolute 0x004;
sfr unsigned short          FSR0H            absolute 0x005;
sfr unsigned int            FSR1             absolute 0x006;
sfr unsigned short          FSR1L            absolute 0x006;
register unsigned short     *FSR1PTR         absolute 0x006;
sfr unsigned short          FSR1H            absolute 0x007;
sfr unsigned short          BSR              absolute 0x008;
    const register unsigned short int BSR0 = 0;
    sbit  BSR0_bit at BSR.B0;
    const register unsigned short int BSR1 = 1;
    sbit  BSR1_bit at BSR.B1;
    const register unsigned short int BSR2 = 2;
    sbit  BSR2_bit at BSR.B2;
    const register unsigned short int BSR3 = 3;
    sbit  BSR3_bit at BSR.B3;
    const register unsigned short int BSR4 = 4;
    sbit  BSR4_bit at BSR.B4;
    const register unsigned short int BSR5 = 5;
    sbit  BSR5_bit at BSR.B5;

sfr unsigned short volatile WREG             absolute 0x009;
sfr unsigned short volatile PCLATH           absolute 0x00A;
sfr unsigned short volatile INTCON           absolute 0x00B;
    const register unsigned short int INTEDG = 0;
    sbit  INTEDG_bit at INTCON.B0;
    const register unsigned short int PEIE = 6;
    sbit  PEIE_bit at INTCON.B6;
    const register unsigned short int GIE = 7;
    sbit  GIE_bit at INTCON.B7;

sfr unsigned short volatile PORTA            absolute 0x00C;
    const register unsigned short int RA0 = 0;
    sbit  RA0_bit at PORTA.B0;
    const register unsigned short int RA1 = 1;
    sbit  RA1_bit at PORTA.B1;
    const register unsigned short int RA2 = 2;
    sbit  RA2_bit at PORTA.B2;
    const register unsigned short int RA3 = 3;
    sbit  RA3_bit at PORTA.B3;
    const register unsigned short int RA4 = 4;
    sbit  RA4_bit at PORTA.B4;
    const register unsigned short int RA5 = 5;
    sbit  RA5_bit at PORTA.B5;

sfr unsigned short volatile PORTC            absolute 0x00E;
    const register unsigned short int RC0 = 0;
    sbit  RC0_bit at PORTC.B0;
    const register unsigned short int RC1 = 1;
    sbit  RC1_bit at PORTC.B1;
    const register unsigned short int RC2 = 2;
    sbit  RC2_bit at PORTC.B2;
    const register unsigned short int RC3 = 3;
    sbit  RC3_bit at PORTC.B3;
    const register unsigned short int RC4 = 4;
    sbit  RC4_bit at PORTC.B4;
    const register unsigned short int RC5 = 5;
    sbit  RC5_bit at PORTC.B5;

sfr unsigned short volatile TRISA            absolute 0x012;
    const register unsigned short int TRISA0 = 0;
    sbit  TRISA0_bit at TRISA.B0;
    const register unsigned short int TRISA1 = 1;
    sbit  TRISA1_bit at TRISA.B1;
    const register unsigned short int TRISA2 = 2;
    sbit  TRISA2_bit at TRISA.B2;
    const register unsigned short int TRISA4 = 4;
    sbit  TRISA4_bit at TRISA.B4;
    const register unsigned short int TRISA5 = 5;
    sbit  TRISA5_bit at TRISA.B5;

sfr unsigned short volatile TRISC            absolute 0x014;
    const register unsigned short int TRISC0 = 0;
    sbit  TRISC0_bit at TRISC.B0;
    const register unsigned short int TRISC1 = 1;
    sbit  TRISC1_bit at TRISC.B1;
    const register unsigned short int TRISC2 = 2;
    sbit  TRISC2_bit at TRISC.B2;
    const register unsigned short int TRISC3 = 3;
    sbit  TRISC3_bit at TRISC.B3;
    const register unsigned short int TRISC4 = 4;
    sbit  TRISC4_bit at TRISC.B4;
    const register unsigned short int TRISC5 = 5;
    sbit  TRISC5_bit at TRISC.B5;

sfr unsigned short volatile LATA             absolute 0x018;
    const register unsigned short int LATA0 = 0;
    sbit  LATA0_bit at LATA.B0;
    const register unsigned short int LATA1 = 1;
    sbit  LATA1_bit at LATA.B1;
    const register unsigned short int LATA2 = 2;
    sbit  LATA2_bit at LATA.B2;
    const register unsigned short int LATA4 = 4;
    sbit  LATA4_bit at LATA.B4;
    const register unsigned short int LATA5 = 5;
    sbit  LATA5_bit at LATA.B5;

sfr unsigned short volatile LATC             absolute 0x01A;
    const register unsigned short int LATC0 = 0;
    sbit  LATC0_bit at LATC.B0;
    const register unsigned short int LATC1 = 1;
    sbit  LATC1_bit at LATC.B1;
    const register unsigned short int LATC2 = 2;
    sbit  LATC2_bit at LATC.B2;
    const register unsigned short int LATC3 = 3;
    sbit  LATC3_bit at LATC.B3;
    const register unsigned short int LATC4 = 4;
    sbit  LATC4_bit at LATC.B4;
    const register unsigned short int LATC5 = 5;
    sbit  LATC5_bit at LATC.B5;

sfr unsigned int   volatile ADRES            absolute 0x09B;
sfr unsigned short volatile ADRESL           absolute 0x09B;
    const register unsigned short int ADRESL0 = 0;
    sbit  ADRESL0_bit at ADRESL.B0;
    const register unsigned short int ADRESL1 = 1;
    sbit  ADRESL1_bit at ADRESL.B1;
    const register unsigned short int ADRESL2 = 2;
    sbit  ADRESL2_bit at ADRESL.B2;
    const register unsigned short int ADRESL3 = 3;
    sbit  ADRESL3_bit at ADRESL.B3;
    const register unsigned short int ADRESL4 = 4;
    sbit  ADRESL4_bit at ADRESL.B4;
    const register unsigned short int ADRESL5 = 5;
    sbit  ADRESL5_bit at ADRESL.B5;
    const register unsigned short int ADRESL6 = 6;
    sbit  ADRESL6_bit at ADRESL.B6;
    const register unsigned short int ADRESL7 = 7;
    sbit  ADRESL7_bit at ADRESL.B7;

sfr unsigned short volatile ADRESH           absolute 0x09C;
    const register unsigned short int ADRESH0 = 0;
    sbit  ADRESH0_bit at ADRESH.B0;
    const register unsigned short int ADRESH1 = 1;
    sbit  ADRESH1_bit at ADRESH.B1;
    const register unsigned short int ADRESH2 = 2;
    sbit  ADRESH2_bit at ADRESH.B2;
    const register unsigned short int ADRESH3 = 3;
    sbit  ADRESH3_bit at ADRESH.B3;
    const register unsigned short int ADRESH4 = 4;
    sbit  ADRESH4_bit at ADRESH.B4;
    const register unsigned short int ADRESH5 = 5;
    sbit  ADRESH5_bit at ADRESH.B5;
    const register unsigned short int ADRESH6 = 6;
    sbit  ADRESH6_bit at ADRESH.B6;
    const register unsigned short int ADRESH7 = 7;
    sbit  ADRESH7_bit at ADRESH.B7;

sfr unsigned short volatile ADCON0           absolute 0x09D;
    const register unsigned short int ADON = 0;
    sbit  ADON_bit at ADCON0.B0;
    const register unsigned short int GOnDONE = 1;
    sbit  GOnDONE_bit at ADCON0.B1;
    const register unsigned short int CHS0 = 2;
    sbit  CHS0_bit at ADCON0.B2;
    const register unsigned short int CHS1 = 3;
    sbit  CHS1_bit at ADCON0.B3;
    const register unsigned short int CHS2 = 4;
    sbit  CHS2_bit at ADCON0.B4;
    const register unsigned short int CHS3 = 5;
    sbit  CHS3_bit at ADCON0.B5;
    const register unsigned short int CHS4 = 6;
    sbit  CHS4_bit at ADCON0.B6;
    const register unsigned short int CHS5 = 7;
    sbit  CHS5_bit at ADCON0.B7;
    const register unsigned short int GO_NOT_DONE = 1;
    sbit  GO_NOT_DONE_bit at ADCON0.B1;

sfr unsigned short volatile ADCON1           absolute 0x09E;
    const register unsigned short int ADPREF0 = 0;
    sbit  ADPREF0_bit at ADCON1.B0;
    const register unsigned short int ADPREF1 = 1;
    sbit  ADPREF1_bit at ADCON1.B1;
    const register unsigned short int ADCS0 = 4;
    sbit  ADCS0_bit at ADCON1.B4;
    const register unsigned short int ADCS1 = 5;
    sbit  ADCS1_bit at ADCON1.B5;
    const register unsigned short int ADCS2 = 6;
    sbit  ADCS2_bit at ADCON1.B6;
    const register unsigned short int ADFM = 7;
    sbit  ADFM_bit at ADCON1.B7;

sfr unsigned short volatile ADACT            absolute 0x09F;
    const register unsigned short int ADACT0 = 0;
    sbit  ADACT0_bit at ADACT.B0;
    const register unsigned short int ADACT1 = 1;
    sbit  ADACT1_bit at ADACT.B1;
    const register unsigned short int ADACT2 = 2;
    sbit  ADACT2_bit at ADACT.B2;
    const register unsigned short int ADACT3 = 3;
    sbit  ADACT3_bit at ADACT.B3;
    const register unsigned short int ADACT4 = 4;
    sbit  ADACT4_bit at ADACT.B4;

sfr unsigned short volatile RC1REG           absolute 0x119;
sfr unsigned short volatile RCREG            absolute 0x119;
sfr unsigned short volatile TX1REG           absolute 0x11A;
sfr unsigned short volatile TXREG1           absolute 0x11A;
sfr unsigned int   volatile SP1BRG           absolute 0x11B;
sfr unsigned short volatile SP1BRGL          absolute 0x11B;
sfr unsigned int            SPBRG            absolute 0x11B;
sfr unsigned short volatile SP1BRGH          absolute 0x11C;
sfr unsigned short          SPBRGH           absolute 0x11C;
sfr unsigned short volatile RC1STA           absolute 0x11D;
    const register unsigned short int RX9D = 0;
    sbit  RX9D_bit at RC1STA.B0;
    const register unsigned short int OERR = 1;
    sbit  OERR_bit at RC1STA.B1;
    const register unsigned short int FERR = 2;
    sbit  FERR_bit at RC1STA.B2;
    const register unsigned short int ADDEN = 3;
    sbit  ADDEN_bit at RC1STA.B3;
    const register unsigned short int CREN = 4;
    sbit  CREN_bit at RC1STA.B4;
    const register unsigned short int SREN = 5;
    sbit  SREN_bit at RC1STA.B5;
    const register unsigned short int RX9 = 6;
    sbit  RX9_bit at RC1STA.B6;
    const register unsigned short int SPEN = 7;
    sbit  SPEN_bit at RC1STA.B7;

sfr unsigned short volatile RCSTA1           absolute 0x11D;
sfr unsigned short volatile TXSTA            absolute 0x11E;
sfr unsigned short volatile TX1STA           absolute 0x11E;
    const register unsigned short int TX9D = 0;
    sbit  TX9D_bit at TX1STA.B0;
    const register unsigned short int TRMT = 1;
    sbit  TRMT_bit at TX1STA.B1;
    const register unsigned short int BRGH = 2;
    sbit  BRGH_bit at TX1STA.B2;
    const register unsigned short int SENDB = 3;
    sbit  SENDB_bit at TX1STA.B3;
    const register unsigned short int TXEN = 5;
    sbit  TXEN_bit at TX1STA.B5;
    const register unsigned short int TX9 = 6;
    sbit  TX9_bit at TX1STA.B6;
    const register unsigned short int CSRC = 7;
    sbit  CSRC_bit at TX1STA.B7;

sfr unsigned short volatile TXSTA1           absolute 0x11E;
sfr unsigned short volatile BAUDCON          absolute 0x11F;
sfr unsigned short volatile BAUD1CON         absolute 0x11F;
sfr unsigned short          BAUDCON1         absolute 0x11F;
sfr unsigned short volatile SSP1BUF          absolute 0x18C;
sfr unsigned short volatile SSP1ADD          absolute 0x18D;
    const register unsigned short int MSK01 = 0;
    sbit  MSK01_bit at SSP1ADD.B0;
    const register unsigned short int MSK11 = 1;
    sbit  MSK11_bit at SSP1ADD.B1;
    const register unsigned short int MSK21 = 2;
    sbit  MSK21_bit at SSP1ADD.B2;
    const register unsigned short int MSK31 = 3;
    sbit  MSK31_bit at SSP1ADD.B3;
    const register unsigned short int MSK41 = 4;
    sbit  MSK41_bit at SSP1ADD.B4;
    const register unsigned short int MSK51 = 5;
    sbit  MSK51_bit at SSP1ADD.B5;
    const register unsigned short int MSK61 = 6;
    sbit  MSK61_bit at SSP1ADD.B6;
    const register unsigned short int MSK71 = 7;
    sbit  MSK71_bit at SSP1ADD.B7;

    const register unsigned short int ABDEN = 0;
    sbit  ABDEN_bit at BAUD1CON.B0;
    const register unsigned short int WUE = 1;
    sbit  WUE_bit at BAUD1CON.B1;
    const register unsigned short int BRG16 = 3;
    sbit  BRG16_bit at BAUD1CON.B3;
    const register unsigned short int SCKP = 4;
    sbit  SCKP_bit at BAUD1CON.B4;
    const register unsigned short int RCIDL = 6;
    sbit  RCIDL_bit at BAUD1CON.B6;
    const register unsigned short int ABDOVF = 7;
    sbit  ABDOVF_bit at BAUD1CON.B7;

sfr unsigned short volatile SSP1MSK          absolute 0x18E;
sfr unsigned short volatile SSP1STAT         absolute 0x18F;
    const register unsigned short int BF = 0;
    sbit  BF_bit at SSP1STAT.B0;
    const register unsigned short int UA = 1;
    sbit  UA_bit at SSP1STAT.B1;
    const register unsigned short int I2C_READ1 = 2;
    sbit  I2C_READ1_bit at SSP1STAT.B2;
    const register unsigned short int I2C_START1 = 3;
    sbit  I2C_START1_bit at SSP1STAT.B3;
    const register unsigned short int I2C_STOP2 = 4;
    sbit  I2C_STOP2_bit at SSP1STAT.B4;
    const register unsigned short int DA = 5;
    sbit  DA_bit at SSP1STAT.B5;
    const register unsigned short int CKE = 6;
    sbit  CKE_bit at SSP1STAT.B6;
    const register unsigned short int SMP = 7;
    sbit  SMP_bit at SSP1STAT.B7;
    const register unsigned short int BF1 = 0;
    sbit  BF1_bit at SSP1STAT.B0;
    const register unsigned short int CKE1 = 6;
    sbit  CKE1_bit at SSP1STAT.B6;
    const register unsigned short int DA1 = 5;
    sbit  DA1_bit at SSP1STAT.B5;
    const register unsigned short int DATA_ADDRESS = 5;
    sbit  DATA_ADDRESS_bit at SSP1STAT.B5;
    const register unsigned short int DATA_ADDRESS1 = 5;
    sbit  DATA_ADDRESS1_bit at SSP1STAT.B5;
    const register unsigned short int D_A = 5;
    sbit  D_A_bit at SSP1STAT.B5;
    const register unsigned short int D_A1 = 5;
    sbit  D_A1_bit at SSP1STAT.B5;
    const register unsigned short int D_nA = 5;
    sbit  D_nA_bit at SSP1STAT.B5;
    const register unsigned short int D_nA1 = 5;
    sbit  D_nA1_bit at SSP1STAT.B5;
    const register unsigned short int I2C_DAT = 5;
    sbit  I2C_DAT_bit at SSP1STAT.B5;
    const register unsigned short int I2C_DAT1 = 5;
    sbit  I2C_DAT1_bit at SSP1STAT.B5;
    const register unsigned short int P2 = 4;
    sbit  P2_bit at SSP1STAT.B4;
    const register unsigned short int READ_WRITE = 2;
    sbit  READ_WRITE_bit at SSP1STAT.B2;
    const register unsigned short int READ_WRITE1 = 2;
    sbit  READ_WRITE1_bit at SSP1STAT.B2;
    const register unsigned short int RW = 2;
    sbit  RW_bit at SSP1STAT.B2;
    const register unsigned short int RW1 = 2;
    sbit  RW1_bit at SSP1STAT.B2;
    const register unsigned short int R_W = 2;
    sbit  R_W_bit at SSP1STAT.B2;
    const register unsigned short int R_W1 = 2;
    sbit  R_W1_bit at SSP1STAT.B2;
    const register unsigned short int R_nW = 2;
    sbit  R_nW_bit at SSP1STAT.B2;
    const register unsigned short int R_nW1 = 2;
    sbit  R_nW1_bit at SSP1STAT.B2;
    const register unsigned short int S2 = 3;
    sbit  S2_bit at SSP1STAT.B3;
    const register unsigned short int SMP1 = 7;
    sbit  SMP1_bit at SSP1STAT.B7;
    const register unsigned short int START = 3;
    sbit  START_bit at SSP1STAT.B3;
    const register unsigned short int START1 = 3;
    sbit  START1_bit at SSP1STAT.B3;
    const register unsigned short int STOP_ = 4;
    sbit  STOP_bit at SSP1STAT.B4;
    const register unsigned short int STOP1 = 4;
    sbit  STOP1_bit at SSP1STAT.B4;
    const register unsigned short int UA1 = 1;
    sbit  UA1_bit at SSP1STAT.B1;
    const register unsigned short int nA = 5;
    sbit  nA_bit at SSP1STAT.B5;
    const register unsigned short int nA2 = 5;
    sbit  nA2_bit at SSP1STAT.B5;
    const register unsigned short int nADDRESS = 5;
    sbit  nADDRESS_bit at SSP1STAT.B5;
    const register unsigned short int nADDRESS1 = 5;
    sbit  nADDRESS1_bit at SSP1STAT.B5;
    const register unsigned short int nW = 2;
    sbit  nW_bit at SSP1STAT.B2;
    const register unsigned short int nW2 = 2;
    sbit  nW2_bit at SSP1STAT.B2;
    const register unsigned short int nWRITE = 2;
    sbit  nWRITE_bit at SSP1STAT.B2;
    const register unsigned short int nWRITE1 = 2;
    sbit  nWRITE1_bit at SSP1STAT.B2;

sfr unsigned short volatile SSP1CON1         absolute 0x190;
    const register unsigned short int SSPM0 = 0;
    sbit  SSPM0_bit at SSP1CON1.B0;
    const register unsigned short int SSPM1 = 1;
    sbit  SSPM1_bit at SSP1CON1.B1;
    const register unsigned short int SSPM2 = 2;
    sbit  SSPM2_bit at SSP1CON1.B2;
    const register unsigned short int SSPM3 = 3;
    sbit  SSPM3_bit at SSP1CON1.B3;
    const register unsigned short int CKP = 4;
    sbit  CKP_bit at SSP1CON1.B4;
    const register unsigned short int SSPEN = 5;
    sbit  SSPEN_bit at SSP1CON1.B5;
    const register unsigned short int SSPOV = 6;
    sbit  SSPOV_bit at SSP1CON1.B6;
    const register unsigned short int WCOL = 7;
    sbit  WCOL_bit at SSP1CON1.B7;
    const register unsigned short int CKP1 = 4;
    sbit  CKP1_bit at SSP1CON1.B4;
    const register unsigned short int SSPEN1 = 5;
    sbit  SSPEN1_bit at SSP1CON1.B5;
    const register unsigned short int SSPM01 = 0;
    sbit  SSPM01_bit at SSP1CON1.B0;
    const register unsigned short int SSPM11 = 1;
    sbit  SSPM11_bit at SSP1CON1.B1;
    const register unsigned short int SSPM21 = 2;
    sbit  SSPM21_bit at SSP1CON1.B2;
    const register unsigned short int SSPM31 = 3;
    sbit  SSPM31_bit at SSP1CON1.B3;
    const register unsigned short int SSPOV1 = 6;
    sbit  SSPOV1_bit at SSP1CON1.B6;
    const register unsigned short int WCOL1 = 7;
    sbit  WCOL1_bit at SSP1CON1.B7;

sfr unsigned short volatile SSP1CON2         absolute 0x191;
    const register unsigned short int SEN1 = 0;
    sbit  SEN1_bit at SSP1CON2.B0;
    const register unsigned short int ADMSK1 = 1;
    sbit  ADMSK1_bit at SSP1CON2.B1;
    const register unsigned short int ADMSK2 = 2;
    sbit  ADMSK2_bit at SSP1CON2.B2;
    const register unsigned short int ADMSK3 = 3;
    sbit  ADMSK3_bit at SSP1CON2.B3;
    const register unsigned short int ACKEN = 4;
    sbit  ACKEN_bit at SSP1CON2.B4;
    const register unsigned short int ACKDT = 5;
    sbit  ACKDT_bit at SSP1CON2.B5;
    const register unsigned short int ACKSTAT = 6;
    sbit  ACKSTAT_bit at SSP1CON2.B6;
    const register unsigned short int GCEN = 7;
    sbit  GCEN_bit at SSP1CON2.B7;
    const register unsigned short int ACKDT1 = 5;
    sbit  ACKDT1_bit at SSP1CON2.B5;
    const register unsigned short int ACKEN1 = 4;
    sbit  ACKEN1_bit at SSP1CON2.B4;
    const register unsigned short int ACKSTAT1 = 6;
    sbit  ACKSTAT1_bit at SSP1CON2.B6;
    const register unsigned short int ADMSK11 = 1;
    sbit  ADMSK11_bit at SSP1CON2.B1;
    const register unsigned short int ADMSK21 = 2;
    sbit  ADMSK21_bit at SSP1CON2.B2;
    const register unsigned short int ADMSK31 = 3;
    sbit  ADMSK31_bit at SSP1CON2.B3;
    const register unsigned short int ADMSK4 = 4;
    sbit  ADMSK4_bit at SSP1CON2.B4;
    const register unsigned short int ADMSK41 = 4;
    sbit  ADMSK41_bit at SSP1CON2.B4;
    const register unsigned short int ADMSK5 = 5;
    sbit  ADMSK5_bit at SSP1CON2.B5;
    const register unsigned short int ADMSK51 = 5;
    sbit  ADMSK51_bit at SSP1CON2.B5;
    const register unsigned short int GCEN1 = 7;
    sbit  GCEN1_bit at SSP1CON2.B7;
    const register unsigned short int PEN = 2;
    sbit  PEN_bit at SSP1CON2.B2;
    const register unsigned short int PEN1 = 2;
    sbit  PEN1_bit at SSP1CON2.B2;
    const register unsigned short int RCEN = 3;
    sbit  RCEN_bit at SSP1CON2.B3;
    const register unsigned short int RCEN1 = 3;
    sbit  RCEN1_bit at SSP1CON2.B3;
    const register unsigned short int RSEN = 1;
    sbit  RSEN_bit at SSP1CON2.B1;
    const register unsigned short int RSEN1 = 1;
    sbit  RSEN1_bit at SSP1CON2.B1;

sfr unsigned short volatile SSP1CON3         absolute 0x192;
    const register unsigned short int DHEN = 0;
    sbit  DHEN_bit at SSP1CON3.B0;
    const register unsigned short int AHEN = 1;
    sbit  AHEN_bit at SSP1CON3.B1;
    const register unsigned short int SBCDE = 2;
    sbit  SBCDE_bit at SSP1CON3.B2;
    const register unsigned short int SDAHT = 3;
    sbit  SDAHT_bit at SSP1CON3.B3;
    const register unsigned short int BOEN = 4;
    sbit  BOEN_bit at SSP1CON3.B4;
    const register unsigned short int SCIE = 5;
    sbit  SCIE_bit at SSP1CON3.B5;
    const register unsigned short int PCIE = 6;
    sbit  PCIE_bit at SSP1CON3.B6;
    const register unsigned short int ACKTIM = 7;
    sbit  ACKTIM_bit at SSP1CON3.B7;

sfr unsigned int   volatile TMR1             absolute 0x20C;
sfr unsigned short volatile TMR1L            absolute 0x20C;
    const register unsigned short int CAL01 = 0;
    sbit  CAL01_bit at TMR1L.B0;
    const register unsigned short int CAL11 = 1;
    sbit  CAL11_bit at TMR1L.B1;
    const register unsigned short int CAL21 = 2;
    sbit  CAL21_bit at TMR1L.B2;
    const register unsigned short int CAL31 = 3;
    sbit  CAL31_bit at TMR1L.B3;
    const register unsigned short int CAL41 = 4;
    sbit  CAL41_bit at TMR1L.B4;
    const register unsigned short int CAL51 = 5;
    sbit  CAL51_bit at TMR1L.B5;
    const register unsigned short int CAL61 = 6;
    sbit  CAL61_bit at TMR1L.B6;
    const register unsigned short int CAL71 = 7;
    sbit  CAL71_bit at TMR1L.B7;
    const register unsigned short int TMR10 = 0;
    sbit  TMR10_bit at TMR1L.B0;
    const register unsigned short int TMR11 = 1;
    sbit  TMR11_bit at TMR1L.B1;
    const register unsigned short int TMR12 = 2;
    sbit  TMR12_bit at TMR1L.B2;
    const register unsigned short int TMR13 = 3;
    sbit  TMR13_bit at TMR1L.B3;
    const register unsigned short int TMR14 = 4;
    sbit  TMR14_bit at TMR1L.B4;
    const register unsigned short int TMR15 = 5;
    sbit  TMR15_bit at TMR1L.B5;
    const register unsigned short int TMR16 = 6;
    sbit  TMR16_bit at TMR1L.B6;
    const register unsigned short int TMR17 = 7;
    sbit  TMR17_bit at TMR1L.B7;
    const register unsigned short int TMR1L0 = 0;
    sbit  TMR1L0_bit at TMR1L.B0;
    const register unsigned short int TMR1L1 = 1;
    sbit  TMR1L1_bit at TMR1L.B1;
    const register unsigned short int TMR1L2 = 2;
    sbit  TMR1L2_bit at TMR1L.B2;
    const register unsigned short int TMR1L3 = 3;
    sbit  TMR1L3_bit at TMR1L.B3;
    const register unsigned short int TMR1L4 = 4;
    sbit  TMR1L4_bit at TMR1L.B4;
    const register unsigned short int TMR1L5 = 5;
    sbit  TMR1L5_bit at TMR1L.B5;
    const register unsigned short int TMR1L6 = 6;
    sbit  TMR1L6_bit at TMR1L.B6;
    const register unsigned short int TMR1L7 = 7;
    sbit  TMR1L7_bit at TMR1L.B7;

sfr unsigned short volatile TMR1H            absolute 0x20D;
    const register unsigned short int TMR18 = 0;
    sbit  TMR18_bit at TMR1H.B0;
    const register unsigned short int TMR19 = 1;
    sbit  TMR19_bit at TMR1H.B1;
    const register unsigned short int TMR110 = 2;
    sbit  TMR110_bit at TMR1H.B2;
    const register unsigned short int TMR111 = 3;
    sbit  TMR111_bit at TMR1H.B3;
    const register unsigned short int TMR112 = 4;
    sbit  TMR112_bit at TMR1H.B4;
    const register unsigned short int TMR113 = 5;
    sbit  TMR113_bit at TMR1H.B5;
    const register unsigned short int TMR114 = 6;
    sbit  TMR114_bit at TMR1H.B6;
    const register unsigned short int TMR115 = 7;
    sbit  TMR115_bit at TMR1H.B7;
    const register unsigned short int TMR1H0 = 0;
    sbit  TMR1H0_bit at TMR1H.B0;
    const register unsigned short int TMR1H1 = 1;
    sbit  TMR1H1_bit at TMR1H.B1;
    const register unsigned short int TMR1H2 = 2;
    sbit  TMR1H2_bit at TMR1H.B2;
    const register unsigned short int TMR1H3 = 3;
    sbit  TMR1H3_bit at TMR1H.B3;
    const register unsigned short int TMR1H4 = 4;
    sbit  TMR1H4_bit at TMR1H.B4;
    const register unsigned short int TMR1H5 = 5;
    sbit  TMR1H5_bit at TMR1H.B5;
    const register unsigned short int TMR1H6 = 6;
    sbit  TMR1H6_bit at TMR1H.B6;
    const register unsigned short int TMR1H7 = 7;
    sbit  TMR1H7_bit at TMR1H.B7;

sfr unsigned short volatile T1CON            absolute 0x20E;
    const register unsigned short int TMR1ON = 0;
    sbit  TMR1ON_bit at T1CON.B0;
    const register unsigned short int RD16 = 1;
    sbit  RD16_bit at T1CON.B1;
    const register unsigned short int nSYNC = 2;
    sbit  nSYNC_bit at T1CON.B2;
    const register unsigned short int T1CKPS0 = 4;
    sbit  T1CKPS0_bit at T1CON.B4;
    const register unsigned short int T1CKPS1 = 5;
    sbit  T1CKPS1_bit at T1CON.B5;
    const register unsigned short int RD161 = 1;
    sbit  RD161_bit at T1CON.B1;
    const register unsigned short int T1RD16 = 1;
    sbit  T1RD16_bit at T1CON.B1;
    const register unsigned short int nT1SYNC = 2;
    sbit  nT1SYNC_bit at T1CON.B2;

sfr unsigned short volatile T1GCON           absolute 0x20F;
    const register unsigned short int GVAL = 2;
    sbit  GVAL_bit at T1GCON.B2;
    const register unsigned short int GGO_nDONE = 3;
    sbit  GGO_nDONE_bit at T1GCON.B3;
    const register unsigned short int GSPM = 4;
    sbit  GSPM_bit at T1GCON.B4;
    const register unsigned short int GTM = 5;
    sbit  GTM_bit at T1GCON.B5;
    const register unsigned short int GPOL = 6;
    sbit  GPOL_bit at T1GCON.B6;
    const register unsigned short int GE = 7;
    sbit  GE_bit at T1GCON.B7;
    const register unsigned short int T1GE = 7;
    sbit  T1GE_bit at T1GCON.B7;
    const register unsigned short int T1GGO = 3;
    sbit  T1GGO_bit at T1GCON.B3;
    const register unsigned short int T1GGO_nDONE = 3;
    sbit  T1GGO_nDONE_bit at T1GCON.B3;
    const register unsigned short int T1GPOL = 6;
    sbit  T1GPOL_bit at T1GCON.B6;
    const register unsigned short int T1GSPM = 4;
    sbit  T1GSPM_bit at T1GCON.B4;
    const register unsigned short int T1GTM = 5;
    sbit  T1GTM_bit at T1GCON.B5;
    const register unsigned short int T1GVAL = 2;
    sbit  T1GVAL_bit at T1GCON.B2;

sfr unsigned short volatile PR1              absolute 0x20F;
sfr unsigned short volatile T1GATE           absolute 0x210;
    const register unsigned short int GSS0 = 0;
    sbit  GSS0_bit at T1GATE.B0;
    const register unsigned short int GSS1 = 1;
    sbit  GSS1_bit at T1GATE.B1;
    const register unsigned short int GSS2 = 2;
    sbit  GSS2_bit at T1GATE.B2;
    const register unsigned short int GSS3 = 3;
    sbit  GSS3_bit at T1GATE.B3;
    const register unsigned short int GSS4 = 4;
    sbit  GSS4_bit at T1GATE.B4;
    const register unsigned short int T1GSS0 = 0;
    sbit  T1GSS0_bit at T1GATE.B0;
    const register unsigned short int T1GSS1 = 1;
    sbit  T1GSS1_bit at T1GATE.B1;
    const register unsigned short int T1GSS2 = 2;
    sbit  T1GSS2_bit at T1GATE.B2;
    const register unsigned short int T1GSS3 = 3;
    sbit  T1GSS3_bit at T1GATE.B3;
    const register unsigned short int T1GSS4 = 4;
    sbit  T1GSS4_bit at T1GATE.B4;

sfr unsigned short volatile TMR1GATE         absolute 0x210;
sfr unsigned short volatile T1CLK            absolute 0x211;
    const register unsigned short int T1CS0 = 0;
    sbit  T1CS0_bit at T1CLK.B0;
    const register unsigned short int T1CS1 = 1;
    sbit  T1CS1_bit at T1CLK.B1;
    const register unsigned short int T1CS2 = 2;
    sbit  T1CS2_bit at T1CLK.B2;
    const register unsigned short int T1CS3 = 3;
    sbit  T1CS3_bit at T1CLK.B3;

sfr unsigned short volatile TMR1CLK          absolute 0x211;
sfr unsigned short volatile T2TMR            absolute 0x28C;
sfr unsigned short volatile TMR2             absolute 0x28C;
sfr unsigned short volatile T2PR             absolute 0x28D;
sfr unsigned short volatile PR2              absolute 0x28D;
sfr unsigned short volatile T2CON            absolute 0x28E;
    const register unsigned short int OUTPS0 = 0;
    sbit  OUTPS0_bit at T2CON.B0;
    const register unsigned short int OUTPS1 = 1;
    sbit  OUTPS1_bit at T2CON.B1;
    const register unsigned short int OUTPS2 = 2;
    sbit  OUTPS2_bit at T2CON.B2;
    const register unsigned short int OUTPS3 = 3;
    sbit  OUTPS3_bit at T2CON.B3;
    const register unsigned short int T2CKPS0 = 4;
    sbit  T2CKPS0_bit at T2CON.B4;
    const register unsigned short int T2CKPS1 = 5;
    sbit  T2CKPS1_bit at T2CON.B5;
    const register unsigned short int CKPS2 = 6;
    sbit  CKPS2_bit at T2CON.B6;
    const register unsigned short int T2ON = 7;
    sbit  T2ON_bit at T2CON.B7;
    const register unsigned short int T2CKPS2 = 6;
    sbit  T2CKPS2_bit at T2CON.B6;
    const register unsigned short int T2OUTPS0 = 0;
    sbit  T2OUTPS0_bit at T2CON.B0;
    const register unsigned short int T2OUTPS1 = 1;
    sbit  T2OUTPS1_bit at T2CON.B1;
    const register unsigned short int T2OUTPS2 = 2;
    sbit  T2OUTPS2_bit at T2CON.B2;
    const register unsigned short int T2OUTPS3 = 3;
    sbit  T2OUTPS3_bit at T2CON.B3;
    const register unsigned short int TMR2ON = 7;
    sbit  TMR2ON_bit at T2CON.B7;

sfr unsigned short volatile T2HLT            absolute 0x28F;
    const register unsigned short int T2MODE0 = 0;
    sbit  T2MODE0_bit at T2HLT.B0;
    const register unsigned short int T2MODE1 = 1;
    sbit  T2MODE1_bit at T2HLT.B1;
    const register unsigned short int T2MODE2 = 2;
    sbit  T2MODE2_bit at T2HLT.B2;
    const register unsigned short int T2MODE3 = 3;
    sbit  T2MODE3_bit at T2HLT.B3;
    const register unsigned short int MODE4 = 4;
    sbit  MODE4_bit at T2HLT.B4;
    const register unsigned short int CKSYNC = 5;
    sbit  CKSYNC_bit at T2HLT.B5;
    const register unsigned short int CKPOL = 6;
    sbit  CKPOL_bit at T2HLT.B6;
    const register unsigned short int PSYNC = 7;
    sbit  PSYNC_bit at T2HLT.B7;
    const register unsigned short int T2CKPOL = 6;
    sbit  T2CKPOL_bit at T2HLT.B6;
    const register unsigned short int T2CKSYNC = 5;
    sbit  T2CKSYNC_bit at T2HLT.B5;
    const register unsigned short int T2MODE4 = 4;
    sbit  T2MODE4_bit at T2HLT.B4;
    const register unsigned short int T2PSYNC = 7;
    sbit  T2PSYNC_bit at T2HLT.B7;

sfr unsigned short volatile T2CLKCON         absolute 0x290;
    const register unsigned short int T2CS0 = 0;
    sbit  T2CS0_bit at T2CLKCON.B0;
    const register unsigned short int T2CS1 = 1;
    sbit  T2CS1_bit at T2CLKCON.B1;
    const register unsigned short int T2CS2 = 2;
    sbit  T2CS2_bit at T2CLKCON.B2;
    const register unsigned short int T2CS3 = 3;
    sbit  T2CS3_bit at T2CLKCON.B3;

sfr unsigned short volatile T2RST            absolute 0x291;
    const register unsigned short int RSEL0 = 0;
    sbit  RSEL0_bit at T2RST.B0;
    const register unsigned short int RSEL1 = 1;
    sbit  RSEL1_bit at T2RST.B1;
    const register unsigned short int RSEL2 = 2;
    sbit  RSEL2_bit at T2RST.B2;
    const register unsigned short int RSEL3 = 3;
    sbit  RSEL3_bit at T2RST.B3;
    const register unsigned short int T2RSEL0 = 0;
    sbit  T2RSEL0_bit at T2RST.B0;
    const register unsigned short int T2RSEL1 = 1;
    sbit  T2RSEL1_bit at T2RST.B1;
    const register unsigned short int T2RSEL2 = 2;
    sbit  T2RSEL2_bit at T2RST.B2;
    const register unsigned short int T2RSEL3 = 3;
    sbit  T2RSEL3_bit at T2RST.B3;

sfr unsigned int   volatile CCPR1            absolute 0x30C;
sfr unsigned short volatile CCPR1L           absolute 0x30C;
sfr unsigned short volatile CCPR1H           absolute 0x30D;
sfr unsigned short volatile CCP1CON          absolute 0x30E;
    const register unsigned short int CCP1MODE0 = 0;
    sbit  CCP1MODE0_bit at CCP1CON.B0;
    const register unsigned short int CCP1MODE1 = 1;
    sbit  CCP1MODE1_bit at CCP1CON.B1;
    const register unsigned short int CCP1MODE2 = 2;
    sbit  CCP1MODE2_bit at CCP1CON.B2;
    const register unsigned short int CCP1MODE3 = 3;
    sbit  CCP1MODE3_bit at CCP1CON.B3;
    const register unsigned short int CCP1FMT = 4;
    sbit  CCP1FMT_bit at CCP1CON.B4;
    const register unsigned short int CCP1OUT = 5;
    sbit  CCP1OUT_bit at CCP1CON.B5;
    const register unsigned short int CCP1EN = 7;
    sbit  CCP1EN_bit at CCP1CON.B7;
    const register unsigned short int P1M1 = 7;
    sbit  P1M1_bit at CCP1CON.B7;

sfr unsigned short volatile CCP1CAP          absolute 0x30F;
    const register unsigned short int CCP1CTS0 = 0;
    sbit  CCP1CTS0_bit at CCP1CAP.B0;
    const register unsigned short int CCP1CTS1 = 1;
    sbit  CCP1CTS1_bit at CCP1CAP.B1;
    const register unsigned short int CCP1CTS2 = 2;
    sbit  CCP1CTS2_bit at CCP1CAP.B2;

sfr unsigned int   volatile CCPR2            absolute 0x310;
sfr unsigned short volatile CCPR2L           absolute 0x310;
sfr unsigned short volatile CCPR2H           absolute 0x311;
sfr unsigned short volatile CCP2CON          absolute 0x312;
    const register unsigned short int CCP2MODE0 = 0;
    sbit  CCP2MODE0_bit at CCP2CON.B0;
    const register unsigned short int CCP2MODE1 = 1;
    sbit  CCP2MODE1_bit at CCP2CON.B1;
    const register unsigned short int CCP2MODE2 = 2;
    sbit  CCP2MODE2_bit at CCP2CON.B2;
    const register unsigned short int CCP2MODE3 = 3;
    sbit  CCP2MODE3_bit at CCP2CON.B3;
    const register unsigned short int CCP2FMT = 4;
    sbit  CCP2FMT_bit at CCP2CON.B4;
    const register unsigned short int CCP2OUT = 5;
    sbit  CCP2OUT_bit at CCP2CON.B5;
    const register unsigned short int CCP2EN = 7;
    sbit  CCP2EN_bit at CCP2CON.B7;
    const register unsigned short int P2M1 = 7;
    sbit  P2M1_bit at CCP2CON.B7;

sfr unsigned short volatile CCP2CAP          absolute 0x313;
    const register unsigned short int CCP2CTS0 = 0;
    sbit  CCP2CTS0_bit at CCP2CAP.B0;
    const register unsigned short int CCP2CTS1 = 1;
    sbit  CCP2CTS1_bit at CCP2CAP.B1;
    const register unsigned short int CCP2CTS2 = 2;
    sbit  CCP2CTS2_bit at CCP2CAP.B2;

sfr unsigned short volatile PWM3DCL          absolute 0x314;
    const register unsigned short int PWM3DC0 = 6;
    sbit  PWM3DC0_bit at PWM3DCL.B6;
    const register unsigned short int PWM3DC1 = 7;
    sbit  PWM3DC1_bit at PWM3DCL.B7;

sfr unsigned short volatile PWM3DCH          absolute 0x315;
    const register unsigned short int PWM3DC2 = 0;
    sbit  PWM3DC2_bit at PWM3DCH.B0;
    const register unsigned short int PWM3DC3 = 1;
    sbit  PWM3DC3_bit at PWM3DCH.B1;
    const register unsigned short int PWM3DC4 = 2;
    sbit  PWM3DC4_bit at PWM3DCH.B2;
    const register unsigned short int PWM3DC5 = 3;
    sbit  PWM3DC5_bit at PWM3DCH.B3;
    const register unsigned short int PWM3DC6 = 4;
    sbit  PWM3DC6_bit at PWM3DCH.B4;
    const register unsigned short int PWM3DC7 = 5;
    sbit  PWM3DC7_bit at PWM3DCH.B5;
    const register unsigned short int PWM3DC8 = 6;
    sbit  PWM3DC8_bit at PWM3DCH.B6;
    const register unsigned short int PWM3DC9 = 7;
    sbit  PWM3DC9_bit at PWM3DCH.B7;

sfr unsigned short          PWM3CON          absolute 0x316;
    const register unsigned short int PWM3POL = 4;
    sbit  PWM3POL_bit at PWM3CON.B4;
    const register unsigned short int PWM3OUT = 5;
    sbit  PWM3OUT_bit at PWM3CON.B5;
    const register unsigned short int PWM3EN = 7;
    sbit  PWM3EN_bit at PWM3CON.B7;

sfr unsigned short volatile PWM4DCL          absolute 0x318;
    const register unsigned short int PWM4DC0 = 6;
    sbit  PWM4DC0_bit at PWM4DCL.B6;
    const register unsigned short int PWM4DC1 = 7;
    sbit  PWM4DC1_bit at PWM4DCL.B7;

sfr unsigned short volatile PWM4DCH          absolute 0x319;
    const register unsigned short int PWM4DC2 = 0;
    sbit  PWM4DC2_bit at PWM4DCH.B0;
    const register unsigned short int PWM4DC3 = 1;
    sbit  PWM4DC3_bit at PWM4DCH.B1;
    const register unsigned short int PWM4DC4 = 2;
    sbit  PWM4DC4_bit at PWM4DCH.B2;
    const register unsigned short int PWM4DC5 = 3;
    sbit  PWM4DC5_bit at PWM4DCH.B3;
    const register unsigned short int PWM4DC6 = 4;
    sbit  PWM4DC6_bit at PWM4DCH.B4;
    const register unsigned short int PWM4DC7 = 5;
    sbit  PWM4DC7_bit at PWM4DCH.B5;
    const register unsigned short int PWM4DC8 = 6;
    sbit  PWM4DC8_bit at PWM4DCH.B6;
    const register unsigned short int PWM4DC9 = 7;
    sbit  PWM4DC9_bit at PWM4DCH.B7;

sfr unsigned short volatile PWM4CON          absolute 0x31A;
    const register unsigned short int PWM4POL = 4;
    sbit  PWM4POL_bit at PWM4CON.B4;
    const register unsigned short int PWM4OUT = 5;
    sbit  PWM4OUT_bit at PWM4CON.B5;
    const register unsigned short int PWM4EN = 7;
    sbit  PWM4EN_bit at PWM4CON.B7;

sfr unsigned short volatile PWM5DCL          absolute 0x31C;
    const register unsigned short int PWM5DC0 = 6;
    sbit  PWM5DC0_bit at PWM5DCL.B6;
    const register unsigned short int PWM5DC1 = 7;
    sbit  PWM5DC1_bit at PWM5DCL.B7;

sfr unsigned short volatile PWM5DCH          absolute 0x31D;
    const register unsigned short int PWM5DC2 = 0;
    sbit  PWM5DC2_bit at PWM5DCH.B0;
    const register unsigned short int PWM5DC3 = 1;
    sbit  PWM5DC3_bit at PWM5DCH.B1;
    const register unsigned short int PWM5DC4 = 2;
    sbit  PWM5DC4_bit at PWM5DCH.B2;
    const register unsigned short int PWM5DC5 = 3;
    sbit  PWM5DC5_bit at PWM5DCH.B3;
    const register unsigned short int PWM5DC6 = 4;
    sbit  PWM5DC6_bit at PWM5DCH.B4;
    const register unsigned short int PWM5DC7 = 5;
    sbit  PWM5DC7_bit at PWM5DCH.B5;
    const register unsigned short int PWM5DC8 = 6;
    sbit  PWM5DC8_bit at PWM5DCH.B6;
    const register unsigned short int PWM5DC9 = 7;
    sbit  PWM5DC9_bit at PWM5DCH.B7;

sfr unsigned short volatile PWM5CON          absolute 0x31E;
    const register unsigned short int PWM5POL = 4;
    sbit  PWM5POL_bit at PWM5CON.B4;
    const register unsigned short int PWM5OUT = 5;
    sbit  PWM5OUT_bit at PWM5CON.B5;
    const register unsigned short int PWM5EN = 7;
    sbit  PWM5EN_bit at PWM5CON.B7;

sfr unsigned short volatile PWM6DCL          absolute 0x38C;
    const register unsigned short int PWM6DC0 = 6;
    sbit  PWM6DC0_bit at PWM6DCL.B6;
    const register unsigned short int PWM6DC1 = 7;
    sbit  PWM6DC1_bit at PWM6DCL.B7;

sfr unsigned short volatile PWM6DCH          absolute 0x38D;
    const register unsigned short int PWM6DC2 = 0;
    sbit  PWM6DC2_bit at PWM6DCH.B0;
    const register unsigned short int PWM6DC3 = 1;
    sbit  PWM6DC3_bit at PWM6DCH.B1;
    const register unsigned short int PWM6DC4 = 2;
    sbit  PWM6DC4_bit at PWM6DCH.B2;
    const register unsigned short int PWM6DC5 = 3;
    sbit  PWM6DC5_bit at PWM6DCH.B3;
    const register unsigned short int PWM6DC6 = 4;
    sbit  PWM6DC6_bit at PWM6DCH.B4;
    const register unsigned short int PWM6DC7 = 5;
    sbit  PWM6DC7_bit at PWM6DCH.B5;
    const register unsigned short int PWM6DC8 = 6;
    sbit  PWM6DC8_bit at PWM6DCH.B6;
    const register unsigned short int PWM6DC9 = 7;
    sbit  PWM6DC9_bit at PWM6DCH.B7;

sfr unsigned short volatile PWM6CON          absolute 0x38E;
    const register unsigned short int PWM6POL = 4;
    sbit  PWM6POL_bit at PWM6CON.B4;
    const register unsigned short int PWM6OUT = 5;
    sbit  PWM6OUT_bit at PWM6CON.B5;
    const register unsigned short int PWM6EN = 7;
    sbit  PWM6EN_bit at PWM6CON.B7;

sfr unsigned short volatile NCO1ACCL         absolute 0x58C;
    const register unsigned short int NCO1ACC0 = 0;
    sbit  NCO1ACC0_bit at NCO1ACCL.B0;
    const register unsigned short int NCO1ACC1 = 1;
    sbit  NCO1ACC1_bit at NCO1ACCL.B1;
    const register unsigned short int NCO1ACC2 = 2;
    sbit  NCO1ACC2_bit at NCO1ACCL.B2;
    const register unsigned short int NCO1ACC3 = 3;
    sbit  NCO1ACC3_bit at NCO1ACCL.B3;
    const register unsigned short int NCO1ACC4 = 4;
    sbit  NCO1ACC4_bit at NCO1ACCL.B4;
    const register unsigned short int NCO1ACC5 = 5;
    sbit  NCO1ACC5_bit at NCO1ACCL.B5;
    const register unsigned short int NCO1ACC6 = 6;
    sbit  NCO1ACC6_bit at NCO1ACCL.B6;
    const register unsigned short int NCO1ACC7 = 7;
    sbit  NCO1ACC7_bit at NCO1ACCL.B7;

sfr unsigned short volatile NCO1ACCH         absolute 0x58D;
    const register unsigned short int NCO1ACC8 = 0;
    sbit  NCO1ACC8_bit at NCO1ACCH.B0;
    const register unsigned short int NCO1ACC9 = 1;
    sbit  NCO1ACC9_bit at NCO1ACCH.B1;
    const register unsigned short int NCO1ACC10 = 2;
    sbit  NCO1ACC10_bit at NCO1ACCH.B2;
    const register unsigned short int NCO1ACC11 = 3;
    sbit  NCO1ACC11_bit at NCO1ACCH.B3;
    const register unsigned short int NCO1ACC12 = 4;
    sbit  NCO1ACC12_bit at NCO1ACCH.B4;
    const register unsigned short int NCO1ACC13 = 5;
    sbit  NCO1ACC13_bit at NCO1ACCH.B5;
    const register unsigned short int NCO1ACC14 = 6;
    sbit  NCO1ACC14_bit at NCO1ACCH.B6;
    const register unsigned short int NCO1ACC15 = 7;
    sbit  NCO1ACC15_bit at NCO1ACCH.B7;

sfr unsigned short volatile NCO1ACCU         absolute 0x58E;
    const register unsigned short int NCO1ACC16 = 0;
    sbit  NCO1ACC16_bit at NCO1ACCU.B0;
    const register unsigned short int NCO1ACC17 = 1;
    sbit  NCO1ACC17_bit at NCO1ACCU.B1;
    const register unsigned short int NCO1ACC18 = 2;
    sbit  NCO1ACC18_bit at NCO1ACCU.B2;
    const register unsigned short int NCO1ACC19 = 3;
    sbit  NCO1ACC19_bit at NCO1ACCU.B3;

sfr unsigned short volatile NCO1INCL         absolute 0x58F;
    const register unsigned short int NCO1INC0 = 0;
    sbit  NCO1INC0_bit at NCO1INCL.B0;
    const register unsigned short int NCO1INC1 = 1;
    sbit  NCO1INC1_bit at NCO1INCL.B1;
    const register unsigned short int NCO1INC2 = 2;
    sbit  NCO1INC2_bit at NCO1INCL.B2;
    const register unsigned short int NCO1INC3 = 3;
    sbit  NCO1INC3_bit at NCO1INCL.B3;
    const register unsigned short int NCO1INC4 = 4;
    sbit  NCO1INC4_bit at NCO1INCL.B4;
    const register unsigned short int NCO1INC5 = 5;
    sbit  NCO1INC5_bit at NCO1INCL.B5;
    const register unsigned short int NCO1INC6 = 6;
    sbit  NCO1INC6_bit at NCO1INCL.B6;
    const register unsigned short int NCO1INC7 = 7;
    sbit  NCO1INC7_bit at NCO1INCL.B7;

sfr unsigned short volatile NCO1INCH         absolute 0x590;
    const register unsigned short int NCO1INC8 = 0;
    sbit  NCO1INC8_bit at NCO1INCH.B0;
    const register unsigned short int NCO1INC9 = 1;
    sbit  NCO1INC9_bit at NCO1INCH.B1;
    const register unsigned short int NCO1INC10 = 2;
    sbit  NCO1INC10_bit at NCO1INCH.B2;
    const register unsigned short int NCO1INC11 = 3;
    sbit  NCO1INC11_bit at NCO1INCH.B3;
    const register unsigned short int NCO1INC12 = 4;
    sbit  NCO1INC12_bit at NCO1INCH.B4;
    const register unsigned short int NCO1INC13 = 5;
    sbit  NCO1INC13_bit at NCO1INCH.B5;
    const register unsigned short int NCO1INC14 = 6;
    sbit  NCO1INC14_bit at NCO1INCH.B6;
    const register unsigned short int NCO1INC15 = 7;
    sbit  NCO1INC15_bit at NCO1INCH.B7;

sfr unsigned short volatile NCO1INCU         absolute 0x591;
    const register unsigned short int NCO1INC16 = 0;
    sbit  NCO1INC16_bit at NCO1INCU.B0;
    const register unsigned short int NCO1INC17 = 1;
    sbit  NCO1INC17_bit at NCO1INCU.B1;
    const register unsigned short int NCO1INC18 = 2;
    sbit  NCO1INC18_bit at NCO1INCU.B2;
    const register unsigned short int NCO1INC19 = 3;
    sbit  NCO1INC19_bit at NCO1INCU.B3;

sfr unsigned short volatile NCO1CON          absolute 0x592;
    const register unsigned short int N1PFM = 0;
    sbit  N1PFM_bit at NCO1CON.B0;
    const register unsigned short int N1POL = 4;
    sbit  N1POL_bit at NCO1CON.B4;
    const register unsigned short int N1OUT = 5;
    sbit  N1OUT_bit at NCO1CON.B5;
    const register unsigned short int N1EN = 7;
    sbit  N1EN_bit at NCO1CON.B7;

sfr unsigned short volatile NCO1CLK          absolute 0x593;
    const register unsigned short int N1CKS0 = 0;
    sbit  N1CKS0_bit at NCO1CLK.B0;
    const register unsigned short int N1CKS1 = 1;
    sbit  N1CKS1_bit at NCO1CLK.B1;
    const register unsigned short int N1CKS2 = 2;
    sbit  N1CKS2_bit at NCO1CLK.B2;
    const register unsigned short int N1CKS3 = 3;
    sbit  N1CKS3_bit at NCO1CLK.B3;
    const register unsigned short int N1PWS0 = 5;
    sbit  N1PWS0_bit at NCO1CLK.B5;
    const register unsigned short int N1PWS1 = 6;
    sbit  N1PWS1_bit at NCO1CLK.B6;
    const register unsigned short int N1PWS2 = 7;
    sbit  N1PWS2_bit at NCO1CLK.B7;

sfr unsigned short volatile TMR0L            absolute 0x59C;
    const register unsigned short int TMR0L0 = 0;
    sbit  TMR0L0_bit at TMR0L.B0;
    const register unsigned short int TMR0L1 = 1;
    sbit  TMR0L1_bit at TMR0L.B1;
    const register unsigned short int TMR0L2 = 2;
    sbit  TMR0L2_bit at TMR0L.B2;
    const register unsigned short int TMR0L3 = 3;
    sbit  TMR0L3_bit at TMR0L.B3;
    const register unsigned short int TMR0L4 = 4;
    sbit  TMR0L4_bit at TMR0L.B4;
    const register unsigned short int TMR0L5 = 5;
    sbit  TMR0L5_bit at TMR0L.B5;
    const register unsigned short int TMR0L6 = 6;
    sbit  TMR0L6_bit at TMR0L.B6;
    const register unsigned short int TMR0L7 = 7;
    sbit  TMR0L7_bit at TMR0L.B7;

sfr unsigned short volatile TMR0             absolute 0x59C;
sfr unsigned short volatile TMR0H            absolute 0x59D;
    const register unsigned short int T0PR0 = 0;
    sbit  T0PR0_bit at TMR0H.B0;
    const register unsigned short int T0PR1 = 1;
    sbit  T0PR1_bit at TMR0H.B1;
    const register unsigned short int T0PR2 = 2;
    sbit  T0PR2_bit at TMR0H.B2;
    const register unsigned short int T0PR3 = 3;
    sbit  T0PR3_bit at TMR0H.B3;
    const register unsigned short int T0PR4 = 4;
    sbit  T0PR4_bit at TMR0H.B4;
    const register unsigned short int T0PR5 = 5;
    sbit  T0PR5_bit at TMR0H.B5;
    const register unsigned short int T0PR6 = 6;
    sbit  T0PR6_bit at TMR0H.B6;
    const register unsigned short int T0PR7 = 7;
    sbit  T0PR7_bit at TMR0H.B7;
    const register unsigned short int TMR0H0 = 0;
    sbit  TMR0H0_bit at TMR0H.B0;
    const register unsigned short int TMR0H1 = 1;
    sbit  TMR0H1_bit at TMR0H.B1;
    const register unsigned short int TMR0H2 = 2;
    sbit  TMR0H2_bit at TMR0H.B2;
    const register unsigned short int TMR0H3 = 3;
    sbit  TMR0H3_bit at TMR0H.B3;
    const register unsigned short int TMR0H4 = 4;
    sbit  TMR0H4_bit at TMR0H.B4;
    const register unsigned short int TMR0H5 = 5;
    sbit  TMR0H5_bit at TMR0H.B5;
    const register unsigned short int TMR0H6 = 6;
    sbit  TMR0H6_bit at TMR0H.B6;
    const register unsigned short int TMR0H7 = 7;
    sbit  TMR0H7_bit at TMR0H.B7;

sfr unsigned short volatile PR0              absolute 0x59D;
sfr unsigned short volatile T0CON0           absolute 0x59E;
    const register unsigned short int T0OUTPS0 = 0;
    sbit  T0OUTPS0_bit at T0CON0.B0;
    const register unsigned short int T0OUTPS1 = 1;
    sbit  T0OUTPS1_bit at T0CON0.B1;
    const register unsigned short int T0OUTPS2 = 2;
    sbit  T0OUTPS2_bit at T0CON0.B2;
    const register unsigned short int T0OUTPS3 = 3;
    sbit  T0OUTPS3_bit at T0CON0.B3;
    const register unsigned short int T016BIT = 4;
    sbit  T016BIT_bit at T0CON0.B4;
    const register unsigned short int T0OUT = 5;
    sbit  T0OUT_bit at T0CON0.B5;
    const register unsigned short int T0EN = 7;
    sbit  T0EN_bit at T0CON0.B7;

sfr unsigned short volatile T0CON1           absolute 0x59F;
    const register unsigned short int T0CKPS0 = 0;
    sbit  T0CKPS0_bit at T0CON1.B0;
    const register unsigned short int T0CKPS1 = 1;
    sbit  T0CKPS1_bit at T0CON1.B1;
    const register unsigned short int T0CKPS2 = 2;
    sbit  T0CKPS2_bit at T0CON1.B2;
    const register unsigned short int T0CKPS3 = 3;
    sbit  T0CKPS3_bit at T0CON1.B3;
    const register unsigned short int T0ASYNC = 4;
    sbit  T0ASYNC_bit at T0CON1.B4;
    const register unsigned short int T0CS0 = 5;
    sbit  T0CS0_bit at T0CON1.B5;
    const register unsigned short int T0CS1 = 6;
    sbit  T0CS1_bit at T0CON1.B6;
    const register unsigned short int T0CS2 = 7;
    sbit  T0CS2_bit at T0CON1.B7;
    const register unsigned short int T0PS0 = 0;
    sbit  T0PS0_bit at T0CON1.B0;
    const register unsigned short int T0PS1 = 1;
    sbit  T0PS1_bit at T0CON1.B1;
    const register unsigned short int T0PS2 = 2;
    sbit  T0PS2_bit at T0CON1.B2;
    const register unsigned short int T0PS3 = 3;
    sbit  T0PS3_bit at T0CON1.B3;

sfr unsigned short volatile CWG1CLKCON       absolute 0x60C;
    const register unsigned short int CS = 0;
    sbit  CS_bit at CWG1CLKCON.B0;
    const register unsigned short int CWG1CS = 0;
    sbit  CWG1CS_bit at CWG1CLKCON.B0;

sfr unsigned short volatile CWG1DAT          absolute 0x60D;
    const register unsigned short int CWG1DAT0 = 0;
    sbit  CWG1DAT0_bit at CWG1DAT.B0;
    const register unsigned short int CWG1DAT1 = 1;
    sbit  CWG1DAT1_bit at CWG1DAT.B1;
    const register unsigned short int CWG1DAT2 = 2;
    sbit  CWG1DAT2_bit at CWG1DAT.B2;
    const register unsigned short int CWG1DAT3 = 3;
    sbit  CWG1DAT3_bit at CWG1DAT.B3;

sfr unsigned short volatile CWG1DBR          absolute 0x60E;
    const register unsigned short int CWG1DBR0 = 0;
    sbit  CWG1DBR0_bit at CWG1DBR.B0;
    const register unsigned short int CWG1DBR1 = 1;
    sbit  CWG1DBR1_bit at CWG1DBR.B1;
    const register unsigned short int CWG1DBR2 = 2;
    sbit  CWG1DBR2_bit at CWG1DBR.B2;
    const register unsigned short int CWG1DBR3 = 3;
    sbit  CWG1DBR3_bit at CWG1DBR.B3;
    const register unsigned short int CWG1DBR4 = 4;
    sbit  CWG1DBR4_bit at CWG1DBR.B4;
    const register unsigned short int CWG1DBR5 = 5;
    sbit  CWG1DBR5_bit at CWG1DBR.B5;
    const register unsigned short int DBR0 = 0;
    sbit  DBR0_bit at CWG1DBR.B0;
    const register unsigned short int DBR1 = 1;
    sbit  DBR1_bit at CWG1DBR.B1;
    const register unsigned short int DBR2 = 2;
    sbit  DBR2_bit at CWG1DBR.B2;
    const register unsigned short int DBR3 = 3;
    sbit  DBR3_bit at CWG1DBR.B3;
    const register unsigned short int DBR4 = 4;
    sbit  DBR4_bit at CWG1DBR.B4;
    const register unsigned short int DBR5 = 5;
    sbit  DBR5_bit at CWG1DBR.B5;

sfr unsigned short volatile CWG1DBF          absolute 0x60F;
    const register unsigned short int CWG1DBF0 = 0;
    sbit  CWG1DBF0_bit at CWG1DBF.B0;
    const register unsigned short int CWG1DBF1 = 1;
    sbit  CWG1DBF1_bit at CWG1DBF.B1;
    const register unsigned short int CWG1DBF2 = 2;
    sbit  CWG1DBF2_bit at CWG1DBF.B2;
    const register unsigned short int CWG1DBF3 = 3;
    sbit  CWG1DBF3_bit at CWG1DBF.B3;
    const register unsigned short int CWG1DBF4 = 4;
    sbit  CWG1DBF4_bit at CWG1DBF.B4;
    const register unsigned short int CWG1DBF5 = 5;
    sbit  CWG1DBF5_bit at CWG1DBF.B5;
    const register unsigned short int DBF0 = 0;
    sbit  DBF0_bit at CWG1DBF.B0;
    const register unsigned short int DBF1 = 1;
    sbit  DBF1_bit at CWG1DBF.B1;
    const register unsigned short int DBF2 = 2;
    sbit  DBF2_bit at CWG1DBF.B2;
    const register unsigned short int DBF3 = 3;
    sbit  DBF3_bit at CWG1DBF.B3;
    const register unsigned short int DBF4 = 4;
    sbit  DBF4_bit at CWG1DBF.B4;
    const register unsigned short int DBF5 = 5;
    sbit  DBF5_bit at CWG1DBF.B5;

sfr unsigned short volatile CWG1CON0         absolute 0x610;
    const register unsigned short int CWG1MODE0 = 0;
    sbit  CWG1MODE0_bit at CWG1CON0.B0;
    const register unsigned short int CWG1MODE1 = 1;
    sbit  CWG1MODE1_bit at CWG1CON0.B1;
    const register unsigned short int CWG1MODE2 = 2;
    sbit  CWG1MODE2_bit at CWG1CON0.B2;
    const register unsigned short int CWG1LD = 6;
    sbit  CWG1LD_bit at CWG1CON0.B6;
    const register unsigned short int CWG1EN = 7;
    sbit  CWG1EN_bit at CWG1CON0.B7;
    const register unsigned short int G1EN = 7;
    sbit  G1EN_bit at CWG1CON0.B7;
    const register unsigned short int LD = 6;
    sbit  LD_bit at CWG1CON0.B6;

sfr unsigned short volatile CWG1CON1         absolute 0x611;
    const register unsigned short int CWG1POLA = 0;
    sbit  CWG1POLA_bit at CWG1CON1.B0;
    const register unsigned short int CWG1POLB = 1;
    sbit  CWG1POLB_bit at CWG1CON1.B1;
    const register unsigned short int CWG1POLC = 2;
    sbit  CWG1POLC_bit at CWG1CON1.B2;
    const register unsigned short int CWG1POLD = 3;
    sbit  CWG1POLD_bit at CWG1CON1.B3;
    const register unsigned short int CWG1IN = 5;
    sbit  CWG1IN_bit at CWG1CON1.B5;
    const register unsigned short int IN_ = 5;
    sbit  IN_bit at CWG1CON1.B5;
    const register unsigned short int POLA = 0;
    sbit  POLA_bit at CWG1CON1.B0;
    const register unsigned short int POLB = 1;
    sbit  POLB_bit at CWG1CON1.B1;
    const register unsigned short int POLC = 2;
    sbit  POLC_bit at CWG1CON1.B2;
    const register unsigned short int POLD = 3;
    sbit  POLD_bit at CWG1CON1.B3;

sfr unsigned short volatile CWG1AS0          absolute 0x612;
    const register unsigned short int CWG1LSAC0 = 2;
    sbit  CWG1LSAC0_bit at CWG1AS0.B2;
    const register unsigned short int CWG1LSAC1 = 3;
    sbit  CWG1LSAC1_bit at CWG1AS0.B3;
    const register unsigned short int CWG1LSBD0 = 4;
    sbit  CWG1LSBD0_bit at CWG1AS0.B4;
    const register unsigned short int CWG1LSBD1 = 5;
    sbit  CWG1LSBD1_bit at CWG1AS0.B5;
    const register unsigned short int CWG1REN = 6;
    sbit  CWG1REN_bit at CWG1AS0.B6;
    const register unsigned short int CWG1SHUTDOWN = 7;
    sbit  CWG1SHUTDOWN_bit at CWG1AS0.B7;
    const register unsigned short int LSAC0 = 2;
    sbit  LSAC0_bit at CWG1AS0.B2;
    const register unsigned short int LSAC1 = 3;
    sbit  LSAC1_bit at CWG1AS0.B3;
    const register unsigned short int LSBD0 = 4;
    sbit  LSBD0_bit at CWG1AS0.B4;
    const register unsigned short int LSBD1 = 5;
    sbit  LSBD1_bit at CWG1AS0.B5;
    const register unsigned short int REN = 6;
    sbit  REN_bit at CWG1AS0.B6;
    const register unsigned short int SHUTDOWN = 7;
    sbit  SHUTDOWN_bit at CWG1AS0.B7;

sfr unsigned short volatile CWG1AS1          absolute 0x613;
    const register unsigned short int AS0E = 0;
    sbit  AS0E_bit at CWG1AS1.B0;
    const register unsigned short int AS1E = 1;
    sbit  AS1E_bit at CWG1AS1.B1;
    const register unsigned short int AS2E = 2;
    sbit  AS2E_bit at CWG1AS1.B2;
    const register unsigned short int AS3E = 3;
    sbit  AS3E_bit at CWG1AS1.B3;
    const register unsigned short int AS4E = 4;
    sbit  AS4E_bit at CWG1AS1.B4;

sfr unsigned short volatile CWG1STR          absolute 0x614;
    const register unsigned short int CWG1STRA = 0;
    sbit  CWG1STRA_bit at CWG1STR.B0;
    const register unsigned short int CWG1STRB = 1;
    sbit  CWG1STRB_bit at CWG1STR.B1;
    const register unsigned short int CWG1STRC = 2;
    sbit  CWG1STRC_bit at CWG1STR.B2;
    const register unsigned short int CWG1STRD = 3;
    sbit  CWG1STRD_bit at CWG1STR.B3;
    const register unsigned short int CWG1OVRA = 4;
    sbit  CWG1OVRA_bit at CWG1STR.B4;
    const register unsigned short int CWG1OVRB = 5;
    sbit  CWG1OVRB_bit at CWG1STR.B5;
    const register unsigned short int CWG1OVRC = 6;
    sbit  CWG1OVRC_bit at CWG1STR.B6;
    const register unsigned short int CWG1OVRD = 7;
    sbit  CWG1OVRD_bit at CWG1STR.B7;
    const register unsigned short int OVRA = 4;
    sbit  OVRA_bit at CWG1STR.B4;
    const register unsigned short int OVRB = 5;
    sbit  OVRB_bit at CWG1STR.B5;
    const register unsigned short int OVRC = 6;
    sbit  OVRC_bit at CWG1STR.B6;
    const register unsigned short int OVRD = 7;
    sbit  OVRD_bit at CWG1STR.B7;
    const register unsigned short int STRA = 0;
    sbit  STRA_bit at CWG1STR.B0;
    const register unsigned short int STRB = 1;
    sbit  STRB_bit at CWG1STR.B1;
    const register unsigned short int STRC = 2;
    sbit  STRC_bit at CWG1STR.B2;
    const register unsigned short int STRD = 3;
    sbit  STRD_bit at CWG1STR.B3;

sfr unsigned short volatile PIR0             absolute 0x70C;
    const register unsigned short int INTF = 0;
    sbit  INTF_bit at PIR0.B0;
    const register unsigned short int IOCIF = 4;
    sbit  IOCIF_bit at PIR0.B4;
    const register unsigned short int TMR0IF = 5;
    sbit  TMR0IF_bit at PIR0.B5;

sfr unsigned short volatile PIR1             absolute 0x70D;
    const register unsigned short int ADIF = 0;
    sbit  ADIF_bit at PIR1.B0;
    const register unsigned short int ADTIF = 1;
    sbit  ADTIF_bit at PIR1.B1;
    const register unsigned short int CSWIF = 6;
    sbit  CSWIF_bit at PIR1.B6;
    const register unsigned short int OSFIF = 7;
    sbit  OSFIF_bit at PIR1.B7;

sfr unsigned short volatile PIR2             absolute 0x70E;
    const register unsigned short int C1IF = 0;
    sbit  C1IF_bit at PIR2.B0;
    const register unsigned short int C2IF = 1;
    sbit  C2IF_bit at PIR2.B1;
    const register unsigned short int ZCDIF = 6;
    sbit  ZCDIF_bit at PIR2.B6;

sfr unsigned short volatile PIR3             absolute 0x70F;
    const register unsigned short int SSP1IF = 0;
    sbit  SSP1IF_bit at PIR3.B0;
    const register unsigned short int BCL1IF = 1;
    sbit  BCL1IF_bit at PIR3.B1;
    const register unsigned short int TX1IF = 4;
    sbit  TX1IF_bit at PIR3.B4;
    const register unsigned short int RC1IF = 5;
    sbit  RC1IF_bit at PIR3.B5;
    const register unsigned short int TX2IF = 6;
    sbit  TX2IF_bit at PIR3.B6;
    const register unsigned short int RC2IF = 7;
    sbit  RC2IF_bit at PIR3.B7;

sfr unsigned short volatile PIR4             absolute 0x710;
    const register unsigned short int TMR1IF = 0;
    sbit  TMR1IF_bit at PIR4.B0;
    const register unsigned short int TMR2IF = 1;
    sbit  TMR2IF_bit at PIR4.B1;

sfr unsigned short volatile PIR5             absolute 0x711;
    const register unsigned short int TMR1GIF = 0;
    sbit  TMR1GIF_bit at PIR5.B0;
    const register unsigned short int CLC1IF = 4;
    sbit  CLC1IF_bit at PIR5.B4;
    const register unsigned short int CLC2IF = 5;
    sbit  CLC2IF_bit at PIR5.B5;
    const register unsigned short int CLC3IF = 6;
    sbit  CLC3IF_bit at PIR5.B6;
    const register unsigned short int CLC4IF = 7;
    sbit  CLC4IF_bit at PIR5.B7;

sfr unsigned short volatile PIR6             absolute 0x712;
    const register unsigned short int CCP1IF = 0;
    sbit  CCP1IF_bit at PIR6.B0;
    const register unsigned short int CCP2IF = 1;
    sbit  CCP2IF_bit at PIR6.B1;

sfr unsigned short volatile PIR7             absolute 0x713;
    const register unsigned short int CWG1IF = 0;
    sbit  CWG1IF_bit at PIR7.B0;
    const register unsigned short int NCO1IF = 4;
    sbit  NCO1IF_bit at PIR7.B4;
    const register unsigned short int NVMIF = 5;
    sbit  NVMIF_bit at PIR7.B5;
    const register unsigned short int NCOIF = 4;
    sbit  NCOIF_bit at PIR7.B4;

sfr unsigned short volatile PIE0             absolute 0x716;
    const register unsigned short int INTE = 0;
    sbit  INTE_bit at PIE0.B0;
    const register unsigned short int IOCIE = 4;
    sbit  IOCIE_bit at PIE0.B4;
    const register unsigned short int TMR0IE = 5;
    sbit  TMR0IE_bit at PIE0.B5;

sfr unsigned short volatile PIE1             absolute 0x717;
    const register unsigned short int ADIE = 0;
    sbit  ADIE_bit at PIE1.B0;
    const register unsigned short int CSWIE = 6;
    sbit  CSWIE_bit at PIE1.B6;
    const register unsigned short int OSFIE = 7;
    sbit  OSFIE_bit at PIE1.B7;

sfr unsigned short volatile PIE2             absolute 0x718;
    const register unsigned short int C1IE = 0;
    sbit  C1IE_bit at PIE2.B0;
    const register unsigned short int C2IE = 1;
    sbit  C2IE_bit at PIE2.B1;
    const register unsigned short int ZCDIE = 6;
    sbit  ZCDIE_bit at PIE2.B6;

sfr unsigned short volatile PIE3             absolute 0x719;
    const register unsigned short int SSP1IE = 0;
    sbit  SSP1IE_bit at PIE3.B0;
    const register unsigned short int BCL1IE = 1;
    sbit  BCL1IE_bit at PIE3.B1;
    const register unsigned short int TX1IE = 4;
    sbit  TX1IE_bit at PIE3.B4;
    const register unsigned short int RC1IE = 5;
    sbit  RC1IE_bit at PIE3.B5;
    const register unsigned short int TX2IE = 6;
    sbit  TX2IE_bit at PIE3.B6;
    const register unsigned short int RC2IE = 7;
    sbit  RC2IE_bit at PIE3.B7;

sfr unsigned short volatile PIE4             absolute 0x71A;
    const register unsigned short int TMR1IE = 0;
    sbit  TMR1IE_bit at PIE4.B0;
    const register unsigned short int TMR2IE = 1;
    sbit  TMR2IE_bit at PIE4.B1;

sfr unsigned short volatile PIE5             absolute 0x71B;
    const register unsigned short int TMR1GIE = 0;
    sbit  TMR1GIE_bit at PIE5.B0;
    const register unsigned short int CLC1IE = 4;
    sbit  CLC1IE_bit at PIE5.B4;
    const register unsigned short int CLC2IE = 5;
    sbit  CLC2IE_bit at PIE5.B5;
    const register unsigned short int CLC3IE = 6;
    sbit  CLC3IE_bit at PIE5.B6;
    const register unsigned short int CLC4IE = 7;
    sbit  CLC4IE_bit at PIE5.B7;

sfr unsigned short volatile PIE6             absolute 0x71C;
    const register unsigned short int CCP1IE = 0;
    sbit  CCP1IE_bit at PIE6.B0;
    const register unsigned short int CCP2IE = 1;
    sbit  CCP2IE_bit at PIE6.B1;

sfr unsigned short volatile PIE7             absolute 0x71D;
    const register unsigned short int CWG1IE = 0;
    sbit  CWG1IE_bit at PIE7.B0;
    const register unsigned short int NCO1IE = 4;
    sbit  NCO1IE_bit at PIE7.B4;
    const register unsigned short int NVMIE = 5;
    sbit  NVMIE_bit at PIE7.B5;
    const register unsigned short int NCOIE = 4;
    sbit  NCOIE_bit at PIE7.B4;

sfr unsigned short volatile PMD0             absolute 0x796;
    const register unsigned short int IOCMD = 0;
    sbit  IOCMD_bit at PMD0.B0;
    const register unsigned short int CLKRMD = 1;
    sbit  CLKRMD_bit at PMD0.B1;
    const register unsigned short int NVMMD = 2;
    sbit  NVMMD_bit at PMD0.B2;
    const register unsigned short int FVRMD = 6;
    sbit  FVRMD_bit at PMD0.B6;
    const register unsigned short int SYSCMD = 7;
    sbit  SYSCMD_bit at PMD0.B7;

sfr unsigned short volatile PMD1             absolute 0x797;
    const register unsigned short int TMR0MD = 0;
    sbit  TMR0MD_bit at PMD1.B0;
    const register unsigned short int TMR1MD = 1;
    sbit  TMR1MD_bit at PMD1.B1;
    const register unsigned short int TMR2MD = 2;
    sbit  TMR2MD_bit at PMD1.B2;
    const register unsigned short int DDS1MD = 7;
    sbit  DDS1MD_bit at PMD1.B7;
    const register unsigned short int NCOMD = 7;
    sbit  NCOMD_bit at PMD1.B7;

sfr unsigned short volatile PMD2             absolute 0x798;
    const register unsigned short int ZCDMD = 0;
    sbit  ZCDMD_bit at PMD2.B0;
    const register unsigned short int CMP1MD = 1;
    sbit  CMP1MD_bit at PMD2.B1;
    const register unsigned short int CMP2MD = 2;
    sbit  CMP2MD_bit at PMD2.B2;
    const register unsigned short int ADCMD = 5;
    sbit  ADCMD_bit at PMD2.B5;
    const register unsigned short int DAC1MD = 6;
    sbit  DAC1MD_bit at PMD2.B6;

sfr unsigned short volatile PMD3             absolute 0x799;
    const register unsigned short int CCP1MD = 0;
    sbit  CCP1MD_bit at PMD3.B0;
    const register unsigned short int CCP2MD = 1;
    sbit  CCP2MD_bit at PMD3.B1;
    const register unsigned short int PWM3MD = 2;
    sbit  PWM3MD_bit at PMD3.B2;
    const register unsigned short int PWM4MD = 3;
    sbit  PWM4MD_bit at PMD3.B3;
    const register unsigned short int PWM5MD = 4;
    sbit  PWM5MD_bit at PMD3.B4;
    const register unsigned short int PWM6MD = 5;
    sbit  PWM6MD_bit at PMD3.B5;

sfr unsigned short volatile PMD4             absolute 0x79A;
    const register unsigned short int CWG1MD = 0;
    sbit  CWG1MD_bit at PMD4.B0;
    const register unsigned short int MSSP1MD = 4;
    sbit  MSSP1MD_bit at PMD4.B4;
    const register unsigned short int UART1MD = 6;
    sbit  UART1MD_bit at PMD4.B6;
    const register unsigned short int UART2MD = 7;
    sbit  UART2MD_bit at PMD4.B7;

sfr unsigned short volatile PMD5             absolute 0x79B;
    const register unsigned short int CLC1MD = 1;
    sbit  CLC1MD_bit at PMD5.B1;
    const register unsigned short int CLC2MD = 2;
    sbit  CLC2MD_bit at PMD5.B2;
    const register unsigned short int CLC3MD = 3;
    sbit  CLC3MD_bit at PMD5.B3;
    const register unsigned short int CLC4MD = 4;
    sbit  CLC4MD_bit at PMD5.B4;

sfr unsigned short volatile WDTCON0          absolute 0x80C;
    const register unsigned short int SWDTEN = 0;
    sbit  SWDTEN_bit at WDTCON0.B0;
    const register unsigned short int WDTPS0 = 1;
    sbit  WDTPS0_bit at WDTCON0.B1;
    const register unsigned short int WDTPS1 = 2;
    sbit  WDTPS1_bit at WDTCON0.B2;
    const register unsigned short int WDTPS2 = 3;
    sbit  WDTPS2_bit at WDTCON0.B3;
    const register unsigned short int WDTPS3 = 4;
    sbit  WDTPS3_bit at WDTCON0.B4;
    const register unsigned short int WDTPS4 = 5;
    sbit  WDTPS4_bit at WDTCON0.B5;
    const register unsigned short int WDTSEN = 0;
    sbit  WDTSEN_bit at WDTCON0.B0;

sfr unsigned short volatile WDTCON1          absolute 0x80D;
    const register unsigned short int WDTWINDOW0 = 0;
    sbit  WDTWINDOW0_bit at WDTCON1.B0;
    const register unsigned short int WDTWINDOW1 = 1;
    sbit  WDTWINDOW1_bit at WDTCON1.B1;
    const register unsigned short int WDTWINDOW2 = 2;
    sbit  WDTWINDOW2_bit at WDTCON1.B2;
    const register unsigned short int WDTCS0 = 4;
    sbit  WDTCS0_bit at WDTCON1.B4;
    const register unsigned short int WDTCS1 = 5;
    sbit  WDTCS1_bit at WDTCON1.B5;
    const register unsigned short int WDTCS2 = 6;
    sbit  WDTCS2_bit at WDTCON1.B6;
    const register unsigned short int WINDOW0 = 0;
    sbit  WINDOW0_bit at WDTCON1.B0;
    const register unsigned short int WINDOW1 = 1;
    sbit  WINDOW1_bit at WDTCON1.B1;
    const register unsigned short int WINDOW2 = 2;
    sbit  WINDOW2_bit at WDTCON1.B2;

sfr unsigned short volatile WDTPSL           absolute 0x80E;
    const register unsigned short int PSCNT0 = 0;
    sbit  PSCNT0_bit at WDTPSL.B0;
    const register unsigned short int PSCNT1 = 1;
    sbit  PSCNT1_bit at WDTPSL.B1;
    const register unsigned short int PSCNT2 = 2;
    sbit  PSCNT2_bit at WDTPSL.B2;
    const register unsigned short int PSCNT3 = 3;
    sbit  PSCNT3_bit at WDTPSL.B3;
    const register unsigned short int PSCNT4 = 4;
    sbit  PSCNT4_bit at WDTPSL.B4;
    const register unsigned short int PSCNT5 = 5;
    sbit  PSCNT5_bit at WDTPSL.B5;
    const register unsigned short int PSCNT6 = 6;
    sbit  PSCNT6_bit at WDTPSL.B6;
    const register unsigned short int PSCNT7 = 7;
    sbit  PSCNT7_bit at WDTPSL.B7;
    const register unsigned short int WDTPSCNT0 = 0;
    sbit  WDTPSCNT0_bit at WDTPSL.B0;
    const register unsigned short int WDTPSCNT1 = 1;
    sbit  WDTPSCNT1_bit at WDTPSL.B1;
    const register unsigned short int WDTPSCNT2 = 2;
    sbit  WDTPSCNT2_bit at WDTPSL.B2;
    const register unsigned short int WDTPSCNT3 = 3;
    sbit  WDTPSCNT3_bit at WDTPSL.B3;
    const register unsigned short int WDTPSCNT4 = 4;
    sbit  WDTPSCNT4_bit at WDTPSL.B4;
    const register unsigned short int WDTPSCNT5 = 5;
    sbit  WDTPSCNT5_bit at WDTPSL.B5;
    const register unsigned short int WDTPSCNT6 = 6;
    sbit  WDTPSCNT6_bit at WDTPSL.B6;
    const register unsigned short int WDTPSCNT7 = 7;
    sbit  WDTPSCNT7_bit at WDTPSL.B7;

sfr unsigned short volatile WDTPSH           absolute 0x80F;
    const register unsigned short int PSCNT8 = 0;
    sbit  PSCNT8_bit at WDTPSH.B0;
    const register unsigned short int PSCNT9 = 1;
    sbit  PSCNT9_bit at WDTPSH.B1;
    const register unsigned short int PSCNT10 = 2;
    sbit  PSCNT10_bit at WDTPSH.B2;
    const register unsigned short int PSCNT11 = 3;
    sbit  PSCNT11_bit at WDTPSH.B3;
    const register unsigned short int PSCNT12 = 4;
    sbit  PSCNT12_bit at WDTPSH.B4;
    const register unsigned short int PSCNT13 = 5;
    sbit  PSCNT13_bit at WDTPSH.B5;
    const register unsigned short int PSCNT14 = 6;
    sbit  PSCNT14_bit at WDTPSH.B6;
    const register unsigned short int PSCNT15 = 7;
    sbit  PSCNT15_bit at WDTPSH.B7;
    const register unsigned short int WDTPSCNT10 = 2;
    sbit  WDTPSCNT10_bit at WDTPSH.B2;
    const register unsigned short int WDTPSCNT11 = 3;
    sbit  WDTPSCNT11_bit at WDTPSH.B3;
    const register unsigned short int WDTPSCNT12 = 4;
    sbit  WDTPSCNT12_bit at WDTPSH.B4;
    const register unsigned short int WDTPSCNT13 = 5;
    sbit  WDTPSCNT13_bit at WDTPSH.B5;
    const register unsigned short int WDTPSCNT14 = 6;
    sbit  WDTPSCNT14_bit at WDTPSH.B6;
    const register unsigned short int WDTPSCNT15 = 7;
    sbit  WDTPSCNT15_bit at WDTPSH.B7;
    const register unsigned short int WDTPSCNT8 = 0;
    sbit  WDTPSCNT8_bit at WDTPSH.B0;
    const register unsigned short int WDTPSCNT9 = 1;
    sbit  WDTPSCNT9_bit at WDTPSH.B1;

sfr unsigned short volatile WDTTMR           absolute 0x810;
    const register unsigned short int PSCNT16 = 0;
    sbit  PSCNT16_bit at WDTTMR.B0;
    const register unsigned short int PSCNT17 = 1;
    sbit  PSCNT17_bit at WDTTMR.B1;
    const register unsigned short int STATE = 2;
    sbit  STATE_bit at WDTTMR.B2;
    const register unsigned short int WDTTMR0 = 3;
    sbit  WDTTMR0_bit at WDTTMR.B3;
    const register unsigned short int WDTTMR1 = 4;
    sbit  WDTTMR1_bit at WDTTMR.B4;
    const register unsigned short int WDTTMR2 = 5;
    sbit  WDTTMR2_bit at WDTTMR.B5;
    const register unsigned short int WDTTMR3 = 6;
    sbit  WDTTMR3_bit at WDTTMR.B6;
    const register unsigned short int WDTTMR4 = 7;
    sbit  WDTTMR4_bit at WDTTMR.B7;
    const register unsigned short int WDTPSCNT16 = 0;
    sbit  WDTPSCNT16_bit at WDTTMR.B0;
    const register unsigned short int WDTPSCNT17 = 1;
    sbit  WDTPSCNT17_bit at WDTTMR.B1;
    const register unsigned short int WDTSTATE = 2;
    sbit  WDTSTATE_bit at WDTTMR.B2;

sfr unsigned short volatile BORCON           absolute 0x811;
    const register unsigned short int BORRDY = 0;
    sbit  BORRDY_bit at BORCON.B0;
    const register unsigned short int SBOREN = 7;
    sbit  SBOREN_bit at BORCON.B7;

sfr unsigned short volatile VREGCON          absolute 0x812;
    const register unsigned short int VREGPM = 1;
    sbit  VREGPM_bit at VREGCON.B1;

sfr unsigned short volatile PCON0            absolute 0x813;
    const register unsigned short int nBOR = 0;
    sbit  nBOR_bit at PCON0.B0;
    const register unsigned short int nPOR = 1;
    sbit  nPOR_bit at PCON0.B1;
    const register unsigned short int nRI = 2;
    sbit  nRI_bit at PCON0.B2;
    const register unsigned short int nRMCLR = 3;
    sbit  nRMCLR_bit at PCON0.B3;
    const register unsigned short int nRWDT = 4;
    sbit  nRWDT_bit at PCON0.B4;
    const register unsigned short int nWDTWV = 5;
    sbit  nWDTWV_bit at PCON0.B5;
    const register unsigned short int STKUNF = 6;
    sbit  STKUNF_bit at PCON0.B6;
    const register unsigned short int STKOVF = 7;
    sbit  STKOVF_bit at PCON0.B7;

sfr unsigned short volatile PCON1            absolute 0x814;
    const register unsigned short int nMEMV = 1;
    sbit  nMEMV_bit at PCON1.B1;

sfr unsigned int   volatile NVMADR           absolute 0x81A;
sfr unsigned short volatile NVMADRL          absolute 0x81A;
    const register unsigned short int NVMADRL0 = 0;
    sbit  NVMADRL0_bit at NVMADRL.B0;
    const register unsigned short int NVMADRL1 = 1;
    sbit  NVMADRL1_bit at NVMADRL.B1;
    const register unsigned short int NVMADRL2 = 2;
    sbit  NVMADRL2_bit at NVMADRL.B2;
    const register unsigned short int NVMADRL3 = 3;
    sbit  NVMADRL3_bit at NVMADRL.B3;
    const register unsigned short int NVMADRL4 = 4;
    sbit  NVMADRL4_bit at NVMADRL.B4;
    const register unsigned short int NVMADRL5 = 5;
    sbit  NVMADRL5_bit at NVMADRL.B5;
    const register unsigned short int NVMADRL6 = 6;
    sbit  NVMADRL6_bit at NVMADRL.B6;
    const register unsigned short int NVMADRL7 = 7;
    sbit  NVMADRL7_bit at NVMADRL.B7;

sfr unsigned short volatile NVMADRH          absolute 0x81B;
    const register unsigned short int NVMADRH0 = 0;
    sbit  NVMADRH0_bit at NVMADRH.B0;
    const register unsigned short int NVMADRH1 = 1;
    sbit  NVMADRH1_bit at NVMADRH.B1;
    const register unsigned short int NVMADRH2 = 2;
    sbit  NVMADRH2_bit at NVMADRH.B2;
    const register unsigned short int NVMADRH3 = 3;
    sbit  NVMADRH3_bit at NVMADRH.B3;
    const register unsigned short int NVMADRH4 = 4;
    sbit  NVMADRH4_bit at NVMADRH.B4;
    const register unsigned short int NVMADRH5 = 5;
    sbit  NVMADRH5_bit at NVMADRH.B5;
    const register unsigned short int NVMADRH6 = 6;
    sbit  NVMADRH6_bit at NVMADRH.B6;

sfr unsigned int   volatile NVMDAT           absolute 0x81C;
sfr unsigned short volatile NVMDATL          absolute 0x81C;
    const register unsigned short int NVMDATL0 = 0;
    sbit  NVMDATL0_bit at NVMDATL.B0;
    const register unsigned short int NVMDATL1 = 1;
    sbit  NVMDATL1_bit at NVMDATL.B1;
    const register unsigned short int NVMDATL2 = 2;
    sbit  NVMDATL2_bit at NVMDATL.B2;
    const register unsigned short int NVMDATL3 = 3;
    sbit  NVMDATL3_bit at NVMDATL.B3;
    const register unsigned short int NVMDATL4 = 4;
    sbit  NVMDATL4_bit at NVMDATL.B4;
    const register unsigned short int NVMDATL5 = 5;
    sbit  NVMDATL5_bit at NVMDATL.B5;
    const register unsigned short int NVMDATL6 = 6;
    sbit  NVMDATL6_bit at NVMDATL.B6;
    const register unsigned short int NVMDATL7 = 7;
    sbit  NVMDATL7_bit at NVMDATL.B7;

sfr unsigned short volatile NVMDATH          absolute 0x81D;
    const register unsigned short int NVMDATH0 = 0;
    sbit  NVMDATH0_bit at NVMDATH.B0;
    const register unsigned short int NVMDATH1 = 1;
    sbit  NVMDATH1_bit at NVMDATH.B1;
    const register unsigned short int NVMDATH2 = 2;
    sbit  NVMDATH2_bit at NVMDATH.B2;
    const register unsigned short int NVMDATH3 = 3;
    sbit  NVMDATH3_bit at NVMDATH.B3;
    const register unsigned short int NVMDATH4 = 4;
    sbit  NVMDATH4_bit at NVMDATH.B4;
    const register unsigned short int NVMDATH5 = 5;
    sbit  NVMDATH5_bit at NVMDATH.B5;

sfr unsigned short volatile NVMCON1          absolute 0x81E;
    const register unsigned short int RD = 0;
    sbit  RD_bit at NVMCON1.B0;
    const register unsigned short int WR = 1;
    sbit  WR_bit at NVMCON1.B1;
    const register unsigned short int WREN = 2;
    sbit  WREN_bit at NVMCON1.B2;
    const register unsigned short int WRERR = 3;
    sbit  WRERR_bit at NVMCON1.B3;
    const register unsigned short int FREE = 4;
    sbit  FREE_bit at NVMCON1.B4;
    const register unsigned short int LWLO = 5;
    sbit  LWLO_bit at NVMCON1.B5;
    const register unsigned short int NVMREGS = 6;
    sbit  NVMREGS_bit at NVMCON1.B6;

sfr unsigned short volatile NVMCON2          absolute 0x81F;
sfr unsigned short volatile CPUDOZE          absolute 0x88C;
    const register unsigned short int DOZE0 = 0;
    sbit  DOZE0_bit at CPUDOZE.B0;
    const register unsigned short int DOZE1 = 1;
    sbit  DOZE1_bit at CPUDOZE.B1;
    const register unsigned short int DOZE2 = 2;
    sbit  DOZE2_bit at CPUDOZE.B2;
    const register unsigned short int DOE = 4;
    sbit  DOE_bit at CPUDOZE.B4;
    const register unsigned short int ROI = 5;
    sbit  ROI_bit at CPUDOZE.B5;
    const register unsigned short int DOZEN = 6;
    sbit  DOZEN_bit at CPUDOZE.B6;
    const register unsigned short int IDLEN = 7;
    sbit  IDLEN_bit at CPUDOZE.B7;

sfr unsigned short volatile OSCCON1          absolute 0x88D;
    const register unsigned short int NDIV0 = 0;
    sbit  NDIV0_bit at OSCCON1.B0;
    const register unsigned short int NDIV1 = 1;
    sbit  NDIV1_bit at OSCCON1.B1;
    const register unsigned short int NDIV2 = 2;
    sbit  NDIV2_bit at OSCCON1.B2;
    const register unsigned short int NDIV3 = 3;
    sbit  NDIV3_bit at OSCCON1.B3;
    const register unsigned short int NOSC0 = 4;
    sbit  NOSC0_bit at OSCCON1.B4;
    const register unsigned short int NOSC1 = 5;
    sbit  NOSC1_bit at OSCCON1.B5;
    const register unsigned short int NOSC2 = 6;
    sbit  NOSC2_bit at OSCCON1.B6;

sfr unsigned short volatile OSCCON2          absolute 0x88E;
    const register unsigned short int CDIV0 = 0;
    sbit  CDIV0_bit at OSCCON2.B0;
    const register unsigned short int CDIV1 = 1;
    sbit  CDIV1_bit at OSCCON2.B1;
    const register unsigned short int CDIV2 = 2;
    sbit  CDIV2_bit at OSCCON2.B2;
    const register unsigned short int CDIV3 = 3;
    sbit  CDIV3_bit at OSCCON2.B3;
    const register unsigned short int COSC0 = 4;
    sbit  COSC0_bit at OSCCON2.B4;
    const register unsigned short int COSC1 = 5;
    sbit  COSC1_bit at OSCCON2.B5;
    const register unsigned short int COSC2 = 6;
    sbit  COSC2_bit at OSCCON2.B6;

sfr unsigned short volatile OSCCON3          absolute 0x88F;
    const register unsigned short int NOSCR = 3;
    sbit  NOSCR_bit at OSCCON3.B3;
    const register unsigned short int ORDY = 4;
    sbit  ORDY_bit at OSCCON3.B4;
    const register unsigned short int SOSCPWR = 6;
    sbit  SOSCPWR_bit at OSCCON3.B6;
    const register unsigned short int CSWHOLD = 7;
    sbit  CSWHOLD_bit at OSCCON3.B7;

sfr unsigned short volatile OSCSTAT          absolute 0x890;
    const register unsigned short int PLLR = 0;
    sbit  PLLR_bit at OSCSTAT.B0;
    const register unsigned short int ADOR = 2;
    sbit  ADOR_bit at OSCSTAT.B2;
    const register unsigned short int SOR = 3;
    sbit  SOR_bit at OSCSTAT.B3;
    const register unsigned short int LFOR = 4;
    sbit  LFOR_bit at OSCSTAT.B4;
    const register unsigned short int MFOR = 5;
    sbit  MFOR_bit at OSCSTAT.B5;
    const register unsigned short int HFOR = 6;
    sbit  HFOR_bit at OSCSTAT.B6;
    const register unsigned short int EXTOR = 7;
    sbit  EXTOR_bit at OSCSTAT.B7;

sfr unsigned short volatile OSCEN            absolute 0x891;
    const register unsigned short int ADOEN = 2;
    sbit  ADOEN_bit at OSCEN.B2;
    const register unsigned short int SOSCEN = 3;
    sbit  SOSCEN_bit at OSCEN.B3;
    const register unsigned short int LFOEN = 4;
    sbit  LFOEN_bit at OSCEN.B4;
    const register unsigned short int MFOEN = 5;
    sbit  MFOEN_bit at OSCEN.B5;
    const register unsigned short int HFOEN = 6;
    sbit  HFOEN_bit at OSCEN.B6;
    const register unsigned short int EXTOEN = 7;
    sbit  EXTOEN_bit at OSCEN.B7;

sfr unsigned short volatile OSCTUNE          absolute 0x892;
    const register unsigned short int HFTUN0 = 0;
    sbit  HFTUN0_bit at OSCTUNE.B0;
    const register unsigned short int HFTUN1 = 1;
    sbit  HFTUN1_bit at OSCTUNE.B1;
    const register unsigned short int HFTUN2 = 2;
    sbit  HFTUN2_bit at OSCTUNE.B2;
    const register unsigned short int HFTUN3 = 3;
    sbit  HFTUN3_bit at OSCTUNE.B3;
    const register unsigned short int HFTUN4 = 4;
    sbit  HFTUN4_bit at OSCTUNE.B4;
    const register unsigned short int HFTUN5 = 5;
    sbit  HFTUN5_bit at OSCTUNE.B5;

sfr unsigned short volatile OSCFRQ           absolute 0x893;
    const register unsigned short int HFFRQ0 = 0;
    sbit  HFFRQ0_bit at OSCFRQ.B0;
    const register unsigned short int HFFRQ1 = 1;
    sbit  HFFRQ1_bit at OSCFRQ.B1;
    const register unsigned short int HFFRQ2 = 2;
    sbit  HFFRQ2_bit at OSCFRQ.B2;

sfr unsigned short volatile CLKRCON          absolute 0x895;
    const register unsigned short int CLKRDIV0 = 0;
    sbit  CLKRDIV0_bit at CLKRCON.B0;
    const register unsigned short int CLKRDIV1 = 1;
    sbit  CLKRDIV1_bit at CLKRCON.B1;
    const register unsigned short int CLKRDIV2 = 2;
    sbit  CLKRDIV2_bit at CLKRCON.B2;
    const register unsigned short int CLKRDC0 = 3;
    sbit  CLKRDC0_bit at CLKRCON.B3;
    const register unsigned short int CLKRDC1 = 4;
    sbit  CLKRDC1_bit at CLKRCON.B4;
    const register unsigned short int CLKREN = 7;
    sbit  CLKREN_bit at CLKRCON.B7;

sfr unsigned short volatile CLKRCLK          absolute 0x896;
    const register unsigned short int CLKRCLK0 = 0;
    sbit  CLKRCLK0_bit at CLKRCLK.B0;
    const register unsigned short int CLKRCLK1 = 1;
    sbit  CLKRCLK1_bit at CLKRCLK.B1;
    const register unsigned short int CLKRCLK2 = 2;
    sbit  CLKRCLK2_bit at CLKRCLK.B2;
    const register unsigned short int CLKRCLK3 = 3;
    sbit  CLKRCLK3_bit at CLKRCLK.B3;

sfr unsigned short volatile FVRCON           absolute 0x90C;
    const register unsigned short int ADFVR0 = 0;
    sbit  ADFVR0_bit at FVRCON.B0;
    const register unsigned short int ADFVR1 = 1;
    sbit  ADFVR1_bit at FVRCON.B1;
    const register unsigned short int CDAFVR0 = 2;
    sbit  CDAFVR0_bit at FVRCON.B2;
    const register unsigned short int CDAFVR1 = 3;
    sbit  CDAFVR1_bit at FVRCON.B3;
    const register unsigned short int TSRNG = 4;
    sbit  TSRNG_bit at FVRCON.B4;
    const register unsigned short int TSEN = 5;
    sbit  TSEN_bit at FVRCON.B5;
    const register unsigned short int FVRRDY = 6;
    sbit  FVRRDY_bit at FVRCON.B6;
    const register unsigned short int FVREN = 7;
    sbit  FVREN_bit at FVRCON.B7;

sfr unsigned short volatile DAC1CON0         absolute 0x90E;
    const register unsigned short int DAC1NSS = 0;
    sbit  DAC1NSS_bit at DAC1CON0.B0;
    const register unsigned short int DAC1PSS0 = 2;
    sbit  DAC1PSS0_bit at DAC1CON0.B2;
    const register unsigned short int DAC1PSS1 = 3;
    sbit  DAC1PSS1_bit at DAC1CON0.B3;
    const register unsigned short int DAC1OE2 = 4;
    sbit  DAC1OE2_bit at DAC1CON0.B4;
    const register unsigned short int DAC1OE1 = 5;
    sbit  DAC1OE1_bit at DAC1CON0.B5;
    const register unsigned short int DAC1EN = 7;
    sbit  DAC1EN_bit at DAC1CON0.B7;
    const register unsigned short int NSS = 0;
    sbit  NSS_bit at DAC1CON0.B0;
    const register unsigned short int OE1 = 5;
    sbit  OE1_bit at DAC1CON0.B5;
    const register unsigned short int OE2 = 4;
    sbit  OE2_bit at DAC1CON0.B4;
    const register unsigned short int PSS0 = 2;
    sbit  PSS0_bit at DAC1CON0.B2;
    const register unsigned short int PSS1 = 3;
    sbit  PSS1_bit at DAC1CON0.B3;

sfr unsigned short volatile DAC1CON1         absolute 0x90F;
    const register unsigned short int DAC1R0 = 0;
    sbit  DAC1R0_bit at DAC1CON1.B0;
    const register unsigned short int DAC1R1 = 1;
    sbit  DAC1R1_bit at DAC1CON1.B1;
    const register unsigned short int DAC1R2 = 2;
    sbit  DAC1R2_bit at DAC1CON1.B2;
    const register unsigned short int DAC1R3 = 3;
    sbit  DAC1R3_bit at DAC1CON1.B3;
    const register unsigned short int DAC1R4 = 4;
    sbit  DAC1R4_bit at DAC1CON1.B4;

sfr unsigned short volatile ZCDCON           absolute 0x91F;
    const register unsigned short int ZCDINTN = 0;
    sbit  ZCDINTN_bit at ZCDCON.B0;
    const register unsigned short int ZCDINTP = 1;
    sbit  ZCDINTP_bit at ZCDCON.B1;
    const register unsigned short int ZCDPOL = 4;
    sbit  ZCDPOL_bit at ZCDCON.B4;
    const register unsigned short int ZCDOUT = 5;
    sbit  ZCDOUT_bit at ZCDCON.B5;
    const register unsigned short int ZCDSEN = 7;
    sbit  ZCDSEN_bit at ZCDCON.B7;

sfr unsigned short volatile CMOUT            absolute 0x98F;
    const register unsigned short int MC1OUT = 0;
    sbit  MC1OUT_bit at CMOUT.B0;
    const register unsigned short int MC2OUT = 1;
    sbit  MC2OUT_bit at CMOUT.B1;

sfr unsigned short volatile CMSTAT           absolute 0x98F;
sfr unsigned short volatile CM1CON0          absolute 0x990;
    const register unsigned short int C1SYNC = 0;
    sbit  C1SYNC_bit at CM1CON0.B0;
    const register unsigned short int C1HYS = 1;
    sbit  C1HYS_bit at CM1CON0.B1;
    const register unsigned short int C1POL = 4;
    sbit  C1POL_bit at CM1CON0.B4;
    const register unsigned short int C1EN = 7;
    sbit  C1EN_bit at CM1CON0.B7;

sfr unsigned short volatile CM1CON1          absolute 0x991;
    const register unsigned short int C1INTN = 0;
    sbit  C1INTN_bit at CM1CON1.B0;
    const register unsigned short int C1INTP = 1;
    sbit  C1INTP_bit at CM1CON1.B1;

sfr unsigned short volatile CM1NCH           absolute 0x992;
    const register unsigned short int C1NCH0 = 0;
    sbit  C1NCH0_bit at CM1NCH.B0;
    const register unsigned short int C1NCH1 = 1;
    sbit  C1NCH1_bit at CM1NCH.B1;
    const register unsigned short int C1NCH2 = 2;
    sbit  C1NCH2_bit at CM1NCH.B2;

sfr unsigned short volatile CM1PCH           absolute 0x993;
    const register unsigned short int C1PCH0 = 0;
    sbit  C1PCH0_bit at CM1PCH.B0;
    const register unsigned short int C1PCH1 = 1;
    sbit  C1PCH1_bit at CM1PCH.B1;
    const register unsigned short int C1PCH2 = 2;
    sbit  C1PCH2_bit at CM1PCH.B2;

sfr unsigned short volatile CM2CON0          absolute 0x994;
    const register unsigned short int C2SYNC = 0;
    sbit  C2SYNC_bit at CM2CON0.B0;
    const register unsigned short int C2HYS = 1;
    sbit  C2HYS_bit at CM2CON0.B1;
    const register unsigned short int C2POL = 4;
    sbit  C2POL_bit at CM2CON0.B4;
    const register unsigned short int C2EN = 7;
    sbit  C2EN_bit at CM2CON0.B7;

sfr unsigned short volatile CM2CON1          absolute 0x995;
    const register unsigned short int C2INTN = 0;
    sbit  C2INTN_bit at CM2CON1.B0;
    const register unsigned short int C2INTP = 1;
    sbit  C2INTP_bit at CM2CON1.B1;

sfr unsigned short volatile CM2NCH           absolute 0x996;
    const register unsigned short int C2NCH0 = 0;
    sbit  C2NCH0_bit at CM2NCH.B0;
    const register unsigned short int C2NCH1 = 1;
    sbit  C2NCH1_bit at CM2NCH.B1;
    const register unsigned short int C2NCH2 = 2;
    sbit  C2NCH2_bit at CM2NCH.B2;

sfr unsigned short volatile CM2PCH           absolute 0x997;
    const register unsigned short int C2PCH0 = 0;
    sbit  C2PCH0_bit at CM2PCH.B0;
    const register unsigned short int C2PCH1 = 1;
    sbit  C2PCH1_bit at CM2PCH.B1;
    const register unsigned short int C2PCH2 = 2;
    sbit  C2PCH2_bit at CM2PCH.B2;

sfr unsigned short volatile RC2REG           absolute 0xA19;
sfr unsigned short volatile RCREG2           absolute 0xA19;
sfr unsigned short volatile TX2REG           absolute 0xA1A;
sfr unsigned short volatile TXREG2           absolute 0xA1A;
sfr unsigned int   volatile SP2BRG           absolute 0xA1B;
sfr unsigned short volatile SP2BRGL          absolute 0xA1B;
sfr unsigned int            SPBRG2           absolute 0xA1B;
sfr unsigned short volatile SP2BRGH          absolute 0xA1C;
sfr unsigned short          SPBRGH2          absolute 0xA1C;
sfr unsigned short volatile RC2STA           absolute 0xA1D;
sfr unsigned short volatile RCSTA2           absolute 0xA1D;
sfr unsigned short volatile TX2STA           absolute 0xA1E;
sfr unsigned short volatile TXSTA2           absolute 0xA1E;
sfr unsigned short volatile BAUD2CON         absolute 0xA1F;
sfr unsigned short          BAUDCON2         absolute 0xA1F;
sfr unsigned short volatile CLCDATA          absolute 0x1E0F;
    const register unsigned short int MLC1OUT = 0;
    sbit  MLC1OUT_bit at CLCDATA.B0;
    const register unsigned short int MLC2OUT = 1;
    sbit  MLC2OUT_bit at CLCDATA.B1;
    const register unsigned short int MLC3OUT = 2;
    sbit  MLC3OUT_bit at CLCDATA.B2;
    const register unsigned short int MLC4OUT = 3;
    sbit  MLC4OUT_bit at CLCDATA.B3;

sfr unsigned short volatile CLC1CON          absolute 0x1E10;
    const register unsigned short int LC1MODE0 = 0;
    sbit  LC1MODE0_bit at CLC1CON.B0;
    const register unsigned short int LC1MODE1 = 1;
    sbit  LC1MODE1_bit at CLC1CON.B1;
    const register unsigned short int LC1MODE2 = 2;
    sbit  LC1MODE2_bit at CLC1CON.B2;
    const register unsigned short int LC1INTN = 3;
    sbit  LC1INTN_bit at CLC1CON.B3;
    const register unsigned short int LC1INTP = 4;
    sbit  LC1INTP_bit at CLC1CON.B4;
    const register unsigned short int LC1OUT = 5;
    sbit  LC1OUT_bit at CLC1CON.B5;
    const register unsigned short int LC1EN = 7;
    sbit  LC1EN_bit at CLC1CON.B7;

sfr unsigned short volatile CLC1POL          absolute 0x1E11;
    const register unsigned short int LC1G1POL = 0;
    sbit  LC1G1POL_bit at CLC1POL.B0;
    const register unsigned short int LC1G2POL = 1;
    sbit  LC1G2POL_bit at CLC1POL.B1;
    const register unsigned short int LC1G3POL = 2;
    sbit  LC1G3POL_bit at CLC1POL.B2;
    const register unsigned short int LC1G4POL = 3;
    sbit  LC1G4POL_bit at CLC1POL.B3;
    const register unsigned short int LC1POL = 7;
    sbit  LC1POL_bit at CLC1POL.B7;

sfr unsigned short volatile CLC1SEL0         absolute 0x1E12;
    const register unsigned short int LC1D1S0 = 0;
    sbit  LC1D1S0_bit at CLC1SEL0.B0;
    const register unsigned short int LC1D1S1 = 1;
    sbit  LC1D1S1_bit at CLC1SEL0.B1;
    const register unsigned short int LC1D1S2 = 2;
    sbit  LC1D1S2_bit at CLC1SEL0.B2;
    const register unsigned short int LC1D1S3 = 3;
    sbit  LC1D1S3_bit at CLC1SEL0.B3;
    const register unsigned short int LC1D1S4 = 4;
    sbit  LC1D1S4_bit at CLC1SEL0.B4;
    const register unsigned short int LC1D1S5 = 5;
    sbit  LC1D1S5_bit at CLC1SEL0.B5;

sfr unsigned short volatile CLC1SEL1         absolute 0x1E13;
    const register unsigned short int LC1D2S0 = 0;
    sbit  LC1D2S0_bit at CLC1SEL1.B0;
    const register unsigned short int LC1D2S1 = 1;
    sbit  LC1D2S1_bit at CLC1SEL1.B1;
    const register unsigned short int LC1D2S2 = 2;
    sbit  LC1D2S2_bit at CLC1SEL1.B2;
    const register unsigned short int LC1D2S3 = 3;
    sbit  LC1D2S3_bit at CLC1SEL1.B3;
    const register unsigned short int LC1D2S4 = 4;
    sbit  LC1D2S4_bit at CLC1SEL1.B4;
    const register unsigned short int LC1D2S5 = 5;
    sbit  LC1D2S5_bit at CLC1SEL1.B5;

sfr unsigned short volatile CLC1SEL2         absolute 0x1E14;
    const register unsigned short int LC1D3S0 = 0;
    sbit  LC1D3S0_bit at CLC1SEL2.B0;
    const register unsigned short int LC1D3S1 = 1;
    sbit  LC1D3S1_bit at CLC1SEL2.B1;
    const register unsigned short int LC1D3S2 = 2;
    sbit  LC1D3S2_bit at CLC1SEL2.B2;
    const register unsigned short int LC1D3S3 = 3;
    sbit  LC1D3S3_bit at CLC1SEL2.B3;
    const register unsigned short int LC1D3S4 = 4;
    sbit  LC1D3S4_bit at CLC1SEL2.B4;
    const register unsigned short int LC1D3S5 = 5;
    sbit  LC1D3S5_bit at CLC1SEL2.B5;

sfr unsigned short volatile CLC1SEL3         absolute 0x1E15;
    const register unsigned short int LC1D4S0 = 0;
    sbit  LC1D4S0_bit at CLC1SEL3.B0;
    const register unsigned short int LC1D4S1 = 1;
    sbit  LC1D4S1_bit at CLC1SEL3.B1;
    const register unsigned short int LC1D4S2 = 2;
    sbit  LC1D4S2_bit at CLC1SEL3.B2;
    const register unsigned short int LC1D4S3 = 3;
    sbit  LC1D4S3_bit at CLC1SEL3.B3;
    const register unsigned short int LC1D4S4 = 4;
    sbit  LC1D4S4_bit at CLC1SEL3.B4;
    const register unsigned short int LC1D4S5 = 5;
    sbit  LC1D4S5_bit at CLC1SEL3.B5;

sfr unsigned short volatile CLC1GLS0         absolute 0x1E16;
    const register unsigned short int LC1G1D1N = 0;
    sbit  LC1G1D1N_bit at CLC1GLS0.B0;
    const register unsigned short int LC1G1D1T = 1;
    sbit  LC1G1D1T_bit at CLC1GLS0.B1;
    const register unsigned short int LC1G1D2N = 2;
    sbit  LC1G1D2N_bit at CLC1GLS0.B2;
    const register unsigned short int LC1G1D2T = 3;
    sbit  LC1G1D2T_bit at CLC1GLS0.B3;
    const register unsigned short int LC1G1D3N = 4;
    sbit  LC1G1D3N_bit at CLC1GLS0.B4;
    const register unsigned short int LC1G1D3T = 5;
    sbit  LC1G1D3T_bit at CLC1GLS0.B5;
    const register unsigned short int LC1G1D4N = 6;
    sbit  LC1G1D4N_bit at CLC1GLS0.B6;
    const register unsigned short int LC1G1D4T = 7;
    sbit  LC1G1D4T_bit at CLC1GLS0.B7;

sfr unsigned short volatile CLC1GLS1         absolute 0x1E17;
    const register unsigned short int LC1G2D1N = 0;
    sbit  LC1G2D1N_bit at CLC1GLS1.B0;
    const register unsigned short int LC1G2D1T = 1;
    sbit  LC1G2D1T_bit at CLC1GLS1.B1;
    const register unsigned short int LC1G2D2N = 2;
    sbit  LC1G2D2N_bit at CLC1GLS1.B2;
    const register unsigned short int LC1G2D2T = 3;
    sbit  LC1G2D2T_bit at CLC1GLS1.B3;
    const register unsigned short int LC1G2D3N = 4;
    sbit  LC1G2D3N_bit at CLC1GLS1.B4;
    const register unsigned short int LC1G2D3T = 5;
    sbit  LC1G2D3T_bit at CLC1GLS1.B5;
    const register unsigned short int LC1G2D4N = 6;
    sbit  LC1G2D4N_bit at CLC1GLS1.B6;
    const register unsigned short int LC1G2D4T = 7;
    sbit  LC1G2D4T_bit at CLC1GLS1.B7;

sfr unsigned short volatile CLC1GLS2         absolute 0x1E18;
    const register unsigned short int LC1G3D1N = 0;
    sbit  LC1G3D1N_bit at CLC1GLS2.B0;
    const register unsigned short int LC1G3D1T = 1;
    sbit  LC1G3D1T_bit at CLC1GLS2.B1;
    const register unsigned short int LC1G3D2N = 2;
    sbit  LC1G3D2N_bit at CLC1GLS2.B2;
    const register unsigned short int LC1G3D2T = 3;
    sbit  LC1G3D2T_bit at CLC1GLS2.B3;
    const register unsigned short int LC1G3D3N = 4;
    sbit  LC1G3D3N_bit at CLC1GLS2.B4;
    const register unsigned short int LC1G3D3T = 5;
    sbit  LC1G3D3T_bit at CLC1GLS2.B5;
    const register unsigned short int LC1G3D4N = 6;
    sbit  LC1G3D4N_bit at CLC1GLS2.B6;
    const register unsigned short int LC1G3D4T = 7;
    sbit  LC1G3D4T_bit at CLC1GLS2.B7;

sfr unsigned short volatile CLC1GLS3         absolute 0x1E19;
    const register unsigned short int LC1G4D1N = 0;
    sbit  LC1G4D1N_bit at CLC1GLS3.B0;
    const register unsigned short int LC1G4D1T = 1;
    sbit  LC1G4D1T_bit at CLC1GLS3.B1;
    const register unsigned short int LC1G4D2N = 2;
    sbit  LC1G4D2N_bit at CLC1GLS3.B2;
    const register unsigned short int LC1G4D2T = 3;
    sbit  LC1G4D2T_bit at CLC1GLS3.B3;
    const register unsigned short int LC1G4D3N = 4;
    sbit  LC1G4D3N_bit at CLC1GLS3.B4;
    const register unsigned short int LC1G4D3T = 5;
    sbit  LC1G4D3T_bit at CLC1GLS3.B5;
    const register unsigned short int LC1G4D4N = 6;
    sbit  LC1G4D4N_bit at CLC1GLS3.B6;
    const register unsigned short int LC1G4D4T = 7;
    sbit  LC1G4D4T_bit at CLC1GLS3.B7;

sfr unsigned short volatile CLC2CON          absolute 0x1E1A;
    const register unsigned short int LC2MODE0 = 0;
    sbit  LC2MODE0_bit at CLC2CON.B0;
    const register unsigned short int LC2MODE1 = 1;
    sbit  LC2MODE1_bit at CLC2CON.B1;
    const register unsigned short int LC2MODE2 = 2;
    sbit  LC2MODE2_bit at CLC2CON.B2;
    const register unsigned short int LC2INTN = 3;
    sbit  LC2INTN_bit at CLC2CON.B3;
    const register unsigned short int LC2INTP = 4;
    sbit  LC2INTP_bit at CLC2CON.B4;
    const register unsigned short int LC2OUT = 5;
    sbit  LC2OUT_bit at CLC2CON.B5;
    const register unsigned short int LC2EN = 7;
    sbit  LC2EN_bit at CLC2CON.B7;

sfr unsigned short volatile CLC2POL          absolute 0x1E1B;
    const register unsigned short int LC2G1POL = 0;
    sbit  LC2G1POL_bit at CLC2POL.B0;
    const register unsigned short int LC2G2POL = 1;
    sbit  LC2G2POL_bit at CLC2POL.B1;
    const register unsigned short int LC2G3POL = 2;
    sbit  LC2G3POL_bit at CLC2POL.B2;
    const register unsigned short int LC2G4POL = 3;
    sbit  LC2G4POL_bit at CLC2POL.B3;
    const register unsigned short int LC2POL = 7;
    sbit  LC2POL_bit at CLC2POL.B7;

sfr unsigned short volatile CLC2SEL0         absolute 0x1E1C;
    const register unsigned short int LC2D1S0 = 0;
    sbit  LC2D1S0_bit at CLC2SEL0.B0;
    const register unsigned short int LC2D1S1 = 1;
    sbit  LC2D1S1_bit at CLC2SEL0.B1;
    const register unsigned short int LC2D1S2 = 2;
    sbit  LC2D1S2_bit at CLC2SEL0.B2;
    const register unsigned short int LC2D1S3 = 3;
    sbit  LC2D1S3_bit at CLC2SEL0.B3;
    const register unsigned short int LC2D1S4 = 4;
    sbit  LC2D1S4_bit at CLC2SEL0.B4;
    const register unsigned short int LC2D1S5 = 5;
    sbit  LC2D1S5_bit at CLC2SEL0.B5;

sfr unsigned short volatile CLC2SEL1         absolute 0x1E1D;
    const register unsigned short int LC2D2S0 = 0;
    sbit  LC2D2S0_bit at CLC2SEL1.B0;
    const register unsigned short int LC2D2S1 = 1;
    sbit  LC2D2S1_bit at CLC2SEL1.B1;
    const register unsigned short int LC2D2S2 = 2;
    sbit  LC2D2S2_bit at CLC2SEL1.B2;
    const register unsigned short int LC2D2S3 = 3;
    sbit  LC2D2S3_bit at CLC2SEL1.B3;
    const register unsigned short int LC2D2S4 = 4;
    sbit  LC2D2S4_bit at CLC2SEL1.B4;
    const register unsigned short int LC2D2S5 = 5;
    sbit  LC2D2S5_bit at CLC2SEL1.B5;

sfr unsigned short volatile CLC2SEL2         absolute 0x1E1E;
    const register unsigned short int LC2D3S0 = 0;
    sbit  LC2D3S0_bit at CLC2SEL2.B0;
    const register unsigned short int LC2D3S1 = 1;
    sbit  LC2D3S1_bit at CLC2SEL2.B1;
    const register unsigned short int LC2D3S2 = 2;
    sbit  LC2D3S2_bit at CLC2SEL2.B2;
    const register unsigned short int LC2D3S3 = 3;
    sbit  LC2D3S3_bit at CLC2SEL2.B3;
    const register unsigned short int LC2D3S4 = 4;
    sbit  LC2D3S4_bit at CLC2SEL2.B4;
    const register unsigned short int LC2D3S5 = 5;
    sbit  LC2D3S5_bit at CLC2SEL2.B5;

sfr unsigned short volatile CLC2SEL3         absolute 0x1E1F;
    const register unsigned short int LC2D4S0 = 0;
    sbit  LC2D4S0_bit at CLC2SEL3.B0;
    const register unsigned short int LC2D4S1 = 1;
    sbit  LC2D4S1_bit at CLC2SEL3.B1;
    const register unsigned short int LC2D4S2 = 2;
    sbit  LC2D4S2_bit at CLC2SEL3.B2;
    const register unsigned short int LC2D4S3 = 3;
    sbit  LC2D4S3_bit at CLC2SEL3.B3;
    const register unsigned short int LC2D4S4 = 4;
    sbit  LC2D4S4_bit at CLC2SEL3.B4;
    const register unsigned short int LC2D4S5 = 5;
    sbit  LC2D4S5_bit at CLC2SEL3.B5;

sfr unsigned short volatile CLC2GLS0         absolute 0x1E20;
    const register unsigned short int LC2G1D1N = 0;
    sbit  LC2G1D1N_bit at CLC2GLS0.B0;
    const register unsigned short int LC2G1D1T = 1;
    sbit  LC2G1D1T_bit at CLC2GLS0.B1;
    const register unsigned short int LC2G1D2N = 2;
    sbit  LC2G1D2N_bit at CLC2GLS0.B2;
    const register unsigned short int LC2G1D2T = 3;
    sbit  LC2G1D2T_bit at CLC2GLS0.B3;
    const register unsigned short int LC2G1D3N = 4;
    sbit  LC2G1D3N_bit at CLC2GLS0.B4;
    const register unsigned short int LC2G1D3T = 5;
    sbit  LC2G1D3T_bit at CLC2GLS0.B5;
    const register unsigned short int LC2G1D4N = 6;
    sbit  LC2G1D4N_bit at CLC2GLS0.B6;
    const register unsigned short int LC2G1D4T = 7;
    sbit  LC2G1D4T_bit at CLC2GLS0.B7;

sfr unsigned short volatile CLC2GLS1         absolute 0x1E21;
    const register unsigned short int LC2G2D1N = 0;
    sbit  LC2G2D1N_bit at CLC2GLS1.B0;
    const register unsigned short int LC2G2D1T = 1;
    sbit  LC2G2D1T_bit at CLC2GLS1.B1;
    const register unsigned short int LC2G2D2N = 2;
    sbit  LC2G2D2N_bit at CLC2GLS1.B2;
    const register unsigned short int LC2G2D2T = 3;
    sbit  LC2G2D2T_bit at CLC2GLS1.B3;
    const register unsigned short int LC2G2D3N = 4;
    sbit  LC2G2D3N_bit at CLC2GLS1.B4;
    const register unsigned short int LC2G2D3T = 5;
    sbit  LC2G2D3T_bit at CLC2GLS1.B5;
    const register unsigned short int LC2G2D4N = 6;
    sbit  LC2G2D4N_bit at CLC2GLS1.B6;
    const register unsigned short int LC2G2D4T = 7;
    sbit  LC2G2D4T_bit at CLC2GLS1.B7;

sfr unsigned short volatile CLC2GLS2         absolute 0x1E22;
    const register unsigned short int LC2G3D1N = 0;
    sbit  LC2G3D1N_bit at CLC2GLS2.B0;
    const register unsigned short int LC2G3D1T = 1;
    sbit  LC2G3D1T_bit at CLC2GLS2.B1;
    const register unsigned short int LC2G3D2N = 2;
    sbit  LC2G3D2N_bit at CLC2GLS2.B2;
    const register unsigned short int LC2G3D2T = 3;
    sbit  LC2G3D2T_bit at CLC2GLS2.B3;
    const register unsigned short int LC2G3D3N = 4;
    sbit  LC2G3D3N_bit at CLC2GLS2.B4;
    const register unsigned short int LC2G3D3T = 5;
    sbit  LC2G3D3T_bit at CLC2GLS2.B5;
    const register unsigned short int LC2G3D4N = 6;
    sbit  LC2G3D4N_bit at CLC2GLS2.B6;
    const register unsigned short int LC2G3D4T = 7;
    sbit  LC2G3D4T_bit at CLC2GLS2.B7;

sfr unsigned short volatile CLC2GLS3         absolute 0x1E23;
    const register unsigned short int LC2G4D1N = 0;
    sbit  LC2G4D1N_bit at CLC2GLS3.B0;
    const register unsigned short int LC2G4D1T = 1;
    sbit  LC2G4D1T_bit at CLC2GLS3.B1;
    const register unsigned short int LC2G4D2N = 2;
    sbit  LC2G4D2N_bit at CLC2GLS3.B2;
    const register unsigned short int LC2G4D2T = 3;
    sbit  LC2G4D2T_bit at CLC2GLS3.B3;
    const register unsigned short int LC2G4D3N = 4;
    sbit  LC2G4D3N_bit at CLC2GLS3.B4;
    const register unsigned short int LC2G4D3T = 5;
    sbit  LC2G4D3T_bit at CLC2GLS3.B5;
    const register unsigned short int LC2G4D4N = 6;
    sbit  LC2G4D4N_bit at CLC2GLS3.B6;
    const register unsigned short int LC2G4D4T = 7;
    sbit  LC2G4D4T_bit at CLC2GLS3.B7;

sfr unsigned short volatile CLC3CON          absolute 0x1E24;
    const register unsigned short int LC3MODE0 = 0;
    sbit  LC3MODE0_bit at CLC3CON.B0;
    const register unsigned short int LC3MODE1 = 1;
    sbit  LC3MODE1_bit at CLC3CON.B1;
    const register unsigned short int LC3MODE2 = 2;
    sbit  LC3MODE2_bit at CLC3CON.B2;
    const register unsigned short int LC3INTN = 3;
    sbit  LC3INTN_bit at CLC3CON.B3;
    const register unsigned short int LC3INTP = 4;
    sbit  LC3INTP_bit at CLC3CON.B4;
    const register unsigned short int LC3OUT = 5;
    sbit  LC3OUT_bit at CLC3CON.B5;
    const register unsigned short int LC3EN = 7;
    sbit  LC3EN_bit at CLC3CON.B7;

sfr unsigned short volatile CLC3POL          absolute 0x1E25;
    const register unsigned short int LC3G1POL = 0;
    sbit  LC3G1POL_bit at CLC3POL.B0;
    const register unsigned short int LC3G2POL = 1;
    sbit  LC3G2POL_bit at CLC3POL.B1;
    const register unsigned short int LC3G3POL = 2;
    sbit  LC3G3POL_bit at CLC3POL.B2;
    const register unsigned short int LC3G4POL = 3;
    sbit  LC3G4POL_bit at CLC3POL.B3;
    const register unsigned short int LC3POL = 7;
    sbit  LC3POL_bit at CLC3POL.B7;

sfr unsigned short volatile CLC3SEL0         absolute 0x1E26;
    const register unsigned short int LC3D1S0 = 0;
    sbit  LC3D1S0_bit at CLC3SEL0.B0;
    const register unsigned short int LC3D1S1 = 1;
    sbit  LC3D1S1_bit at CLC3SEL0.B1;
    const register unsigned short int LC3D1S2 = 2;
    sbit  LC3D1S2_bit at CLC3SEL0.B2;
    const register unsigned short int LC3D1S3 = 3;
    sbit  LC3D1S3_bit at CLC3SEL0.B3;
    const register unsigned short int LC3D1S4 = 4;
    sbit  LC3D1S4_bit at CLC3SEL0.B4;
    const register unsigned short int LC3D1S5 = 5;
    sbit  LC3D1S5_bit at CLC3SEL0.B5;

sfr unsigned short volatile CLC3SEL1         absolute 0x1E27;
    const register unsigned short int LC3D2S0 = 0;
    sbit  LC3D2S0_bit at CLC3SEL1.B0;
    const register unsigned short int LC3D2S1 = 1;
    sbit  LC3D2S1_bit at CLC3SEL1.B1;
    const register unsigned short int LC3D2S2 = 2;
    sbit  LC3D2S2_bit at CLC3SEL1.B2;
    const register unsigned short int LC3D2S3 = 3;
    sbit  LC3D2S3_bit at CLC3SEL1.B3;
    const register unsigned short int LC3D2S4 = 4;
    sbit  LC3D2S4_bit at CLC3SEL1.B4;
    const register unsigned short int LC3D2S5 = 5;
    sbit  LC3D2S5_bit at CLC3SEL1.B5;

sfr unsigned short volatile CLC3SEL2         absolute 0x1E28;
    const register unsigned short int LC3D3S0 = 0;
    sbit  LC3D3S0_bit at CLC3SEL2.B0;
    const register unsigned short int LC3D3S1 = 1;
    sbit  LC3D3S1_bit at CLC3SEL2.B1;
    const register unsigned short int LC3D3S2 = 2;
    sbit  LC3D3S2_bit at CLC3SEL2.B2;
    const register unsigned short int LC3D3S3 = 3;
    sbit  LC3D3S3_bit at CLC3SEL2.B3;
    const register unsigned short int LC3D3S4 = 4;
    sbit  LC3D3S4_bit at CLC3SEL2.B4;
    const register unsigned short int LC3D3S5 = 5;
    sbit  LC3D3S5_bit at CLC3SEL2.B5;

sfr unsigned short volatile CLC3SEL3         absolute 0x1E29;
    const register unsigned short int LC3D4S0 = 0;
    sbit  LC3D4S0_bit at CLC3SEL3.B0;
    const register unsigned short int LC3D4S1 = 1;
    sbit  LC3D4S1_bit at CLC3SEL3.B1;
    const register unsigned short int LC3D4S2 = 2;
    sbit  LC3D4S2_bit at CLC3SEL3.B2;
    const register unsigned short int LC3D4S3 = 3;
    sbit  LC3D4S3_bit at CLC3SEL3.B3;
    const register unsigned short int LC3D4S4 = 4;
    sbit  LC3D4S4_bit at CLC3SEL3.B4;
    const register unsigned short int LC3D4S5 = 5;
    sbit  LC3D4S5_bit at CLC3SEL3.B5;

sfr unsigned short volatile CLC3GLS0         absolute 0x1E2A;
    const register unsigned short int LC3G1D1N = 0;
    sbit  LC3G1D1N_bit at CLC3GLS0.B0;
    const register unsigned short int LC3G1D1T = 1;
    sbit  LC3G1D1T_bit at CLC3GLS0.B1;
    const register unsigned short int LC3G1D2N = 2;
    sbit  LC3G1D2N_bit at CLC3GLS0.B2;
    const register unsigned short int LC3G1D2T = 3;
    sbit  LC3G1D2T_bit at CLC3GLS0.B3;
    const register unsigned short int LC3G1D3N = 4;
    sbit  LC3G1D3N_bit at CLC3GLS0.B4;
    const register unsigned short int LC3G1D3T = 5;
    sbit  LC3G1D3T_bit at CLC3GLS0.B5;
    const register unsigned short int LC3G1D4N = 6;
    sbit  LC3G1D4N_bit at CLC3GLS0.B6;
    const register unsigned short int LC3G1D4T = 7;
    sbit  LC3G1D4T_bit at CLC3GLS0.B7;

sfr unsigned short volatile CLC3GLS1         absolute 0x1E2B;
    const register unsigned short int LC3G2D1N = 0;
    sbit  LC3G2D1N_bit at CLC3GLS1.B0;
    const register unsigned short int LC3G2D1T = 1;
    sbit  LC3G2D1T_bit at CLC3GLS1.B1;
    const register unsigned short int LC3G2D2N = 2;
    sbit  LC3G2D2N_bit at CLC3GLS1.B2;
    const register unsigned short int LC3G2D2T = 3;
    sbit  LC3G2D2T_bit at CLC3GLS1.B3;
    const register unsigned short int LC3G2D3N = 4;
    sbit  LC3G2D3N_bit at CLC3GLS1.B4;
    const register unsigned short int LC3G2D3T = 5;
    sbit  LC3G2D3T_bit at CLC3GLS1.B5;
    const register unsigned short int LC3G2D4N = 6;
    sbit  LC3G2D4N_bit at CLC3GLS1.B6;
    const register unsigned short int LC3G2D4T = 7;
    sbit  LC3G2D4T_bit at CLC3GLS1.B7;

sfr unsigned short volatile CLC3GLS2         absolute 0x1E2C;
    const register unsigned short int LC3G3D1N = 0;
    sbit  LC3G3D1N_bit at CLC3GLS2.B0;
    const register unsigned short int LC3G3D1T = 1;
    sbit  LC3G3D1T_bit at CLC3GLS2.B1;
    const register unsigned short int LC3G3D2N = 2;
    sbit  LC3G3D2N_bit at CLC3GLS2.B2;
    const register unsigned short int LC3G3D2T = 3;
    sbit  LC3G3D2T_bit at CLC3GLS2.B3;
    const register unsigned short int LC3G3D3N = 4;
    sbit  LC3G3D3N_bit at CLC3GLS2.B4;
    const register unsigned short int LC3G3D3T = 5;
    sbit  LC3G3D3T_bit at CLC3GLS2.B5;
    const register unsigned short int LC3G3D4N = 6;
    sbit  LC3G3D4N_bit at CLC3GLS2.B6;
    const register unsigned short int LC3G3D4T = 7;
    sbit  LC3G3D4T_bit at CLC3GLS2.B7;

sfr unsigned short volatile CLC3GLS3         absolute 0x1E2D;
    const register unsigned short int LC3G4D1N = 0;
    sbit  LC3G4D1N_bit at CLC3GLS3.B0;
    const register unsigned short int LC3G4D1T = 1;
    sbit  LC3G4D1T_bit at CLC3GLS3.B1;
    const register unsigned short int LC3G4D2N = 2;
    sbit  LC3G4D2N_bit at CLC3GLS3.B2;
    const register unsigned short int LC3G4D2T = 3;
    sbit  LC3G4D2T_bit at CLC3GLS3.B3;
    const register unsigned short int LC3G4D3N = 4;
    sbit  LC3G4D3N_bit at CLC3GLS3.B4;
    const register unsigned short int LC3G4D3T = 5;
    sbit  LC3G4D3T_bit at CLC3GLS3.B5;
    const register unsigned short int LC3G4D4N = 6;
    sbit  LC3G4D4N_bit at CLC3GLS3.B6;
    const register unsigned short int LC3G4D4T = 7;
    sbit  LC3G4D4T_bit at CLC3GLS3.B7;

sfr unsigned short volatile CLC4CON          absolute 0x1E2E;
    const register unsigned short int LC4MODE0 = 0;
    sbit  LC4MODE0_bit at CLC4CON.B0;
    const register unsigned short int LC4MODE1 = 1;
    sbit  LC4MODE1_bit at CLC4CON.B1;
    const register unsigned short int LC4MODE2 = 2;
    sbit  LC4MODE2_bit at CLC4CON.B2;
    const register unsigned short int LC4INTN = 3;
    sbit  LC4INTN_bit at CLC4CON.B3;
    const register unsigned short int LC4INTP = 4;
    sbit  LC4INTP_bit at CLC4CON.B4;
    const register unsigned short int LC4OUT = 5;
    sbit  LC4OUT_bit at CLC4CON.B5;
    const register unsigned short int LC4EN = 7;
    sbit  LC4EN_bit at CLC4CON.B7;

sfr unsigned short volatile CLC4POL          absolute 0x1E2F;
    const register unsigned short int LC4G1POL = 0;
    sbit  LC4G1POL_bit at CLC4POL.B0;
    const register unsigned short int LC4G2POL = 1;
    sbit  LC4G2POL_bit at CLC4POL.B1;
    const register unsigned short int LC4G3POL = 2;
    sbit  LC4G3POL_bit at CLC4POL.B2;
    const register unsigned short int LC4G4POL = 3;
    sbit  LC4G4POL_bit at CLC4POL.B3;
    const register unsigned short int LC4POL = 7;
    sbit  LC4POL_bit at CLC4POL.B7;

sfr unsigned short volatile CLC4SEL0         absolute 0x1E30;
    const register unsigned short int LC4D1S0 = 0;
    sbit  LC4D1S0_bit at CLC4SEL0.B0;
    const register unsigned short int LC4D1S1 = 1;
    sbit  LC4D1S1_bit at CLC4SEL0.B1;
    const register unsigned short int LC4D1S2 = 2;
    sbit  LC4D1S2_bit at CLC4SEL0.B2;
    const register unsigned short int LC4D1S3 = 3;
    sbit  LC4D1S3_bit at CLC4SEL0.B3;
    const register unsigned short int LC4D1S4 = 4;
    sbit  LC4D1S4_bit at CLC4SEL0.B4;
    const register unsigned short int LC4D1S5 = 5;
    sbit  LC4D1S5_bit at CLC4SEL0.B5;

sfr unsigned short volatile CLC4SEL1         absolute 0x1E31;
    const register unsigned short int LC4D2S0 = 0;
    sbit  LC4D2S0_bit at CLC4SEL1.B0;
    const register unsigned short int LC4D2S1 = 1;
    sbit  LC4D2S1_bit at CLC4SEL1.B1;
    const register unsigned short int LC4D2S2 = 2;
    sbit  LC4D2S2_bit at CLC4SEL1.B2;
    const register unsigned short int LC4D2S3 = 3;
    sbit  LC4D2S3_bit at CLC4SEL1.B3;
    const register unsigned short int LC4D2S4 = 4;
    sbit  LC4D2S4_bit at CLC4SEL1.B4;
    const register unsigned short int LC4D2S5 = 5;
    sbit  LC4D2S5_bit at CLC4SEL1.B5;

sfr unsigned short volatile CLC4SEL2         absolute 0x1E32;
    const register unsigned short int LC4D3S0 = 0;
    sbit  LC4D3S0_bit at CLC4SEL2.B0;
    const register unsigned short int LC4D3S1 = 1;
    sbit  LC4D3S1_bit at CLC4SEL2.B1;
    const register unsigned short int LC4D3S2 = 2;
    sbit  LC4D3S2_bit at CLC4SEL2.B2;
    const register unsigned short int LC4D3S3 = 3;
    sbit  LC4D3S3_bit at CLC4SEL2.B3;
    const register unsigned short int LC4D3S4 = 4;
    sbit  LC4D3S4_bit at CLC4SEL2.B4;
    const register unsigned short int LC4D3S5 = 5;
    sbit  LC4D3S5_bit at CLC4SEL2.B5;

sfr unsigned short volatile CLC4SEL3         absolute 0x1E33;
    const register unsigned short int LC4D4S0 = 0;
    sbit  LC4D4S0_bit at CLC4SEL3.B0;
    const register unsigned short int LC4D4S1 = 1;
    sbit  LC4D4S1_bit at CLC4SEL3.B1;
    const register unsigned short int LC4D4S2 = 2;
    sbit  LC4D4S2_bit at CLC4SEL3.B2;
    const register unsigned short int LC4D4S3 = 3;
    sbit  LC4D4S3_bit at CLC4SEL3.B3;
    const register unsigned short int LC4D4S4 = 4;
    sbit  LC4D4S4_bit at CLC4SEL3.B4;
    const register unsigned short int LC4D4S5 = 5;
    sbit  LC4D4S5_bit at CLC4SEL3.B5;

sfr unsigned short volatile CLC4GLS0         absolute 0x1E34;
    const register unsigned short int LC4G1D1N = 0;
    sbit  LC4G1D1N_bit at CLC4GLS0.B0;
    const register unsigned short int LC4G1D1T = 1;
    sbit  LC4G1D1T_bit at CLC4GLS0.B1;
    const register unsigned short int LC4G1D2N = 2;
    sbit  LC4G1D2N_bit at CLC4GLS0.B2;
    const register unsigned short int LC4G1D2T = 3;
    sbit  LC4G1D2T_bit at CLC4GLS0.B3;
    const register unsigned short int LC4G1D3N = 4;
    sbit  LC4G1D3N_bit at CLC4GLS0.B4;
    const register unsigned short int LC4G1D3T = 5;
    sbit  LC4G1D3T_bit at CLC4GLS0.B5;
    const register unsigned short int LC4G1D4N = 6;
    sbit  LC4G1D4N_bit at CLC4GLS0.B6;
    const register unsigned short int LC4G1D4T = 7;
    sbit  LC4G1D4T_bit at CLC4GLS0.B7;

sfr unsigned short volatile CLC4GLS1         absolute 0x1E35;
    const register unsigned short int LC4G2D1N = 0;
    sbit  LC4G2D1N_bit at CLC4GLS1.B0;
    const register unsigned short int LC4G2D1T = 1;
    sbit  LC4G2D1T_bit at CLC4GLS1.B1;
    const register unsigned short int LC4G2D2N = 2;
    sbit  LC4G2D2N_bit at CLC4GLS1.B2;
    const register unsigned short int LC4G2D2T = 3;
    sbit  LC4G2D2T_bit at CLC4GLS1.B3;
    const register unsigned short int LC4G2D3N = 4;
    sbit  LC4G2D3N_bit at CLC4GLS1.B4;
    const register unsigned short int LC4G2D3T = 5;
    sbit  LC4G2D3T_bit at CLC4GLS1.B5;
    const register unsigned short int LC4G2D4N = 6;
    sbit  LC4G2D4N_bit at CLC4GLS1.B6;
    const register unsigned short int LC4G2D4T = 7;
    sbit  LC4G2D4T_bit at CLC4GLS1.B7;

sfr unsigned short volatile CLC4GLS2         absolute 0x1E36;
    const register unsigned short int LC4G3D1N = 0;
    sbit  LC4G3D1N_bit at CLC4GLS2.B0;
    const register unsigned short int LC4G3D1T = 1;
    sbit  LC4G3D1T_bit at CLC4GLS2.B1;
    const register unsigned short int LC4G3D2N = 2;
    sbit  LC4G3D2N_bit at CLC4GLS2.B2;
    const register unsigned short int LC4G3D2T = 3;
    sbit  LC4G3D2T_bit at CLC4GLS2.B3;
    const register unsigned short int LC4G3D3N = 4;
    sbit  LC4G3D3N_bit at CLC4GLS2.B4;
    const register unsigned short int LC4G3D3T = 5;
    sbit  LC4G3D3T_bit at CLC4GLS2.B5;
    const register unsigned short int LC4G3D4N = 6;
    sbit  LC4G3D4N_bit at CLC4GLS2.B6;
    const register unsigned short int LC4G3D4T = 7;
    sbit  LC4G3D4T_bit at CLC4GLS2.B7;

sfr unsigned short volatile CLC4GLS3         absolute 0x1E37;
    const register unsigned short int LC4G4D1N = 0;
    sbit  LC4G4D1N_bit at CLC4GLS3.B0;
    const register unsigned short int LC4G4D1T = 1;
    sbit  LC4G4D1T_bit at CLC4GLS3.B1;
    const register unsigned short int LC4G4D2N = 2;
    sbit  LC4G4D2N_bit at CLC4GLS3.B2;
    const register unsigned short int LC4G4D2T = 3;
    sbit  LC4G4D2T_bit at CLC4GLS3.B3;
    const register unsigned short int LC4G4D3N = 4;
    sbit  LC4G4D3N_bit at CLC4GLS3.B4;
    const register unsigned short int LC4G4D3T = 5;
    sbit  LC4G4D3T_bit at CLC4GLS3.B5;
    const register unsigned short int LC4G4D4N = 6;
    sbit  LC4G4D4N_bit at CLC4GLS3.B6;
    const register unsigned short int LC4G4D4T = 7;
    sbit  LC4G4D4T_bit at CLC4GLS3.B7;

sfr unsigned short volatile PPSLOCK          absolute 0x1E8F;
    const register unsigned short int PPSLOCKED = 0;
    sbit  PPSLOCKED_bit at PPSLOCK.B0;

sfr unsigned short volatile INTPPS           absolute 0x1E90;
    const register unsigned short int INTPPS0 = 0;
    sbit  INTPPS0_bit at INTPPS.B0;
    const register unsigned short int INTPPS1 = 1;
    sbit  INTPPS1_bit at INTPPS.B1;
    const register unsigned short int INTPPS2 = 2;
    sbit  INTPPS2_bit at INTPPS.B2;
    const register unsigned short int INTPPS3 = 3;
    sbit  INTPPS3_bit at INTPPS.B3;
    const register unsigned short int INTPPS4 = 4;
    sbit  INTPPS4_bit at INTPPS.B4;
    const register unsigned short int INTPPS5 = 5;
    sbit  INTPPS5_bit at INTPPS.B5;

sfr unsigned short volatile T0CKIPPS         absolute 0x1E91;
    const register unsigned short int T0CKIPPS0 = 0;
    sbit  T0CKIPPS0_bit at T0CKIPPS.B0;
    const register unsigned short int T0CKIPPS1 = 1;
    sbit  T0CKIPPS1_bit at T0CKIPPS.B1;
    const register unsigned short int T0CKIPPS2 = 2;
    sbit  T0CKIPPS2_bit at T0CKIPPS.B2;
    const register unsigned short int T0CKIPPS3 = 3;
    sbit  T0CKIPPS3_bit at T0CKIPPS.B3;
    const register unsigned short int T0CKIPPS4 = 4;
    sbit  T0CKIPPS4_bit at T0CKIPPS.B4;
    const register unsigned short int T0CKIPPS5 = 5;
    sbit  T0CKIPPS5_bit at T0CKIPPS.B5;

sfr unsigned short volatile T1CKIPPS         absolute 0x1E92;
    const register unsigned short int T1CKIPPS0 = 0;
    sbit  T1CKIPPS0_bit at T1CKIPPS.B0;
    const register unsigned short int T1CKIPPS1 = 1;
    sbit  T1CKIPPS1_bit at T1CKIPPS.B1;
    const register unsigned short int T1CKIPPS2 = 2;
    sbit  T1CKIPPS2_bit at T1CKIPPS.B2;
    const register unsigned short int T1CKIPPS3 = 3;
    sbit  T1CKIPPS3_bit at T1CKIPPS.B3;
    const register unsigned short int T1CKIPPS4 = 4;
    sbit  T1CKIPPS4_bit at T1CKIPPS.B4;
    const register unsigned short int T1CKIPPS5 = 5;
    sbit  T1CKIPPS5_bit at T1CKIPPS.B5;

sfr unsigned short volatile T1GPPS           absolute 0x1E93;
    const register unsigned short int T1GPPS0 = 0;
    sbit  T1GPPS0_bit at T1GPPS.B0;
    const register unsigned short int T1GPPS1 = 1;
    sbit  T1GPPS1_bit at T1GPPS.B1;
    const register unsigned short int T1GPPS2 = 2;
    sbit  T1GPPS2_bit at T1GPPS.B2;
    const register unsigned short int T1GPPS3 = 3;
    sbit  T1GPPS3_bit at T1GPPS.B3;
    const register unsigned short int T1GPPS4 = 4;
    sbit  T1GPPS4_bit at T1GPPS.B4;
    const register unsigned short int T1GPPS5 = 5;
    sbit  T1GPPS5_bit at T1GPPS.B5;

sfr unsigned short volatile T2INPPS          absolute 0x1E9C;
    const register unsigned short int T2INPPS0 = 0;
    sbit  T2INPPS0_bit at T2INPPS.B0;
    const register unsigned short int T2INPPS1 = 1;
    sbit  T2INPPS1_bit at T2INPPS.B1;
    const register unsigned short int T2INPPS2 = 2;
    sbit  T2INPPS2_bit at T2INPPS.B2;
    const register unsigned short int T2INPPS3 = 3;
    sbit  T2INPPS3_bit at T2INPPS.B3;
    const register unsigned short int T2INPPS4 = 4;
    sbit  T2INPPS4_bit at T2INPPS.B4;
    const register unsigned short int T2INPPS5 = 5;
    sbit  T2INPPS5_bit at T2INPPS.B5;

sfr unsigned short volatile CCP1PPS          absolute 0x1EA1;
    const register unsigned short int CCP1PPS0 = 0;
    sbit  CCP1PPS0_bit at CCP1PPS.B0;
    const register unsigned short int CCP1PPS1 = 1;
    sbit  CCP1PPS1_bit at CCP1PPS.B1;
    const register unsigned short int CCP1PPS2 = 2;
    sbit  CCP1PPS2_bit at CCP1PPS.B2;
    const register unsigned short int CCP1PPS3 = 3;
    sbit  CCP1PPS3_bit at CCP1PPS.B3;
    const register unsigned short int CCP1PPS4 = 4;
    sbit  CCP1PPS4_bit at CCP1PPS.B4;
    const register unsigned short int CCP1PPS5 = 5;
    sbit  CCP1PPS5_bit at CCP1PPS.B5;

sfr unsigned short volatile CCP2PPS          absolute 0x1EA2;
    const register unsigned short int CCP2PPS0 = 0;
    sbit  CCP2PPS0_bit at CCP2PPS.B0;
    const register unsigned short int CCP2PPS1 = 1;
    sbit  CCP2PPS1_bit at CCP2PPS.B1;
    const register unsigned short int CCP2PPS2 = 2;
    sbit  CCP2PPS2_bit at CCP2PPS.B2;
    const register unsigned short int CCP2PPS3 = 3;
    sbit  CCP2PPS3_bit at CCP2PPS.B3;
    const register unsigned short int CCP2PPS4 = 4;
    sbit  CCP2PPS4_bit at CCP2PPS.B4;
    const register unsigned short int CCP2PPS5 = 5;
    sbit  CCP2PPS5_bit at CCP2PPS.B5;

sfr unsigned short volatile CWG1PPS          absolute 0x1EB1;
    const register unsigned short int CWG1PPS0 = 0;
    sbit  CWG1PPS0_bit at CWG1PPS.B0;
    const register unsigned short int CWG1PPS1 = 1;
    sbit  CWG1PPS1_bit at CWG1PPS.B1;
    const register unsigned short int CWG1PPS2 = 2;
    sbit  CWG1PPS2_bit at CWG1PPS.B2;
    const register unsigned short int CWG1PPS3 = 3;
    sbit  CWG1PPS3_bit at CWG1PPS.B3;
    const register unsigned short int CWG1PPS4 = 4;
    sbit  CWG1PPS4_bit at CWG1PPS.B4;
    const register unsigned short int CWG1PPS5 = 5;
    sbit  CWG1PPS5_bit at CWG1PPS.B5;

sfr unsigned short volatile CLCIN0PPS        absolute 0x1EBB;
    const register unsigned short int CLCIN0PPS0 = 0;
    sbit  CLCIN0PPS0_bit at CLCIN0PPS.B0;
    const register unsigned short int CLCIN0PPS1 = 1;
    sbit  CLCIN0PPS1_bit at CLCIN0PPS.B1;
    const register unsigned short int CLCIN0PPS2 = 2;
    sbit  CLCIN0PPS2_bit at CLCIN0PPS.B2;
    const register unsigned short int CLCIN0PPS3 = 3;
    sbit  CLCIN0PPS3_bit at CLCIN0PPS.B3;
    const register unsigned short int CLCIN0PPS4 = 4;
    sbit  CLCIN0PPS4_bit at CLCIN0PPS.B4;
    const register unsigned short int CLCIN0PPS5 = 5;
    sbit  CLCIN0PPS5_bit at CLCIN0PPS.B5;

sfr unsigned short volatile CLCIN1PPS        absolute 0x1EBC;
    const register unsigned short int CLCIN1PPS0 = 0;
    sbit  CLCIN1PPS0_bit at CLCIN1PPS.B0;
    const register unsigned short int CLCIN1PPS1 = 1;
    sbit  CLCIN1PPS1_bit at CLCIN1PPS.B1;
    const register unsigned short int CLCIN1PPS2 = 2;
    sbit  CLCIN1PPS2_bit at CLCIN1PPS.B2;
    const register unsigned short int CLCIN1PPS3 = 3;
    sbit  CLCIN1PPS3_bit at CLCIN1PPS.B3;
    const register unsigned short int CLCIN1PPS4 = 4;
    sbit  CLCIN1PPS4_bit at CLCIN1PPS.B4;
    const register unsigned short int CLCIN1PPS5 = 5;
    sbit  CLCIN1PPS5_bit at CLCIN1PPS.B5;

sfr unsigned short volatile CLCIN2PPS        absolute 0x1EBD;
    const register unsigned short int CLCIN2PPS0 = 0;
    sbit  CLCIN2PPS0_bit at CLCIN2PPS.B0;
    const register unsigned short int CLCIN2PPS1 = 1;
    sbit  CLCIN2PPS1_bit at CLCIN2PPS.B1;
    const register unsigned short int CLCIN2PPS2 = 2;
    sbit  CLCIN2PPS2_bit at CLCIN2PPS.B2;
    const register unsigned short int CLCIN2PPS3 = 3;
    sbit  CLCIN2PPS3_bit at CLCIN2PPS.B3;
    const register unsigned short int CLCIN2PPS4 = 4;
    sbit  CLCIN2PPS4_bit at CLCIN2PPS.B4;
    const register unsigned short int CLCIN2PPS5 = 5;
    sbit  CLCIN2PPS5_bit at CLCIN2PPS.B5;

sfr unsigned short volatile CLCIN3PPS        absolute 0x1EBE;
    const register unsigned short int CLCIN3PPS0 = 0;
    sbit  CLCIN3PPS0_bit at CLCIN3PPS.B0;
    const register unsigned short int CLCIN3PPS1 = 1;
    sbit  CLCIN3PPS1_bit at CLCIN3PPS.B1;
    const register unsigned short int CLCIN3PPS2 = 2;
    sbit  CLCIN3PPS2_bit at CLCIN3PPS.B2;
    const register unsigned short int CLCIN3PPS3 = 3;
    sbit  CLCIN3PPS3_bit at CLCIN3PPS.B3;
    const register unsigned short int CLCIN3PPS4 = 4;
    sbit  CLCIN3PPS4_bit at CLCIN3PPS.B4;
    const register unsigned short int CLCIN3PPS5 = 5;
    sbit  CLCIN3PPS5_bit at CLCIN3PPS.B5;

sfr unsigned short volatile ADACTPPS         absolute 0x1EC3;
    const register unsigned short int ADACTPPS0 = 0;
    sbit  ADACTPPS0_bit at ADACTPPS.B0;
    const register unsigned short int ADACTPPS1 = 1;
    sbit  ADACTPPS1_bit at ADACTPPS.B1;
    const register unsigned short int ADACTPPS2 = 2;
    sbit  ADACTPPS2_bit at ADACTPPS.B2;
    const register unsigned short int ADACTPPS3 = 3;
    sbit  ADACTPPS3_bit at ADACTPPS.B3;
    const register unsigned short int ADACTPPS4 = 4;
    sbit  ADACTPPS4_bit at ADACTPPS.B4;
    const register unsigned short int ADACTPPS5 = 5;
    sbit  ADACTPPS5_bit at ADACTPPS.B5;

sfr unsigned short volatile SSP1CLKPPS       absolute 0x1EC5;
    const register unsigned short int SSP1CLKPPS0 = 0;
    sbit  SSP1CLKPPS0_bit at SSP1CLKPPS.B0;
    const register unsigned short int SSP1CLKPPS1 = 1;
    sbit  SSP1CLKPPS1_bit at SSP1CLKPPS.B1;
    const register unsigned short int SSP1CLKPPS2 = 2;
    sbit  SSP1CLKPPS2_bit at SSP1CLKPPS.B2;
    const register unsigned short int SSP1CLKPPS3 = 3;
    sbit  SSP1CLKPPS3_bit at SSP1CLKPPS.B3;
    const register unsigned short int SSP1CLKPPS4 = 4;
    sbit  SSP1CLKPPS4_bit at SSP1CLKPPS.B4;
    const register unsigned short int SSP1CLKPPS5 = 5;
    sbit  SSP1CLKPPS5_bit at SSP1CLKPPS.B5;

sfr unsigned short volatile SSP1DATPPS       absolute 0x1EC6;
    const register unsigned short int SSP1DATPPS0 = 0;
    sbit  SSP1DATPPS0_bit at SSP1DATPPS.B0;
    const register unsigned short int SSP1DATPPS1 = 1;
    sbit  SSP1DATPPS1_bit at SSP1DATPPS.B1;
    const register unsigned short int SSP1DATPPS2 = 2;
    sbit  SSP1DATPPS2_bit at SSP1DATPPS.B2;
    const register unsigned short int SSP1DATPPS3 = 3;
    sbit  SSP1DATPPS3_bit at SSP1DATPPS.B3;
    const register unsigned short int SSP1DATPPS4 = 4;
    sbit  SSP1DATPPS4_bit at SSP1DATPPS.B4;
    const register unsigned short int SSP1DATPPS5 = 5;
    sbit  SSP1DATPPS5_bit at SSP1DATPPS.B5;

sfr unsigned short volatile SSP1SSPPS        absolute 0x1EC7;
    const register unsigned short int SSP1SSPPS0 = 0;
    sbit  SSP1SSPPS0_bit at SSP1SSPPS.B0;
    const register unsigned short int SSP1SSPPS1 = 1;
    sbit  SSP1SSPPS1_bit at SSP1SSPPS.B1;
    const register unsigned short int SSP1SSPPS2 = 2;
    sbit  SSP1SSPPS2_bit at SSP1SSPPS.B2;
    const register unsigned short int SSP1SSPPS3 = 3;
    sbit  SSP1SSPPS3_bit at SSP1SSPPS.B3;
    const register unsigned short int SSP1SSPPS4 = 4;
    sbit  SSP1SSPPS4_bit at SSP1SSPPS.B4;
    const register unsigned short int SSP1SSPPS5 = 5;
    sbit  SSP1SSPPS5_bit at SSP1SSPPS.B5;

sfr unsigned short volatile RX1DTPPS         absolute 0x1ECB;
    const register unsigned short int RX1DTPPS0 = 0;
    sbit  RX1DTPPS0_bit at RX1DTPPS.B0;
    const register unsigned short int RX1DTPPS1 = 1;
    sbit  RX1DTPPS1_bit at RX1DTPPS.B1;
    const register unsigned short int RX1DTPPS2 = 2;
    sbit  RX1DTPPS2_bit at RX1DTPPS.B2;
    const register unsigned short int RX1DTPPS3 = 3;
    sbit  RX1DTPPS3_bit at RX1DTPPS.B3;
    const register unsigned short int RX1DTPPS4 = 4;
    sbit  RX1DTPPS4_bit at RX1DTPPS.B4;
    const register unsigned short int RX1DTPPS5 = 5;
    sbit  RX1DTPPS5_bit at RX1DTPPS.B5;

sfr unsigned short volatile TX1CKPPS         absolute 0x1ECC;
    const register unsigned short int TX1CKPPS0 = 0;
    sbit  TX1CKPPS0_bit at TX1CKPPS.B0;
    const register unsigned short int TX1CKPPS1 = 1;
    sbit  TX1CKPPS1_bit at TX1CKPPS.B1;
    const register unsigned short int TX1CKPPS2 = 2;
    sbit  TX1CKPPS2_bit at TX1CKPPS.B2;
    const register unsigned short int TX1CKPPS3 = 3;
    sbit  TX1CKPPS3_bit at TX1CKPPS.B3;
    const register unsigned short int TX1CKPPS4 = 4;
    sbit  TX1CKPPS4_bit at TX1CKPPS.B4;
    const register unsigned short int TX1CKPPS5 = 5;
    sbit  TX1CKPPS5_bit at TX1CKPPS.B5;

sfr unsigned short volatile RX2DTPPS         absolute 0x1ECD;
    const register unsigned short int RX2DTPPS0 = 0;
    sbit  RX2DTPPS0_bit at RX2DTPPS.B0;
    const register unsigned short int RX2DTPPS1 = 1;
    sbit  RX2DTPPS1_bit at RX2DTPPS.B1;
    const register unsigned short int RX2DTPPS2 = 2;
    sbit  RX2DTPPS2_bit at RX2DTPPS.B2;
    const register unsigned short int RX2DTPPS3 = 3;
    sbit  RX2DTPPS3_bit at RX2DTPPS.B3;
    const register unsigned short int RX2DTPPS4 = 4;
    sbit  RX2DTPPS4_bit at RX2DTPPS.B4;
    const register unsigned short int RX2DTPPS5 = 5;
    sbit  RX2DTPPS5_bit at RX2DTPPS.B5;

sfr unsigned short volatile TX2CKPPS         absolute 0x1ECE;
    const register unsigned short int TX2CKPPS0 = 0;
    sbit  TX2CKPPS0_bit at TX2CKPPS.B0;
    const register unsigned short int TX2CKPPS1 = 1;
    sbit  TX2CKPPS1_bit at TX2CKPPS.B1;
    const register unsigned short int TX2CKPPS2 = 2;
    sbit  TX2CKPPS2_bit at TX2CKPPS.B2;
    const register unsigned short int TX2CKPPS3 = 3;
    sbit  TX2CKPPS3_bit at TX2CKPPS.B3;
    const register unsigned short int TX2CKPPS4 = 4;
    sbit  TX2CKPPS4_bit at TX2CKPPS.B4;
    const register unsigned short int TX2CKPPS5 = 5;
    sbit  TX2CKPPS5_bit at TX2CKPPS.B5;

sfr unsigned short volatile RA0PPS           absolute 0x1F10;
    const register unsigned short int RA0PPS0 = 0;
    sbit  RA0PPS0_bit at RA0PPS.B0;
    const register unsigned short int RA0PPS1 = 1;
    sbit  RA0PPS1_bit at RA0PPS.B1;
    const register unsigned short int RA0PPS2 = 2;
    sbit  RA0PPS2_bit at RA0PPS.B2;
    const register unsigned short int RA0PPS3 = 3;
    sbit  RA0PPS3_bit at RA0PPS.B3;
    const register unsigned short int RA0PPS4 = 4;
    sbit  RA0PPS4_bit at RA0PPS.B4;

sfr unsigned short volatile RA1PPS           absolute 0x1F11;
    const register unsigned short int RA1PPS0 = 0;
    sbit  RA1PPS0_bit at RA1PPS.B0;
    const register unsigned short int RA1PPS1 = 1;
    sbit  RA1PPS1_bit at RA1PPS.B1;
    const register unsigned short int RA1PPS2 = 2;
    sbit  RA1PPS2_bit at RA1PPS.B2;
    const register unsigned short int RA1PPS3 = 3;
    sbit  RA1PPS3_bit at RA1PPS.B3;
    const register unsigned short int RA1PPS4 = 4;
    sbit  RA1PPS4_bit at RA1PPS.B4;

sfr unsigned short volatile RA2PPS           absolute 0x1F12;
    const register unsigned short int RA2PPS0 = 0;
    sbit  RA2PPS0_bit at RA2PPS.B0;
    const register unsigned short int RA2PPS1 = 1;
    sbit  RA2PPS1_bit at RA2PPS.B1;
    const register unsigned short int RA2PPS2 = 2;
    sbit  RA2PPS2_bit at RA2PPS.B2;
    const register unsigned short int RA2PPS3 = 3;
    sbit  RA2PPS3_bit at RA2PPS.B3;
    const register unsigned short int RA2PPS4 = 4;
    sbit  RA2PPS4_bit at RA2PPS.B4;

sfr unsigned short volatile RA3PPS           absolute 0x1F13;
    const register unsigned short int RA3PPS0 = 0;
    sbit  RA3PPS0_bit at RA3PPS.B0;
    const register unsigned short int RA3PPS1 = 1;
    sbit  RA3PPS1_bit at RA3PPS.B1;
    const register unsigned short int RA3PPS2 = 2;
    sbit  RA3PPS2_bit at RA3PPS.B2;
    const register unsigned short int RA3PPS3 = 3;
    sbit  RA3PPS3_bit at RA3PPS.B3;
    const register unsigned short int RA3PPS4 = 4;
    sbit  RA3PPS4_bit at RA3PPS.B4;

sfr unsigned short volatile RA4PPS           absolute 0x1F14;
    const register unsigned short int RA4PPS0 = 0;
    sbit  RA4PPS0_bit at RA4PPS.B0;
    const register unsigned short int RA4PPS1 = 1;
    sbit  RA4PPS1_bit at RA4PPS.B1;
    const register unsigned short int RA4PPS2 = 2;
    sbit  RA4PPS2_bit at RA4PPS.B2;
    const register unsigned short int RA4PPS3 = 3;
    sbit  RA4PPS3_bit at RA4PPS.B3;
    const register unsigned short int RA4PPS4 = 4;
    sbit  RA4PPS4_bit at RA4PPS.B4;

sfr unsigned short volatile RA5PPS           absolute 0x1F15;
    const register unsigned short int RA5PPS0 = 0;
    sbit  RA5PPS0_bit at RA5PPS.B0;
    const register unsigned short int RA5PPS1 = 1;
    sbit  RA5PPS1_bit at RA5PPS.B1;
    const register unsigned short int RA5PPS2 = 2;
    sbit  RA5PPS2_bit at RA5PPS.B2;
    const register unsigned short int RA5PPS3 = 3;
    sbit  RA5PPS3_bit at RA5PPS.B3;
    const register unsigned short int RA5PPS4 = 4;
    sbit  RA5PPS4_bit at RA5PPS.B4;

sfr unsigned short volatile RC0PPS           absolute 0x1F20;
    const register unsigned short int RC0PPS0 = 0;
    sbit  RC0PPS0_bit at RC0PPS.B0;
    const register unsigned short int RC0PPS1 = 1;
    sbit  RC0PPS1_bit at RC0PPS.B1;
    const register unsigned short int RC0PPS2 = 2;
    sbit  RC0PPS2_bit at RC0PPS.B2;
    const register unsigned short int RC0PPS3 = 3;
    sbit  RC0PPS3_bit at RC0PPS.B3;
    const register unsigned short int RC0PPS4 = 4;
    sbit  RC0PPS4_bit at RC0PPS.B4;

sfr unsigned short volatile RC1PPS           absolute 0x1F21;
    const register unsigned short int RC1PPS0 = 0;
    sbit  RC1PPS0_bit at RC1PPS.B0;
    const register unsigned short int RC1PPS1 = 1;
    sbit  RC1PPS1_bit at RC1PPS.B1;
    const register unsigned short int RC1PPS2 = 2;
    sbit  RC1PPS2_bit at RC1PPS.B2;
    const register unsigned short int RC1PPS3 = 3;
    sbit  RC1PPS3_bit at RC1PPS.B3;
    const register unsigned short int RC1PPS4 = 4;
    sbit  RC1PPS4_bit at RC1PPS.B4;

sfr unsigned short volatile RC2PPS           absolute 0x1F22;
    const register unsigned short int RC2PPS0 = 0;
    sbit  RC2PPS0_bit at RC2PPS.B0;
    const register unsigned short int RC2PPS1 = 1;
    sbit  RC2PPS1_bit at RC2PPS.B1;
    const register unsigned short int RC2PPS2 = 2;
    sbit  RC2PPS2_bit at RC2PPS.B2;
    const register unsigned short int RC2PPS3 = 3;
    sbit  RC2PPS3_bit at RC2PPS.B3;
    const register unsigned short int RC2PPS4 = 4;
    sbit  RC2PPS4_bit at RC2PPS.B4;

sfr unsigned short volatile RC3PPS           absolute 0x1F23;
    const register unsigned short int RC3PPS0 = 0;
    sbit  RC3PPS0_bit at RC3PPS.B0;
    const register unsigned short int RC3PPS1 = 1;
    sbit  RC3PPS1_bit at RC3PPS.B1;
    const register unsigned short int RC3PPS2 = 2;
    sbit  RC3PPS2_bit at RC3PPS.B2;
    const register unsigned short int RC3PPS3 = 3;
    sbit  RC3PPS3_bit at RC3PPS.B3;
    const register unsigned short int RC3PPS4 = 4;
    sbit  RC3PPS4_bit at RC3PPS.B4;

sfr unsigned short volatile RC4PPS           absolute 0x1F24;
    const register unsigned short int RC4PPS0 = 0;
    sbit  RC4PPS0_bit at RC4PPS.B0;
    const register unsigned short int RC4PPS1 = 1;
    sbit  RC4PPS1_bit at RC4PPS.B1;
    const register unsigned short int RC4PPS2 = 2;
    sbit  RC4PPS2_bit at RC4PPS.B2;
    const register unsigned short int RC4PPS3 = 3;
    sbit  RC4PPS3_bit at RC4PPS.B3;
    const register unsigned short int RC4PPS4 = 4;
    sbit  RC4PPS4_bit at RC4PPS.B4;

sfr unsigned short volatile RC5PPS           absolute 0x1F25;
    const register unsigned short int RC5PPS0 = 0;
    sbit  RC5PPS0_bit at RC5PPS.B0;
    const register unsigned short int RC5PPS1 = 1;
    sbit  RC5PPS1_bit at RC5PPS.B1;
    const register unsigned short int RC5PPS2 = 2;
    sbit  RC5PPS2_bit at RC5PPS.B2;
    const register unsigned short int RC5PPS3 = 3;
    sbit  RC5PPS3_bit at RC5PPS.B3;
    const register unsigned short int RC5PPS4 = 4;
    sbit  RC5PPS4_bit at RC5PPS.B4;

sfr unsigned short volatile ANSELA           absolute 0x1F38;
    const register unsigned short int ANSA0 = 0;
    sbit  ANSA0_bit at ANSELA.B0;
    const register unsigned short int ANSA1 = 1;
    sbit  ANSA1_bit at ANSELA.B1;
    const register unsigned short int ANSA2 = 2;
    sbit  ANSA2_bit at ANSELA.B2;
    const register unsigned short int ANSA4 = 4;
    sbit  ANSA4_bit at ANSELA.B4;
    const register unsigned short int ANSA5 = 5;
    sbit  ANSA5_bit at ANSELA.B5;

sfr unsigned short          WPUA             absolute 0x1F39;
    const register unsigned short int WPUA0 = 0;
    sbit  WPUA0_bit at WPUA.B0;
    const register unsigned short int WPUA1 = 1;
    sbit  WPUA1_bit at WPUA.B1;
    const register unsigned short int WPUA2 = 2;
    sbit  WPUA2_bit at WPUA.B2;
    const register unsigned short int WPUA3 = 3;
    sbit  WPUA3_bit at WPUA.B3;
    const register unsigned short int WPUA4 = 4;
    sbit  WPUA4_bit at WPUA.B4;
    const register unsigned short int WPUA5 = 5;
    sbit  WPUA5_bit at WPUA.B5;

sfr unsigned short volatile ODCONA           absolute 0x1F3A;
    const register unsigned short int ODCA0 = 0;
    sbit  ODCA0_bit at ODCONA.B0;
    const register unsigned short int ODCA1 = 1;
    sbit  ODCA1_bit at ODCONA.B1;
    const register unsigned short int ODCA2 = 2;
    sbit  ODCA2_bit at ODCONA.B2;
    const register unsigned short int ODCA4 = 4;
    sbit  ODCA4_bit at ODCONA.B4;
    const register unsigned short int ODCA5 = 5;
    sbit  ODCA5_bit at ODCONA.B5;

sfr unsigned short volatile SLRCONA          absolute 0x1F3B;
    const register unsigned short int SLRA0 = 0;
    sbit  SLRA0_bit at SLRCONA.B0;
    const register unsigned short int SLRA1 = 1;
    sbit  SLRA1_bit at SLRCONA.B1;
    const register unsigned short int SLRA2 = 2;
    sbit  SLRA2_bit at SLRCONA.B2;
    const register unsigned short int SLRA4 = 4;
    sbit  SLRA4_bit at SLRCONA.B4;
    const register unsigned short int SLRA5 = 5;
    sbit  SLRA5_bit at SLRCONA.B5;

sfr unsigned short volatile INLVLA           absolute 0x1F3C;
    const register unsigned short int INLVLA0 = 0;
    sbit  INLVLA0_bit at INLVLA.B0;
    const register unsigned short int INLVLA1 = 1;
    sbit  INLVLA1_bit at INLVLA.B1;
    const register unsigned short int INLVLA2 = 2;
    sbit  INLVLA2_bit at INLVLA.B2;
    const register unsigned short int INLVLA3 = 3;
    sbit  INLVLA3_bit at INLVLA.B3;
    const register unsigned short int INLVLA4 = 4;
    sbit  INLVLA4_bit at INLVLA.B4;
    const register unsigned short int INLVLA5 = 5;
    sbit  INLVLA5_bit at INLVLA.B5;

sfr unsigned short volatile IOCAP            absolute 0x1F3D;
    const register unsigned short int IOCAP0 = 0;
    sbit  IOCAP0_bit at IOCAP.B0;
    const register unsigned short int IOCAP1 = 1;
    sbit  IOCAP1_bit at IOCAP.B1;
    const register unsigned short int IOCAP2 = 2;
    sbit  IOCAP2_bit at IOCAP.B2;
    const register unsigned short int IOCAP3 = 3;
    sbit  IOCAP3_bit at IOCAP.B3;
    const register unsigned short int IOCAP4 = 4;
    sbit  IOCAP4_bit at IOCAP.B4;
    const register unsigned short int IOCAP5 = 5;
    sbit  IOCAP5_bit at IOCAP.B5;

sfr unsigned short volatile IOCAN            absolute 0x1F3E;
    const register unsigned short int IOCAN0 = 0;
    sbit  IOCAN0_bit at IOCAN.B0;
    const register unsigned short int IOCAN1 = 1;
    sbit  IOCAN1_bit at IOCAN.B1;
    const register unsigned short int IOCAN2 = 2;
    sbit  IOCAN2_bit at IOCAN.B2;
    const register unsigned short int IOCAN3 = 3;
    sbit  IOCAN3_bit at IOCAN.B3;
    const register unsigned short int IOCAN4 = 4;
    sbit  IOCAN4_bit at IOCAN.B4;
    const register unsigned short int IOCAN5 = 5;
    sbit  IOCAN5_bit at IOCAN.B5;

sfr unsigned short volatile IOCAF            absolute 0x1F3F;
    const register unsigned short int IOCAF0 = 0;
    sbit  IOCAF0_bit at IOCAF.B0;
    const register unsigned short int IOCAF1 = 1;
    sbit  IOCAF1_bit at IOCAF.B1;
    const register unsigned short int IOCAF2 = 2;
    sbit  IOCAF2_bit at IOCAF.B2;
    const register unsigned short int IOCAF3 = 3;
    sbit  IOCAF3_bit at IOCAF.B3;
    const register unsigned short int IOCAF4 = 4;
    sbit  IOCAF4_bit at IOCAF.B4;
    const register unsigned short int IOCAF5 = 5;
    sbit  IOCAF5_bit at IOCAF.B5;

sfr unsigned short volatile ANSELC           absolute 0x1F4E;
    const register unsigned short int ANSC0 = 0;
    sbit  ANSC0_bit at ANSELC.B0;
    const register unsigned short int ANSC1 = 1;
    sbit  ANSC1_bit at ANSELC.B1;
    const register unsigned short int ANSC2 = 2;
    sbit  ANSC2_bit at ANSELC.B2;
    const register unsigned short int ANSC3 = 3;
    sbit  ANSC3_bit at ANSELC.B3;
    const register unsigned short int ANSC4 = 4;
    sbit  ANSC4_bit at ANSELC.B4;
    const register unsigned short int ANSC5 = 5;
    sbit  ANSC5_bit at ANSELC.B5;

sfr unsigned short volatile WPUC             absolute 0x1F4F;
    const register unsigned short int WPUC0 = 0;
    sbit  WPUC0_bit at WPUC.B0;
    const register unsigned short int WPUC1 = 1;
    sbit  WPUC1_bit at WPUC.B1;
    const register unsigned short int WPUC2 = 2;
    sbit  WPUC2_bit at WPUC.B2;
    const register unsigned short int WPUC3 = 3;
    sbit  WPUC3_bit at WPUC.B3;
    const register unsigned short int WPUC4 = 4;
    sbit  WPUC4_bit at WPUC.B4;
    const register unsigned short int WPUC5 = 5;
    sbit  WPUC5_bit at WPUC.B5;

sfr unsigned short volatile ODCONC           absolute 0x1F50;
    const register unsigned short int ODCC0 = 0;
    sbit  ODCC0_bit at ODCONC.B0;
    const register unsigned short int ODCC1 = 1;
    sbit  ODCC1_bit at ODCONC.B1;
    const register unsigned short int ODCC2 = 2;
    sbit  ODCC2_bit at ODCONC.B2;
    const register unsigned short int ODCC3 = 3;
    sbit  ODCC3_bit at ODCONC.B3;
    const register unsigned short int ODCC4 = 4;
    sbit  ODCC4_bit at ODCONC.B4;
    const register unsigned short int ODCC5 = 5;
    sbit  ODCC5_bit at ODCONC.B5;

sfr unsigned short volatile SLRCONC          absolute 0x1F51;
    const register unsigned short int SLRC0 = 0;
    sbit  SLRC0_bit at SLRCONC.B0;
    const register unsigned short int SLRC1 = 1;
    sbit  SLRC1_bit at SLRCONC.B1;
    const register unsigned short int SLRC2 = 2;
    sbit  SLRC2_bit at SLRCONC.B2;
    const register unsigned short int SLRC3 = 3;
    sbit  SLRC3_bit at SLRCONC.B3;
    const register unsigned short int SLRC4 = 4;
    sbit  SLRC4_bit at SLRCONC.B4;
    const register unsigned short int SLRC5 = 5;
    sbit  SLRC5_bit at SLRCONC.B5;

sfr unsigned short volatile INLVLC           absolute 0x1F52;
    const register unsigned short int INLVLC0 = 0;
    sbit  INLVLC0_bit at INLVLC.B0;
    const register unsigned short int INLVLC1 = 1;
    sbit  INLVLC1_bit at INLVLC.B1;
    const register unsigned short int INLVLC2 = 2;
    sbit  INLVLC2_bit at INLVLC.B2;
    const register unsigned short int INLVLC3 = 3;
    sbit  INLVLC3_bit at INLVLC.B3;
    const register unsigned short int INLVLC4 = 4;
    sbit  INLVLC4_bit at INLVLC.B4;
    const register unsigned short int INLVLC5 = 5;
    sbit  INLVLC5_bit at INLVLC.B5;

sfr unsigned short volatile IOCCP            absolute 0x1F53;
    const register unsigned short int IOCCP0 = 0;
    sbit  IOCCP0_bit at IOCCP.B0;
    const register unsigned short int IOCCP1 = 1;
    sbit  IOCCP1_bit at IOCCP.B1;
    const register unsigned short int IOCCP2 = 2;
    sbit  IOCCP2_bit at IOCCP.B2;
    const register unsigned short int IOCCP3 = 3;
    sbit  IOCCP3_bit at IOCCP.B3;
    const register unsigned short int IOCCP4 = 4;
    sbit  IOCCP4_bit at IOCCP.B4;
    const register unsigned short int IOCCP5 = 5;
    sbit  IOCCP5_bit at IOCCP.B5;

sfr unsigned short volatile IOCCN            absolute 0x1F54;
    const register unsigned short int IOCCN0 = 0;
    sbit  IOCCN0_bit at IOCCN.B0;
    const register unsigned short int IOCCN1 = 1;
    sbit  IOCCN1_bit at IOCCN.B1;
    const register unsigned short int IOCCN2 = 2;
    sbit  IOCCN2_bit at IOCCN.B2;
    const register unsigned short int IOCCN3 = 3;
    sbit  IOCCN3_bit at IOCCN.B3;
    const register unsigned short int IOCCN4 = 4;
    sbit  IOCCN4_bit at IOCCN.B4;
    const register unsigned short int IOCCN5 = 5;
    sbit  IOCCN5_bit at IOCCN.B5;

sfr unsigned short volatile IOCCF            absolute 0x1F55;
    const register unsigned short int IOCCF0 = 0;
    sbit  IOCCF0_bit at IOCCF.B0;
    const register unsigned short int IOCCF1 = 1;
    sbit  IOCCF1_bit at IOCCF.B1;
    const register unsigned short int IOCCF2 = 2;
    sbit  IOCCF2_bit at IOCCF.B2;
    const register unsigned short int IOCCF3 = 3;
    sbit  IOCCF3_bit at IOCCF.B3;
    const register unsigned short int IOCCF4 = 4;
    sbit  IOCCF4_bit at IOCCF.B4;
    const register unsigned short int IOCCF5 = 5;
    sbit  IOCCF5_bit at IOCCF.B5;

sfr unsigned short volatile STATUS_SHAD      absolute 0x1FE4;
    const register unsigned short int STATUS_SHAD0 = 0;
    sbit  STATUS_SHAD0_bit at STATUS_SHAD.B0;
    const register unsigned short int STATUS_SHAD1 = 1;
    sbit  STATUS_SHAD1_bit at STATUS_SHAD.B1;
    const register unsigned short int STATUS_SHAD2 = 2;
    sbit  STATUS_SHAD2_bit at STATUS_SHAD.B2;

sfr unsigned short volatile WREG_SHAD        absolute 0x1FE5;
sfr unsigned short volatile BSR_SHAD         absolute 0x1FE6;
sfr unsigned short volatile PCLATH_SHAD      absolute 0x1FE7;
sfr unsigned int   volatile FSR0_SHAD        absolute 0x1FE8;
sfr unsigned short volatile FSR0L_SHAD       absolute 0x1FE8;
sfr unsigned short volatile FSR0H_SHAD       absolute 0x1FE9;
sfr unsigned int   volatile FSR1_SHAD        absolute 0x1FEA;
sfr unsigned short volatile FSR1L_SHAD       absolute 0x1FEA;
sfr unsigned short volatile FSR1H_SHAD       absolute 0x1FEB;
sfr unsigned short volatile STKPTR           absolute 0x1FED;
    const register unsigned short int STKPTR0 = 0;
    sbit  STKPTR0_bit at STKPTR.B0;
    const register unsigned short int STKPTR1 = 1;
    sbit  STKPTR1_bit at STKPTR.B1;
    const register unsigned short int STKPTR2 = 2;
    sbit  STKPTR2_bit at STKPTR.B2;
    const register unsigned short int STKPTR3 = 3;
    sbit  STKPTR3_bit at STKPTR.B3;
    const register unsigned short int STKPTR4 = 4;
    sbit  STKPTR4_bit at STKPTR.B4;

sfr unsigned short volatile TOSL             absolute 0x1FEE;
    const register unsigned short int TOSL0 = 0;
    sbit  TOSL0_bit at TOSL.B0;
    const register unsigned short int TOSL1 = 1;
    sbit  TOSL1_bit at TOSL.B1;
    const register unsigned short int TOSL2 = 2;
    sbit  TOSL2_bit at TOSL.B2;
    const register unsigned short int TOSL3 = 3;
    sbit  TOSL3_bit at TOSL.B3;
    const register unsigned short int TOSL4 = 4;
    sbit  TOSL4_bit at TOSL.B4;
    const register unsigned short int TOSL5 = 5;
    sbit  TOSL5_bit at TOSL.B5;
    const register unsigned short int TOSL6 = 6;
    sbit  TOSL6_bit at TOSL.B6;
    const register unsigned short int TOSL7 = 7;
    sbit  TOSL7_bit at TOSL.B7;

sfr unsigned short volatile TOSH             absolute 0x1FEF;
    const register unsigned short int TOSH0 = 0;
    sbit  TOSH0_bit at TOSH.B0;
    const register unsigned short int TOSH1 = 1;
    sbit  TOSH1_bit at TOSH.B1;
    const register unsigned short int TOSH2 = 2;
    sbit  TOSH2_bit at TOSH.B2;
    const register unsigned short int TOSH3 = 3;
    sbit  TOSH3_bit at TOSH.B3;
    const register unsigned short int TOSH4 = 4;
    sbit  TOSH4_bit at TOSH.B4;
    const register unsigned short int TOSH5 = 5;
    sbit  TOSH5_bit at TOSH.B5;
    const register unsigned short int TOSH6 = 6;
    sbit  TOSH6_bit at TOSH.B6;
    const register unsigned short int TOSH7 = 7;
    sbit  TOSH7_bit at TOSH.B7;