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1. 32-bit-Pipelined-RISC-V-Processor- 32-bit-Pipelined-RISC-V-Processor- Public

   Verilog 2

2. Synchronous_FIFO Synchronous_FIFO Public

   Designed synchronous_FIFO using verilog with help of icrus_verilog and gtkwave on ubuntu

   Verilog 1

3. Verification-of-RAM-using-System-Verilog- Verification-of-RAM-using-System-Verilog- Public

   SystemVerilog 1

4. Designing-and-verification-of-Synchronous-FIFO-using-System-Verilog- Designing-and-verification-of-Synchronous-FIFO-using-System-Verilog- Public

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5. Water-tank-monitoring-system- Water-tank-monitoring-system- Public

   The project is basically on hardware based and as name suggests it used to detect that the water level in the water tank if the level is crossed then the buzzer will be on and the light will be glo…

   C++

6. Blind_stick_project Blind_stick_project Public

   The Project mainly based on hardware basis as name suggest is uses to help blind and old people the project is easy to made we used : Ultrasonic sensor , servo motor, Buzzer, Arduino uno , Jq6500 m…