applications: sdp: mspi: Add RX path to SDP MSPI

Add RX path to SDP MSPI FLPR app implementation Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
jaz1-nordic · Dec 16, 2024 · 269fed3 · 269fed3
1 parent 6f54d50
commit 269fed3
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Showing 11 changed files with 614 additions and 66 deletions.
diff --git a/applications/sdp/mspi/CMakeLists.txt b/applications/sdp/mspi/CMakeLists.txt
@@ -9,11 +9,11 @@ cmake_minimum_required(VERSION 3.20.0)
 find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
 project(sdp_mspi)
 
-sdp_assembly_generate("${CMAKE_SOURCE_DIR}/src/hrt/hrt.c")
-sdp_assembly_check("${CMAKE_SOURCE_DIR}/src/hrt/hrt.c")
-sdp_assembly_prepare_install("${CMAKE_SOURCE_DIR}/src/hrt/hrt.c")
+#sdp_assembly_generate("${CMAKE_SOURCE_DIR}/src/hrt/hrt.c")
+#sdp_assembly_check("${CMAKE_SOURCE_DIR}/src/hrt/hrt.c")
+#sdp_assembly_prepare_install("${CMAKE_SOURCE_DIR}/src/hrt/hrt.c")
 
 target_sources(app PRIVATE src/main.c)
 target_sources(app PRIVATE src/hrt/hrt.c)
 
-add_dependencies(app asm_check)
+#add_dependencies(app asm_check)
diff --git a/applications/sdp/mspi/boards/nrf54l15dk_nrf54l15_cpuflpr.conf b/applications/sdp/mspi/boards/nrf54l15dk_nrf54l15_cpuflpr.conf
@@ -7,9 +7,9 @@ CONFIG_LOG=n
 CONFIG_I2C=n
 CONFIG_WATCHDOG=n
 CONFIG_GPIO=n
-CONFIG_PINCTRL=n
+CONFIG_PINCTRL=y
 CONFIG_SPI=n
-CONFIG_SERIAL=n
+CONFIG_SERIAL=y
 CONFIG_FLASH=n
 
 # Power management
@@ -18,23 +18,23 @@ CONFIG_PM=n
 # Interrupts
 CONFIG_DYNAMIC_INTERRUPTS=n
 CONFIG_IRQ_OFFLOAD=n
-CONFIG_GEN_SW_ISR_TABLE=n
+CONFIG_GEN_SW_ISR_TABLE=y
 
 # Memory protection
 CONFIG_THREAD_STACK_INFO=n
 CONFIG_THREAD_CUSTOM_DATA=n
 CONFIG_FPU=n
 
 # Boot
-CONFIG_BOOT_BANNER=n
+CONFIG_BOOT_BANNER=y
 CONFIG_NCS_BOOT_BANNER=n
 
 # Console
-CONFIG_CONSOLE=n
-CONFIG_UART_CONSOLE=n
-CONFIG_STDOUT_CONSOLE=n
-CONFIG_PRINTK=n
-CONFIG_EARLY_CONSOLE=n
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_STDOUT_CONSOLE=y
+CONFIG_PRINTK=y
+CONFIG_EARLY_CONSOLE=y
 
 # Build
 CONFIG_SIZE_OPTIMIZATIONS=y
@@ -45,4 +45,5 @@ CONFIG_SYS_CLOCK_EXISTS=n
 CONFIG_OUTPUT_DISASSEMBLY=y
 CONFIG_COMMON_LIBC_MALLOC=n
 
-CONFIG_COMPILER_OPT="-fshort-enums"
+# additional compiler flags
+CONFIG_COMPILER_OPT="-fshort-enums"
diff --git a/applications/sdp/mspi/boards/nrf54l15dk_nrf54l15_cpuflpr.overlay b/applications/sdp/mspi/boards/nrf54l15dk_nrf54l15_cpuflpr.overlay
@@ -10,12 +10,12 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			sram_tx: memory@2003c000 {
-				reg = <0x2003c000 0x0800>;
+			sram_tx: memory@2003a000 {
+				reg = <0x2003a000 0x0800>;
 			};
 
-			sram_rx: memory@2003c800 {
-				reg = <0x2003c800 0x0800>;
+			sram_rx: memory@2003a800 {
+				reg = <0x2003a800 0x0800>;
 			};
 		};
 	};
@@ -33,16 +33,16 @@
 };
 
 &cpuflpr_rram {
-	reg = <0x17a000 DT_SIZE_K(12)>;
+	reg = <0x178000 DT_SIZE_K(20)>;
 };
 
 &cpuflpr_code_partition {
-	reg = <0x0 DT_SIZE_K(12)>;
+	reg = <0x0 DT_SIZE_K(20)>;
 };
 
 &cpuflpr_sram {
-	reg = <0x2003d000 DT_SIZE_K(12)>;
-	ranges = <0x0 0x2003d000 0x3000>;
+	reg = <0x2003b000 DT_SIZE_K(20)>;
+	ranges = <0x0 0x2003b000 0x5000>;
 };
 
 &cpuflpr_vevif_rx {
@@ -85,7 +85,7 @@
 };
 
 &uart30 {
-	status = "disabled";
+	status = "okay";
 };
 
 &pwm20 {