Dm

src/driver_client/dclient.rs

@@ -43,6 +43,30 @@ pub trait DriverPrimitive<T, P, I, O> {
     /// The `result` method returns the output data from the driver primitive,
     ///  optionally with a specific parameter. If there is no output data available, it returns `None`.
     fn result(&self, param: Option<usize>) -> Result<Option<O>>;
+
+    fn get_bin_type(&self) -> BinType {
+        let params = &self.loaded_binary_parameters();
+        let bin_id = params[0];
+        match bin_id {
+            0 => BinType::MSM,
+            1 => BinType::NTT,
+            3 => BinType::POSEIDON,
+            _ => BinType::NONE,
+        }
+    }
+
+    fn get_driver_details(&self) -> (BinType, u32) {
+        let params = &self.loaded_binary_parameters();
+        let bin_id = params[0];
+        let image_paramters = params[1];
+        let bin_id = match bin_id {
+            0 => BinType::MSM,
+            1 => BinType::NTT,
+            3 => BinType::POSEIDON,
+            _ => BinType::NONE,
+        };
+        (bin_id, image_paramters)
+    }
 }
 
 /// The [`DriverClient`] is described bunch of addreses on FPGA which called [`DriverConfig`] also

src/driver_client/dclient_cfg.rs

@@ -1,6 +1,13 @@
 pub enum CardType {
     C1100,
 }
+#[derive(Debug, PartialEq, Eq)]
+pub enum BinType {
+    MSM = 0,
+    NTT = 1,
+    POSEIDON = 3,
+    NONE,
+}
 
 /// The [`DriverConfig`] is a struct that defines a set of 64-bit unsigned integer (`u64`)
 /// representing addreses memory space for different components of a FPGA.

src/driver_client/mod.rs

@@ -1,6 +1,6 @@
-mod dclient;
-mod dclient_cfg;
-mod dclient_code;
+pub mod dclient;
+pub mod dclient_cfg;
+pub mod dclient_code;
 
 pub use dclient::*;
 pub use dclient_cfg::{CardType, DriverConfig};

src/error.rs

@@ -27,6 +27,8 @@ pub enum DriverClientError {
     LoadFailed { path: String },
     #[error("failed open file")]
     FileError(#[from] io::Error),
+    #[error("NOT MSM Binary")]
+    NotMsmBin,
     #[error("unknown driver client error")]
     Unknown,
 }

src/ingo_hash/dma_buffer.rs

@@ -0,0 +1,59 @@
+use std::mem;
+
+#[repr(C, align(4096))]
+pub struct Align4K([u8; 4096]);
+
+#[derive(Debug)]
+pub struct DmaBuffer(Vec<u8>);
+
+impl DmaBuffer {
+    pub fn new<T>(n_bytes: usize) -> Self {
+        Self(unsafe { aligned_vec::<T>(n_bytes) })
+    }
+
+    pub fn extend_from_slice(&mut self, slice: &[u8]) {
+        self.0.extend_from_slice(slice);
+    }
+
+    pub fn as_slice(&self) -> &[u8] {
+        self.0.as_slice()
+    }
+
+    pub fn as_mut_slice(&mut self) -> &mut [u8] {
+        self.0.as_mut_slice()
+    }
+
+    pub fn get(&self) -> &Vec<u8> {
+        &self.0
+    }
+
+    pub fn get_mut(&mut self) -> &mut Vec<u8> {
+        &mut self.0
+    }
+
+    pub fn set_len(&mut self, num: usize) {
+        unsafe { self.0.set_len(num) }
+    }
+
+    pub fn len(&self) -> usize {
+        self.0.len()
+    }
+}
+
+pub unsafe fn aligned_vec<T>(n_bytes: usize) -> Vec<u8> {
+    let n_units = (n_bytes / mem::size_of::<T>()) + 1;
+
+    let mut aligned: Vec<T> = Vec::with_capacity(n_units);
+
+    let ptr = aligned.as_mut_ptr();
+    let len_units = aligned.len();
+    let cap_units = aligned.capacity();
+
+    mem::forget(aligned);
+
+    Vec::from_raw_parts(
+        ptr as *mut u8,
+        len_units * mem::size_of::<T>(),
+        cap_units * mem::size_of::<T>(),
+    )
+}

src/ingo_hash/mod.rs

@@ -1,6 +1,8 @@
-mod hash_hw_code;
-mod poseidon_api;
-mod utils;
+pub mod dma_buffer;
+pub mod hash_hw_code;
+pub mod poseidon_api;
+pub mod utils;
 
+pub use dma_buffer::*;
 pub use poseidon_api::*;
 pub use utils::*;

src/ingo_hash/poseidon_api.rs

@@ -2,7 +2,7 @@ use packed_struct::prelude::PackedStruct;
 use std::option::Option;
 use strum::IntoEnumIterator;
 
-use super::{hash_hw_code::*, TreeMode};
+use super::{hash_hw_code::*, DmaBuffer, TreeMode};
 use crate::{driver_client::*, error::*, utils::convert_to_32_byte_array};
 
 use csv;
@@ -71,6 +71,11 @@ impl PoseidonResult {
     }
 }
 
+pub struct PoseidonReadResult<'a> {
+    pub expected_result: usize,
+    pub result_store_buffer: &'a mut DmaBuffer,
+}
+
 impl DriverPrimitive<Hash, PoseidonInitializeParameters, &[u8], Vec<PoseidonResult>>
     for PoseidonClient
 {