Merge pull request #4 from inforion/v0.8.01

Version 0.8.01

.dockerignore

@@ -0,0 +1,25 @@
+.DS_Store
+.git
+.gitignore
+.dockerignore
+.idea
+*.iml
+
+veosroot
+scripts
+venv
+temp
+resources
+production
+build
+**/*/build
+**/*/buildroot
+.gradle
+.gradle-cache
+
+docker-build.sh
+settings*.gradle
+!settings.generic.gradle
+
+kopycat-modules
+kc*.tar.gz

.gitignore

@@ -50,5 +50,8 @@ resources/
 *.log
 
 *.kate-swp
+.m2
+/*.tar*
 
-
+.gradle-cache
+*_PACKING

Dockerfile

@@ -0,0 +1,28 @@
+FROM openjdk:11
+
+RUN apt-get update -y --allow-releaseinfo-change && \
+    apt-get install -y bash sed git socat picocom && \
+    rm -rf /var/lib/apt/lists/*
+
+WORKDIR /opt/kopycat
+
+COPY . /opt/kopycat/
+COPY settings.generic.gradle ./settings.gradle
+
+RUN echo "Copying m2 (if exists)..." && \
+    if [ -d ./.m2 ]; then mv -v ./.m2 /root/.m2; fi && \
+    echo "Setting up git repository..." && \
+    git config --global init.defaultBranch master && \
+    git config --global user.email unknown && \
+    git config --global user.name unknown && \
+    git init && \
+    touch README.md && \
+    git add README.md && \
+    git commit -m "Initial commit" && \
+    echo "Setting up the project..." && \
+    sed -i 's/\r//' ./gradlew && \
+    ./gradlew --no-daemon -i classes && \
+    echo "Post-process clearance" && \
+    ./gradlew --no-daemon -i clean && \
+    rm -rf /root/.gradle && \
+    echo "Finished"

VERSION

@@ -1 +1 @@
-0.8.00
+0.8.01

buildSrc/src/main/kotlin/ru/inforion/lab403/gradle/buildConfig/BuildConfigData.kt

@@ -28,6 +28,11 @@ package ru.inforion.lab403.gradle.buildConfig
 import org.gradle.api.tasks.Input
 
 data class BuildConfigData(
+    /**
+     * Overrides kcFullTopClass from the task
+     */
+    @Input var fullTopClass: String,
+
     /**
      * Configuration name
      */

buildSrc/src/main/kotlin/ru/inforion/lab403/gradle/buildConfig/BuildConfigDefaults.kt

@@ -83,6 +83,9 @@ class BuildConfigDefaults(
     fun logFilePath(configName: String): String =
         File(rootProjectDir, "temp/log-$kcPackageName-$configName.log").absolutePath
 
+    fun historyFilePath(): String =
+        File(rootProjectDir, "temp/$kcPackageName.history").absolutePath
+
     fun unsetArgument(): String = "__!!!_UNSET_ARGUMENT_!!!__"
     fun deleteArgument(): String = "__!!!_DELETE_ARGUMENT_!!!__"
 }

buildSrc/src/main/kotlin/ru/inforion/lab403/gradle/buildConfig/BuildConfigTask.kt

@@ -41,6 +41,12 @@ import java.io.File
 open class BuildConfigTask : DefaultTask() {
     companion object {
         const val TASK_IDENTIFIER = "createKopycatConfig"
+
+        private fun getKcTopClassFromFull(full: String): String = full.split(".").run {
+            getOrElse(this.size - 1) {
+                throw IllegalStateException("Unable to find -1 part of the top class full name '$this'")
+            }
+        }
     }
 
     @Internal
@@ -72,16 +78,6 @@ open class BuildConfigTask : DefaultTask() {
             }
     }
 
-    @get:Internal
-    val kcTopClass by lazy {
-        kcFullTopClass
-            .split(".").run {
-                getOrElse(this.size - 1) {
-                    throw IllegalStateException("Unable to find -1 part of the top class full name '$this'")
-                }
-            }
-    }
-
     /**
      * Path to a bunch of prebuild module's libraries.
      * For example, `production/modules`
@@ -111,7 +107,12 @@ open class BuildConfigTask : DefaultTask() {
 
     fun addConfig(closure: Closure<BuildConfigData>) {
         val nonameString = defaults.unsetArgument()
-        val data = BuildConfigData(nonameString, "", defaults.starter())
+        val data = BuildConfigData(
+            fullTopClass = kcFullTopClass,
+            name = nonameString,
+            description = "",
+            starterClass = defaults.starter(),
+        )
         closure.resolveStrategy = Closure.DELEGATE_FIRST
         closure.delegate = data
         closure.call()
@@ -160,9 +161,10 @@ open class BuildConfigTask : DefaultTask() {
             arguments["-rd"] = defaults.resourcesDir()
             arguments["-is"] = defaults.initScript()
             arguments["-lf"] = defaults.logFilePath(data.name)
+            arguments["-hf"] = defaults.historyFilePath()
         }
 
-        arguments["-n"] = kcTopClass
+        arguments["-n"] = getKcTopClassFromFull(data.fullTopClass)
         arguments["-y"] = kcModuleLibraries
         arguments["-l"] = kcLibraryDirectory
         if (data.kcConstructorArgumentsString.isNotEmpty()) {
@@ -207,7 +209,7 @@ open class BuildConfigTask : DefaultTask() {
     /**
      * Copies IDEA configs into the acceptable IDEA directory
      */
-    private fun intellijPostCopy( ) {
+    private fun intellijPostCopy() {
         val intelliJRunDir = File(rootProjectDir.path, ".idea/runConfigurations")
         intelliJRunDir.dirCheckOrCreate()
 

buildSrc/src/main/kotlin/ru/inforion/lab403/gradle/versionConfig/VersionConfigPlugin.kt

@@ -47,43 +47,43 @@ class VersionConfigPlugin : Plugin<Project> {
     }
 
     override fun apply(project: Project) {
-        val versionConfig = project.extensions.create(
-                VersionConfigExtension.extensionIdentifier,
-                VersionConfigExtension::class.java)
+        // val versionConfig = project.extensions.create(
+        //         VersionConfigExtension.extensionIdentifier,
+        //         VersionConfigExtension::class.java)
 
-        project.afterEvaluate { prj ->
+        // project.afterEvaluate { prj ->
 
-            // Check and post-configure extensions
-            versionConfig.configure(prj)
+        //     // Check and post-configure extensions
+        //     versionConfig.configure(prj)
 
-            prj.logger.debug(versionConfig.toString())
+        //     prj.logger.debug(versionConfig.toString())
 
-            val repo = openRepository(versionConfig.repositoryDirectory)
+        //     val repo = openRepository(versionConfig.repositoryDirectory)
 
-            val abbrev = repo.config.getInt("core", "abbrev", versionConfig.gitAbbrevLength)
-            if (abbrev != versionConfig.gitAbbrevLength) {
-                prj.logger.lifecycle("Repository 'core.abbrev=$abbrev' differ VersionConfig.abbrev -> use 'core.abbrev'")
-            }
+        //     val abbrev = repo.config.getInt("core", "abbrev", versionConfig.gitAbbrevLength)
+        //     if (abbrev != versionConfig.gitAbbrevLength) {
+        //         prj.logger.lifecycle("Repository 'core.abbrev=$abbrev' differ VersionConfig.abbrev -> use 'core.abbrev'")
+        //     }
 
-            val revision = repo.getGitRepositoryRevHash(versionConfig.gitRevisionRef, abbrev)
+        //     val revision = repo.getGitRepositoryRevHash(versionConfig.gitRevisionRef, abbrev)
 
-            versionConfig
-                    .processResources
-                    .filesMatching(versionConfig.searchPattern) {
-                        val buildInfo = mapOf(
-                                "initialized" to true,
-                                "name" to project.name,
-                                "version" to project.version,
-                                "revision" to revision,
-                                "timestamp" to versionConfig.formattedDatetime(),
-                                "build" to versionConfig.buildNumber)
-                        it.expand(buildInfo)
-                        val data = it.open().reader().readText()
-                        prj.logger.lifecycle("Build information data: ${data.lines()}")
-                    }
+        //     versionConfig
+        //             .processResources
+        //             .filesMatching(versionConfig.searchPattern) {
+        //                 val buildInfo = mapOf(
+        //                         "initialized" to true,
+        //                         "name" to project.name,
+        //                         "version" to project.version,
+        //                         "revision" to revision,
+        //                         "timestamp" to versionConfig.formattedDatetime(),
+        //                         "build" to versionConfig.buildNumber)
+        //                 it.expand(buildInfo)
+        //                 val data = it.open().reader().readText()
+        //                 prj.logger.lifecycle("Build information data: ${data.lines()}")
+        //             }
 
-            // Force to re-run processResources
-            versionConfig.processResources.outputs.upToDateWhen { false }
-        }
+        //     // Force to re-run processResources
+        //     versionConfig.processResources.outputs.upToDateWhen { false }
+        // }
     }
 }

gradle.properties

@@ -0,0 +1,3 @@
+kotlin.daemon.jvmargs=-Xmx10G
+org.gradle.caching=true
+org.gradle.parallel=true

kopycat-modules/cores/arm/src/main/kotlin/ru/inforion/lab403/kopycat/cores/arm/hardware/processors/AARMCPU.kt

@@ -28,9 +28,6 @@
 package ru.inforion.lab403.kopycat.cores.arm.hardware.processors
 
 import ru.inforion.lab403.common.extensions.*
-import ru.inforion.lab403.common.extensions.clr
-import ru.inforion.lab403.common.extensions.get
-import ru.inforion.lab403.common.extensions.set
 import ru.inforion.lab403.kopycat.cores.arm.enums.*
 import ru.inforion.lab403.kopycat.cores.arm.enums.Condition.*
 import ru.inforion.lab403.kopycat.cores.arm.exceptions.ARMHardwareException
@@ -58,13 +55,7 @@ abstract class AARMCPU(
     inner class Ports : ACPU<AARMCPU, AARMCore, AARMInstruction, GPR>.Ports() {
         override val mem = object : Master("armmem", busSize) {
             private fun ULong.maybeSwap(size: Int) = if (arm.cpu.BigEndian()) {
-                when (size) {
-                    1 -> this
-                    2 -> this.swap16()
-                    4 -> this.swap32()
-                    8 -> this.swap64()
-                    else -> TODO("Byte swap of size $size")
-                }
+                swap(size)
             } else {
                 this
             }

kopycat-modules/cores/mips/src/main/kotlin/ru/inforion/lab403/kopycat/cores/mips/hardware/processors/ACOP0.kt

@@ -26,7 +26,7 @@
 package ru.inforion.lab403.kopycat.cores.mips.hardware.processors
 
 import ru.inforion.lab403.common.extensions.*
-import ru.inforion.lab403.common.logging.WARNING
+import ru.inforion.lab403.common.logging.INFO
 import ru.inforion.lab403.common.logging.logger
 import ru.inforion.lab403.kopycat.cores.base.GenericSerializer
 import ru.inforion.lab403.kopycat.cores.base.abstracts.ACOP
@@ -44,7 +44,7 @@ import ru.inforion.lab403.kopycat.serializer.loadValue
 
 abstract class ACOP0(core: MipsCore, name: String) : ACOP<ACOP0, MipsCore>(core, name) {
     companion object {
-        @Transient val log = logger(WARNING)
+        @Transient val log = logger(INFO)
     }
 
     val cntrls = RSVDBank()

kopycat-modules/cores/mips/src/main/kotlin/ru/inforion/lab403/kopycat/cores/mips/hardware/processors/MipsMMU.kt

@@ -118,28 +118,33 @@ class MipsMMU(parent: Module, name: String, widthOut: ULong, val tlbEntries: Int
         AccessAction.STORE -> MipsHardwareException.AdES(mips.pc, ea)
     }
 
-    private fun isAMMapped(ea: ULong, access: AccessAction, am: ULong, eu: Boolean) = if (mips.cop.regs.Status.ERL) {
+    private fun isAccessModeMapped(ea: ULong, access: AccessAction, am: ULong, eu: Boolean) = if (mips.cop.regs.Status.ERL) {
         if (eu) {
             false
         } else {
-            // KM
+            // Kernel mode
             ((0x7000_0000 shl am.int) < 0)
         }
-    } else when (CPRBank.ProcessorMode.fromKSU(mips.cop.regs.Status)) {
-        CPRBank.ProcessorMode.Kernel -> ((0x7000_0000 shl am.int) < 0)
-        CPRBank.ProcessorMode.Supervisor -> {
-            val mask = 0xc038_0000
-            if ((mask shl am.int) < 0) {
-                throw adex(ea, access)
+    } else if (mips.cop.regs.Status.EXL /* || mips.cop.regs.Status.ERL */) {
+        // Effective KSU = 0; kernel mode
+        ((0x7000_0000 shl am.int) < 0)
+    } else {
+        when (CPRBank.ProcessorMode.fromKSU(mips.cop.regs.Status)) {
+            CPRBank.ProcessorMode.Kernel -> ((0x7000_0000 shl am.int) < 0)
+            CPRBank.ProcessorMode.Supervisor -> {
+                val mask = 0xc038_0000.int
+                if ((mask shl am.int) < 0) {
+                    throw adex(ea, access)
+                }
+                (((mask shl 8) shl am.int) < 0)
             }
-            (((mask shl 8) shl am.int) < 0)
-        }
-        else -> {
-            val mask = 0xe418_0000
-            if ((mask shl am.int) < 0) {
-                throw adex(ea, access)
+            else -> {
+                val mask = 0xe418_0000.int
+                if ((mask shl am.int) < 0) {
+                    throw adex(ea, access)
+                }
+                (((mask shl 8) shl am.int) < 0)
             }
-            (((mask shl 8) shl am.int) < 0)
         }
     }
 
@@ -150,7 +155,7 @@ class MipsMMU(parent: Module, name: String, widthOut: ULong, val tlbEntries: Int
         eu: Boolean,
         segmask: ULong,
         physicalBase: ULong,
-    ) = if (isAMMapped(ea, access, am, eu)) {
+    ) = if (isAccessModeMapped(ea, access, am, eu)) {
         tlbFindAddress(ea, access)
     } else {
         physicalBase or (ea and segmask)
@@ -323,11 +328,16 @@ class MipsMMU(parent: Module, name: String, widthOut: ULong, val tlbEntries: Int
                 ea in 0xFFFF_FFFF_FFFF_8000uL..0xFFFF_FFFF_FFFF_BFFFuL) {
                 // CVMSEG
 
-                val enabled = when (CPRBank.ProcessorMode.fromKSU(mips.cop.regs.Status)) {
-                    CPRBank.ProcessorMode.Kernel -> mips.cop.regs.CvmMemCtl?.CVMSEGENAK
-                    CPRBank.ProcessorMode.Supervisor -> mips.cop.regs.CvmMemCtl?.CVMSEGENAS
-                    CPRBank.ProcessorMode.User -> mips.cop.regs.CvmMemCtl?.CVMSEGENAU
-                    else -> false
+                val enabled = if (mips.cop.regs.Status.EXL || mips.cop.regs.Status.ERL) {
+                    // Effective KSU = 0; kernel mode
+                    mips.cop.regs.CvmMemCtl?.CVMSEGENAK
+                } else {
+                    when (CPRBank.ProcessorMode.fromKSU(mips.cop.regs.Status)) {
+                        CPRBank.ProcessorMode.Kernel -> mips.cop.regs.CvmMemCtl?.CVMSEGENAK
+                        CPRBank.ProcessorMode.Supervisor -> mips.cop.regs.CvmMemCtl?.CVMSEGENAS
+                        CPRBank.ProcessorMode.User -> mips.cop.regs.CvmMemCtl?.CVMSEGENAU
+                        else -> false
+                    }
                 }
 
                 if (enabled == true) {