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ARM: Align stack pointer to support SCTLR_EL1.SA0 #495

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@ayrtonm ayrtonm commented Jan 7, 2025

It seems that the pixel's kernel sets SCTLR_EL1.SA0 (unconditionally?) so stack accesses at EL0 must be aligned to 16 bytes. This fixes a few accesses in our handwritten asm to enable running the minimal test on MTE-enabled hardware. There are likely some stack accesses in the callgates that also need to be fixed and I'd like to fix the TODO in allocate_stack before merging this (@fw-immunant any ideas there?). I checked that when the minimal test binary is run from a tmpfs MTE protection for its writeable file-backed mappings are enforced (see #469).

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It turns out we must do this regardless of the kernel SCTLR flags because it's required by the AArch64 ABI and assumed by LLVM when performing codegen:

I thought it was an LLVM codegen bug but it turns out LLVM was relying on the "sp is always 16B-aligned" guarantee when emitting instructions so it knew it was safe to AND an sp-derived pointer by #0xfffffffffffff0 (note trailing 0) while tagging it

(from here)

I had locally made changes equivalent to the allocate_stack change here, so r+ on that account. But I don't understand the second commit here--can it have a comment explaining why a dummy register should be pushed and popped? What failures/problems occur without this commit?

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ayrtonm commented Jan 7, 2025

I had locally made changes equivalent to the allocate_stack change here, so r+ on that account.

Do some accesses/calls in the call gates assume the initial stack pointer mod 16 is 8?

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I had locally made changes equivalent to the allocate_stack change here, so r+ on that account.

Do some accesses/calls in the call gates assume the initial stack pointer mod 16 is 8?

On x86_64, I'm pretty sure call gates don't rely on this because they don't use aligned mov instructions, but the more relevant case (where I'm seeing errors in the structs test) is AArch64, and I'm less familiar with that code. We do some padding based on count of registers, and that might be at fault for the issues I see on my branch. But I don't think that's a concern of this PR, is it?

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Please document why we should push a dummy register as well as the old stack pointer. Otherwise looks good.

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