diff --git a/src/csharp/Intel/Generator/Misc/Python/PyiGen.cs b/src/csharp/Intel/Generator/Misc/Python/PyiGen.cs
index 18607d9a7..56af71912 100644
--- a/src/csharp/Intel/Generator/Misc/Python/PyiGen.cs
+++ b/src/csharp/Intel/Generator/Misc/Python/PyiGen.cs
@@ -125,7 +125,7 @@ void WritePyi(List<PyClass> classes) {
 						}
 					}
 					else
-						writer.WriteLine($"class {pythonName}({baseClass}): ...");
+						writer.WriteLine($"class {pythonName}({baseClass}): ... # type: ignore");
 				}
 
 				var docGen = new PyiDocGen();
diff --git a/src/rust/iced-x86-py/src/iced_x86/_iced_x86_py.pyi b/src/rust/iced-x86-py/src/iced_x86/_iced_x86_py.pyi
index 20b7a5a7f..d9335004f 100644
--- a/src/rust/iced-x86-py/src/iced_x86/_iced_x86_py.pyi
+++ b/src/rust/iced-x86-py/src/iced_x86/_iced_x86_py.pyi
@@ -9,53 +9,53 @@ from collections.abc import Iterator
 from enum import IntEnum, IntFlag
 from typing import Any, List, Optional, Union
 
-class CC_a(IntEnum): ...
-class CC_ae(IntEnum): ...
-class CC_b(IntEnum): ...
-class CC_be(IntEnum): ...
-class CC_e(IntEnum): ...
-class CC_g(IntEnum): ...
-class CC_ge(IntEnum): ...
-class CC_l(IntEnum): ...
-class CC_le(IntEnum): ...
-class CC_ne(IntEnum): ...
-class CC_np(IntEnum): ...
-class CC_p(IntEnum): ...
-class Code(IntEnum): ...
-class CodeSize(IntEnum): ...
-class ConditionCode(IntEnum): ...
-class CpuidFeature(IntEnum): ...
-class DecoderError(IntEnum): ...
+class CC_a(IntEnum): ... # type: ignore
+class CC_ae(IntEnum): ... # type: ignore
+class CC_b(IntEnum): ... # type: ignore
+class CC_be(IntEnum): ... # type: ignore
+class CC_e(IntEnum): ... # type: ignore
+class CC_g(IntEnum): ... # type: ignore
+class CC_ge(IntEnum): ... # type: ignore
+class CC_l(IntEnum): ... # type: ignore
+class CC_le(IntEnum): ... # type: ignore
+class CC_ne(IntEnum): ... # type: ignore
+class CC_np(IntEnum): ... # type: ignore
+class CC_p(IntEnum): ... # type: ignore
+class Code(IntEnum): ... # type: ignore
+class CodeSize(IntEnum): ... # type: ignore
+class ConditionCode(IntEnum): ... # type: ignore
+class CpuidFeature(IntEnum): ... # type: ignore
+class DecoderError(IntEnum): ... # type: ignore
 class DecoderOptions(IntFlag):
 	NONE = 0x0000_0000
 	...
-class EncodingKind(IntEnum): ...
-class FlowControl(IntEnum): ...
+class EncodingKind(IntEnum): ... # type: ignore
+class FlowControl(IntEnum): ... # type: ignore
 class FormatMnemonicOptions(IntFlag):
 	NONE = 0x0000_0000
 	...
-class FormatterSyntax(IntEnum): ...
-class MandatoryPrefix(IntEnum): ...
-class MemorySize(IntEnum): ...
-class MemorySizeOptions(IntEnum): ...
-class Mnemonic(IntEnum): ...
-class MvexConvFn(IntEnum): ...
-class MvexEHBit(IntEnum): ...
-class MvexRegMemConv(IntEnum): ...
-class MvexTupleTypeLutKind(IntEnum): ...
-class OpAccess(IntEnum): ...
-class OpCodeOperandKind(IntEnum): ...
-class OpCodeTableKind(IntEnum): ...
-class OpKind(IntEnum): ...
+class FormatterSyntax(IntEnum): ... # type: ignore
+class MandatoryPrefix(IntEnum): ... # type: ignore
+class MemorySize(IntEnum): ... # type: ignore
+class MemorySizeOptions(IntEnum): ... # type: ignore
+class Mnemonic(IntEnum): ... # type: ignore
+class MvexConvFn(IntEnum): ... # type: ignore
+class MvexEHBit(IntEnum): ... # type: ignore
+class MvexRegMemConv(IntEnum): ... # type: ignore
+class MvexTupleTypeLutKind(IntEnum): ... # type: ignore
+class OpAccess(IntEnum): ... # type: ignore
+class OpCodeOperandKind(IntEnum): ... # type: ignore
+class OpCodeTableKind(IntEnum): ... # type: ignore
+class OpKind(IntEnum): ... # type: ignore
 class Register(IntEnum):
 	NONE = 0
 	...
 class RepPrefixKind(IntEnum):
 	NONE = 0
 	...
-class RflagsBits(IntFlag): ...
-class RoundingControl(IntEnum): ...
-class TupleType(IntEnum): ...
+class RflagsBits(IntFlag): ... # type: ignore
+class RoundingControl(IntEnum): ... # type: ignore
+class TupleType(IntEnum): ... # type: ignore
 
 class BlockEncoder:
 	"""