From b8b1e255b18603b8b39ac9ea5b7e69344034cb48 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michal=20=C5=A0imek?= Date: Wed, 15 Jan 2025 18:44:45 +0100 Subject: [PATCH] Enable AMD 1-wire AXI IP and Zynq GPIO drivers (#3795) Zynq GPIO driver is used on AMD/Xilinx Kria platform for ETH phy reset. Macb and PHY drivers are already enabled. 1 wire IP can be used for reading sensors via PMOD connector. --- .../board/arm-uefi/generic-aarch64/kernel.config | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/buildroot-external/board/arm-uefi/generic-aarch64/kernel.config b/buildroot-external/board/arm-uefi/generic-aarch64/kernel.config index 888bcce3969..a87f91fa14a 100644 --- a/buildroot-external/board/arm-uefi/generic-aarch64/kernel.config +++ b/buildroot-external/board/arm-uefi/generic-aarch64/kernel.config @@ -57,3 +57,9 @@ CONFIG_PCI_HYPERV_INTERFACE=m CONFIG_FB_HYPERV=y CONFIG_I6300ESB_WDT=y + +# GPIO support +CONFIG_GPIO_ZYNQ=m + +# 1-wire +CONFIG_W1_MASTER_AMD_AXI=m