TEST

f4pga · May 14, 2022 · 1e864c3 · 1e864c3
1 parent 3a05b89
commit 1e864c3
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Showing 3 changed files with 3 additions and 3 deletions.
diff --git a/.gitmodules b/.gitmodules
@@ -70,6 +70,6 @@
 [submodule "third_party/ql-pp3e"]
 	path = third_party/ql-pp3e
 	url = https://github.com/QuickLogic-Corp/PolarPro3E
-[submodule "quicklogic/common/utils/quicklogic-timings-importer"]
+[submodule "archs/quicklogic/common/utils/quicklogic-timings-importer"]
 	path = archs/quicklogic/common/utils/quicklogic-timings-importer
 	url = https://github.com/QuickLogic-Corp/quicklogic-timings-importer
diff --git a/conda_lock.yml b/conda_lock.yml
@@ -185,7 +185,7 @@ dependencies:
     - -e third_party/liteeth
     - -e third_party/liteiclink
     - -e third_party/migen
-    - -e quicklogic/common/utils/quicklogic-timings-importer
+    - -e archs/quicklogic/common/utils/quicklogic-timings-importer
     - third_party/pythondata-cpu-vexriscv
     - third_party/pythondata-software-compiler_rt
 prefix: /usr/share/miniconda/envs/f4pga_arch_def_base
diff --git a/requirements.txt b/requirements.txt
@@ -37,7 +37,7 @@ git+https://github.com/chipsalliance/f4pga-rr-graph.git#egg=rr-graph
 -e third_party/liteeth
 -e third_party/liteiclink
 -e third_party/migen
--e quicklogic/common/utils/quicklogic-timings-importer
+-e archs/quicklogic/common/utils/quicklogic-timings-importer
 third_party/pythondata-cpu-vexriscv
 third_party/pythondata-software-compiler_rt