diff --git a/esp32s2/src/copy_dma.rs b/esp32s2/src/copy_dma.rs index 281a2e13c..10fc75b51 100644 --- a/esp32s2/src/copy_dma.rs +++ b/esp32s2/src/copy_dma.rs @@ -134,7 +134,7 @@ pub mod out_link; pub type IN_LINK = crate::Reg; #[doc = "Link descriptor address and control"] pub mod in_link; -#[doc = "CONF (r) register accessor: Copy DMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf`] module"] +#[doc = "CONF (rw) register accessor: Copy DMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf`] module"] pub type CONF = crate::Reg; #[doc = "Copy DMA configuration register"] pub mod conf; diff --git a/esp32s2/src/copy_dma/conf.rs b/esp32s2/src/copy_dma/conf.rs index e899b73a0..91f83d77b 100644 --- a/esp32s2/src/copy_dma/conf.rs +++ b/esp32s2/src/copy_dma/conf.rs @@ -1,21 +1,39 @@ #[doc = "Register `CONF` reader"] pub type R = crate::R; +#[doc = "Register `CONF` writer"] +pub type W = crate::W; #[doc = "Field `IN_RST` reader - Set this bit to reset in DMA FSM."] pub type IN_RST_R = crate::BitReader; +#[doc = "Field `IN_RST` writer - Set this bit to reset in DMA FSM."] +pub type IN_RST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUT_RST` reader - Set this bit to reset out DMA FSM."] pub type OUT_RST_R = crate::BitReader; +#[doc = "Field `OUT_RST` writer - Set this bit to reset out DMA FSM."] +pub type OUT_RST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CMDFIFO_RST` reader - Set this bit to reset in_cmd FIFO and out_cmd FIFO."] pub type CMDFIFO_RST_R = crate::BitReader; +#[doc = "Field `CMDFIFO_RST` writer - Set this bit to reset in_cmd FIFO and out_cmd FIFO."] +pub type CMDFIFO_RST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FIFO_RST` reader - Set this bit to reset data in RX FIFO."] pub type FIFO_RST_R = crate::BitReader; +#[doc = "Field `FIFO_RST` writer - Set this bit to reset data in RX FIFO."] +pub type FIFO_RST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUT_OWNER` reader - This is used to configure the owner bit in transmit descriptor. This is effective only when you set OUT_AUTO_WRBACK."] pub type OUT_OWNER_R = crate::BitReader; +#[doc = "Field `OUT_OWNER` writer - This is used to configure the owner bit in transmit descriptor. This is effective only when you set OUT_AUTO_WRBACK."] +pub type OUT_OWNER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IN_OWNER` reader - This is used to configure the owner bit in receive descriptor."] pub type IN_OWNER_R = crate::BitReader; +#[doc = "Field `IN_OWNER` writer - This is used to configure the owner bit in receive descriptor."] +pub type IN_OWNER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUT_AUTO_WRBACK` reader - This bit is used to write back out descriptor when hardware has already used this descriptor."] pub type OUT_AUTO_WRBACK_R = crate::BitReader; +#[doc = "Field `OUT_AUTO_WRBACK` writer - This bit is used to write back out descriptor when hardware has already used this descriptor."] +pub type OUT_AUTO_WRBACK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CHECK_OWNER` reader - Set this bit to enable owner bit check in descriptor."] pub type CHECK_OWNER_R = crate::BitReader; +#[doc = "Field `CHECK_OWNER` writer - Set this bit to enable owner bit check in descriptor."] +pub type CHECK_OWNER_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers.\n\nValue on reset: 0"] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[derive(Clone, Copy, Debug, PartialEq, Eq)] @@ -53,6 +71,23 @@ impl CLK_EN_R { *self == CLK_EN::Force } } +#[doc = "Field `CLK_EN` writer - 1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers."] +pub type CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG, CLK_EN>; +impl<'a, REG> CLK_EN_W<'a, REG> +where + REG: crate::Writable + crate::RegisterSpec, +{ + #[doc = "Support clock only when application writes registers"] + #[inline(always)] + pub fn on_write(self) -> &'a mut crate::W { + self.variant(CLK_EN::OnWrite) + } + #[doc = "Force clock on for register"] + #[inline(always)] + pub fn force(self) -> &'a mut crate::W { + self.variant(CLK_EN::Force) + } +} impl R { #[doc = "Bit 0 - Set this bit to reset in DMA FSM."] #[inline(always)] @@ -116,13 +151,66 @@ impl core::fmt::Debug for R { .finish() } } -#[doc = "Copy DMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +impl W { + #[doc = "Bit 0 - Set this bit to reset in DMA FSM."] + #[inline(always)] + pub fn in_rst(&mut self) -> IN_RST_W { + IN_RST_W::new(self, 0) + } + #[doc = "Bit 1 - Set this bit to reset out DMA FSM."] + #[inline(always)] + pub fn out_rst(&mut self) -> OUT_RST_W { + OUT_RST_W::new(self, 1) + } + #[doc = "Bit 2 - Set this bit to reset in_cmd FIFO and out_cmd FIFO."] + #[inline(always)] + pub fn cmdfifo_rst(&mut self) -> CMDFIFO_RST_W { + CMDFIFO_RST_W::new(self, 2) + } + #[doc = "Bit 3 - Set this bit to reset data in RX FIFO."] + #[inline(always)] + pub fn fifo_rst(&mut self) -> FIFO_RST_W { + FIFO_RST_W::new(self, 3) + } + #[doc = "Bit 4 - This is used to configure the owner bit in transmit descriptor. This is effective only when you set OUT_AUTO_WRBACK."] + #[inline(always)] + pub fn out_owner(&mut self) -> OUT_OWNER_W { + OUT_OWNER_W::new(self, 4) + } + #[doc = "Bit 5 - This is used to configure the owner bit in receive descriptor."] + #[inline(always)] + pub fn in_owner(&mut self) -> IN_OWNER_W { + IN_OWNER_W::new(self, 5) + } + #[doc = "Bit 6 - This bit is used to write back out descriptor when hardware has already used this descriptor."] + #[inline(always)] + pub fn out_auto_wrback(&mut self) -> OUT_AUTO_WRBACK_W { + OUT_AUTO_WRBACK_W::new(self, 6) + } + #[doc = "Bit 7 - Set this bit to enable owner bit check in descriptor."] + #[inline(always)] + pub fn check_owner(&mut self) -> CHECK_OWNER_W { + CHECK_OWNER_W::new(self, 7) + } + #[doc = "Bit 31 - 1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers."] + #[inline(always)] + pub fn clk_en(&mut self) -> CLK_EN_W { + CLK_EN_W::new(self, 31) + } +} +#[doc = "Copy DMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CONF_SPEC; impl crate::RegisterSpec for CONF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`conf::R`](R) reader structure"] impl crate::Readable for CONF_SPEC {} +#[doc = "`write(|w| ..)` method takes [`conf::W`](W) writer structure"] +impl crate::Writable for CONF_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} #[doc = "`reset()` method sets CONF to value 0"] impl crate::Resettable for CONF_SPEC { const RESET_VALUE: u32 = 0; diff --git a/esp32s2/svd/patches/esp32s2.yaml b/esp32s2/svd/patches/esp32s2.yaml index 09cafdaaf..3fa410093 100644 --- a/esp32s2/svd/patches/esp32s2.yaml +++ b/esp32s2/svd/patches/esp32s2.yaml @@ -236,7 +236,7 @@ _add: description: "Copy DMA configuration register" addressOffset: 0x3C size: 32 - access: read-only + access: read-write resetValue: 0x0 fields: IN_RST: @@ -997,7 +997,6 @@ _add: bitWidth: 32 access: read-only - DMA_OUT_DSCR_BF0: description: "Address of last transmit descriptor" addressOffset: 0x5C @@ -1034,8 +1033,16 @@ COPY_DMA: CRYPTO_DMA: CONF: OUT_EOF_MODE: - ON_PUSH: [0, "EOF flag is generated when the last data with EOF would be transmitted has been pushed into FIFO of Crypto DMA"] - ON_POP: [1, "EOF flag is generated when the last data with EOF would be transmitted has been popped from FIFO of Crypto DMA"] + ON_PUSH: + [ + 0, + "EOF flag is generated when the last data with EOF would be transmitted has been pushed into FIFO of Crypto DMA", + ] + ON_POP: + [ + 1, + "EOF flag is generated when the last data with EOF would be transmitted has been popped from FIFO of Crypto DMA", + ] OUT_LINK: OUTLINK_PARK: IDLE: [1, "The transmit descriptor’s FSM is in idle state"] @@ -1418,7 +1425,7 @@ RSA: INTERRUPT_ENA: name: INT_ENA _include: - - "esp32s2-wifi.yaml" + - "esp32s2-wifi.yaml" SYSCON: WIFI_RST_EN: