diff --git a/esp32p4/src/gpio.rs b/esp32p4/src/gpio.rs index b606b52cb6..a2a1f85f1e 100644 --- a/esp32p4/src/gpio.rs +++ b/esp32p4/src/gpio.rs @@ -33,248 +33,15 @@ pub struct RegisterBlock { status_next1: STATUS_NEXT1, pin: [PIN; 57], _reserved29: [u8; 0x04], - func1_in_sel_cfg: FUNC1_IN_SEL_CFG, - func2_in_sel_cfg: FUNC2_IN_SEL_CFG, - func3_in_sel_cfg: FUNC3_IN_SEL_CFG, - func4_in_sel_cfg: FUNC4_IN_SEL_CFG, - func5_in_sel_cfg: FUNC5_IN_SEL_CFG, - func6_in_sel_cfg: FUNC6_IN_SEL_CFG, - func7_in_sel_cfg: FUNC7_IN_SEL_CFG, - func8_in_sel_cfg: FUNC8_IN_SEL_CFG, - func9_in_sel_cfg: FUNC9_IN_SEL_CFG, - func10_in_sel_cfg: FUNC10_IN_SEL_CFG, - func11_in_sel_cfg: FUNC11_IN_SEL_CFG, - func12_in_sel_cfg: FUNC12_IN_SEL_CFG, - func13_in_sel_cfg: FUNC13_IN_SEL_CFG, - func14_in_sel_cfg: FUNC14_IN_SEL_CFG, - func15_in_sel_cfg: FUNC15_IN_SEL_CFG, - func16_in_sel_cfg: FUNC16_IN_SEL_CFG, - func17_in_sel_cfg: FUNC17_IN_SEL_CFG, - func18_in_sel_cfg: FUNC18_IN_SEL_CFG, - func19_in_sel_cfg: FUNC19_IN_SEL_CFG, - func20_in_sel_cfg: FUNC20_IN_SEL_CFG, - func21_in_sel_cfg: FUNC21_IN_SEL_CFG, - func22_in_sel_cfg: FUNC22_IN_SEL_CFG, - func23_in_sel_cfg: FUNC23_IN_SEL_CFG, - func24_in_sel_cfg: FUNC24_IN_SEL_CFG, - func25_in_sel_cfg: FUNC25_IN_SEL_CFG, - func26_in_sel_cfg: FUNC26_IN_SEL_CFG, - func27_in_sel_cfg: FUNC27_IN_SEL_CFG, - func28_in_sel_cfg: FUNC28_IN_SEL_CFG, - func29_in_sel_cfg: FUNC29_IN_SEL_CFG, - func30_in_sel_cfg: FUNC30_IN_SEL_CFG, - func31_in_sel_cfg: FUNC31_IN_SEL_CFG, - func32_in_sel_cfg: FUNC32_IN_SEL_CFG, - func33_in_sel_cfg: FUNC33_IN_SEL_CFG, - func34_in_sel_cfg: FUNC34_IN_SEL_CFG, - func35_in_sel_cfg: FUNC35_IN_SEL_CFG, - func36_in_sel_cfg: FUNC36_IN_SEL_CFG, - func37_in_sel_cfg: FUNC37_IN_SEL_CFG, - func38_in_sel_cfg: FUNC38_IN_SEL_CFG, - func39_in_sel_cfg: FUNC39_IN_SEL_CFG, - func40_in_sel_cfg: FUNC40_IN_SEL_CFG, - func41_in_sel_cfg: FUNC41_IN_SEL_CFG, - func42_in_sel_cfg: FUNC42_IN_SEL_CFG, - func43_in_sel_cfg: FUNC43_IN_SEL_CFG, - func44_in_sel_cfg: FUNC44_IN_SEL_CFG, - func45_in_sel_cfg: FUNC45_IN_SEL_CFG, - _reserved74: [u8; 0x04], - func47_in_sel_cfg: FUNC47_IN_SEL_CFG, - func48_in_sel_cfg: FUNC48_IN_SEL_CFG, - func49_in_sel_cfg: FUNC49_IN_SEL_CFG, - func50_in_sel_cfg: FUNC50_IN_SEL_CFG, - func51_in_sel_cfg: FUNC51_IN_SEL_CFG, - func52_in_sel_cfg: FUNC52_IN_SEL_CFG, - func53_in_sel_cfg: FUNC53_IN_SEL_CFG, - func54_in_sel_cfg: FUNC54_IN_SEL_CFG, - func55_in_sel_cfg: FUNC55_IN_SEL_CFG, - func56_in_sel_cfg: FUNC56_IN_SEL_CFG, - func57_in_sel_cfg: FUNC57_IN_SEL_CFG, - func58_in_sel_cfg: FUNC58_IN_SEL_CFG, - func59_in_sel_cfg: FUNC59_IN_SEL_CFG, - func60_in_sel_cfg: FUNC60_IN_SEL_CFG, - func61_in_sel_cfg: FUNC61_IN_SEL_CFG, - func62_in_sel_cfg: FUNC62_IN_SEL_CFG, - func63_in_sel_cfg: FUNC63_IN_SEL_CFG, - func64_in_sel_cfg: FUNC64_IN_SEL_CFG, - func65_in_sel_cfg: FUNC65_IN_SEL_CFG, - func66_in_sel_cfg: FUNC66_IN_SEL_CFG, - _reserved94: [u8; 0x04], - func68_in_sel_cfg: FUNC68_IN_SEL_CFG, - func69_in_sel_cfg: FUNC69_IN_SEL_CFG, - func70_in_sel_cfg: FUNC70_IN_SEL_CFG, - func71_in_sel_cfg: FUNC71_IN_SEL_CFG, - _reserved98: [u8; 0x08], - func74_in_sel_cfg: FUNC74_IN_SEL_CFG, - func75_in_sel_cfg: FUNC75_IN_SEL_CFG, - func76_in_sel_cfg: FUNC76_IN_SEL_CFG, - func77_in_sel_cfg: FUNC77_IN_SEL_CFG, - func78_in_sel_cfg: FUNC78_IN_SEL_CFG, - _reserved103: [u8; 0x04], - func80_in_sel_cfg: FUNC80_IN_SEL_CFG, - _reserved104: [u8; 0x08], - func83_in_sel_cfg: FUNC83_IN_SEL_CFG, - _reserved105: [u8; 0x08], - func86_in_sel_cfg: FUNC86_IN_SEL_CFG, - _reserved106: [u8; 0x08], - func89_in_sel_cfg: FUNC89_IN_SEL_CFG, - func90_in_sel_cfg: FUNC90_IN_SEL_CFG, - func91_in_sel_cfg: FUNC91_IN_SEL_CFG, - func92_in_sel_cfg: FUNC92_IN_SEL_CFG, - func93_in_sel_cfg: FUNC93_IN_SEL_CFG, - func94_in_sel_cfg: FUNC94_IN_SEL_CFG, - func95_in_sel_cfg: FUNC95_IN_SEL_CFG, - func96_in_sel_cfg: FUNC96_IN_SEL_CFG, - func97_in_sel_cfg: FUNC97_IN_SEL_CFG, - func98_in_sel_cfg: FUNC98_IN_SEL_CFG, - func99_in_sel_cfg: FUNC99_IN_SEL_CFG, - func100_in_sel_cfg: FUNC100_IN_SEL_CFG, - func101_in_sel_cfg: FUNC101_IN_SEL_CFG, - func102_in_sel_cfg: FUNC102_IN_SEL_CFG, - func103_in_sel_cfg: FUNC103_IN_SEL_CFG, - func104_in_sel_cfg: FUNC104_IN_SEL_CFG, - func105_in_sel_cfg: FUNC105_IN_SEL_CFG, - func106_in_sel_cfg: FUNC106_IN_SEL_CFG, - func107_in_sel_cfg: FUNC107_IN_SEL_CFG, - func108_in_sel_cfg: FUNC108_IN_SEL_CFG, - func109_in_sel_cfg: FUNC109_IN_SEL_CFG, - func110_in_sel_cfg: FUNC110_IN_SEL_CFG, - func111_in_sel_cfg: FUNC111_IN_SEL_CFG, - func112_in_sel_cfg: FUNC112_IN_SEL_CFG, - func113_in_sel_cfg: FUNC113_IN_SEL_CFG, - func114_in_sel_cfg: FUNC114_IN_SEL_CFG, - _reserved132: [u8; 0x08], - func117_in_sel_cfg: FUNC117_IN_SEL_CFG, - func118_in_sel_cfg: FUNC118_IN_SEL_CFG, - _reserved134: [u8; 0x1c], - func126_in_sel_cfg: FUNC126_IN_SEL_CFG, - func127_in_sel_cfg: FUNC127_IN_SEL_CFG, - func128_in_sel_cfg: FUNC128_IN_SEL_CFG, - func129_in_sel_cfg: FUNC129_IN_SEL_CFG, - func130_in_sel_cfg: FUNC130_IN_SEL_CFG, - func131_in_sel_cfg: FUNC131_IN_SEL_CFG, - func132_in_sel_cfg: FUNC132_IN_SEL_CFG, - func133_in_sel_cfg: FUNC133_IN_SEL_CFG, - func134_in_sel_cfg: FUNC134_IN_SEL_CFG, - func135_in_sel_cfg: FUNC135_IN_SEL_CFG, - func136_in_sel_cfg: FUNC136_IN_SEL_CFG, - func137_in_sel_cfg: FUNC137_IN_SEL_CFG, - func138_in_sel_cfg: FUNC138_IN_SEL_CFG, - func139_in_sel_cfg: FUNC139_IN_SEL_CFG, - func140_in_sel_cfg: FUNC140_IN_SEL_CFG, - func141_in_sel_cfg: FUNC141_IN_SEL_CFG, - func142_in_sel_cfg: FUNC142_IN_SEL_CFG, - func143_in_sel_cfg: FUNC143_IN_SEL_CFG, - func144_in_sel_cfg: FUNC144_IN_SEL_CFG, - func145_in_sel_cfg: FUNC145_IN_SEL_CFG, - func146_in_sel_cfg: FUNC146_IN_SEL_CFG, - func147_in_sel_cfg: FUNC147_IN_SEL_CFG, - func148_in_sel_cfg: FUNC148_IN_SEL_CFG, - func149_in_sel_cfg: FUNC149_IN_SEL_CFG, - func150_in_sel_cfg: FUNC150_IN_SEL_CFG, - func151_in_sel_cfg: FUNC151_IN_SEL_CFG, - func152_in_sel_cfg: FUNC152_IN_SEL_CFG, - func153_in_sel_cfg: FUNC153_IN_SEL_CFG, - func154_in_sel_cfg: FUNC154_IN_SEL_CFG, - func155_in_sel_cfg: FUNC155_IN_SEL_CFG, - func156_in_sel_cfg: FUNC156_IN_SEL_CFG, - _reserved165: [u8; 0x04], - func158_in_sel_cfg: FUNC158_IN_SEL_CFG, - func159_in_sel_cfg: FUNC159_IN_SEL_CFG, - func160_in_sel_cfg: FUNC160_IN_SEL_CFG, - func161_in_sel_cfg: FUNC161_IN_SEL_CFG, - func162_in_sel_cfg: FUNC162_IN_SEL_CFG, - func163_in_sel_cfg: FUNC163_IN_SEL_CFG, - func164_in_sel_cfg: FUNC164_IN_SEL_CFG, - func165_in_sel_cfg: FUNC165_IN_SEL_CFG, - func166_in_sel_cfg: FUNC166_IN_SEL_CFG, - func167_in_sel_cfg: FUNC167_IN_SEL_CFG, - func168_in_sel_cfg: FUNC168_IN_SEL_CFG, - func169_in_sel_cfg: FUNC169_IN_SEL_CFG, - func170_in_sel_cfg: FUNC170_IN_SEL_CFG, - func171_in_sel_cfg: FUNC171_IN_SEL_CFG, - func172_in_sel_cfg: FUNC172_IN_SEL_CFG, - func173_in_sel_cfg: FUNC173_IN_SEL_CFG, - func174_in_sel_cfg: FUNC174_IN_SEL_CFG, - func175_in_sel_cfg: FUNC175_IN_SEL_CFG, - func176_in_sel_cfg: FUNC176_IN_SEL_CFG, - func177_in_sel_cfg: FUNC177_IN_SEL_CFG, - func178_in_sel_cfg: FUNC178_IN_SEL_CFG, - func179_in_sel_cfg: FUNC179_IN_SEL_CFG, - func180_in_sel_cfg: FUNC180_IN_SEL_CFG, - func181_in_sel_cfg: FUNC181_IN_SEL_CFG, - func182_in_sel_cfg: FUNC182_IN_SEL_CFG, - func183_in_sel_cfg: FUNC183_IN_SEL_CFG, - func184_in_sel_cfg: FUNC184_IN_SEL_CFG, - func185_in_sel_cfg: FUNC185_IN_SEL_CFG, - func186_in_sel_cfg: FUNC186_IN_SEL_CFG, - func187_in_sel_cfg: FUNC187_IN_SEL_CFG, - func188_in_sel_cfg: FUNC188_IN_SEL_CFG, - func189_in_sel_cfg: FUNC189_IN_SEL_CFG, - func190_in_sel_cfg: FUNC190_IN_SEL_CFG, - func191_in_sel_cfg: FUNC191_IN_SEL_CFG, - func192_in_sel_cfg: FUNC192_IN_SEL_CFG, - func193_in_sel_cfg: FUNC193_IN_SEL_CFG, - func194_in_sel_cfg: FUNC194_IN_SEL_CFG, - func195_in_sel_cfg: FUNC195_IN_SEL_CFG, - func196_in_sel_cfg: FUNC196_IN_SEL_CFG, - func197_in_sel_cfg: FUNC197_IN_SEL_CFG, - func198_in_sel_cfg: FUNC198_IN_SEL_CFG, - func199_in_sel_cfg: FUNC199_IN_SEL_CFG, - func200_in_sel_cfg: FUNC200_IN_SEL_CFG, - func201_in_sel_cfg: FUNC201_IN_SEL_CFG, - func202_in_sel_cfg: FUNC202_IN_SEL_CFG, - func203_in_sel_cfg: FUNC203_IN_SEL_CFG, - _reserved211: [u8; 0x28], - func214_in_sel_cfg: FUNC214_IN_SEL_CFG, - func215_in_sel_cfg: FUNC215_IN_SEL_CFG, - func216_in_sel_cfg: FUNC216_IN_SEL_CFG, - func217_in_sel_cfg: FUNC217_IN_SEL_CFG, - func218_in_sel_cfg: FUNC218_IN_SEL_CFG, - func219_in_sel_cfg: FUNC219_IN_SEL_CFG, - func220_in_sel_cfg: FUNC220_IN_SEL_CFG, - func221_in_sel_cfg: FUNC221_IN_SEL_CFG, - func222_in_sel_cfg: FUNC222_IN_SEL_CFG, - func223_in_sel_cfg: FUNC223_IN_SEL_CFG, - func224_in_sel_cfg: FUNC224_IN_SEL_CFG, - func225_in_sel_cfg: FUNC225_IN_SEL_CFG, - func226_in_sel_cfg: FUNC226_IN_SEL_CFG, - func227_in_sel_cfg: FUNC227_IN_SEL_CFG, - func228_in_sel_cfg: FUNC228_IN_SEL_CFG, - func229_in_sel_cfg: FUNC229_IN_SEL_CFG, - func230_in_sel_cfg: FUNC230_IN_SEL_CFG, - func231_in_sel_cfg: FUNC231_IN_SEL_CFG, - func232_in_sel_cfg: FUNC232_IN_SEL_CFG, - func233_in_sel_cfg: FUNC233_IN_SEL_CFG, - func234_in_sel_cfg: FUNC234_IN_SEL_CFG, - func235_in_sel_cfg: FUNC235_IN_SEL_CFG, - func236_in_sel_cfg: FUNC236_IN_SEL_CFG, - func237_in_sel_cfg: FUNC237_IN_SEL_CFG, - func238_in_sel_cfg: FUNC238_IN_SEL_CFG, - func239_in_sel_cfg: FUNC239_IN_SEL_CFG, - func240_in_sel_cfg: FUNC240_IN_SEL_CFG, - func241_in_sel_cfg: FUNC241_IN_SEL_CFG, - func242_in_sel_cfg: FUNC242_IN_SEL_CFG, - func243_in_sel_cfg: FUNC243_IN_SEL_CFG, - func244_in_sel_cfg: FUNC244_IN_SEL_CFG, - func245_in_sel_cfg: FUNC245_IN_SEL_CFG, - func246_in_sel_cfg: FUNC246_IN_SEL_CFG, - func247_in_sel_cfg: FUNC247_IN_SEL_CFG, - func248_in_sel_cfg: FUNC248_IN_SEL_CFG, - func249_in_sel_cfg: FUNC249_IN_SEL_CFG, - func250_in_sel_cfg: FUNC250_IN_SEL_CFG, - func251_in_sel_cfg: FUNC251_IN_SEL_CFG, - func252_in_sel_cfg: FUNC252_IN_SEL_CFG, - func253_in_sel_cfg: FUNC253_IN_SEL_CFG, - func254_in_sel_cfg: FUNC254_IN_SEL_CFG, - func255_in_sel_cfg: FUNC255_IN_SEL_CFG, + func_in_sel_cfg: [FUNC_IN_SEL_CFG; 254], + _reserved30: [u8; 0x04], func_out_sel_cfg: [FUNC_OUT_SEL_CFG; 57], intr_2: INTR_2, intr1_2: INTR1_2, intr_3: INTR_3, intr1_3: INTR1_3, clock_gate: CLOCK_GATE, - _reserved259: [u8; 0xb0], + _reserved36: [u8; 0xb0], int_raw: INT_RAW, int_st: INT_ST, int_ena: INT_ENA, @@ -285,7 +52,7 @@ pub struct RegisterBlock { recive_seq: RECIVE_SEQ, bistin_sel: BISTIN_SEL, bist_ctrl: BIST_CTRL, - _reserved269: [u8; 0xd4], + _reserved46: [u8; 0xd4], date: DATE, } impl RegisterBlock { @@ -440,1125 +207,1286 @@ impl RegisterBlock { pub fn pin_iter(&self) -> impl Iterator { self.pin.iter() } + #[doc = "0x15c..0x554 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func_in_sel_cfg(&self, n: usize) -> &FUNC_IN_SEL_CFG { + &self.func_in_sel_cfg[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x15c..0x554 - GPIO input function configuration register"] + #[inline(always)] + pub fn func_in_sel_cfg_iter(&self) -> impl Iterator { + self.func_in_sel_cfg.iter() + } #[doc = "0x15c - GPIO input function configuration register"] #[inline(always)] - pub const fn func1_in_sel_cfg(&self) -> &FUNC1_IN_SEL_CFG { - &self.func1_in_sel_cfg + pub const fn func1_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(0) } #[doc = "0x160 - GPIO input function configuration register"] #[inline(always)] - pub const fn func2_in_sel_cfg(&self) -> &FUNC2_IN_SEL_CFG { - &self.func2_in_sel_cfg + pub const fn func2_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(1) } #[doc = "0x164 - GPIO input function configuration register"] #[inline(always)] - pub const fn func3_in_sel_cfg(&self) -> &FUNC3_IN_SEL_CFG { - &self.func3_in_sel_cfg + pub const fn func3_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(2) } #[doc = "0x168 - GPIO input function configuration register"] #[inline(always)] - pub const fn func4_in_sel_cfg(&self) -> &FUNC4_IN_SEL_CFG { - &self.func4_in_sel_cfg + pub const fn func4_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(3) } #[doc = "0x16c - GPIO input function configuration register"] #[inline(always)] - pub const fn func5_in_sel_cfg(&self) -> &FUNC5_IN_SEL_CFG { - &self.func5_in_sel_cfg + pub const fn func5_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(4) } #[doc = "0x170 - GPIO input function configuration register"] #[inline(always)] - pub const fn func6_in_sel_cfg(&self) -> &FUNC6_IN_SEL_CFG { - &self.func6_in_sel_cfg + pub const fn func6_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(5) } #[doc = "0x174 - GPIO input function configuration register"] #[inline(always)] - pub const fn func7_in_sel_cfg(&self) -> &FUNC7_IN_SEL_CFG { - &self.func7_in_sel_cfg + pub const fn func7_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(6) } #[doc = "0x178 - GPIO input function configuration register"] #[inline(always)] - pub const fn func8_in_sel_cfg(&self) -> &FUNC8_IN_SEL_CFG { - &self.func8_in_sel_cfg + pub const fn func8_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(7) } #[doc = "0x17c - GPIO input function configuration register"] #[inline(always)] - pub const fn func9_in_sel_cfg(&self) -> &FUNC9_IN_SEL_CFG { - &self.func9_in_sel_cfg + pub const fn func9_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(8) } #[doc = "0x180 - GPIO input function configuration register"] #[inline(always)] - pub const fn func10_in_sel_cfg(&self) -> &FUNC10_IN_SEL_CFG { - &self.func10_in_sel_cfg + pub const fn func10_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(9) } #[doc = "0x184 - GPIO input function configuration register"] #[inline(always)] - pub const fn func11_in_sel_cfg(&self) -> &FUNC11_IN_SEL_CFG { - &self.func11_in_sel_cfg + pub const fn func11_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(10) } #[doc = "0x188 - GPIO input function configuration register"] #[inline(always)] - pub const fn func12_in_sel_cfg(&self) -> &FUNC12_IN_SEL_CFG { - &self.func12_in_sel_cfg + pub const fn func12_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(11) } #[doc = "0x18c - GPIO input function configuration register"] #[inline(always)] - pub const fn func13_in_sel_cfg(&self) -> &FUNC13_IN_SEL_CFG { - &self.func13_in_sel_cfg + pub const fn func13_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(12) } #[doc = "0x190 - GPIO input function configuration register"] #[inline(always)] - pub const fn func14_in_sel_cfg(&self) -> &FUNC14_IN_SEL_CFG { - &self.func14_in_sel_cfg + pub const fn func14_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(13) } #[doc = "0x194 - GPIO input function configuration register"] #[inline(always)] - pub const fn func15_in_sel_cfg(&self) -> &FUNC15_IN_SEL_CFG { - &self.func15_in_sel_cfg + pub const fn func15_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(14) } #[doc = "0x198 - GPIO input function configuration register"] #[inline(always)] - pub const fn func16_in_sel_cfg(&self) -> &FUNC16_IN_SEL_CFG { - &self.func16_in_sel_cfg + pub const fn func16_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(15) } #[doc = "0x19c - GPIO input function configuration register"] #[inline(always)] - pub const fn func17_in_sel_cfg(&self) -> &FUNC17_IN_SEL_CFG { - &self.func17_in_sel_cfg + pub const fn func17_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(16) } #[doc = "0x1a0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func18_in_sel_cfg(&self) -> &FUNC18_IN_SEL_CFG { - &self.func18_in_sel_cfg + pub const fn func18_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(17) } #[doc = "0x1a4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func19_in_sel_cfg(&self) -> &FUNC19_IN_SEL_CFG { - &self.func19_in_sel_cfg + pub const fn func19_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(18) } #[doc = "0x1a8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func20_in_sel_cfg(&self) -> &FUNC20_IN_SEL_CFG { - &self.func20_in_sel_cfg + pub const fn func20_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(19) } #[doc = "0x1ac - GPIO input function configuration register"] #[inline(always)] - pub const fn func21_in_sel_cfg(&self) -> &FUNC21_IN_SEL_CFG { - &self.func21_in_sel_cfg + pub const fn func21_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(20) } #[doc = "0x1b0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func22_in_sel_cfg(&self) -> &FUNC22_IN_SEL_CFG { - &self.func22_in_sel_cfg + pub const fn func22_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(21) } #[doc = "0x1b4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func23_in_sel_cfg(&self) -> &FUNC23_IN_SEL_CFG { - &self.func23_in_sel_cfg + pub const fn func23_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(22) } #[doc = "0x1b8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func24_in_sel_cfg(&self) -> &FUNC24_IN_SEL_CFG { - &self.func24_in_sel_cfg + pub const fn func24_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(23) } #[doc = "0x1bc - GPIO input function configuration register"] #[inline(always)] - pub const fn func25_in_sel_cfg(&self) -> &FUNC25_IN_SEL_CFG { - &self.func25_in_sel_cfg + pub const fn func25_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(24) } #[doc = "0x1c0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func26_in_sel_cfg(&self) -> &FUNC26_IN_SEL_CFG { - &self.func26_in_sel_cfg + pub const fn func26_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(25) } #[doc = "0x1c4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func27_in_sel_cfg(&self) -> &FUNC27_IN_SEL_CFG { - &self.func27_in_sel_cfg + pub const fn func27_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(26) } #[doc = "0x1c8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func28_in_sel_cfg(&self) -> &FUNC28_IN_SEL_CFG { - &self.func28_in_sel_cfg + pub const fn func28_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(27) } #[doc = "0x1cc - GPIO input function configuration register"] #[inline(always)] - pub const fn func29_in_sel_cfg(&self) -> &FUNC29_IN_SEL_CFG { - &self.func29_in_sel_cfg + pub const fn func29_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(28) } #[doc = "0x1d0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func30_in_sel_cfg(&self) -> &FUNC30_IN_SEL_CFG { - &self.func30_in_sel_cfg + pub const fn func30_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(29) } #[doc = "0x1d4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func31_in_sel_cfg(&self) -> &FUNC31_IN_SEL_CFG { - &self.func31_in_sel_cfg + pub const fn func31_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(30) } #[doc = "0x1d8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func32_in_sel_cfg(&self) -> &FUNC32_IN_SEL_CFG { - &self.func32_in_sel_cfg + pub const fn func32_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(31) } #[doc = "0x1dc - GPIO input function configuration register"] #[inline(always)] - pub const fn func33_in_sel_cfg(&self) -> &FUNC33_IN_SEL_CFG { - &self.func33_in_sel_cfg + pub const fn func33_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(32) } #[doc = "0x1e0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func34_in_sel_cfg(&self) -> &FUNC34_IN_SEL_CFG { - &self.func34_in_sel_cfg + pub const fn func34_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(33) } #[doc = "0x1e4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func35_in_sel_cfg(&self) -> &FUNC35_IN_SEL_CFG { - &self.func35_in_sel_cfg + pub const fn func35_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(34) } #[doc = "0x1e8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func36_in_sel_cfg(&self) -> &FUNC36_IN_SEL_CFG { - &self.func36_in_sel_cfg + pub const fn func36_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(35) } #[doc = "0x1ec - GPIO input function configuration register"] #[inline(always)] - pub const fn func37_in_sel_cfg(&self) -> &FUNC37_IN_SEL_CFG { - &self.func37_in_sel_cfg + pub const fn func37_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(36) } #[doc = "0x1f0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func38_in_sel_cfg(&self) -> &FUNC38_IN_SEL_CFG { - &self.func38_in_sel_cfg + pub const fn func38_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(37) } #[doc = "0x1f4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func39_in_sel_cfg(&self) -> &FUNC39_IN_SEL_CFG { - &self.func39_in_sel_cfg + pub const fn func39_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(38) } #[doc = "0x1f8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func40_in_sel_cfg(&self) -> &FUNC40_IN_SEL_CFG { - &self.func40_in_sel_cfg + pub const fn func40_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(39) } #[doc = "0x1fc - GPIO input function configuration register"] #[inline(always)] - pub const fn func41_in_sel_cfg(&self) -> &FUNC41_IN_SEL_CFG { - &self.func41_in_sel_cfg + pub const fn func41_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(40) } #[doc = "0x200 - GPIO input function configuration register"] #[inline(always)] - pub const fn func42_in_sel_cfg(&self) -> &FUNC42_IN_SEL_CFG { - &self.func42_in_sel_cfg + pub const fn func42_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(41) } #[doc = "0x204 - GPIO input function configuration register"] #[inline(always)] - pub const fn func43_in_sel_cfg(&self) -> &FUNC43_IN_SEL_CFG { - &self.func43_in_sel_cfg + pub const fn func43_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(42) } #[doc = "0x208 - GPIO input function configuration register"] #[inline(always)] - pub const fn func44_in_sel_cfg(&self) -> &FUNC44_IN_SEL_CFG { - &self.func44_in_sel_cfg + pub const fn func44_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(43) } #[doc = "0x20c - GPIO input function configuration register"] #[inline(always)] - pub const fn func45_in_sel_cfg(&self) -> &FUNC45_IN_SEL_CFG { - &self.func45_in_sel_cfg + pub const fn func45_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(44) + } + #[doc = "0x210 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func46_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(45) } #[doc = "0x214 - GPIO input function configuration register"] #[inline(always)] - pub const fn func47_in_sel_cfg(&self) -> &FUNC47_IN_SEL_CFG { - &self.func47_in_sel_cfg + pub const fn func47_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(46) } #[doc = "0x218 - GPIO input function configuration register"] #[inline(always)] - pub const fn func48_in_sel_cfg(&self) -> &FUNC48_IN_SEL_CFG { - &self.func48_in_sel_cfg + pub const fn func48_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(47) } #[doc = "0x21c - GPIO input function configuration register"] #[inline(always)] - pub const fn func49_in_sel_cfg(&self) -> &FUNC49_IN_SEL_CFG { - &self.func49_in_sel_cfg + pub const fn func49_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(48) } #[doc = "0x220 - GPIO input function configuration register"] #[inline(always)] - pub const fn func50_in_sel_cfg(&self) -> &FUNC50_IN_SEL_CFG { - &self.func50_in_sel_cfg + pub const fn func50_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(49) } #[doc = "0x224 - GPIO input function configuration register"] #[inline(always)] - pub const fn func51_in_sel_cfg(&self) -> &FUNC51_IN_SEL_CFG { - &self.func51_in_sel_cfg + pub const fn func51_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(50) } #[doc = "0x228 - GPIO input function configuration register"] #[inline(always)] - pub const fn func52_in_sel_cfg(&self) -> &FUNC52_IN_SEL_CFG { - &self.func52_in_sel_cfg + pub const fn func52_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(51) } #[doc = "0x22c - GPIO input function configuration register"] #[inline(always)] - pub const fn func53_in_sel_cfg(&self) -> &FUNC53_IN_SEL_CFG { - &self.func53_in_sel_cfg + pub const fn func53_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(52) } #[doc = "0x230 - GPIO input function configuration register"] #[inline(always)] - pub const fn func54_in_sel_cfg(&self) -> &FUNC54_IN_SEL_CFG { - &self.func54_in_sel_cfg + pub const fn func54_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(53) } #[doc = "0x234 - GPIO input function configuration register"] #[inline(always)] - pub const fn func55_in_sel_cfg(&self) -> &FUNC55_IN_SEL_CFG { - &self.func55_in_sel_cfg + pub const fn func55_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(54) } #[doc = "0x238 - GPIO input function configuration register"] #[inline(always)] - pub const fn func56_in_sel_cfg(&self) -> &FUNC56_IN_SEL_CFG { - &self.func56_in_sel_cfg + pub const fn func56_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(55) } #[doc = "0x23c - GPIO input function configuration register"] #[inline(always)] - pub const fn func57_in_sel_cfg(&self) -> &FUNC57_IN_SEL_CFG { - &self.func57_in_sel_cfg + pub const fn func57_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(56) } #[doc = "0x240 - GPIO input function configuration register"] #[inline(always)] - pub const fn func58_in_sel_cfg(&self) -> &FUNC58_IN_SEL_CFG { - &self.func58_in_sel_cfg + pub const fn func58_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(57) } #[doc = "0x244 - GPIO input function configuration register"] #[inline(always)] - pub const fn func59_in_sel_cfg(&self) -> &FUNC59_IN_SEL_CFG { - &self.func59_in_sel_cfg + pub const fn func59_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(58) } #[doc = "0x248 - GPIO input function configuration register"] #[inline(always)] - pub const fn func60_in_sel_cfg(&self) -> &FUNC60_IN_SEL_CFG { - &self.func60_in_sel_cfg + pub const fn func60_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(59) } #[doc = "0x24c - GPIO input function configuration register"] #[inline(always)] - pub const fn func61_in_sel_cfg(&self) -> &FUNC61_IN_SEL_CFG { - &self.func61_in_sel_cfg + pub const fn func61_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(60) } #[doc = "0x250 - GPIO input function configuration register"] #[inline(always)] - pub const fn func62_in_sel_cfg(&self) -> &FUNC62_IN_SEL_CFG { - &self.func62_in_sel_cfg + pub const fn func62_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(61) } #[doc = "0x254 - GPIO input function configuration register"] #[inline(always)] - pub const fn func63_in_sel_cfg(&self) -> &FUNC63_IN_SEL_CFG { - &self.func63_in_sel_cfg + pub const fn func63_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(62) } #[doc = "0x258 - GPIO input function configuration register"] #[inline(always)] - pub const fn func64_in_sel_cfg(&self) -> &FUNC64_IN_SEL_CFG { - &self.func64_in_sel_cfg + pub const fn func64_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(63) } #[doc = "0x25c - GPIO input function configuration register"] #[inline(always)] - pub const fn func65_in_sel_cfg(&self) -> &FUNC65_IN_SEL_CFG { - &self.func65_in_sel_cfg + pub const fn func65_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(64) } #[doc = "0x260 - GPIO input function configuration register"] #[inline(always)] - pub const fn func66_in_sel_cfg(&self) -> &FUNC66_IN_SEL_CFG { - &self.func66_in_sel_cfg + pub const fn func66_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(65) + } + #[doc = "0x264 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func67_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(66) } #[doc = "0x268 - GPIO input function configuration register"] #[inline(always)] - pub const fn func68_in_sel_cfg(&self) -> &FUNC68_IN_SEL_CFG { - &self.func68_in_sel_cfg + pub const fn func68_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(67) } #[doc = "0x26c - GPIO input function configuration register"] #[inline(always)] - pub const fn func69_in_sel_cfg(&self) -> &FUNC69_IN_SEL_CFG { - &self.func69_in_sel_cfg + pub const fn func69_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(68) } #[doc = "0x270 - GPIO input function configuration register"] #[inline(always)] - pub const fn func70_in_sel_cfg(&self) -> &FUNC70_IN_SEL_CFG { - &self.func70_in_sel_cfg + pub const fn func70_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(69) } #[doc = "0x274 - GPIO input function configuration register"] #[inline(always)] - pub const fn func71_in_sel_cfg(&self) -> &FUNC71_IN_SEL_CFG { - &self.func71_in_sel_cfg + pub const fn func71_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(70) + } + #[doc = "0x278 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func72_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(71) + } + #[doc = "0x27c - GPIO input function configuration register"] + #[inline(always)] + pub const fn func73_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(72) } #[doc = "0x280 - GPIO input function configuration register"] #[inline(always)] - pub const fn func74_in_sel_cfg(&self) -> &FUNC74_IN_SEL_CFG { - &self.func74_in_sel_cfg + pub const fn func74_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(73) } #[doc = "0x284 - GPIO input function configuration register"] #[inline(always)] - pub const fn func75_in_sel_cfg(&self) -> &FUNC75_IN_SEL_CFG { - &self.func75_in_sel_cfg + pub const fn func75_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(74) } #[doc = "0x288 - GPIO input function configuration register"] #[inline(always)] - pub const fn func76_in_sel_cfg(&self) -> &FUNC76_IN_SEL_CFG { - &self.func76_in_sel_cfg + pub const fn func76_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(75) } #[doc = "0x28c - GPIO input function configuration register"] #[inline(always)] - pub const fn func77_in_sel_cfg(&self) -> &FUNC77_IN_SEL_CFG { - &self.func77_in_sel_cfg + pub const fn func77_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(76) } #[doc = "0x290 - GPIO input function configuration register"] #[inline(always)] - pub const fn func78_in_sel_cfg(&self) -> &FUNC78_IN_SEL_CFG { - &self.func78_in_sel_cfg + pub const fn func78_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(77) + } + #[doc = "0x294 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func79_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(78) } #[doc = "0x298 - GPIO input function configuration register"] #[inline(always)] - pub const fn func80_in_sel_cfg(&self) -> &FUNC80_IN_SEL_CFG { - &self.func80_in_sel_cfg + pub const fn func80_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(79) + } + #[doc = "0x29c - GPIO input function configuration register"] + #[inline(always)] + pub const fn func81_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(80) + } + #[doc = "0x2a0 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func82_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(81) } #[doc = "0x2a4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func83_in_sel_cfg(&self) -> &FUNC83_IN_SEL_CFG { - &self.func83_in_sel_cfg + pub const fn func83_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(82) + } + #[doc = "0x2a8 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func84_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(83) + } + #[doc = "0x2ac - GPIO input function configuration register"] + #[inline(always)] + pub const fn func85_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(84) } #[doc = "0x2b0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func86_in_sel_cfg(&self) -> &FUNC86_IN_SEL_CFG { - &self.func86_in_sel_cfg + pub const fn func86_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(85) + } + #[doc = "0x2b4 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func87_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(86) + } + #[doc = "0x2b8 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func88_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(87) } #[doc = "0x2bc - GPIO input function configuration register"] #[inline(always)] - pub const fn func89_in_sel_cfg(&self) -> &FUNC89_IN_SEL_CFG { - &self.func89_in_sel_cfg + pub const fn func89_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(88) } #[doc = "0x2c0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func90_in_sel_cfg(&self) -> &FUNC90_IN_SEL_CFG { - &self.func90_in_sel_cfg + pub const fn func90_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(89) } #[doc = "0x2c4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func91_in_sel_cfg(&self) -> &FUNC91_IN_SEL_CFG { - &self.func91_in_sel_cfg + pub const fn func91_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(90) } #[doc = "0x2c8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func92_in_sel_cfg(&self) -> &FUNC92_IN_SEL_CFG { - &self.func92_in_sel_cfg + pub const fn func92_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(91) } #[doc = "0x2cc - GPIO input function configuration register"] #[inline(always)] - pub const fn func93_in_sel_cfg(&self) -> &FUNC93_IN_SEL_CFG { - &self.func93_in_sel_cfg + pub const fn func93_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(92) } #[doc = "0x2d0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func94_in_sel_cfg(&self) -> &FUNC94_IN_SEL_CFG { - &self.func94_in_sel_cfg + pub const fn func94_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(93) } #[doc = "0x2d4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func95_in_sel_cfg(&self) -> &FUNC95_IN_SEL_CFG { - &self.func95_in_sel_cfg + pub const fn func95_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(94) } #[doc = "0x2d8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func96_in_sel_cfg(&self) -> &FUNC96_IN_SEL_CFG { - &self.func96_in_sel_cfg + pub const fn func96_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(95) } #[doc = "0x2dc - GPIO input function configuration register"] #[inline(always)] - pub const fn func97_in_sel_cfg(&self) -> &FUNC97_IN_SEL_CFG { - &self.func97_in_sel_cfg + pub const fn func97_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(96) } #[doc = "0x2e0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func98_in_sel_cfg(&self) -> &FUNC98_IN_SEL_CFG { - &self.func98_in_sel_cfg + pub const fn func98_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(97) } #[doc = "0x2e4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func99_in_sel_cfg(&self) -> &FUNC99_IN_SEL_CFG { - &self.func99_in_sel_cfg + pub const fn func99_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(98) } #[doc = "0x2e8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func100_in_sel_cfg(&self) -> &FUNC100_IN_SEL_CFG { - &self.func100_in_sel_cfg + pub const fn func100_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(99) } #[doc = "0x2ec - GPIO input function configuration register"] #[inline(always)] - pub const fn func101_in_sel_cfg(&self) -> &FUNC101_IN_SEL_CFG { - &self.func101_in_sel_cfg + pub const fn func101_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(100) } #[doc = "0x2f0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func102_in_sel_cfg(&self) -> &FUNC102_IN_SEL_CFG { - &self.func102_in_sel_cfg + pub const fn func102_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(101) } #[doc = "0x2f4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func103_in_sel_cfg(&self) -> &FUNC103_IN_SEL_CFG { - &self.func103_in_sel_cfg + pub const fn func103_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(102) } #[doc = "0x2f8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func104_in_sel_cfg(&self) -> &FUNC104_IN_SEL_CFG { - &self.func104_in_sel_cfg + pub const fn func104_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(103) } #[doc = "0x2fc - GPIO input function configuration register"] #[inline(always)] - pub const fn func105_in_sel_cfg(&self) -> &FUNC105_IN_SEL_CFG { - &self.func105_in_sel_cfg + pub const fn func105_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(104) } #[doc = "0x300 - GPIO input function configuration register"] #[inline(always)] - pub const fn func106_in_sel_cfg(&self) -> &FUNC106_IN_SEL_CFG { - &self.func106_in_sel_cfg + pub const fn func106_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(105) } #[doc = "0x304 - GPIO input function configuration register"] #[inline(always)] - pub const fn func107_in_sel_cfg(&self) -> &FUNC107_IN_SEL_CFG { - &self.func107_in_sel_cfg + pub const fn func107_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(106) } #[doc = "0x308 - GPIO input function configuration register"] #[inline(always)] - pub const fn func108_in_sel_cfg(&self) -> &FUNC108_IN_SEL_CFG { - &self.func108_in_sel_cfg + pub const fn func108_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(107) } #[doc = "0x30c - GPIO input function configuration register"] #[inline(always)] - pub const fn func109_in_sel_cfg(&self) -> &FUNC109_IN_SEL_CFG { - &self.func109_in_sel_cfg + pub const fn func109_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(108) } #[doc = "0x310 - GPIO input function configuration register"] #[inline(always)] - pub const fn func110_in_sel_cfg(&self) -> &FUNC110_IN_SEL_CFG { - &self.func110_in_sel_cfg + pub const fn func110_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(109) } #[doc = "0x314 - GPIO input function configuration register"] #[inline(always)] - pub const fn func111_in_sel_cfg(&self) -> &FUNC111_IN_SEL_CFG { - &self.func111_in_sel_cfg + pub const fn func111_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(110) } #[doc = "0x318 - GPIO input function configuration register"] #[inline(always)] - pub const fn func112_in_sel_cfg(&self) -> &FUNC112_IN_SEL_CFG { - &self.func112_in_sel_cfg + pub const fn func112_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(111) } #[doc = "0x31c - GPIO input function configuration register"] #[inline(always)] - pub const fn func113_in_sel_cfg(&self) -> &FUNC113_IN_SEL_CFG { - &self.func113_in_sel_cfg + pub const fn func113_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(112) } #[doc = "0x320 - GPIO input function configuration register"] #[inline(always)] - pub const fn func114_in_sel_cfg(&self) -> &FUNC114_IN_SEL_CFG { - &self.func114_in_sel_cfg + pub const fn func114_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(113) + } + #[doc = "0x324 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func115_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(114) + } + #[doc = "0x328 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func116_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(115) } #[doc = "0x32c - GPIO input function configuration register"] #[inline(always)] - pub const fn func117_in_sel_cfg(&self) -> &FUNC117_IN_SEL_CFG { - &self.func117_in_sel_cfg + pub const fn func117_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(116) } #[doc = "0x330 - GPIO input function configuration register"] #[inline(always)] - pub const fn func118_in_sel_cfg(&self) -> &FUNC118_IN_SEL_CFG { - &self.func118_in_sel_cfg + pub const fn func118_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(117) + } + #[doc = "0x334 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func119_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(118) + } + #[doc = "0x338 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func120_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(119) + } + #[doc = "0x33c - GPIO input function configuration register"] + #[inline(always)] + pub const fn func121_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(120) + } + #[doc = "0x340 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func122_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(121) + } + #[doc = "0x344 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func123_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(122) + } + #[doc = "0x348 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func124_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(123) + } + #[doc = "0x34c - GPIO input function configuration register"] + #[inline(always)] + pub const fn func125_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(124) } #[doc = "0x350 - GPIO input function configuration register"] #[inline(always)] - pub const fn func126_in_sel_cfg(&self) -> &FUNC126_IN_SEL_CFG { - &self.func126_in_sel_cfg + pub const fn func126_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(125) } #[doc = "0x354 - GPIO input function configuration register"] #[inline(always)] - pub const fn func127_in_sel_cfg(&self) -> &FUNC127_IN_SEL_CFG { - &self.func127_in_sel_cfg + pub const fn func127_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(126) } #[doc = "0x358 - GPIO input function configuration register"] #[inline(always)] - pub const fn func128_in_sel_cfg(&self) -> &FUNC128_IN_SEL_CFG { - &self.func128_in_sel_cfg + pub const fn func128_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(127) } #[doc = "0x35c - GPIO input function configuration register"] #[inline(always)] - pub const fn func129_in_sel_cfg(&self) -> &FUNC129_IN_SEL_CFG { - &self.func129_in_sel_cfg + pub const fn func129_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(128) } #[doc = "0x360 - GPIO input function configuration register"] #[inline(always)] - pub const fn func130_in_sel_cfg(&self) -> &FUNC130_IN_SEL_CFG { - &self.func130_in_sel_cfg + pub const fn func130_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(129) } #[doc = "0x364 - GPIO input function configuration register"] #[inline(always)] - pub const fn func131_in_sel_cfg(&self) -> &FUNC131_IN_SEL_CFG { - &self.func131_in_sel_cfg + pub const fn func131_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(130) } #[doc = "0x368 - GPIO input function configuration register"] #[inline(always)] - pub const fn func132_in_sel_cfg(&self) -> &FUNC132_IN_SEL_CFG { - &self.func132_in_sel_cfg + pub const fn func132_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(131) } #[doc = "0x36c - GPIO input function configuration register"] #[inline(always)] - pub const fn func133_in_sel_cfg(&self) -> &FUNC133_IN_SEL_CFG { - &self.func133_in_sel_cfg + pub const fn func133_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(132) } #[doc = "0x370 - GPIO input function configuration register"] #[inline(always)] - pub const fn func134_in_sel_cfg(&self) -> &FUNC134_IN_SEL_CFG { - &self.func134_in_sel_cfg + pub const fn func134_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(133) } #[doc = "0x374 - GPIO input function configuration register"] #[inline(always)] - pub const fn func135_in_sel_cfg(&self) -> &FUNC135_IN_SEL_CFG { - &self.func135_in_sel_cfg + pub const fn func135_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(134) } #[doc = "0x378 - GPIO input function configuration register"] #[inline(always)] - pub const fn func136_in_sel_cfg(&self) -> &FUNC136_IN_SEL_CFG { - &self.func136_in_sel_cfg + pub const fn func136_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(135) } #[doc = "0x37c - GPIO input function configuration register"] #[inline(always)] - pub const fn func137_in_sel_cfg(&self) -> &FUNC137_IN_SEL_CFG { - &self.func137_in_sel_cfg + pub const fn func137_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(136) } #[doc = "0x380 - GPIO input function configuration register"] #[inline(always)] - pub const fn func138_in_sel_cfg(&self) -> &FUNC138_IN_SEL_CFG { - &self.func138_in_sel_cfg + pub const fn func138_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(137) } #[doc = "0x384 - GPIO input function configuration register"] #[inline(always)] - pub const fn func139_in_sel_cfg(&self) -> &FUNC139_IN_SEL_CFG { - &self.func139_in_sel_cfg + pub const fn func139_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(138) } #[doc = "0x388 - GPIO input function configuration register"] #[inline(always)] - pub const fn func140_in_sel_cfg(&self) -> &FUNC140_IN_SEL_CFG { - &self.func140_in_sel_cfg + pub const fn func140_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(139) } #[doc = "0x38c - GPIO input function configuration register"] #[inline(always)] - pub const fn func141_in_sel_cfg(&self) -> &FUNC141_IN_SEL_CFG { - &self.func141_in_sel_cfg + pub const fn func141_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(140) } #[doc = "0x390 - GPIO input function configuration register"] #[inline(always)] - pub const fn func142_in_sel_cfg(&self) -> &FUNC142_IN_SEL_CFG { - &self.func142_in_sel_cfg + pub const fn func142_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(141) } #[doc = "0x394 - GPIO input function configuration register"] #[inline(always)] - pub const fn func143_in_sel_cfg(&self) -> &FUNC143_IN_SEL_CFG { - &self.func143_in_sel_cfg + pub const fn func143_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(142) } #[doc = "0x398 - GPIO input function configuration register"] #[inline(always)] - pub const fn func144_in_sel_cfg(&self) -> &FUNC144_IN_SEL_CFG { - &self.func144_in_sel_cfg + pub const fn func144_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(143) } #[doc = "0x39c - GPIO input function configuration register"] #[inline(always)] - pub const fn func145_in_sel_cfg(&self) -> &FUNC145_IN_SEL_CFG { - &self.func145_in_sel_cfg + pub const fn func145_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(144) } #[doc = "0x3a0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func146_in_sel_cfg(&self) -> &FUNC146_IN_SEL_CFG { - &self.func146_in_sel_cfg + pub const fn func146_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(145) } #[doc = "0x3a4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func147_in_sel_cfg(&self) -> &FUNC147_IN_SEL_CFG { - &self.func147_in_sel_cfg + pub const fn func147_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(146) } #[doc = "0x3a8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func148_in_sel_cfg(&self) -> &FUNC148_IN_SEL_CFG { - &self.func148_in_sel_cfg + pub const fn func148_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(147) } #[doc = "0x3ac - GPIO input function configuration register"] #[inline(always)] - pub const fn func149_in_sel_cfg(&self) -> &FUNC149_IN_SEL_CFG { - &self.func149_in_sel_cfg + pub const fn func149_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(148) } #[doc = "0x3b0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func150_in_sel_cfg(&self) -> &FUNC150_IN_SEL_CFG { - &self.func150_in_sel_cfg + pub const fn func150_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(149) } #[doc = "0x3b4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func151_in_sel_cfg(&self) -> &FUNC151_IN_SEL_CFG { - &self.func151_in_sel_cfg + pub const fn func151_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(150) } #[doc = "0x3b8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func152_in_sel_cfg(&self) -> &FUNC152_IN_SEL_CFG { - &self.func152_in_sel_cfg + pub const fn func152_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(151) } #[doc = "0x3bc - GPIO input function configuration register"] #[inline(always)] - pub const fn func153_in_sel_cfg(&self) -> &FUNC153_IN_SEL_CFG { - &self.func153_in_sel_cfg + pub const fn func153_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(152) } #[doc = "0x3c0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func154_in_sel_cfg(&self) -> &FUNC154_IN_SEL_CFG { - &self.func154_in_sel_cfg + pub const fn func154_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(153) } #[doc = "0x3c4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func155_in_sel_cfg(&self) -> &FUNC155_IN_SEL_CFG { - &self.func155_in_sel_cfg + pub const fn func155_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(154) } #[doc = "0x3c8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func156_in_sel_cfg(&self) -> &FUNC156_IN_SEL_CFG { - &self.func156_in_sel_cfg + pub const fn func156_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(155) + } + #[doc = "0x3cc - GPIO input function configuration register"] + #[inline(always)] + pub const fn func157_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(156) } #[doc = "0x3d0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func158_in_sel_cfg(&self) -> &FUNC158_IN_SEL_CFG { - &self.func158_in_sel_cfg + pub const fn func158_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(157) } #[doc = "0x3d4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func159_in_sel_cfg(&self) -> &FUNC159_IN_SEL_CFG { - &self.func159_in_sel_cfg + pub const fn func159_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(158) } #[doc = "0x3d8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func160_in_sel_cfg(&self) -> &FUNC160_IN_SEL_CFG { - &self.func160_in_sel_cfg + pub const fn func160_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(159) } #[doc = "0x3dc - GPIO input function configuration register"] #[inline(always)] - pub const fn func161_in_sel_cfg(&self) -> &FUNC161_IN_SEL_CFG { - &self.func161_in_sel_cfg + pub const fn func161_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(160) } #[doc = "0x3e0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func162_in_sel_cfg(&self) -> &FUNC162_IN_SEL_CFG { - &self.func162_in_sel_cfg + pub const fn func162_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(161) } #[doc = "0x3e4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func163_in_sel_cfg(&self) -> &FUNC163_IN_SEL_CFG { - &self.func163_in_sel_cfg + pub const fn func163_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(162) } #[doc = "0x3e8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func164_in_sel_cfg(&self) -> &FUNC164_IN_SEL_CFG { - &self.func164_in_sel_cfg + pub const fn func164_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(163) } #[doc = "0x3ec - GPIO input function configuration register"] #[inline(always)] - pub const fn func165_in_sel_cfg(&self) -> &FUNC165_IN_SEL_CFG { - &self.func165_in_sel_cfg + pub const fn func165_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(164) } #[doc = "0x3f0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func166_in_sel_cfg(&self) -> &FUNC166_IN_SEL_CFG { - &self.func166_in_sel_cfg + pub const fn func166_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(165) } #[doc = "0x3f4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func167_in_sel_cfg(&self) -> &FUNC167_IN_SEL_CFG { - &self.func167_in_sel_cfg + pub const fn func167_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(166) } #[doc = "0x3f8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func168_in_sel_cfg(&self) -> &FUNC168_IN_SEL_CFG { - &self.func168_in_sel_cfg + pub const fn func168_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(167) } #[doc = "0x3fc - GPIO input function configuration register"] #[inline(always)] - pub const fn func169_in_sel_cfg(&self) -> &FUNC169_IN_SEL_CFG { - &self.func169_in_sel_cfg + pub const fn func169_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(168) } #[doc = "0x400 - GPIO input function configuration register"] #[inline(always)] - pub const fn func170_in_sel_cfg(&self) -> &FUNC170_IN_SEL_CFG { - &self.func170_in_sel_cfg + pub const fn func170_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(169) } #[doc = "0x404 - GPIO input function configuration register"] #[inline(always)] - pub const fn func171_in_sel_cfg(&self) -> &FUNC171_IN_SEL_CFG { - &self.func171_in_sel_cfg + pub const fn func171_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(170) } #[doc = "0x408 - GPIO input function configuration register"] #[inline(always)] - pub const fn func172_in_sel_cfg(&self) -> &FUNC172_IN_SEL_CFG { - &self.func172_in_sel_cfg + pub const fn func172_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(171) } #[doc = "0x40c - GPIO input function configuration register"] #[inline(always)] - pub const fn func173_in_sel_cfg(&self) -> &FUNC173_IN_SEL_CFG { - &self.func173_in_sel_cfg + pub const fn func173_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(172) } #[doc = "0x410 - GPIO input function configuration register"] #[inline(always)] - pub const fn func174_in_sel_cfg(&self) -> &FUNC174_IN_SEL_CFG { - &self.func174_in_sel_cfg + pub const fn func174_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(173) } #[doc = "0x414 - GPIO input function configuration register"] #[inline(always)] - pub const fn func175_in_sel_cfg(&self) -> &FUNC175_IN_SEL_CFG { - &self.func175_in_sel_cfg + pub const fn func175_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(174) } #[doc = "0x418 - GPIO input function configuration register"] #[inline(always)] - pub const fn func176_in_sel_cfg(&self) -> &FUNC176_IN_SEL_CFG { - &self.func176_in_sel_cfg + pub const fn func176_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(175) } #[doc = "0x41c - GPIO input function configuration register"] #[inline(always)] - pub const fn func177_in_sel_cfg(&self) -> &FUNC177_IN_SEL_CFG { - &self.func177_in_sel_cfg + pub const fn func177_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(176) } #[doc = "0x420 - GPIO input function configuration register"] #[inline(always)] - pub const fn func178_in_sel_cfg(&self) -> &FUNC178_IN_SEL_CFG { - &self.func178_in_sel_cfg + pub const fn func178_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(177) } #[doc = "0x424 - GPIO input function configuration register"] #[inline(always)] - pub const fn func179_in_sel_cfg(&self) -> &FUNC179_IN_SEL_CFG { - &self.func179_in_sel_cfg + pub const fn func179_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(178) } #[doc = "0x428 - GPIO input function configuration register"] #[inline(always)] - pub const fn func180_in_sel_cfg(&self) -> &FUNC180_IN_SEL_CFG { - &self.func180_in_sel_cfg + pub const fn func180_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(179) } #[doc = "0x42c - GPIO input function configuration register"] #[inline(always)] - pub const fn func181_in_sel_cfg(&self) -> &FUNC181_IN_SEL_CFG { - &self.func181_in_sel_cfg + pub const fn func181_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(180) } #[doc = "0x430 - GPIO input function configuration register"] #[inline(always)] - pub const fn func182_in_sel_cfg(&self) -> &FUNC182_IN_SEL_CFG { - &self.func182_in_sel_cfg + pub const fn func182_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(181) } #[doc = "0x434 - GPIO input function configuration register"] #[inline(always)] - pub const fn func183_in_sel_cfg(&self) -> &FUNC183_IN_SEL_CFG { - &self.func183_in_sel_cfg + pub const fn func183_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(182) } #[doc = "0x438 - GPIO input function configuration register"] #[inline(always)] - pub const fn func184_in_sel_cfg(&self) -> &FUNC184_IN_SEL_CFG { - &self.func184_in_sel_cfg + pub const fn func184_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(183) } #[doc = "0x43c - GPIO input function configuration register"] #[inline(always)] - pub const fn func185_in_sel_cfg(&self) -> &FUNC185_IN_SEL_CFG { - &self.func185_in_sel_cfg + pub const fn func185_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(184) } #[doc = "0x440 - GPIO input function configuration register"] #[inline(always)] - pub const fn func186_in_sel_cfg(&self) -> &FUNC186_IN_SEL_CFG { - &self.func186_in_sel_cfg + pub const fn func186_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(185) } #[doc = "0x444 - GPIO input function configuration register"] #[inline(always)] - pub const fn func187_in_sel_cfg(&self) -> &FUNC187_IN_SEL_CFG { - &self.func187_in_sel_cfg + pub const fn func187_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(186) } #[doc = "0x448 - GPIO input function configuration register"] #[inline(always)] - pub const fn func188_in_sel_cfg(&self) -> &FUNC188_IN_SEL_CFG { - &self.func188_in_sel_cfg + pub const fn func188_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(187) } #[doc = "0x44c - GPIO input function configuration register"] #[inline(always)] - pub const fn func189_in_sel_cfg(&self) -> &FUNC189_IN_SEL_CFG { - &self.func189_in_sel_cfg + pub const fn func189_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(188) } #[doc = "0x450 - GPIO input function configuration register"] #[inline(always)] - pub const fn func190_in_sel_cfg(&self) -> &FUNC190_IN_SEL_CFG { - &self.func190_in_sel_cfg + pub const fn func190_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(189) } #[doc = "0x454 - GPIO input function configuration register"] #[inline(always)] - pub const fn func191_in_sel_cfg(&self) -> &FUNC191_IN_SEL_CFG { - &self.func191_in_sel_cfg + pub const fn func191_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(190) } #[doc = "0x458 - GPIO input function configuration register"] #[inline(always)] - pub const fn func192_in_sel_cfg(&self) -> &FUNC192_IN_SEL_CFG { - &self.func192_in_sel_cfg + pub const fn func192_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(191) } #[doc = "0x45c - GPIO input function configuration register"] #[inline(always)] - pub const fn func193_in_sel_cfg(&self) -> &FUNC193_IN_SEL_CFG { - &self.func193_in_sel_cfg + pub const fn func193_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(192) } #[doc = "0x460 - GPIO input function configuration register"] #[inline(always)] - pub const fn func194_in_sel_cfg(&self) -> &FUNC194_IN_SEL_CFG { - &self.func194_in_sel_cfg + pub const fn func194_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(193) } #[doc = "0x464 - GPIO input function configuration register"] #[inline(always)] - pub const fn func195_in_sel_cfg(&self) -> &FUNC195_IN_SEL_CFG { - &self.func195_in_sel_cfg + pub const fn func195_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(194) } #[doc = "0x468 - GPIO input function configuration register"] #[inline(always)] - pub const fn func196_in_sel_cfg(&self) -> &FUNC196_IN_SEL_CFG { - &self.func196_in_sel_cfg + pub const fn func196_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(195) } #[doc = "0x46c - GPIO input function configuration register"] #[inline(always)] - pub const fn func197_in_sel_cfg(&self) -> &FUNC197_IN_SEL_CFG { - &self.func197_in_sel_cfg + pub const fn func197_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(196) } #[doc = "0x470 - GPIO input function configuration register"] #[inline(always)] - pub const fn func198_in_sel_cfg(&self) -> &FUNC198_IN_SEL_CFG { - &self.func198_in_sel_cfg + pub const fn func198_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(197) } #[doc = "0x474 - GPIO input function configuration register"] #[inline(always)] - pub const fn func199_in_sel_cfg(&self) -> &FUNC199_IN_SEL_CFG { - &self.func199_in_sel_cfg + pub const fn func199_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(198) } #[doc = "0x478 - GPIO input function configuration register"] #[inline(always)] - pub const fn func200_in_sel_cfg(&self) -> &FUNC200_IN_SEL_CFG { - &self.func200_in_sel_cfg + pub const fn func200_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(199) } #[doc = "0x47c - GPIO input function configuration register"] #[inline(always)] - pub const fn func201_in_sel_cfg(&self) -> &FUNC201_IN_SEL_CFG { - &self.func201_in_sel_cfg + pub const fn func201_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(200) } #[doc = "0x480 - GPIO input function configuration register"] #[inline(always)] - pub const fn func202_in_sel_cfg(&self) -> &FUNC202_IN_SEL_CFG { - &self.func202_in_sel_cfg + pub const fn func202_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(201) } #[doc = "0x484 - GPIO input function configuration register"] #[inline(always)] - pub const fn func203_in_sel_cfg(&self) -> &FUNC203_IN_SEL_CFG { - &self.func203_in_sel_cfg + pub const fn func203_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(202) + } + #[doc = "0x488 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func204_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(203) + } + #[doc = "0x48c - GPIO input function configuration register"] + #[inline(always)] + pub const fn func205_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(204) + } + #[doc = "0x490 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func206_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(205) + } + #[doc = "0x494 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func207_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(206) + } + #[doc = "0x498 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func208_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(207) + } + #[doc = "0x49c - GPIO input function configuration register"] + #[inline(always)] + pub const fn func209_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(208) + } + #[doc = "0x4a0 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func210_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(209) + } + #[doc = "0x4a4 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func211_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(210) + } + #[doc = "0x4a8 - GPIO input function configuration register"] + #[inline(always)] + pub const fn func212_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(211) + } + #[doc = "0x4ac - GPIO input function configuration register"] + #[inline(always)] + pub const fn func213_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(212) } #[doc = "0x4b0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func214_in_sel_cfg(&self) -> &FUNC214_IN_SEL_CFG { - &self.func214_in_sel_cfg + pub const fn func214_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(213) } #[doc = "0x4b4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func215_in_sel_cfg(&self) -> &FUNC215_IN_SEL_CFG { - &self.func215_in_sel_cfg + pub const fn func215_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(214) } #[doc = "0x4b8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func216_in_sel_cfg(&self) -> &FUNC216_IN_SEL_CFG { - &self.func216_in_sel_cfg + pub const fn func216_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(215) } #[doc = "0x4bc - GPIO input function configuration register"] #[inline(always)] - pub const fn func217_in_sel_cfg(&self) -> &FUNC217_IN_SEL_CFG { - &self.func217_in_sel_cfg + pub const fn func217_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(216) } #[doc = "0x4c0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func218_in_sel_cfg(&self) -> &FUNC218_IN_SEL_CFG { - &self.func218_in_sel_cfg + pub const fn func218_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(217) } #[doc = "0x4c4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func219_in_sel_cfg(&self) -> &FUNC219_IN_SEL_CFG { - &self.func219_in_sel_cfg + pub const fn func219_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(218) } #[doc = "0x4c8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func220_in_sel_cfg(&self) -> &FUNC220_IN_SEL_CFG { - &self.func220_in_sel_cfg + pub const fn func220_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(219) } #[doc = "0x4cc - GPIO input function configuration register"] #[inline(always)] - pub const fn func221_in_sel_cfg(&self) -> &FUNC221_IN_SEL_CFG { - &self.func221_in_sel_cfg + pub const fn func221_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(220) } #[doc = "0x4d0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func222_in_sel_cfg(&self) -> &FUNC222_IN_SEL_CFG { - &self.func222_in_sel_cfg + pub const fn func222_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(221) } #[doc = "0x4d4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func223_in_sel_cfg(&self) -> &FUNC223_IN_SEL_CFG { - &self.func223_in_sel_cfg + pub const fn func223_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(222) } #[doc = "0x4d8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func224_in_sel_cfg(&self) -> &FUNC224_IN_SEL_CFG { - &self.func224_in_sel_cfg + pub const fn func224_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(223) } #[doc = "0x4dc - GPIO input function configuration register"] #[inline(always)] - pub const fn func225_in_sel_cfg(&self) -> &FUNC225_IN_SEL_CFG { - &self.func225_in_sel_cfg + pub const fn func225_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(224) } #[doc = "0x4e0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func226_in_sel_cfg(&self) -> &FUNC226_IN_SEL_CFG { - &self.func226_in_sel_cfg + pub const fn func226_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(225) } #[doc = "0x4e4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func227_in_sel_cfg(&self) -> &FUNC227_IN_SEL_CFG { - &self.func227_in_sel_cfg + pub const fn func227_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(226) } #[doc = "0x4e8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func228_in_sel_cfg(&self) -> &FUNC228_IN_SEL_CFG { - &self.func228_in_sel_cfg + pub const fn func228_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(227) } #[doc = "0x4ec - GPIO input function configuration register"] #[inline(always)] - pub const fn func229_in_sel_cfg(&self) -> &FUNC229_IN_SEL_CFG { - &self.func229_in_sel_cfg + pub const fn func229_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(228) } #[doc = "0x4f0 - GPIO input function configuration register"] #[inline(always)] - pub const fn func230_in_sel_cfg(&self) -> &FUNC230_IN_SEL_CFG { - &self.func230_in_sel_cfg + pub const fn func230_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(229) } #[doc = "0x4f4 - GPIO input function configuration register"] #[inline(always)] - pub const fn func231_in_sel_cfg(&self) -> &FUNC231_IN_SEL_CFG { - &self.func231_in_sel_cfg + pub const fn func231_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(230) } #[doc = "0x4f8 - GPIO input function configuration register"] #[inline(always)] - pub const fn func232_in_sel_cfg(&self) -> &FUNC232_IN_SEL_CFG { - &self.func232_in_sel_cfg + pub const fn func232_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(231) } #[doc = "0x4fc - GPIO input function configuration register"] #[inline(always)] - pub const fn func233_in_sel_cfg(&self) -> &FUNC233_IN_SEL_CFG { - &self.func233_in_sel_cfg + pub const fn func233_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(232) } #[doc = "0x500 - GPIO input function configuration register"] #[inline(always)] - pub const fn func234_in_sel_cfg(&self) -> &FUNC234_IN_SEL_CFG { - &self.func234_in_sel_cfg + pub const fn func234_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(233) } #[doc = "0x504 - GPIO input function configuration register"] #[inline(always)] - pub const fn func235_in_sel_cfg(&self) -> &FUNC235_IN_SEL_CFG { - &self.func235_in_sel_cfg + pub const fn func235_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(234) } #[doc = "0x508 - GPIO input function configuration register"] #[inline(always)] - pub const fn func236_in_sel_cfg(&self) -> &FUNC236_IN_SEL_CFG { - &self.func236_in_sel_cfg + pub const fn func236_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(235) } #[doc = "0x50c - GPIO input function configuration register"] #[inline(always)] - pub const fn func237_in_sel_cfg(&self) -> &FUNC237_IN_SEL_CFG { - &self.func237_in_sel_cfg + pub const fn func237_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(236) } #[doc = "0x510 - GPIO input function configuration register"] #[inline(always)] - pub const fn func238_in_sel_cfg(&self) -> &FUNC238_IN_SEL_CFG { - &self.func238_in_sel_cfg + pub const fn func238_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(237) } #[doc = "0x514 - GPIO input function configuration register"] #[inline(always)] - pub const fn func239_in_sel_cfg(&self) -> &FUNC239_IN_SEL_CFG { - &self.func239_in_sel_cfg + pub const fn func239_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(238) } #[doc = "0x518 - GPIO input function configuration register"] #[inline(always)] - pub const fn func240_in_sel_cfg(&self) -> &FUNC240_IN_SEL_CFG { - &self.func240_in_sel_cfg + pub const fn func240_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(239) } #[doc = "0x51c - GPIO input function configuration register"] #[inline(always)] - pub const fn func241_in_sel_cfg(&self) -> &FUNC241_IN_SEL_CFG { - &self.func241_in_sel_cfg + pub const fn func241_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(240) } #[doc = "0x520 - GPIO input function configuration register"] #[inline(always)] - pub const fn func242_in_sel_cfg(&self) -> &FUNC242_IN_SEL_CFG { - &self.func242_in_sel_cfg + pub const fn func242_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(241) } #[doc = "0x524 - GPIO input function configuration register"] #[inline(always)] - pub const fn func243_in_sel_cfg(&self) -> &FUNC243_IN_SEL_CFG { - &self.func243_in_sel_cfg + pub const fn func243_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(242) } #[doc = "0x528 - GPIO input function configuration register"] #[inline(always)] - pub const fn func244_in_sel_cfg(&self) -> &FUNC244_IN_SEL_CFG { - &self.func244_in_sel_cfg + pub const fn func244_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(243) } #[doc = "0x52c - GPIO input function configuration register"] #[inline(always)] - pub const fn func245_in_sel_cfg(&self) -> &FUNC245_IN_SEL_CFG { - &self.func245_in_sel_cfg + pub const fn func245_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(244) } #[doc = "0x530 - GPIO input function configuration register"] #[inline(always)] - pub const fn func246_in_sel_cfg(&self) -> &FUNC246_IN_SEL_CFG { - &self.func246_in_sel_cfg + pub const fn func246_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(245) } #[doc = "0x534 - GPIO input function configuration register"] #[inline(always)] - pub const fn func247_in_sel_cfg(&self) -> &FUNC247_IN_SEL_CFG { - &self.func247_in_sel_cfg + pub const fn func247_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(246) } #[doc = "0x538 - GPIO input function configuration register"] #[inline(always)] - pub const fn func248_in_sel_cfg(&self) -> &FUNC248_IN_SEL_CFG { - &self.func248_in_sel_cfg + pub const fn func248_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(247) } #[doc = "0x53c - GPIO input function configuration register"] #[inline(always)] - pub const fn func249_in_sel_cfg(&self) -> &FUNC249_IN_SEL_CFG { - &self.func249_in_sel_cfg + pub const fn func249_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(248) } #[doc = "0x540 - GPIO input function configuration register"] #[inline(always)] - pub const fn func250_in_sel_cfg(&self) -> &FUNC250_IN_SEL_CFG { - &self.func250_in_sel_cfg + pub const fn func250_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(249) } #[doc = "0x544 - GPIO input function configuration register"] #[inline(always)] - pub const fn func251_in_sel_cfg(&self) -> &FUNC251_IN_SEL_CFG { - &self.func251_in_sel_cfg + pub const fn func251_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(250) } #[doc = "0x548 - GPIO input function configuration register"] #[inline(always)] - pub const fn func252_in_sel_cfg(&self) -> &FUNC252_IN_SEL_CFG { - &self.func252_in_sel_cfg + pub const fn func252_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(251) } #[doc = "0x54c - GPIO input function configuration register"] #[inline(always)] - pub const fn func253_in_sel_cfg(&self) -> &FUNC253_IN_SEL_CFG { - &self.func253_in_sel_cfg + pub const fn func253_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(252) } #[doc = "0x550 - GPIO input function configuration register"] #[inline(always)] - pub const fn func254_in_sel_cfg(&self) -> &FUNC254_IN_SEL_CFG { - &self.func254_in_sel_cfg - } - #[doc = "0x554 - GPIO input function configuration register"] - #[inline(always)] - pub const fn func255_in_sel_cfg(&self) -> &FUNC255_IN_SEL_CFG { - &self.func255_in_sel_cfg + pub const fn func254_in_sel_cfg(&self) -> &FUNC_IN_SEL_CFG { + self.func_in_sel_cfg(253) } #[doc = "0x558..0x63c - GPIO output function select register"] #[inline(always)] @@ -2053,902 +1981,6 @@ pub mod status_next1; pub type PIN = crate::Reg; #[doc = "GPIO pin configuration register"] pub mod pin; -#[doc = "FUNC1_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func1_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func1_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func1_in_sel_cfg`] module"] -pub type FUNC1_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func1_in_sel_cfg; -#[doc = "FUNC2_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func2_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func2_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func2_in_sel_cfg`] module"] -pub type FUNC2_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func2_in_sel_cfg; -#[doc = "FUNC3_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func3_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func3_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func3_in_sel_cfg`] module"] -pub type FUNC3_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func3_in_sel_cfg; -#[doc = "FUNC4_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func4_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func4_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func4_in_sel_cfg`] module"] -pub type FUNC4_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func4_in_sel_cfg; -#[doc = "FUNC5_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func5_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func5_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func5_in_sel_cfg`] module"] -pub type FUNC5_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func5_in_sel_cfg; -#[doc = "FUNC6_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func6_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func6_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func6_in_sel_cfg`] module"] -pub type FUNC6_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func6_in_sel_cfg; -#[doc = "FUNC7_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func7_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func7_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func7_in_sel_cfg`] module"] -pub type FUNC7_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func7_in_sel_cfg; -#[doc = "FUNC8_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func8_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func8_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func8_in_sel_cfg`] module"] -pub type FUNC8_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func8_in_sel_cfg; -#[doc = "FUNC9_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func9_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func9_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func9_in_sel_cfg`] module"] -pub type FUNC9_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func9_in_sel_cfg; -#[doc = "FUNC10_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func10_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func10_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func10_in_sel_cfg`] module"] -pub type FUNC10_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func10_in_sel_cfg; -#[doc = "FUNC11_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func11_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func11_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func11_in_sel_cfg`] module"] -pub type FUNC11_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func11_in_sel_cfg; -#[doc = "FUNC12_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func12_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func12_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func12_in_sel_cfg`] module"] -pub type FUNC12_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func12_in_sel_cfg; -#[doc = "FUNC13_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func13_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func13_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func13_in_sel_cfg`] module"] -pub type FUNC13_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func13_in_sel_cfg; -#[doc = "FUNC14_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func14_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func14_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func14_in_sel_cfg`] module"] -pub type FUNC14_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func14_in_sel_cfg; -#[doc = "FUNC15_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func15_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func15_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func15_in_sel_cfg`] module"] -pub type FUNC15_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func15_in_sel_cfg; -#[doc = "FUNC16_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func16_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func16_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func16_in_sel_cfg`] module"] -pub type FUNC16_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func16_in_sel_cfg; -#[doc = "FUNC17_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func17_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func17_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func17_in_sel_cfg`] module"] -pub type FUNC17_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func17_in_sel_cfg; -#[doc = "FUNC18_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func18_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func18_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func18_in_sel_cfg`] module"] -pub type FUNC18_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func18_in_sel_cfg; -#[doc = "FUNC19_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func19_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func19_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func19_in_sel_cfg`] module"] -pub type FUNC19_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func19_in_sel_cfg; -#[doc = "FUNC20_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func20_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func20_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func20_in_sel_cfg`] module"] -pub type FUNC20_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func20_in_sel_cfg; -#[doc = "FUNC21_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func21_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func21_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func21_in_sel_cfg`] module"] -pub type FUNC21_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func21_in_sel_cfg; -#[doc = "FUNC22_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func22_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func22_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func22_in_sel_cfg`] module"] -pub type FUNC22_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func22_in_sel_cfg; -#[doc = "FUNC23_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func23_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func23_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func23_in_sel_cfg`] module"] -pub type FUNC23_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func23_in_sel_cfg; -#[doc = "FUNC24_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func24_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func24_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func24_in_sel_cfg`] module"] -pub type FUNC24_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func24_in_sel_cfg; -#[doc = "FUNC25_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func25_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func25_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func25_in_sel_cfg`] module"] -pub type FUNC25_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func25_in_sel_cfg; -#[doc = "FUNC26_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func26_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func26_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func26_in_sel_cfg`] module"] -pub type FUNC26_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func26_in_sel_cfg; -#[doc = "FUNC27_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func27_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func27_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func27_in_sel_cfg`] module"] -pub type FUNC27_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func27_in_sel_cfg; -#[doc = "FUNC28_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func28_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func28_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func28_in_sel_cfg`] module"] -pub type FUNC28_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func28_in_sel_cfg; -#[doc = "FUNC29_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func29_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func29_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func29_in_sel_cfg`] module"] -pub type FUNC29_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func29_in_sel_cfg; -#[doc = "FUNC30_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func30_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func30_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func30_in_sel_cfg`] module"] -pub type FUNC30_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func30_in_sel_cfg; -#[doc = "FUNC31_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func31_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func31_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func31_in_sel_cfg`] module"] -pub type FUNC31_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func31_in_sel_cfg; -#[doc = "FUNC32_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func32_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func32_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func32_in_sel_cfg`] module"] -pub type FUNC32_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func32_in_sel_cfg; -#[doc = "FUNC33_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func33_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func33_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func33_in_sel_cfg`] module"] -pub type FUNC33_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func33_in_sel_cfg; -#[doc = "FUNC34_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func34_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func34_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func34_in_sel_cfg`] module"] -pub type FUNC34_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func34_in_sel_cfg; -#[doc = "FUNC35_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func35_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func35_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func35_in_sel_cfg`] module"] -pub type FUNC35_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func35_in_sel_cfg; -#[doc = "FUNC36_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func36_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func36_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func36_in_sel_cfg`] module"] -pub type FUNC36_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func36_in_sel_cfg; -#[doc = "FUNC37_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func37_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func37_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func37_in_sel_cfg`] module"] -pub type FUNC37_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func37_in_sel_cfg; -#[doc = "FUNC38_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func38_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func38_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func38_in_sel_cfg`] module"] -pub type FUNC38_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func38_in_sel_cfg; -#[doc = "FUNC39_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func39_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func39_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func39_in_sel_cfg`] module"] -pub type FUNC39_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func39_in_sel_cfg; -#[doc = "FUNC40_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func40_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func40_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func40_in_sel_cfg`] module"] -pub type FUNC40_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func40_in_sel_cfg; -#[doc = "FUNC41_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func41_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func41_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func41_in_sel_cfg`] module"] -pub type FUNC41_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func41_in_sel_cfg; -#[doc = "FUNC42_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func42_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func42_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func42_in_sel_cfg`] module"] -pub type FUNC42_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func42_in_sel_cfg; -#[doc = "FUNC43_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func43_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func43_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func43_in_sel_cfg`] module"] -pub type FUNC43_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func43_in_sel_cfg; -#[doc = "FUNC44_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func44_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func44_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func44_in_sel_cfg`] module"] -pub type FUNC44_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func44_in_sel_cfg; -#[doc = "FUNC45_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func45_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func45_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func45_in_sel_cfg`] module"] -pub type FUNC45_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func45_in_sel_cfg; -#[doc = "FUNC47_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func47_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func47_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func47_in_sel_cfg`] module"] -pub type FUNC47_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func47_in_sel_cfg; -#[doc = "FUNC48_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func48_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func48_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func48_in_sel_cfg`] module"] -pub type FUNC48_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func48_in_sel_cfg; -#[doc = "FUNC49_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func49_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func49_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func49_in_sel_cfg`] module"] -pub type FUNC49_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func49_in_sel_cfg; -#[doc = "FUNC50_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func50_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func50_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func50_in_sel_cfg`] module"] -pub type FUNC50_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func50_in_sel_cfg; -#[doc = "FUNC51_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func51_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func51_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func51_in_sel_cfg`] module"] -pub type FUNC51_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func51_in_sel_cfg; -#[doc = "FUNC52_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func52_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func52_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func52_in_sel_cfg`] module"] -pub type FUNC52_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func52_in_sel_cfg; -#[doc = "FUNC53_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func53_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func53_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func53_in_sel_cfg`] module"] -pub type FUNC53_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func53_in_sel_cfg; -#[doc = "FUNC54_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func54_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func54_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func54_in_sel_cfg`] module"] -pub type FUNC54_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func54_in_sel_cfg; -#[doc = "FUNC55_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func55_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func55_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func55_in_sel_cfg`] module"] -pub type FUNC55_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func55_in_sel_cfg; -#[doc = "FUNC56_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func56_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func56_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func56_in_sel_cfg`] module"] -pub type FUNC56_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func56_in_sel_cfg; -#[doc = "FUNC57_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func57_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func57_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func57_in_sel_cfg`] module"] -pub type FUNC57_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func57_in_sel_cfg; -#[doc = "FUNC58_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func58_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func58_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func58_in_sel_cfg`] module"] -pub type FUNC58_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func58_in_sel_cfg; -#[doc = "FUNC59_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func59_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func59_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func59_in_sel_cfg`] module"] -pub type FUNC59_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func59_in_sel_cfg; -#[doc = "FUNC60_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func60_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func60_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func60_in_sel_cfg`] module"] -pub type FUNC60_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func60_in_sel_cfg; -#[doc = "FUNC61_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func61_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func61_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func61_in_sel_cfg`] module"] -pub type FUNC61_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func61_in_sel_cfg; -#[doc = "FUNC62_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func62_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func62_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func62_in_sel_cfg`] module"] -pub type FUNC62_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func62_in_sel_cfg; -#[doc = "FUNC63_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func63_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func63_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func63_in_sel_cfg`] module"] -pub type FUNC63_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func63_in_sel_cfg; -#[doc = "FUNC64_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func64_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func64_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func64_in_sel_cfg`] module"] -pub type FUNC64_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func64_in_sel_cfg; -#[doc = "FUNC65_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func65_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func65_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func65_in_sel_cfg`] module"] -pub type FUNC65_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func65_in_sel_cfg; -#[doc = "FUNC66_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func66_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func66_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func66_in_sel_cfg`] module"] -pub type FUNC66_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func66_in_sel_cfg; -#[doc = "FUNC68_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func68_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func68_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func68_in_sel_cfg`] module"] -pub type FUNC68_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func68_in_sel_cfg; -#[doc = "FUNC69_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func69_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func69_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func69_in_sel_cfg`] module"] -pub type FUNC69_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func69_in_sel_cfg; -#[doc = "FUNC70_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func70_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func70_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func70_in_sel_cfg`] module"] -pub type FUNC70_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func70_in_sel_cfg; -#[doc = "FUNC71_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func71_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func71_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func71_in_sel_cfg`] module"] -pub type FUNC71_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func71_in_sel_cfg; -#[doc = "FUNC74_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func74_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func74_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func74_in_sel_cfg`] module"] -pub type FUNC74_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func74_in_sel_cfg; -#[doc = "FUNC75_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func75_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func75_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func75_in_sel_cfg`] module"] -pub type FUNC75_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func75_in_sel_cfg; -#[doc = "FUNC76_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func76_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func76_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func76_in_sel_cfg`] module"] -pub type FUNC76_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func76_in_sel_cfg; -#[doc = "FUNC77_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func77_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func77_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func77_in_sel_cfg`] module"] -pub type FUNC77_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func77_in_sel_cfg; -#[doc = "FUNC78_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func78_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func78_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func78_in_sel_cfg`] module"] -pub type FUNC78_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func78_in_sel_cfg; -#[doc = "FUNC80_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func80_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func80_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func80_in_sel_cfg`] module"] -pub type FUNC80_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func80_in_sel_cfg; -#[doc = "FUNC83_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func83_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func83_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func83_in_sel_cfg`] module"] -pub type FUNC83_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func83_in_sel_cfg; -#[doc = "FUNC86_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func86_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func86_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func86_in_sel_cfg`] module"] -pub type FUNC86_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func86_in_sel_cfg; -#[doc = "FUNC89_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func89_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func89_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func89_in_sel_cfg`] module"] -pub type FUNC89_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func89_in_sel_cfg; -#[doc = "FUNC90_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func90_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func90_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func90_in_sel_cfg`] module"] -pub type FUNC90_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func90_in_sel_cfg; -#[doc = "FUNC91_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func91_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func91_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func91_in_sel_cfg`] module"] -pub type FUNC91_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func91_in_sel_cfg; -#[doc = "FUNC92_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func92_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func92_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func92_in_sel_cfg`] module"] -pub type FUNC92_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func92_in_sel_cfg; -#[doc = "FUNC93_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func93_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func93_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func93_in_sel_cfg`] module"] -pub type FUNC93_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func93_in_sel_cfg; -#[doc = "FUNC94_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func94_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func94_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func94_in_sel_cfg`] module"] -pub type FUNC94_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func94_in_sel_cfg; -#[doc = "FUNC95_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func95_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func95_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func95_in_sel_cfg`] module"] -pub type FUNC95_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func95_in_sel_cfg; -#[doc = "FUNC96_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func96_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func96_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func96_in_sel_cfg`] module"] -pub type FUNC96_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func96_in_sel_cfg; -#[doc = "FUNC97_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func97_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func97_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func97_in_sel_cfg`] module"] -pub type FUNC97_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func97_in_sel_cfg; -#[doc = "FUNC98_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func98_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func98_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func98_in_sel_cfg`] module"] -pub type FUNC98_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func98_in_sel_cfg; -#[doc = "FUNC99_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func99_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func99_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func99_in_sel_cfg`] module"] -pub type FUNC99_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func99_in_sel_cfg; -#[doc = "FUNC100_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func100_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func100_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func100_in_sel_cfg`] module"] -pub type FUNC100_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func100_in_sel_cfg; -#[doc = "FUNC101_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func101_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func101_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func101_in_sel_cfg`] module"] -pub type FUNC101_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func101_in_sel_cfg; -#[doc = "FUNC102_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func102_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func102_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func102_in_sel_cfg`] module"] -pub type FUNC102_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func102_in_sel_cfg; -#[doc = "FUNC103_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func103_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func103_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func103_in_sel_cfg`] module"] -pub type FUNC103_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func103_in_sel_cfg; -#[doc = "FUNC104_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func104_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func104_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func104_in_sel_cfg`] module"] -pub type FUNC104_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func104_in_sel_cfg; -#[doc = "FUNC105_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func105_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func105_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func105_in_sel_cfg`] module"] -pub type FUNC105_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func105_in_sel_cfg; -#[doc = "FUNC106_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func106_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func106_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func106_in_sel_cfg`] module"] -pub type FUNC106_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func106_in_sel_cfg; -#[doc = "FUNC107_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func107_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func107_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func107_in_sel_cfg`] module"] -pub type FUNC107_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func107_in_sel_cfg; -#[doc = "FUNC108_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func108_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func108_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func108_in_sel_cfg`] module"] -pub type FUNC108_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func108_in_sel_cfg; -#[doc = "FUNC109_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func109_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func109_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func109_in_sel_cfg`] module"] -pub type FUNC109_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func109_in_sel_cfg; -#[doc = "FUNC110_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func110_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func110_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func110_in_sel_cfg`] module"] -pub type FUNC110_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func110_in_sel_cfg; -#[doc = "FUNC111_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func111_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func111_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func111_in_sel_cfg`] module"] -pub type FUNC111_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func111_in_sel_cfg; -#[doc = "FUNC112_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func112_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func112_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func112_in_sel_cfg`] module"] -pub type FUNC112_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func112_in_sel_cfg; -#[doc = "FUNC113_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func113_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func113_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func113_in_sel_cfg`] module"] -pub type FUNC113_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func113_in_sel_cfg; -#[doc = "FUNC114_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func114_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func114_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func114_in_sel_cfg`] module"] -pub type FUNC114_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func114_in_sel_cfg; -#[doc = "FUNC117_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func117_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func117_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func117_in_sel_cfg`] module"] -pub type FUNC117_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func117_in_sel_cfg; -#[doc = "FUNC118_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func118_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func118_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func118_in_sel_cfg`] module"] -pub type FUNC118_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func118_in_sel_cfg; -#[doc = "FUNC126_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func126_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func126_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func126_in_sel_cfg`] module"] -pub type FUNC126_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func126_in_sel_cfg; -#[doc = "FUNC127_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func127_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func127_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func127_in_sel_cfg`] module"] -pub type FUNC127_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func127_in_sel_cfg; -#[doc = "FUNC128_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func128_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func128_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func128_in_sel_cfg`] module"] -pub type FUNC128_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func128_in_sel_cfg; -#[doc = "FUNC129_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func129_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func129_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func129_in_sel_cfg`] module"] -pub type FUNC129_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func129_in_sel_cfg; -#[doc = "FUNC130_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func130_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func130_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func130_in_sel_cfg`] module"] -pub type FUNC130_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func130_in_sel_cfg; -#[doc = "FUNC131_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func131_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func131_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func131_in_sel_cfg`] module"] -pub type FUNC131_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func131_in_sel_cfg; -#[doc = "FUNC132_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func132_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func132_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func132_in_sel_cfg`] module"] -pub type FUNC132_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func132_in_sel_cfg; -#[doc = "FUNC133_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func133_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func133_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func133_in_sel_cfg`] module"] -pub type FUNC133_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func133_in_sel_cfg; -#[doc = "FUNC134_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func134_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func134_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func134_in_sel_cfg`] module"] -pub type FUNC134_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func134_in_sel_cfg; -#[doc = "FUNC135_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func135_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func135_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func135_in_sel_cfg`] module"] -pub type FUNC135_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func135_in_sel_cfg; -#[doc = "FUNC136_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func136_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func136_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func136_in_sel_cfg`] module"] -pub type FUNC136_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func136_in_sel_cfg; -#[doc = "FUNC137_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func137_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func137_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func137_in_sel_cfg`] module"] -pub type FUNC137_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func137_in_sel_cfg; -#[doc = "FUNC138_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func138_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func138_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func138_in_sel_cfg`] module"] -pub type FUNC138_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func138_in_sel_cfg; -#[doc = "FUNC139_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func139_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func139_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func139_in_sel_cfg`] module"] -pub type FUNC139_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func139_in_sel_cfg; -#[doc = "FUNC140_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func140_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func140_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func140_in_sel_cfg`] module"] -pub type FUNC140_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func140_in_sel_cfg; -#[doc = "FUNC141_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func141_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func141_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func141_in_sel_cfg`] module"] -pub type FUNC141_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func141_in_sel_cfg; -#[doc = "FUNC142_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func142_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func142_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func142_in_sel_cfg`] module"] -pub type FUNC142_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func142_in_sel_cfg; -#[doc = "FUNC143_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func143_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func143_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func143_in_sel_cfg`] module"] -pub type FUNC143_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func143_in_sel_cfg; -#[doc = "FUNC144_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func144_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func144_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func144_in_sel_cfg`] module"] -pub type FUNC144_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func144_in_sel_cfg; -#[doc = "FUNC145_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func145_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func145_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func145_in_sel_cfg`] module"] -pub type FUNC145_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func145_in_sel_cfg; -#[doc = "FUNC146_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func146_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func146_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func146_in_sel_cfg`] module"] -pub type FUNC146_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func146_in_sel_cfg; -#[doc = "FUNC147_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func147_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func147_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func147_in_sel_cfg`] module"] -pub type FUNC147_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func147_in_sel_cfg; -#[doc = "FUNC148_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func148_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func148_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func148_in_sel_cfg`] module"] -pub type FUNC148_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func148_in_sel_cfg; -#[doc = "FUNC149_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func149_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func149_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func149_in_sel_cfg`] module"] -pub type FUNC149_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func149_in_sel_cfg; -#[doc = "FUNC150_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func150_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func150_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func150_in_sel_cfg`] module"] -pub type FUNC150_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func150_in_sel_cfg; -#[doc = "FUNC151_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func151_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func151_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func151_in_sel_cfg`] module"] -pub type FUNC151_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func151_in_sel_cfg; -#[doc = "FUNC152_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func152_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func152_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func152_in_sel_cfg`] module"] -pub type FUNC152_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func152_in_sel_cfg; -#[doc = "FUNC153_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func153_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func153_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func153_in_sel_cfg`] module"] -pub type FUNC153_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func153_in_sel_cfg; -#[doc = "FUNC154_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func154_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func154_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func154_in_sel_cfg`] module"] -pub type FUNC154_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func154_in_sel_cfg; -#[doc = "FUNC155_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func155_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func155_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func155_in_sel_cfg`] module"] -pub type FUNC155_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func155_in_sel_cfg; -#[doc = "FUNC156_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func156_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func156_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func156_in_sel_cfg`] module"] -pub type FUNC156_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func156_in_sel_cfg; -#[doc = "FUNC158_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func158_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func158_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func158_in_sel_cfg`] module"] -pub type FUNC158_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func158_in_sel_cfg; -#[doc = "FUNC159_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func159_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func159_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func159_in_sel_cfg`] module"] -pub type FUNC159_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func159_in_sel_cfg; -#[doc = "FUNC160_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func160_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func160_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func160_in_sel_cfg`] module"] -pub type FUNC160_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func160_in_sel_cfg; -#[doc = "FUNC161_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func161_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func161_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func161_in_sel_cfg`] module"] -pub type FUNC161_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func161_in_sel_cfg; -#[doc = "FUNC162_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func162_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func162_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func162_in_sel_cfg`] module"] -pub type FUNC162_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func162_in_sel_cfg; -#[doc = "FUNC163_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func163_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func163_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func163_in_sel_cfg`] module"] -pub type FUNC163_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func163_in_sel_cfg; -#[doc = "FUNC164_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func164_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func164_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func164_in_sel_cfg`] module"] -pub type FUNC164_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func164_in_sel_cfg; -#[doc = "FUNC165_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func165_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func165_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func165_in_sel_cfg`] module"] -pub type FUNC165_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func165_in_sel_cfg; -#[doc = "FUNC166_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func166_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func166_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func166_in_sel_cfg`] module"] -pub type FUNC166_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func166_in_sel_cfg; -#[doc = "FUNC167_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func167_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func167_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func167_in_sel_cfg`] module"] -pub type FUNC167_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func167_in_sel_cfg; -#[doc = "FUNC168_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func168_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func168_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func168_in_sel_cfg`] module"] -pub type FUNC168_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func168_in_sel_cfg; -#[doc = "FUNC169_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func169_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func169_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func169_in_sel_cfg`] module"] -pub type FUNC169_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func169_in_sel_cfg; -#[doc = "FUNC170_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func170_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func170_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func170_in_sel_cfg`] module"] -pub type FUNC170_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func170_in_sel_cfg; -#[doc = "FUNC171_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func171_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func171_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func171_in_sel_cfg`] module"] -pub type FUNC171_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func171_in_sel_cfg; -#[doc = "FUNC172_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func172_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func172_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func172_in_sel_cfg`] module"] -pub type FUNC172_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func172_in_sel_cfg; -#[doc = "FUNC173_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func173_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func173_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func173_in_sel_cfg`] module"] -pub type FUNC173_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func173_in_sel_cfg; -#[doc = "FUNC174_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func174_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func174_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func174_in_sel_cfg`] module"] -pub type FUNC174_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func174_in_sel_cfg; -#[doc = "FUNC175_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func175_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func175_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func175_in_sel_cfg`] module"] -pub type FUNC175_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func175_in_sel_cfg; -#[doc = "FUNC176_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func176_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func176_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func176_in_sel_cfg`] module"] -pub type FUNC176_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func176_in_sel_cfg; -#[doc = "FUNC177_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func177_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func177_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func177_in_sel_cfg`] module"] -pub type FUNC177_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func177_in_sel_cfg; -#[doc = "FUNC178_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func178_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func178_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func178_in_sel_cfg`] module"] -pub type FUNC178_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func178_in_sel_cfg; -#[doc = "FUNC179_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func179_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func179_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func179_in_sel_cfg`] module"] -pub type FUNC179_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func179_in_sel_cfg; -#[doc = "FUNC180_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func180_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func180_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func180_in_sel_cfg`] module"] -pub type FUNC180_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func180_in_sel_cfg; -#[doc = "FUNC181_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func181_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func181_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func181_in_sel_cfg`] module"] -pub type FUNC181_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func181_in_sel_cfg; -#[doc = "FUNC182_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func182_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func182_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func182_in_sel_cfg`] module"] -pub type FUNC182_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func182_in_sel_cfg; -#[doc = "FUNC183_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func183_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func183_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func183_in_sel_cfg`] module"] -pub type FUNC183_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func183_in_sel_cfg; -#[doc = "FUNC184_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func184_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func184_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func184_in_sel_cfg`] module"] -pub type FUNC184_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func184_in_sel_cfg; -#[doc = "FUNC185_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func185_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func185_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func185_in_sel_cfg`] module"] -pub type FUNC185_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func185_in_sel_cfg; -#[doc = "FUNC186_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func186_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func186_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func186_in_sel_cfg`] module"] -pub type FUNC186_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func186_in_sel_cfg; -#[doc = "FUNC187_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func187_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func187_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func187_in_sel_cfg`] module"] -pub type FUNC187_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func187_in_sel_cfg; -#[doc = "FUNC188_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func188_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func188_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func188_in_sel_cfg`] module"] -pub type FUNC188_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func188_in_sel_cfg; -#[doc = "FUNC189_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func189_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func189_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func189_in_sel_cfg`] module"] -pub type FUNC189_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func189_in_sel_cfg; -#[doc = "FUNC190_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func190_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func190_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func190_in_sel_cfg`] module"] -pub type FUNC190_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func190_in_sel_cfg; -#[doc = "FUNC191_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func191_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func191_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func191_in_sel_cfg`] module"] -pub type FUNC191_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func191_in_sel_cfg; -#[doc = "FUNC192_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func192_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func192_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func192_in_sel_cfg`] module"] -pub type FUNC192_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func192_in_sel_cfg; -#[doc = "FUNC193_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func193_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func193_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func193_in_sel_cfg`] module"] -pub type FUNC193_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func193_in_sel_cfg; -#[doc = "FUNC194_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func194_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func194_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func194_in_sel_cfg`] module"] -pub type FUNC194_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func194_in_sel_cfg; -#[doc = "FUNC195_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func195_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func195_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func195_in_sel_cfg`] module"] -pub type FUNC195_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func195_in_sel_cfg; -#[doc = "FUNC196_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func196_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func196_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func196_in_sel_cfg`] module"] -pub type FUNC196_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func196_in_sel_cfg; -#[doc = "FUNC197_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func197_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func197_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func197_in_sel_cfg`] module"] -pub type FUNC197_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func197_in_sel_cfg; -#[doc = "FUNC198_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func198_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func198_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func198_in_sel_cfg`] module"] -pub type FUNC198_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func198_in_sel_cfg; -#[doc = "FUNC199_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func199_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func199_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func199_in_sel_cfg`] module"] -pub type FUNC199_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func199_in_sel_cfg; -#[doc = "FUNC200_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func200_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func200_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func200_in_sel_cfg`] module"] -pub type FUNC200_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func200_in_sel_cfg; -#[doc = "FUNC201_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func201_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func201_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func201_in_sel_cfg`] module"] -pub type FUNC201_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func201_in_sel_cfg; -#[doc = "FUNC202_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func202_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func202_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func202_in_sel_cfg`] module"] -pub type FUNC202_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func202_in_sel_cfg; -#[doc = "FUNC203_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func203_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func203_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func203_in_sel_cfg`] module"] -pub type FUNC203_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func203_in_sel_cfg; -#[doc = "FUNC214_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func214_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func214_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func214_in_sel_cfg`] module"] -pub type FUNC214_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func214_in_sel_cfg; -#[doc = "FUNC215_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func215_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func215_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func215_in_sel_cfg`] module"] -pub type FUNC215_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func215_in_sel_cfg; -#[doc = "FUNC216_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func216_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func216_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func216_in_sel_cfg`] module"] -pub type FUNC216_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func216_in_sel_cfg; -#[doc = "FUNC217_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func217_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func217_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func217_in_sel_cfg`] module"] -pub type FUNC217_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func217_in_sel_cfg; -#[doc = "FUNC218_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func218_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func218_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func218_in_sel_cfg`] module"] -pub type FUNC218_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func218_in_sel_cfg; -#[doc = "FUNC219_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func219_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func219_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func219_in_sel_cfg`] module"] -pub type FUNC219_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func219_in_sel_cfg; -#[doc = "FUNC220_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func220_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func220_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func220_in_sel_cfg`] module"] -pub type FUNC220_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func220_in_sel_cfg; -#[doc = "FUNC221_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func221_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func221_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func221_in_sel_cfg`] module"] -pub type FUNC221_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func221_in_sel_cfg; -#[doc = "FUNC222_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func222_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func222_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func222_in_sel_cfg`] module"] -pub type FUNC222_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func222_in_sel_cfg; -#[doc = "FUNC223_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func223_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func223_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func223_in_sel_cfg`] module"] -pub type FUNC223_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func223_in_sel_cfg; -#[doc = "FUNC224_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func224_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func224_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func224_in_sel_cfg`] module"] -pub type FUNC224_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func224_in_sel_cfg; -#[doc = "FUNC225_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func225_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func225_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func225_in_sel_cfg`] module"] -pub type FUNC225_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func225_in_sel_cfg; -#[doc = "FUNC226_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func226_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func226_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func226_in_sel_cfg`] module"] -pub type FUNC226_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func226_in_sel_cfg; -#[doc = "FUNC227_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func227_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func227_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func227_in_sel_cfg`] module"] -pub type FUNC227_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func227_in_sel_cfg; -#[doc = "FUNC228_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func228_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func228_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func228_in_sel_cfg`] module"] -pub type FUNC228_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func228_in_sel_cfg; -#[doc = "FUNC229_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func229_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func229_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func229_in_sel_cfg`] module"] -pub type FUNC229_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func229_in_sel_cfg; -#[doc = "FUNC230_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func230_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func230_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func230_in_sel_cfg`] module"] -pub type FUNC230_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func230_in_sel_cfg; -#[doc = "FUNC231_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func231_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func231_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func231_in_sel_cfg`] module"] -pub type FUNC231_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func231_in_sel_cfg; -#[doc = "FUNC232_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func232_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func232_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func232_in_sel_cfg`] module"] -pub type FUNC232_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func232_in_sel_cfg; -#[doc = "FUNC233_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func233_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func233_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func233_in_sel_cfg`] module"] -pub type FUNC233_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func233_in_sel_cfg; -#[doc = "FUNC234_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func234_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func234_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func234_in_sel_cfg`] module"] -pub type FUNC234_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func234_in_sel_cfg; -#[doc = "FUNC235_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func235_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func235_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func235_in_sel_cfg`] module"] -pub type FUNC235_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func235_in_sel_cfg; -#[doc = "FUNC236_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func236_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func236_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func236_in_sel_cfg`] module"] -pub type FUNC236_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func236_in_sel_cfg; -#[doc = "FUNC237_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func237_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func237_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func237_in_sel_cfg`] module"] -pub type FUNC237_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func237_in_sel_cfg; -#[doc = "FUNC238_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func238_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func238_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func238_in_sel_cfg`] module"] -pub type FUNC238_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func238_in_sel_cfg; -#[doc = "FUNC239_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func239_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func239_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func239_in_sel_cfg`] module"] -pub type FUNC239_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func239_in_sel_cfg; -#[doc = "FUNC240_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func240_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func240_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func240_in_sel_cfg`] module"] -pub type FUNC240_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func240_in_sel_cfg; -#[doc = "FUNC241_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func241_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func241_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func241_in_sel_cfg`] module"] -pub type FUNC241_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func241_in_sel_cfg; -#[doc = "FUNC242_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func242_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func242_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func242_in_sel_cfg`] module"] -pub type FUNC242_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func242_in_sel_cfg; -#[doc = "FUNC243_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func243_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func243_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func243_in_sel_cfg`] module"] -pub type FUNC243_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func243_in_sel_cfg; -#[doc = "FUNC244_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func244_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func244_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func244_in_sel_cfg`] module"] -pub type FUNC244_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func244_in_sel_cfg; -#[doc = "FUNC245_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func245_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func245_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func245_in_sel_cfg`] module"] -pub type FUNC245_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func245_in_sel_cfg; -#[doc = "FUNC246_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func246_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func246_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func246_in_sel_cfg`] module"] -pub type FUNC246_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func246_in_sel_cfg; -#[doc = "FUNC247_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func247_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func247_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func247_in_sel_cfg`] module"] -pub type FUNC247_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func247_in_sel_cfg; -#[doc = "FUNC248_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func248_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func248_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func248_in_sel_cfg`] module"] -pub type FUNC248_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func248_in_sel_cfg; -#[doc = "FUNC249_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func249_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func249_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func249_in_sel_cfg`] module"] -pub type FUNC249_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func249_in_sel_cfg; -#[doc = "FUNC250_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func250_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func250_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func250_in_sel_cfg`] module"] -pub type FUNC250_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func250_in_sel_cfg; -#[doc = "FUNC251_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func251_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func251_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func251_in_sel_cfg`] module"] -pub type FUNC251_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func251_in_sel_cfg; -#[doc = "FUNC252_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func252_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func252_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func252_in_sel_cfg`] module"] -pub type FUNC252_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func252_in_sel_cfg; -#[doc = "FUNC253_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func253_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func253_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func253_in_sel_cfg`] module"] -pub type FUNC253_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func253_in_sel_cfg; -#[doc = "FUNC254_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func254_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func254_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func254_in_sel_cfg`] module"] -pub type FUNC254_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func254_in_sel_cfg; -#[doc = "FUNC255_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func255_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func255_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func255_in_sel_cfg`] module"] -pub type FUNC255_IN_SEL_CFG = crate::Reg; -#[doc = "GPIO input function configuration register"] -pub mod func255_in_sel_cfg; #[doc = "FUNC_OUT_SEL_CFG (rw) register accessor: GPIO output function select register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func_out_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func_out_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func_out_sel_cfg`] module"] pub type FUNC_OUT_SEL_CFG = crate::Reg; #[doc = "GPIO output function select register"] @@ -3017,3 +2049,7 @@ pub mod bist_ctrl; pub type DATE = crate::Reg; #[doc = "GPIO version register"] pub mod date; +#[doc = "FUNC_IN_SEL_CFG (rw) register accessor: GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func_in_sel_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func_in_sel_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@func_in_sel_cfg`] module"] +pub type FUNC_IN_SEL_CFG = crate::Reg; +#[doc = "GPIO input function configuration register"] +pub mod func_in_sel_cfg; diff --git a/esp32p4/src/gpio/func100_in_sel_cfg.rs b/esp32p4/src/gpio/func100_in_sel_cfg.rs deleted file mode 100644 index 929bc8d110..0000000000 --- a/esp32p4/src/gpio/func100_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC100_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC100_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC100_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC100_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC100_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC100_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC100_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC100_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC100_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC100_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG100_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG100_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG100_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG100_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func100_in_sel(&self) -> FUNC100_IN_SEL_R { - FUNC100_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func100_in_inv_sel(&self) -> FUNC100_IN_INV_SEL_R { - FUNC100_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig100_in_sel(&self) -> SIG100_IN_SEL_R { - SIG100_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC100_IN_SEL_CFG") - .field( - "func100_in_sel", - &format_args!("{}", self.func100_in_sel().bits()), - ) - .field( - "func100_in_inv_sel", - &format_args!("{}", self.func100_in_inv_sel().bit()), - ) - .field( - "sig100_in_sel", - &format_args!("{}", self.sig100_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func100_in_sel(&mut self) -> FUNC100_IN_SEL_W { - FUNC100_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func100_in_inv_sel(&mut self) -> FUNC100_IN_INV_SEL_W { - FUNC100_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig100_in_sel(&mut self) -> SIG100_IN_SEL_W { - SIG100_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func100_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func100_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC100_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC100_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func100_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC100_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func100_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC100_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC100_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC100_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func101_in_sel_cfg.rs b/esp32p4/src/gpio/func101_in_sel_cfg.rs deleted file mode 100644 index 217ef89a05..0000000000 --- a/esp32p4/src/gpio/func101_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC101_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC101_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC101_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC101_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC101_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC101_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC101_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC101_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC101_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC101_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG101_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG101_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG101_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG101_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func101_in_sel(&self) -> FUNC101_IN_SEL_R { - FUNC101_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func101_in_inv_sel(&self) -> FUNC101_IN_INV_SEL_R { - FUNC101_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig101_in_sel(&self) -> SIG101_IN_SEL_R { - SIG101_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC101_IN_SEL_CFG") - .field( - "func101_in_sel", - &format_args!("{}", self.func101_in_sel().bits()), - ) - .field( - "func101_in_inv_sel", - &format_args!("{}", self.func101_in_inv_sel().bit()), - ) - .field( - "sig101_in_sel", - &format_args!("{}", self.sig101_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func101_in_sel(&mut self) -> FUNC101_IN_SEL_W { - FUNC101_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func101_in_inv_sel(&mut self) -> FUNC101_IN_INV_SEL_W { - FUNC101_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig101_in_sel(&mut self) -> SIG101_IN_SEL_W { - SIG101_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func101_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func101_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC101_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC101_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func101_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC101_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func101_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC101_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC101_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC101_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func102_in_sel_cfg.rs b/esp32p4/src/gpio/func102_in_sel_cfg.rs deleted file mode 100644 index f1910fbe13..0000000000 --- a/esp32p4/src/gpio/func102_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC102_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC102_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC102_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC102_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC102_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC102_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC102_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC102_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC102_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC102_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG102_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG102_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG102_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG102_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func102_in_sel(&self) -> FUNC102_IN_SEL_R { - FUNC102_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func102_in_inv_sel(&self) -> FUNC102_IN_INV_SEL_R { - FUNC102_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig102_in_sel(&self) -> SIG102_IN_SEL_R { - SIG102_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC102_IN_SEL_CFG") - .field( - "func102_in_sel", - &format_args!("{}", self.func102_in_sel().bits()), - ) - .field( - "func102_in_inv_sel", - &format_args!("{}", self.func102_in_inv_sel().bit()), - ) - .field( - "sig102_in_sel", - &format_args!("{}", self.sig102_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func102_in_sel(&mut self) -> FUNC102_IN_SEL_W { - FUNC102_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func102_in_inv_sel(&mut self) -> FUNC102_IN_INV_SEL_W { - FUNC102_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig102_in_sel(&mut self) -> SIG102_IN_SEL_W { - SIG102_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func102_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func102_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC102_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC102_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func102_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC102_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func102_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC102_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC102_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC102_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func103_in_sel_cfg.rs b/esp32p4/src/gpio/func103_in_sel_cfg.rs deleted file mode 100644 index 63c93def61..0000000000 --- a/esp32p4/src/gpio/func103_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC103_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC103_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC103_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC103_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC103_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC103_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC103_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC103_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC103_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC103_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG103_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG103_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG103_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG103_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func103_in_sel(&self) -> FUNC103_IN_SEL_R { - FUNC103_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func103_in_inv_sel(&self) -> FUNC103_IN_INV_SEL_R { - FUNC103_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig103_in_sel(&self) -> SIG103_IN_SEL_R { - SIG103_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC103_IN_SEL_CFG") - .field( - "func103_in_sel", - &format_args!("{}", self.func103_in_sel().bits()), - ) - .field( - "func103_in_inv_sel", - &format_args!("{}", self.func103_in_inv_sel().bit()), - ) - .field( - "sig103_in_sel", - &format_args!("{}", self.sig103_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func103_in_sel(&mut self) -> FUNC103_IN_SEL_W { - FUNC103_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func103_in_inv_sel(&mut self) -> FUNC103_IN_INV_SEL_W { - FUNC103_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig103_in_sel(&mut self) -> SIG103_IN_SEL_W { - SIG103_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func103_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func103_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC103_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC103_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func103_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC103_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func103_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC103_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC103_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC103_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func104_in_sel_cfg.rs b/esp32p4/src/gpio/func104_in_sel_cfg.rs deleted file mode 100644 index 9544bee4ad..0000000000 --- a/esp32p4/src/gpio/func104_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC104_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC104_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC104_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC104_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC104_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC104_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC104_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC104_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC104_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC104_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG104_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG104_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG104_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG104_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func104_in_sel(&self) -> FUNC104_IN_SEL_R { - FUNC104_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func104_in_inv_sel(&self) -> FUNC104_IN_INV_SEL_R { - FUNC104_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig104_in_sel(&self) -> SIG104_IN_SEL_R { - SIG104_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC104_IN_SEL_CFG") - .field( - "func104_in_sel", - &format_args!("{}", self.func104_in_sel().bits()), - ) - .field( - "func104_in_inv_sel", - &format_args!("{}", self.func104_in_inv_sel().bit()), - ) - .field( - "sig104_in_sel", - &format_args!("{}", self.sig104_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func104_in_sel(&mut self) -> FUNC104_IN_SEL_W { - FUNC104_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func104_in_inv_sel(&mut self) -> FUNC104_IN_INV_SEL_W { - FUNC104_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig104_in_sel(&mut self) -> SIG104_IN_SEL_W { - SIG104_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func104_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func104_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC104_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC104_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func104_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC104_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func104_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC104_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC104_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC104_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func105_in_sel_cfg.rs b/esp32p4/src/gpio/func105_in_sel_cfg.rs deleted file mode 100644 index 8b6e63689f..0000000000 --- a/esp32p4/src/gpio/func105_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC105_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC105_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC105_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC105_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC105_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC105_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC105_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC105_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC105_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC105_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG105_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG105_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG105_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG105_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func105_in_sel(&self) -> FUNC105_IN_SEL_R { - FUNC105_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func105_in_inv_sel(&self) -> FUNC105_IN_INV_SEL_R { - FUNC105_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig105_in_sel(&self) -> SIG105_IN_SEL_R { - SIG105_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC105_IN_SEL_CFG") - .field( - "func105_in_sel", - &format_args!("{}", self.func105_in_sel().bits()), - ) - .field( - "func105_in_inv_sel", - &format_args!("{}", self.func105_in_inv_sel().bit()), - ) - .field( - "sig105_in_sel", - &format_args!("{}", self.sig105_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func105_in_sel(&mut self) -> FUNC105_IN_SEL_W { - FUNC105_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func105_in_inv_sel(&mut self) -> FUNC105_IN_INV_SEL_W { - FUNC105_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig105_in_sel(&mut self) -> SIG105_IN_SEL_W { - SIG105_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func105_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func105_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC105_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC105_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func105_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC105_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func105_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC105_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC105_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC105_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func106_in_sel_cfg.rs b/esp32p4/src/gpio/func106_in_sel_cfg.rs deleted file mode 100644 index 4b04ed4850..0000000000 --- a/esp32p4/src/gpio/func106_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC106_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC106_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC106_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC106_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC106_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC106_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC106_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC106_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC106_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC106_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG106_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG106_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG106_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG106_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func106_in_sel(&self) -> FUNC106_IN_SEL_R { - FUNC106_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func106_in_inv_sel(&self) -> FUNC106_IN_INV_SEL_R { - FUNC106_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig106_in_sel(&self) -> SIG106_IN_SEL_R { - SIG106_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC106_IN_SEL_CFG") - .field( - "func106_in_sel", - &format_args!("{}", self.func106_in_sel().bits()), - ) - .field( - "func106_in_inv_sel", - &format_args!("{}", self.func106_in_inv_sel().bit()), - ) - .field( - "sig106_in_sel", - &format_args!("{}", self.sig106_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func106_in_sel(&mut self) -> FUNC106_IN_SEL_W { - FUNC106_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func106_in_inv_sel(&mut self) -> FUNC106_IN_INV_SEL_W { - FUNC106_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig106_in_sel(&mut self) -> SIG106_IN_SEL_W { - SIG106_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func106_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func106_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC106_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC106_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func106_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC106_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func106_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC106_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC106_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC106_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func107_in_sel_cfg.rs b/esp32p4/src/gpio/func107_in_sel_cfg.rs deleted file mode 100644 index 7c2d9659e0..0000000000 --- a/esp32p4/src/gpio/func107_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC107_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC107_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC107_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC107_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC107_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC107_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC107_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC107_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC107_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC107_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG107_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG107_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG107_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG107_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func107_in_sel(&self) -> FUNC107_IN_SEL_R { - FUNC107_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func107_in_inv_sel(&self) -> FUNC107_IN_INV_SEL_R { - FUNC107_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig107_in_sel(&self) -> SIG107_IN_SEL_R { - SIG107_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC107_IN_SEL_CFG") - .field( - "func107_in_sel", - &format_args!("{}", self.func107_in_sel().bits()), - ) - .field( - "func107_in_inv_sel", - &format_args!("{}", self.func107_in_inv_sel().bit()), - ) - .field( - "sig107_in_sel", - &format_args!("{}", self.sig107_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func107_in_sel(&mut self) -> FUNC107_IN_SEL_W { - FUNC107_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func107_in_inv_sel(&mut self) -> FUNC107_IN_INV_SEL_W { - FUNC107_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig107_in_sel(&mut self) -> SIG107_IN_SEL_W { - SIG107_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func107_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func107_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC107_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC107_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func107_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC107_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func107_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC107_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC107_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC107_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func108_in_sel_cfg.rs b/esp32p4/src/gpio/func108_in_sel_cfg.rs deleted file mode 100644 index fb6341759b..0000000000 --- a/esp32p4/src/gpio/func108_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC108_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC108_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC108_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC108_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC108_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC108_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC108_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC108_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC108_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC108_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG108_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG108_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG108_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG108_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func108_in_sel(&self) -> FUNC108_IN_SEL_R { - FUNC108_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func108_in_inv_sel(&self) -> FUNC108_IN_INV_SEL_R { - FUNC108_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig108_in_sel(&self) -> SIG108_IN_SEL_R { - SIG108_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC108_IN_SEL_CFG") - .field( - "func108_in_sel", - &format_args!("{}", self.func108_in_sel().bits()), - ) - .field( - "func108_in_inv_sel", - &format_args!("{}", self.func108_in_inv_sel().bit()), - ) - .field( - "sig108_in_sel", - &format_args!("{}", self.sig108_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func108_in_sel(&mut self) -> FUNC108_IN_SEL_W { - FUNC108_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func108_in_inv_sel(&mut self) -> FUNC108_IN_INV_SEL_W { - FUNC108_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig108_in_sel(&mut self) -> SIG108_IN_SEL_W { - SIG108_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func108_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func108_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC108_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC108_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func108_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC108_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func108_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC108_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC108_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC108_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func109_in_sel_cfg.rs b/esp32p4/src/gpio/func109_in_sel_cfg.rs deleted file mode 100644 index 87c51eaff6..0000000000 --- a/esp32p4/src/gpio/func109_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC109_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC109_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC109_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC109_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC109_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC109_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC109_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC109_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC109_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC109_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG109_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG109_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG109_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG109_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func109_in_sel(&self) -> FUNC109_IN_SEL_R { - FUNC109_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func109_in_inv_sel(&self) -> FUNC109_IN_INV_SEL_R { - FUNC109_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig109_in_sel(&self) -> SIG109_IN_SEL_R { - SIG109_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC109_IN_SEL_CFG") - .field( - "func109_in_sel", - &format_args!("{}", self.func109_in_sel().bits()), - ) - .field( - "func109_in_inv_sel", - &format_args!("{}", self.func109_in_inv_sel().bit()), - ) - .field( - "sig109_in_sel", - &format_args!("{}", self.sig109_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func109_in_sel(&mut self) -> FUNC109_IN_SEL_W { - FUNC109_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func109_in_inv_sel(&mut self) -> FUNC109_IN_INV_SEL_W { - FUNC109_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig109_in_sel(&mut self) -> SIG109_IN_SEL_W { - SIG109_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func109_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func109_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC109_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC109_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func109_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC109_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func109_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC109_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC109_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC109_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func10_in_sel_cfg.rs b/esp32p4/src/gpio/func10_in_sel_cfg.rs deleted file mode 100644 index 4e1deb03c1..0000000000 --- a/esp32p4/src/gpio/func10_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC10_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC10_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC10_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC10_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC10_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC10_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC10_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC10_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC10_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC10_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG10_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG10_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG10_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG10_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func10_in_sel(&self) -> FUNC10_IN_SEL_R { - FUNC10_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func10_in_inv_sel(&self) -> FUNC10_IN_INV_SEL_R { - FUNC10_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig10_in_sel(&self) -> SIG10_IN_SEL_R { - SIG10_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC10_IN_SEL_CFG") - .field( - "func10_in_sel", - &format_args!("{}", self.func10_in_sel().bits()), - ) - .field( - "func10_in_inv_sel", - &format_args!("{}", self.func10_in_inv_sel().bit()), - ) - .field( - "sig10_in_sel", - &format_args!("{}", self.sig10_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func10_in_sel(&mut self) -> FUNC10_IN_SEL_W { - FUNC10_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func10_in_inv_sel(&mut self) -> FUNC10_IN_INV_SEL_W { - FUNC10_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig10_in_sel(&mut self) -> SIG10_IN_SEL_W { - SIG10_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func10_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func10_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC10_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC10_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func10_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC10_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func10_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC10_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC10_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC10_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func110_in_sel_cfg.rs b/esp32p4/src/gpio/func110_in_sel_cfg.rs deleted file mode 100644 index a366d6d486..0000000000 --- a/esp32p4/src/gpio/func110_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC110_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC110_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC110_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC110_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC110_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC110_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC110_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC110_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC110_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC110_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG110_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG110_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG110_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG110_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func110_in_sel(&self) -> FUNC110_IN_SEL_R { - FUNC110_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func110_in_inv_sel(&self) -> FUNC110_IN_INV_SEL_R { - FUNC110_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig110_in_sel(&self) -> SIG110_IN_SEL_R { - SIG110_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC110_IN_SEL_CFG") - .field( - "func110_in_sel", - &format_args!("{}", self.func110_in_sel().bits()), - ) - .field( - "func110_in_inv_sel", - &format_args!("{}", self.func110_in_inv_sel().bit()), - ) - .field( - "sig110_in_sel", - &format_args!("{}", self.sig110_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func110_in_sel(&mut self) -> FUNC110_IN_SEL_W { - FUNC110_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func110_in_inv_sel(&mut self) -> FUNC110_IN_INV_SEL_W { - FUNC110_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig110_in_sel(&mut self) -> SIG110_IN_SEL_W { - SIG110_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func110_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func110_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC110_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC110_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func110_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC110_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func110_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC110_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC110_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC110_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func111_in_sel_cfg.rs b/esp32p4/src/gpio/func111_in_sel_cfg.rs deleted file mode 100644 index bbc877b3cc..0000000000 --- a/esp32p4/src/gpio/func111_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC111_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC111_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC111_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC111_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC111_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC111_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC111_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC111_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC111_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC111_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG111_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG111_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG111_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG111_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func111_in_sel(&self) -> FUNC111_IN_SEL_R { - FUNC111_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func111_in_inv_sel(&self) -> FUNC111_IN_INV_SEL_R { - FUNC111_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig111_in_sel(&self) -> SIG111_IN_SEL_R { - SIG111_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC111_IN_SEL_CFG") - .field( - "func111_in_sel", - &format_args!("{}", self.func111_in_sel().bits()), - ) - .field( - "func111_in_inv_sel", - &format_args!("{}", self.func111_in_inv_sel().bit()), - ) - .field( - "sig111_in_sel", - &format_args!("{}", self.sig111_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func111_in_sel(&mut self) -> FUNC111_IN_SEL_W { - FUNC111_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func111_in_inv_sel(&mut self) -> FUNC111_IN_INV_SEL_W { - FUNC111_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig111_in_sel(&mut self) -> SIG111_IN_SEL_W { - SIG111_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func111_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func111_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC111_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC111_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func111_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC111_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func111_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC111_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC111_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC111_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func112_in_sel_cfg.rs b/esp32p4/src/gpio/func112_in_sel_cfg.rs deleted file mode 100644 index 02a1dc1132..0000000000 --- a/esp32p4/src/gpio/func112_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC112_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC112_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC112_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC112_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC112_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC112_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC112_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC112_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC112_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC112_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG112_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG112_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG112_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG112_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func112_in_sel(&self) -> FUNC112_IN_SEL_R { - FUNC112_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func112_in_inv_sel(&self) -> FUNC112_IN_INV_SEL_R { - FUNC112_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig112_in_sel(&self) -> SIG112_IN_SEL_R { - SIG112_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC112_IN_SEL_CFG") - .field( - "func112_in_sel", - &format_args!("{}", self.func112_in_sel().bits()), - ) - .field( - "func112_in_inv_sel", - &format_args!("{}", self.func112_in_inv_sel().bit()), - ) - .field( - "sig112_in_sel", - &format_args!("{}", self.sig112_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func112_in_sel(&mut self) -> FUNC112_IN_SEL_W { - FUNC112_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func112_in_inv_sel(&mut self) -> FUNC112_IN_INV_SEL_W { - FUNC112_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig112_in_sel(&mut self) -> SIG112_IN_SEL_W { - SIG112_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func112_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func112_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC112_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC112_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func112_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC112_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func112_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC112_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC112_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC112_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func113_in_sel_cfg.rs b/esp32p4/src/gpio/func113_in_sel_cfg.rs deleted file mode 100644 index ca73639b65..0000000000 --- a/esp32p4/src/gpio/func113_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC113_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC113_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC113_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC113_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC113_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC113_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC113_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC113_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC113_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC113_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG113_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG113_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG113_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG113_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func113_in_sel(&self) -> FUNC113_IN_SEL_R { - FUNC113_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func113_in_inv_sel(&self) -> FUNC113_IN_INV_SEL_R { - FUNC113_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig113_in_sel(&self) -> SIG113_IN_SEL_R { - SIG113_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC113_IN_SEL_CFG") - .field( - "func113_in_sel", - &format_args!("{}", self.func113_in_sel().bits()), - ) - .field( - "func113_in_inv_sel", - &format_args!("{}", self.func113_in_inv_sel().bit()), - ) - .field( - "sig113_in_sel", - &format_args!("{}", self.sig113_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func113_in_sel(&mut self) -> FUNC113_IN_SEL_W { - FUNC113_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func113_in_inv_sel(&mut self) -> FUNC113_IN_INV_SEL_W { - FUNC113_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig113_in_sel(&mut self) -> SIG113_IN_SEL_W { - SIG113_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func113_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func113_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC113_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC113_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func113_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC113_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func113_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC113_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC113_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC113_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func114_in_sel_cfg.rs b/esp32p4/src/gpio/func114_in_sel_cfg.rs deleted file mode 100644 index d20c09ecec..0000000000 --- a/esp32p4/src/gpio/func114_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC114_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC114_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC114_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC114_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC114_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC114_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC114_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC114_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC114_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC114_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG114_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG114_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG114_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG114_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func114_in_sel(&self) -> FUNC114_IN_SEL_R { - FUNC114_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func114_in_inv_sel(&self) -> FUNC114_IN_INV_SEL_R { - FUNC114_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig114_in_sel(&self) -> SIG114_IN_SEL_R { - SIG114_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC114_IN_SEL_CFG") - .field( - "func114_in_sel", - &format_args!("{}", self.func114_in_sel().bits()), - ) - .field( - "func114_in_inv_sel", - &format_args!("{}", self.func114_in_inv_sel().bit()), - ) - .field( - "sig114_in_sel", - &format_args!("{}", self.sig114_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func114_in_sel(&mut self) -> FUNC114_IN_SEL_W { - FUNC114_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func114_in_inv_sel(&mut self) -> FUNC114_IN_INV_SEL_W { - FUNC114_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig114_in_sel(&mut self) -> SIG114_IN_SEL_W { - SIG114_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func114_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func114_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC114_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC114_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func114_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC114_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func114_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC114_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC114_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC114_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func117_in_sel_cfg.rs b/esp32p4/src/gpio/func117_in_sel_cfg.rs deleted file mode 100644 index b42dac86bc..0000000000 --- a/esp32p4/src/gpio/func117_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC117_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC117_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC117_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC117_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC117_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC117_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC117_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC117_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC117_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC117_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG117_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG117_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG117_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG117_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func117_in_sel(&self) -> FUNC117_IN_SEL_R { - FUNC117_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func117_in_inv_sel(&self) -> FUNC117_IN_INV_SEL_R { - FUNC117_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig117_in_sel(&self) -> SIG117_IN_SEL_R { - SIG117_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC117_IN_SEL_CFG") - .field( - "func117_in_sel", - &format_args!("{}", self.func117_in_sel().bits()), - ) - .field( - "func117_in_inv_sel", - &format_args!("{}", self.func117_in_inv_sel().bit()), - ) - .field( - "sig117_in_sel", - &format_args!("{}", self.sig117_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func117_in_sel(&mut self) -> FUNC117_IN_SEL_W { - FUNC117_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func117_in_inv_sel(&mut self) -> FUNC117_IN_INV_SEL_W { - FUNC117_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig117_in_sel(&mut self) -> SIG117_IN_SEL_W { - SIG117_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func117_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func117_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC117_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC117_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func117_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC117_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func117_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC117_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC117_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC117_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func118_in_sel_cfg.rs b/esp32p4/src/gpio/func118_in_sel_cfg.rs deleted file mode 100644 index e5222f49b6..0000000000 --- a/esp32p4/src/gpio/func118_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC118_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC118_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC118_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC118_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC118_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC118_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC118_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC118_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC118_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC118_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG118_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG118_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG118_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG118_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func118_in_sel(&self) -> FUNC118_IN_SEL_R { - FUNC118_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func118_in_inv_sel(&self) -> FUNC118_IN_INV_SEL_R { - FUNC118_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig118_in_sel(&self) -> SIG118_IN_SEL_R { - SIG118_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC118_IN_SEL_CFG") - .field( - "func118_in_sel", - &format_args!("{}", self.func118_in_sel().bits()), - ) - .field( - "func118_in_inv_sel", - &format_args!("{}", self.func118_in_inv_sel().bit()), - ) - .field( - "sig118_in_sel", - &format_args!("{}", self.sig118_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func118_in_sel(&mut self) -> FUNC118_IN_SEL_W { - FUNC118_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func118_in_inv_sel(&mut self) -> FUNC118_IN_INV_SEL_W { - FUNC118_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig118_in_sel(&mut self) -> SIG118_IN_SEL_W { - SIG118_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func118_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func118_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC118_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC118_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func118_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC118_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func118_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC118_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC118_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC118_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func11_in_sel_cfg.rs b/esp32p4/src/gpio/func11_in_sel_cfg.rs deleted file mode 100644 index 9e49e49d29..0000000000 --- a/esp32p4/src/gpio/func11_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC11_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC11_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC11_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC11_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC11_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC11_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC11_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC11_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC11_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC11_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG11_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG11_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG11_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG11_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func11_in_sel(&self) -> FUNC11_IN_SEL_R { - FUNC11_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func11_in_inv_sel(&self) -> FUNC11_IN_INV_SEL_R { - FUNC11_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig11_in_sel(&self) -> SIG11_IN_SEL_R { - SIG11_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC11_IN_SEL_CFG") - .field( - "func11_in_sel", - &format_args!("{}", self.func11_in_sel().bits()), - ) - .field( - "func11_in_inv_sel", - &format_args!("{}", self.func11_in_inv_sel().bit()), - ) - .field( - "sig11_in_sel", - &format_args!("{}", self.sig11_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func11_in_sel(&mut self) -> FUNC11_IN_SEL_W { - FUNC11_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func11_in_inv_sel(&mut self) -> FUNC11_IN_INV_SEL_W { - FUNC11_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig11_in_sel(&mut self) -> SIG11_IN_SEL_W { - SIG11_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func11_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func11_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC11_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC11_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func11_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC11_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func11_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC11_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC11_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC11_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func126_in_sel_cfg.rs b/esp32p4/src/gpio/func126_in_sel_cfg.rs deleted file mode 100644 index b1d7a08ba4..0000000000 --- a/esp32p4/src/gpio/func126_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC126_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC126_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC126_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC126_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC126_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC126_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC126_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC126_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC126_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC126_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG126_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG126_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG126_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG126_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func126_in_sel(&self) -> FUNC126_IN_SEL_R { - FUNC126_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func126_in_inv_sel(&self) -> FUNC126_IN_INV_SEL_R { - FUNC126_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig126_in_sel(&self) -> SIG126_IN_SEL_R { - SIG126_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC126_IN_SEL_CFG") - .field( - "func126_in_sel", - &format_args!("{}", self.func126_in_sel().bits()), - ) - .field( - "func126_in_inv_sel", - &format_args!("{}", self.func126_in_inv_sel().bit()), - ) - .field( - "sig126_in_sel", - &format_args!("{}", self.sig126_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func126_in_sel(&mut self) -> FUNC126_IN_SEL_W { - FUNC126_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func126_in_inv_sel(&mut self) -> FUNC126_IN_INV_SEL_W { - FUNC126_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig126_in_sel(&mut self) -> SIG126_IN_SEL_W { - SIG126_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func126_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func126_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC126_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC126_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func126_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC126_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func126_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC126_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC126_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC126_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func127_in_sel_cfg.rs b/esp32p4/src/gpio/func127_in_sel_cfg.rs deleted file mode 100644 index 0e0c445ec7..0000000000 --- a/esp32p4/src/gpio/func127_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC127_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC127_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC127_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC127_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC127_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC127_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC127_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC127_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC127_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC127_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG127_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG127_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG127_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG127_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func127_in_sel(&self) -> FUNC127_IN_SEL_R { - FUNC127_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func127_in_inv_sel(&self) -> FUNC127_IN_INV_SEL_R { - FUNC127_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig127_in_sel(&self) -> SIG127_IN_SEL_R { - SIG127_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC127_IN_SEL_CFG") - .field( - "func127_in_sel", - &format_args!("{}", self.func127_in_sel().bits()), - ) - .field( - "func127_in_inv_sel", - &format_args!("{}", self.func127_in_inv_sel().bit()), - ) - .field( - "sig127_in_sel", - &format_args!("{}", self.sig127_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func127_in_sel(&mut self) -> FUNC127_IN_SEL_W { - FUNC127_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func127_in_inv_sel(&mut self) -> FUNC127_IN_INV_SEL_W { - FUNC127_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig127_in_sel(&mut self) -> SIG127_IN_SEL_W { - SIG127_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func127_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func127_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC127_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC127_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func127_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC127_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func127_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC127_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC127_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC127_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func128_in_sel_cfg.rs b/esp32p4/src/gpio/func128_in_sel_cfg.rs deleted file mode 100644 index bacdf24f34..0000000000 --- a/esp32p4/src/gpio/func128_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC128_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC128_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC128_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC128_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC128_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC128_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC128_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC128_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC128_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC128_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG128_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG128_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG128_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG128_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func128_in_sel(&self) -> FUNC128_IN_SEL_R { - FUNC128_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func128_in_inv_sel(&self) -> FUNC128_IN_INV_SEL_R { - FUNC128_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig128_in_sel(&self) -> SIG128_IN_SEL_R { - SIG128_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC128_IN_SEL_CFG") - .field( - "func128_in_sel", - &format_args!("{}", self.func128_in_sel().bits()), - ) - .field( - "func128_in_inv_sel", - &format_args!("{}", self.func128_in_inv_sel().bit()), - ) - .field( - "sig128_in_sel", - &format_args!("{}", self.sig128_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func128_in_sel(&mut self) -> FUNC128_IN_SEL_W { - FUNC128_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func128_in_inv_sel(&mut self) -> FUNC128_IN_INV_SEL_W { - FUNC128_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig128_in_sel(&mut self) -> SIG128_IN_SEL_W { - SIG128_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func128_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func128_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC128_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC128_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func128_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC128_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func128_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC128_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC128_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC128_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func129_in_sel_cfg.rs b/esp32p4/src/gpio/func129_in_sel_cfg.rs deleted file mode 100644 index 7070c0769f..0000000000 --- a/esp32p4/src/gpio/func129_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC129_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC129_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC129_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC129_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC129_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC129_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC129_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC129_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC129_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC129_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG129_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG129_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG129_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG129_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func129_in_sel(&self) -> FUNC129_IN_SEL_R { - FUNC129_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func129_in_inv_sel(&self) -> FUNC129_IN_INV_SEL_R { - FUNC129_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig129_in_sel(&self) -> SIG129_IN_SEL_R { - SIG129_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC129_IN_SEL_CFG") - .field( - "func129_in_sel", - &format_args!("{}", self.func129_in_sel().bits()), - ) - .field( - "func129_in_inv_sel", - &format_args!("{}", self.func129_in_inv_sel().bit()), - ) - .field( - "sig129_in_sel", - &format_args!("{}", self.sig129_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func129_in_sel(&mut self) -> FUNC129_IN_SEL_W { - FUNC129_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func129_in_inv_sel(&mut self) -> FUNC129_IN_INV_SEL_W { - FUNC129_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig129_in_sel(&mut self) -> SIG129_IN_SEL_W { - SIG129_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func129_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func129_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC129_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC129_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func129_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC129_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func129_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC129_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC129_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC129_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func12_in_sel_cfg.rs b/esp32p4/src/gpio/func12_in_sel_cfg.rs deleted file mode 100644 index 864e03ab8b..0000000000 --- a/esp32p4/src/gpio/func12_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC12_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC12_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC12_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC12_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC12_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC12_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC12_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC12_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC12_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC12_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG12_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG12_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG12_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG12_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func12_in_sel(&self) -> FUNC12_IN_SEL_R { - FUNC12_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func12_in_inv_sel(&self) -> FUNC12_IN_INV_SEL_R { - FUNC12_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig12_in_sel(&self) -> SIG12_IN_SEL_R { - SIG12_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC12_IN_SEL_CFG") - .field( - "func12_in_sel", - &format_args!("{}", self.func12_in_sel().bits()), - ) - .field( - "func12_in_inv_sel", - &format_args!("{}", self.func12_in_inv_sel().bit()), - ) - .field( - "sig12_in_sel", - &format_args!("{}", self.sig12_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func12_in_sel(&mut self) -> FUNC12_IN_SEL_W { - FUNC12_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func12_in_inv_sel(&mut self) -> FUNC12_IN_INV_SEL_W { - FUNC12_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig12_in_sel(&mut self) -> SIG12_IN_SEL_W { - SIG12_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func12_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func12_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC12_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC12_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func12_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC12_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func12_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC12_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC12_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC12_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func130_in_sel_cfg.rs b/esp32p4/src/gpio/func130_in_sel_cfg.rs deleted file mode 100644 index 898bf1f07a..0000000000 --- a/esp32p4/src/gpio/func130_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC130_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC130_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC130_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC130_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC130_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC130_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC130_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC130_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC130_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC130_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG130_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG130_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG130_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG130_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func130_in_sel(&self) -> FUNC130_IN_SEL_R { - FUNC130_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func130_in_inv_sel(&self) -> FUNC130_IN_INV_SEL_R { - FUNC130_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig130_in_sel(&self) -> SIG130_IN_SEL_R { - SIG130_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC130_IN_SEL_CFG") - .field( - "func130_in_sel", - &format_args!("{}", self.func130_in_sel().bits()), - ) - .field( - "func130_in_inv_sel", - &format_args!("{}", self.func130_in_inv_sel().bit()), - ) - .field( - "sig130_in_sel", - &format_args!("{}", self.sig130_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func130_in_sel(&mut self) -> FUNC130_IN_SEL_W { - FUNC130_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func130_in_inv_sel(&mut self) -> FUNC130_IN_INV_SEL_W { - FUNC130_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig130_in_sel(&mut self) -> SIG130_IN_SEL_W { - SIG130_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func130_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func130_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC130_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC130_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func130_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC130_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func130_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC130_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC130_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC130_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func131_in_sel_cfg.rs b/esp32p4/src/gpio/func131_in_sel_cfg.rs deleted file mode 100644 index 31f491fd13..0000000000 --- a/esp32p4/src/gpio/func131_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC131_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC131_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC131_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC131_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC131_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC131_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC131_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC131_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC131_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC131_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG131_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG131_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG131_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG131_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func131_in_sel(&self) -> FUNC131_IN_SEL_R { - FUNC131_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func131_in_inv_sel(&self) -> FUNC131_IN_INV_SEL_R { - FUNC131_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig131_in_sel(&self) -> SIG131_IN_SEL_R { - SIG131_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC131_IN_SEL_CFG") - .field( - "func131_in_sel", - &format_args!("{}", self.func131_in_sel().bits()), - ) - .field( - "func131_in_inv_sel", - &format_args!("{}", self.func131_in_inv_sel().bit()), - ) - .field( - "sig131_in_sel", - &format_args!("{}", self.sig131_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func131_in_sel(&mut self) -> FUNC131_IN_SEL_W { - FUNC131_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func131_in_inv_sel(&mut self) -> FUNC131_IN_INV_SEL_W { - FUNC131_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig131_in_sel(&mut self) -> SIG131_IN_SEL_W { - SIG131_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func131_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func131_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC131_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC131_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func131_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC131_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func131_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC131_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC131_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC131_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func132_in_sel_cfg.rs b/esp32p4/src/gpio/func132_in_sel_cfg.rs deleted file mode 100644 index 60c8b7cf79..0000000000 --- a/esp32p4/src/gpio/func132_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC132_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC132_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC132_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC132_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC132_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC132_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC132_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC132_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC132_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC132_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG132_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG132_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG132_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG132_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func132_in_sel(&self) -> FUNC132_IN_SEL_R { - FUNC132_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func132_in_inv_sel(&self) -> FUNC132_IN_INV_SEL_R { - FUNC132_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig132_in_sel(&self) -> SIG132_IN_SEL_R { - SIG132_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC132_IN_SEL_CFG") - .field( - "func132_in_sel", - &format_args!("{}", self.func132_in_sel().bits()), - ) - .field( - "func132_in_inv_sel", - &format_args!("{}", self.func132_in_inv_sel().bit()), - ) - .field( - "sig132_in_sel", - &format_args!("{}", self.sig132_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func132_in_sel(&mut self) -> FUNC132_IN_SEL_W { - FUNC132_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func132_in_inv_sel(&mut self) -> FUNC132_IN_INV_SEL_W { - FUNC132_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig132_in_sel(&mut self) -> SIG132_IN_SEL_W { - SIG132_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func132_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func132_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC132_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC132_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func132_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC132_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func132_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC132_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC132_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC132_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func133_in_sel_cfg.rs b/esp32p4/src/gpio/func133_in_sel_cfg.rs deleted file mode 100644 index 55af6e52c0..0000000000 --- a/esp32p4/src/gpio/func133_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC133_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC133_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC133_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC133_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC133_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC133_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC133_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC133_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC133_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC133_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG133_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG133_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG133_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG133_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func133_in_sel(&self) -> FUNC133_IN_SEL_R { - FUNC133_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func133_in_inv_sel(&self) -> FUNC133_IN_INV_SEL_R { - FUNC133_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig133_in_sel(&self) -> SIG133_IN_SEL_R { - SIG133_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC133_IN_SEL_CFG") - .field( - "func133_in_sel", - &format_args!("{}", self.func133_in_sel().bits()), - ) - .field( - "func133_in_inv_sel", - &format_args!("{}", self.func133_in_inv_sel().bit()), - ) - .field( - "sig133_in_sel", - &format_args!("{}", self.sig133_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func133_in_sel(&mut self) -> FUNC133_IN_SEL_W { - FUNC133_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func133_in_inv_sel(&mut self) -> FUNC133_IN_INV_SEL_W { - FUNC133_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig133_in_sel(&mut self) -> SIG133_IN_SEL_W { - SIG133_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func133_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func133_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC133_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC133_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func133_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC133_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func133_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC133_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC133_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC133_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func134_in_sel_cfg.rs b/esp32p4/src/gpio/func134_in_sel_cfg.rs deleted file mode 100644 index 5d58b519f9..0000000000 --- a/esp32p4/src/gpio/func134_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC134_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC134_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC134_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC134_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC134_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC134_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC134_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC134_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC134_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC134_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG134_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG134_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG134_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG134_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func134_in_sel(&self) -> FUNC134_IN_SEL_R { - FUNC134_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func134_in_inv_sel(&self) -> FUNC134_IN_INV_SEL_R { - FUNC134_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig134_in_sel(&self) -> SIG134_IN_SEL_R { - SIG134_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC134_IN_SEL_CFG") - .field( - "func134_in_sel", - &format_args!("{}", self.func134_in_sel().bits()), - ) - .field( - "func134_in_inv_sel", - &format_args!("{}", self.func134_in_inv_sel().bit()), - ) - .field( - "sig134_in_sel", - &format_args!("{}", self.sig134_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func134_in_sel(&mut self) -> FUNC134_IN_SEL_W { - FUNC134_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func134_in_inv_sel(&mut self) -> FUNC134_IN_INV_SEL_W { - FUNC134_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig134_in_sel(&mut self) -> SIG134_IN_SEL_W { - SIG134_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func134_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func134_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC134_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC134_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func134_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC134_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func134_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC134_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC134_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC134_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func135_in_sel_cfg.rs b/esp32p4/src/gpio/func135_in_sel_cfg.rs deleted file mode 100644 index 548e829e39..0000000000 --- a/esp32p4/src/gpio/func135_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC135_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC135_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC135_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC135_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC135_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC135_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC135_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC135_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC135_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC135_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG135_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG135_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG135_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG135_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func135_in_sel(&self) -> FUNC135_IN_SEL_R { - FUNC135_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func135_in_inv_sel(&self) -> FUNC135_IN_INV_SEL_R { - FUNC135_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig135_in_sel(&self) -> SIG135_IN_SEL_R { - SIG135_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC135_IN_SEL_CFG") - .field( - "func135_in_sel", - &format_args!("{}", self.func135_in_sel().bits()), - ) - .field( - "func135_in_inv_sel", - &format_args!("{}", self.func135_in_inv_sel().bit()), - ) - .field( - "sig135_in_sel", - &format_args!("{}", self.sig135_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func135_in_sel(&mut self) -> FUNC135_IN_SEL_W { - FUNC135_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func135_in_inv_sel(&mut self) -> FUNC135_IN_INV_SEL_W { - FUNC135_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig135_in_sel(&mut self) -> SIG135_IN_SEL_W { - SIG135_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func135_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func135_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC135_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC135_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func135_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC135_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func135_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC135_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC135_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC135_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func136_in_sel_cfg.rs b/esp32p4/src/gpio/func136_in_sel_cfg.rs deleted file mode 100644 index 67de754581..0000000000 --- a/esp32p4/src/gpio/func136_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC136_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC136_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC136_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC136_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC136_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC136_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC136_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC136_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC136_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC136_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG136_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG136_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG136_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG136_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func136_in_sel(&self) -> FUNC136_IN_SEL_R { - FUNC136_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func136_in_inv_sel(&self) -> FUNC136_IN_INV_SEL_R { - FUNC136_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig136_in_sel(&self) -> SIG136_IN_SEL_R { - SIG136_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC136_IN_SEL_CFG") - .field( - "func136_in_sel", - &format_args!("{}", self.func136_in_sel().bits()), - ) - .field( - "func136_in_inv_sel", - &format_args!("{}", self.func136_in_inv_sel().bit()), - ) - .field( - "sig136_in_sel", - &format_args!("{}", self.sig136_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func136_in_sel(&mut self) -> FUNC136_IN_SEL_W { - FUNC136_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func136_in_inv_sel(&mut self) -> FUNC136_IN_INV_SEL_W { - FUNC136_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig136_in_sel(&mut self) -> SIG136_IN_SEL_W { - SIG136_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func136_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func136_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC136_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC136_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func136_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC136_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func136_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC136_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC136_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC136_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func137_in_sel_cfg.rs b/esp32p4/src/gpio/func137_in_sel_cfg.rs deleted file mode 100644 index b26f90668c..0000000000 --- a/esp32p4/src/gpio/func137_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC137_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC137_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC137_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC137_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC137_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC137_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC137_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC137_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC137_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC137_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG137_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG137_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG137_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG137_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func137_in_sel(&self) -> FUNC137_IN_SEL_R { - FUNC137_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func137_in_inv_sel(&self) -> FUNC137_IN_INV_SEL_R { - FUNC137_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig137_in_sel(&self) -> SIG137_IN_SEL_R { - SIG137_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC137_IN_SEL_CFG") - .field( - "func137_in_sel", - &format_args!("{}", self.func137_in_sel().bits()), - ) - .field( - "func137_in_inv_sel", - &format_args!("{}", self.func137_in_inv_sel().bit()), - ) - .field( - "sig137_in_sel", - &format_args!("{}", self.sig137_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func137_in_sel(&mut self) -> FUNC137_IN_SEL_W { - FUNC137_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func137_in_inv_sel(&mut self) -> FUNC137_IN_INV_SEL_W { - FUNC137_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig137_in_sel(&mut self) -> SIG137_IN_SEL_W { - SIG137_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func137_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func137_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC137_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC137_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func137_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC137_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func137_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC137_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC137_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC137_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func138_in_sel_cfg.rs b/esp32p4/src/gpio/func138_in_sel_cfg.rs deleted file mode 100644 index 5a8b8a3b6e..0000000000 --- a/esp32p4/src/gpio/func138_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC138_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC138_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC138_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC138_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC138_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC138_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC138_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC138_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC138_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC138_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG138_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG138_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG138_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG138_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func138_in_sel(&self) -> FUNC138_IN_SEL_R { - FUNC138_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func138_in_inv_sel(&self) -> FUNC138_IN_INV_SEL_R { - FUNC138_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig138_in_sel(&self) -> SIG138_IN_SEL_R { - SIG138_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC138_IN_SEL_CFG") - .field( - "func138_in_sel", - &format_args!("{}", self.func138_in_sel().bits()), - ) - .field( - "func138_in_inv_sel", - &format_args!("{}", self.func138_in_inv_sel().bit()), - ) - .field( - "sig138_in_sel", - &format_args!("{}", self.sig138_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func138_in_sel(&mut self) -> FUNC138_IN_SEL_W { - FUNC138_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func138_in_inv_sel(&mut self) -> FUNC138_IN_INV_SEL_W { - FUNC138_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig138_in_sel(&mut self) -> SIG138_IN_SEL_W { - SIG138_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func138_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func138_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC138_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC138_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func138_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC138_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func138_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC138_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC138_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC138_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func139_in_sel_cfg.rs b/esp32p4/src/gpio/func139_in_sel_cfg.rs deleted file mode 100644 index b44460356c..0000000000 --- a/esp32p4/src/gpio/func139_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC139_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC139_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC139_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC139_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC139_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC139_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC139_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC139_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC139_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC139_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG139_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG139_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG139_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG139_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func139_in_sel(&self) -> FUNC139_IN_SEL_R { - FUNC139_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func139_in_inv_sel(&self) -> FUNC139_IN_INV_SEL_R { - FUNC139_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig139_in_sel(&self) -> SIG139_IN_SEL_R { - SIG139_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC139_IN_SEL_CFG") - .field( - "func139_in_sel", - &format_args!("{}", self.func139_in_sel().bits()), - ) - .field( - "func139_in_inv_sel", - &format_args!("{}", self.func139_in_inv_sel().bit()), - ) - .field( - "sig139_in_sel", - &format_args!("{}", self.sig139_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func139_in_sel(&mut self) -> FUNC139_IN_SEL_W { - FUNC139_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func139_in_inv_sel(&mut self) -> FUNC139_IN_INV_SEL_W { - FUNC139_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig139_in_sel(&mut self) -> SIG139_IN_SEL_W { - SIG139_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func139_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func139_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC139_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC139_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func139_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC139_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func139_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC139_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC139_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC139_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func13_in_sel_cfg.rs b/esp32p4/src/gpio/func13_in_sel_cfg.rs deleted file mode 100644 index 152e862be4..0000000000 --- a/esp32p4/src/gpio/func13_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC13_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC13_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC13_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC13_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC13_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC13_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC13_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC13_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC13_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC13_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG13_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG13_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG13_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG13_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func13_in_sel(&self) -> FUNC13_IN_SEL_R { - FUNC13_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func13_in_inv_sel(&self) -> FUNC13_IN_INV_SEL_R { - FUNC13_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig13_in_sel(&self) -> SIG13_IN_SEL_R { - SIG13_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC13_IN_SEL_CFG") - .field( - "func13_in_sel", - &format_args!("{}", self.func13_in_sel().bits()), - ) - .field( - "func13_in_inv_sel", - &format_args!("{}", self.func13_in_inv_sel().bit()), - ) - .field( - "sig13_in_sel", - &format_args!("{}", self.sig13_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func13_in_sel(&mut self) -> FUNC13_IN_SEL_W { - FUNC13_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func13_in_inv_sel(&mut self) -> FUNC13_IN_INV_SEL_W { - FUNC13_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig13_in_sel(&mut self) -> SIG13_IN_SEL_W { - SIG13_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func13_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func13_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC13_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC13_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func13_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC13_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func13_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC13_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC13_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC13_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func140_in_sel_cfg.rs b/esp32p4/src/gpio/func140_in_sel_cfg.rs deleted file mode 100644 index 2e9221ca01..0000000000 --- a/esp32p4/src/gpio/func140_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC140_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC140_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC140_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC140_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC140_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC140_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC140_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC140_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC140_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC140_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG140_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG140_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG140_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG140_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func140_in_sel(&self) -> FUNC140_IN_SEL_R { - FUNC140_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func140_in_inv_sel(&self) -> FUNC140_IN_INV_SEL_R { - FUNC140_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig140_in_sel(&self) -> SIG140_IN_SEL_R { - SIG140_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC140_IN_SEL_CFG") - .field( - "func140_in_sel", - &format_args!("{}", self.func140_in_sel().bits()), - ) - .field( - "func140_in_inv_sel", - &format_args!("{}", self.func140_in_inv_sel().bit()), - ) - .field( - "sig140_in_sel", - &format_args!("{}", self.sig140_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func140_in_sel(&mut self) -> FUNC140_IN_SEL_W { - FUNC140_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func140_in_inv_sel(&mut self) -> FUNC140_IN_INV_SEL_W { - FUNC140_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig140_in_sel(&mut self) -> SIG140_IN_SEL_W { - SIG140_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func140_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func140_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC140_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC140_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func140_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC140_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func140_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC140_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC140_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC140_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func141_in_sel_cfg.rs b/esp32p4/src/gpio/func141_in_sel_cfg.rs deleted file mode 100644 index a0a49fc633..0000000000 --- a/esp32p4/src/gpio/func141_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC141_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC141_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC141_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC141_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC141_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC141_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC141_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC141_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC141_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC141_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG141_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG141_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG141_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG141_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func141_in_sel(&self) -> FUNC141_IN_SEL_R { - FUNC141_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func141_in_inv_sel(&self) -> FUNC141_IN_INV_SEL_R { - FUNC141_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig141_in_sel(&self) -> SIG141_IN_SEL_R { - SIG141_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC141_IN_SEL_CFG") - .field( - "func141_in_sel", - &format_args!("{}", self.func141_in_sel().bits()), - ) - .field( - "func141_in_inv_sel", - &format_args!("{}", self.func141_in_inv_sel().bit()), - ) - .field( - "sig141_in_sel", - &format_args!("{}", self.sig141_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func141_in_sel(&mut self) -> FUNC141_IN_SEL_W { - FUNC141_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func141_in_inv_sel(&mut self) -> FUNC141_IN_INV_SEL_W { - FUNC141_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig141_in_sel(&mut self) -> SIG141_IN_SEL_W { - SIG141_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func141_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func141_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC141_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC141_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func141_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC141_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func141_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC141_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC141_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC141_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func142_in_sel_cfg.rs b/esp32p4/src/gpio/func142_in_sel_cfg.rs deleted file mode 100644 index 8c2cbad1ca..0000000000 --- a/esp32p4/src/gpio/func142_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC142_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC142_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC142_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC142_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC142_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC142_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC142_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC142_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC142_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC142_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG142_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG142_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG142_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG142_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func142_in_sel(&self) -> FUNC142_IN_SEL_R { - FUNC142_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func142_in_inv_sel(&self) -> FUNC142_IN_INV_SEL_R { - FUNC142_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig142_in_sel(&self) -> SIG142_IN_SEL_R { - SIG142_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC142_IN_SEL_CFG") - .field( - "func142_in_sel", - &format_args!("{}", self.func142_in_sel().bits()), - ) - .field( - "func142_in_inv_sel", - &format_args!("{}", self.func142_in_inv_sel().bit()), - ) - .field( - "sig142_in_sel", - &format_args!("{}", self.sig142_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func142_in_sel(&mut self) -> FUNC142_IN_SEL_W { - FUNC142_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func142_in_inv_sel(&mut self) -> FUNC142_IN_INV_SEL_W { - FUNC142_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig142_in_sel(&mut self) -> SIG142_IN_SEL_W { - SIG142_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func142_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func142_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC142_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC142_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func142_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC142_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func142_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC142_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC142_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC142_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func143_in_sel_cfg.rs b/esp32p4/src/gpio/func143_in_sel_cfg.rs deleted file mode 100644 index edba3478ea..0000000000 --- a/esp32p4/src/gpio/func143_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC143_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC143_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC143_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC143_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC143_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC143_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC143_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC143_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC143_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC143_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG143_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG143_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG143_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG143_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func143_in_sel(&self) -> FUNC143_IN_SEL_R { - FUNC143_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func143_in_inv_sel(&self) -> FUNC143_IN_INV_SEL_R { - FUNC143_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig143_in_sel(&self) -> SIG143_IN_SEL_R { - SIG143_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC143_IN_SEL_CFG") - .field( - "func143_in_sel", - &format_args!("{}", self.func143_in_sel().bits()), - ) - .field( - "func143_in_inv_sel", - &format_args!("{}", self.func143_in_inv_sel().bit()), - ) - .field( - "sig143_in_sel", - &format_args!("{}", self.sig143_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func143_in_sel(&mut self) -> FUNC143_IN_SEL_W { - FUNC143_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func143_in_inv_sel(&mut self) -> FUNC143_IN_INV_SEL_W { - FUNC143_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig143_in_sel(&mut self) -> SIG143_IN_SEL_W { - SIG143_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func143_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func143_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC143_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC143_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func143_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC143_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func143_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC143_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC143_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC143_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func144_in_sel_cfg.rs b/esp32p4/src/gpio/func144_in_sel_cfg.rs deleted file mode 100644 index 07612e1344..0000000000 --- a/esp32p4/src/gpio/func144_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC144_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC144_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC144_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC144_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC144_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC144_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC144_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC144_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC144_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC144_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG144_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG144_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG144_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG144_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func144_in_sel(&self) -> FUNC144_IN_SEL_R { - FUNC144_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func144_in_inv_sel(&self) -> FUNC144_IN_INV_SEL_R { - FUNC144_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig144_in_sel(&self) -> SIG144_IN_SEL_R { - SIG144_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC144_IN_SEL_CFG") - .field( - "func144_in_sel", - &format_args!("{}", self.func144_in_sel().bits()), - ) - .field( - "func144_in_inv_sel", - &format_args!("{}", self.func144_in_inv_sel().bit()), - ) - .field( - "sig144_in_sel", - &format_args!("{}", self.sig144_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func144_in_sel(&mut self) -> FUNC144_IN_SEL_W { - FUNC144_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func144_in_inv_sel(&mut self) -> FUNC144_IN_INV_SEL_W { - FUNC144_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig144_in_sel(&mut self) -> SIG144_IN_SEL_W { - SIG144_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func144_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func144_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC144_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC144_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func144_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC144_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func144_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC144_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC144_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC144_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func145_in_sel_cfg.rs b/esp32p4/src/gpio/func145_in_sel_cfg.rs deleted file mode 100644 index 942443097c..0000000000 --- a/esp32p4/src/gpio/func145_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC145_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC145_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC145_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC145_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC145_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC145_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC145_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC145_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC145_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC145_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG145_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG145_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG145_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG145_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func145_in_sel(&self) -> FUNC145_IN_SEL_R { - FUNC145_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func145_in_inv_sel(&self) -> FUNC145_IN_INV_SEL_R { - FUNC145_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig145_in_sel(&self) -> SIG145_IN_SEL_R { - SIG145_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC145_IN_SEL_CFG") - .field( - "func145_in_sel", - &format_args!("{}", self.func145_in_sel().bits()), - ) - .field( - "func145_in_inv_sel", - &format_args!("{}", self.func145_in_inv_sel().bit()), - ) - .field( - "sig145_in_sel", - &format_args!("{}", self.sig145_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func145_in_sel(&mut self) -> FUNC145_IN_SEL_W { - FUNC145_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func145_in_inv_sel(&mut self) -> FUNC145_IN_INV_SEL_W { - FUNC145_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig145_in_sel(&mut self) -> SIG145_IN_SEL_W { - SIG145_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func145_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func145_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC145_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC145_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func145_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC145_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func145_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC145_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC145_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC145_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func146_in_sel_cfg.rs b/esp32p4/src/gpio/func146_in_sel_cfg.rs deleted file mode 100644 index f2aca10803..0000000000 --- a/esp32p4/src/gpio/func146_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC146_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC146_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC146_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC146_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC146_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC146_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC146_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC146_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC146_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC146_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG146_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG146_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG146_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG146_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func146_in_sel(&self) -> FUNC146_IN_SEL_R { - FUNC146_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func146_in_inv_sel(&self) -> FUNC146_IN_INV_SEL_R { - FUNC146_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig146_in_sel(&self) -> SIG146_IN_SEL_R { - SIG146_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC146_IN_SEL_CFG") - .field( - "func146_in_sel", - &format_args!("{}", self.func146_in_sel().bits()), - ) - .field( - "func146_in_inv_sel", - &format_args!("{}", self.func146_in_inv_sel().bit()), - ) - .field( - "sig146_in_sel", - &format_args!("{}", self.sig146_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func146_in_sel(&mut self) -> FUNC146_IN_SEL_W { - FUNC146_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func146_in_inv_sel(&mut self) -> FUNC146_IN_INV_SEL_W { - FUNC146_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig146_in_sel(&mut self) -> SIG146_IN_SEL_W { - SIG146_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func146_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func146_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC146_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC146_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func146_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC146_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func146_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC146_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC146_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC146_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func147_in_sel_cfg.rs b/esp32p4/src/gpio/func147_in_sel_cfg.rs deleted file mode 100644 index c2d0bb700a..0000000000 --- a/esp32p4/src/gpio/func147_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC147_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC147_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC147_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC147_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC147_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC147_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC147_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC147_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC147_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC147_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG147_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG147_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG147_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG147_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func147_in_sel(&self) -> FUNC147_IN_SEL_R { - FUNC147_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func147_in_inv_sel(&self) -> FUNC147_IN_INV_SEL_R { - FUNC147_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig147_in_sel(&self) -> SIG147_IN_SEL_R { - SIG147_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC147_IN_SEL_CFG") - .field( - "func147_in_sel", - &format_args!("{}", self.func147_in_sel().bits()), - ) - .field( - "func147_in_inv_sel", - &format_args!("{}", self.func147_in_inv_sel().bit()), - ) - .field( - "sig147_in_sel", - &format_args!("{}", self.sig147_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func147_in_sel(&mut self) -> FUNC147_IN_SEL_W { - FUNC147_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func147_in_inv_sel(&mut self) -> FUNC147_IN_INV_SEL_W { - FUNC147_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig147_in_sel(&mut self) -> SIG147_IN_SEL_W { - SIG147_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func147_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func147_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC147_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC147_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func147_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC147_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func147_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC147_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC147_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC147_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func148_in_sel_cfg.rs b/esp32p4/src/gpio/func148_in_sel_cfg.rs deleted file mode 100644 index 07dc52af46..0000000000 --- a/esp32p4/src/gpio/func148_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC148_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC148_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC148_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC148_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC148_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC148_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC148_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC148_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC148_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC148_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG148_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG148_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG148_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG148_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func148_in_sel(&self) -> FUNC148_IN_SEL_R { - FUNC148_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func148_in_inv_sel(&self) -> FUNC148_IN_INV_SEL_R { - FUNC148_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig148_in_sel(&self) -> SIG148_IN_SEL_R { - SIG148_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC148_IN_SEL_CFG") - .field( - "func148_in_sel", - &format_args!("{}", self.func148_in_sel().bits()), - ) - .field( - "func148_in_inv_sel", - &format_args!("{}", self.func148_in_inv_sel().bit()), - ) - .field( - "sig148_in_sel", - &format_args!("{}", self.sig148_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func148_in_sel(&mut self) -> FUNC148_IN_SEL_W { - FUNC148_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func148_in_inv_sel(&mut self) -> FUNC148_IN_INV_SEL_W { - FUNC148_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig148_in_sel(&mut self) -> SIG148_IN_SEL_W { - SIG148_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func148_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func148_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC148_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC148_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func148_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC148_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func148_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC148_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC148_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC148_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func149_in_sel_cfg.rs b/esp32p4/src/gpio/func149_in_sel_cfg.rs deleted file mode 100644 index 2b200fcf05..0000000000 --- a/esp32p4/src/gpio/func149_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC149_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC149_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC149_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC149_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC149_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC149_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC149_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC149_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC149_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC149_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG149_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG149_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG149_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG149_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func149_in_sel(&self) -> FUNC149_IN_SEL_R { - FUNC149_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func149_in_inv_sel(&self) -> FUNC149_IN_INV_SEL_R { - FUNC149_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig149_in_sel(&self) -> SIG149_IN_SEL_R { - SIG149_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC149_IN_SEL_CFG") - .field( - "func149_in_sel", - &format_args!("{}", self.func149_in_sel().bits()), - ) - .field( - "func149_in_inv_sel", - &format_args!("{}", self.func149_in_inv_sel().bit()), - ) - .field( - "sig149_in_sel", - &format_args!("{}", self.sig149_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func149_in_sel(&mut self) -> FUNC149_IN_SEL_W { - FUNC149_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func149_in_inv_sel(&mut self) -> FUNC149_IN_INV_SEL_W { - FUNC149_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig149_in_sel(&mut self) -> SIG149_IN_SEL_W { - SIG149_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func149_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func149_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC149_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC149_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func149_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC149_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func149_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC149_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC149_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC149_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func14_in_sel_cfg.rs b/esp32p4/src/gpio/func14_in_sel_cfg.rs deleted file mode 100644 index 577e146804..0000000000 --- a/esp32p4/src/gpio/func14_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC14_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC14_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC14_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC14_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC14_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC14_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC14_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC14_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC14_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC14_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG14_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG14_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG14_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG14_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func14_in_sel(&self) -> FUNC14_IN_SEL_R { - FUNC14_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func14_in_inv_sel(&self) -> FUNC14_IN_INV_SEL_R { - FUNC14_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig14_in_sel(&self) -> SIG14_IN_SEL_R { - SIG14_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC14_IN_SEL_CFG") - .field( - "func14_in_sel", - &format_args!("{}", self.func14_in_sel().bits()), - ) - .field( - "func14_in_inv_sel", - &format_args!("{}", self.func14_in_inv_sel().bit()), - ) - .field( - "sig14_in_sel", - &format_args!("{}", self.sig14_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func14_in_sel(&mut self) -> FUNC14_IN_SEL_W { - FUNC14_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func14_in_inv_sel(&mut self) -> FUNC14_IN_INV_SEL_W { - FUNC14_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig14_in_sel(&mut self) -> SIG14_IN_SEL_W { - SIG14_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func14_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func14_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC14_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC14_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func14_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC14_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func14_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC14_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC14_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC14_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func150_in_sel_cfg.rs b/esp32p4/src/gpio/func150_in_sel_cfg.rs deleted file mode 100644 index c57708e0b6..0000000000 --- a/esp32p4/src/gpio/func150_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC150_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC150_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC150_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC150_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC150_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC150_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC150_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC150_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC150_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC150_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG150_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG150_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG150_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG150_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func150_in_sel(&self) -> FUNC150_IN_SEL_R { - FUNC150_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func150_in_inv_sel(&self) -> FUNC150_IN_INV_SEL_R { - FUNC150_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig150_in_sel(&self) -> SIG150_IN_SEL_R { - SIG150_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC150_IN_SEL_CFG") - .field( - "func150_in_sel", - &format_args!("{}", self.func150_in_sel().bits()), - ) - .field( - "func150_in_inv_sel", - &format_args!("{}", self.func150_in_inv_sel().bit()), - ) - .field( - "sig150_in_sel", - &format_args!("{}", self.sig150_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func150_in_sel(&mut self) -> FUNC150_IN_SEL_W { - FUNC150_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func150_in_inv_sel(&mut self) -> FUNC150_IN_INV_SEL_W { - FUNC150_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig150_in_sel(&mut self) -> SIG150_IN_SEL_W { - SIG150_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func150_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func150_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC150_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC150_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func150_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC150_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func150_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC150_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC150_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC150_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func151_in_sel_cfg.rs b/esp32p4/src/gpio/func151_in_sel_cfg.rs deleted file mode 100644 index 7cb95915e1..0000000000 --- a/esp32p4/src/gpio/func151_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC151_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC151_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC151_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC151_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC151_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC151_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC151_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC151_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC151_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC151_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG151_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG151_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG151_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG151_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func151_in_sel(&self) -> FUNC151_IN_SEL_R { - FUNC151_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func151_in_inv_sel(&self) -> FUNC151_IN_INV_SEL_R { - FUNC151_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig151_in_sel(&self) -> SIG151_IN_SEL_R { - SIG151_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC151_IN_SEL_CFG") - .field( - "func151_in_sel", - &format_args!("{}", self.func151_in_sel().bits()), - ) - .field( - "func151_in_inv_sel", - &format_args!("{}", self.func151_in_inv_sel().bit()), - ) - .field( - "sig151_in_sel", - &format_args!("{}", self.sig151_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func151_in_sel(&mut self) -> FUNC151_IN_SEL_W { - FUNC151_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func151_in_inv_sel(&mut self) -> FUNC151_IN_INV_SEL_W { - FUNC151_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig151_in_sel(&mut self) -> SIG151_IN_SEL_W { - SIG151_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func151_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func151_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC151_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC151_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func151_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC151_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func151_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC151_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC151_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC151_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func152_in_sel_cfg.rs b/esp32p4/src/gpio/func152_in_sel_cfg.rs deleted file mode 100644 index ab8e0efd1f..0000000000 --- a/esp32p4/src/gpio/func152_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC152_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC152_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC152_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC152_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC152_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC152_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC152_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC152_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC152_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC152_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG152_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG152_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG152_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG152_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func152_in_sel(&self) -> FUNC152_IN_SEL_R { - FUNC152_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func152_in_inv_sel(&self) -> FUNC152_IN_INV_SEL_R { - FUNC152_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig152_in_sel(&self) -> SIG152_IN_SEL_R { - SIG152_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC152_IN_SEL_CFG") - .field( - "func152_in_sel", - &format_args!("{}", self.func152_in_sel().bits()), - ) - .field( - "func152_in_inv_sel", - &format_args!("{}", self.func152_in_inv_sel().bit()), - ) - .field( - "sig152_in_sel", - &format_args!("{}", self.sig152_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func152_in_sel(&mut self) -> FUNC152_IN_SEL_W { - FUNC152_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func152_in_inv_sel(&mut self) -> FUNC152_IN_INV_SEL_W { - FUNC152_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig152_in_sel(&mut self) -> SIG152_IN_SEL_W { - SIG152_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func152_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func152_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC152_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC152_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func152_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC152_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func152_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC152_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC152_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC152_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func153_in_sel_cfg.rs b/esp32p4/src/gpio/func153_in_sel_cfg.rs deleted file mode 100644 index 37704d9f50..0000000000 --- a/esp32p4/src/gpio/func153_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC153_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC153_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC153_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC153_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC153_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC153_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC153_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC153_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC153_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC153_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG153_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG153_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG153_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG153_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func153_in_sel(&self) -> FUNC153_IN_SEL_R { - FUNC153_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func153_in_inv_sel(&self) -> FUNC153_IN_INV_SEL_R { - FUNC153_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig153_in_sel(&self) -> SIG153_IN_SEL_R { - SIG153_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC153_IN_SEL_CFG") - .field( - "func153_in_sel", - &format_args!("{}", self.func153_in_sel().bits()), - ) - .field( - "func153_in_inv_sel", - &format_args!("{}", self.func153_in_inv_sel().bit()), - ) - .field( - "sig153_in_sel", - &format_args!("{}", self.sig153_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func153_in_sel(&mut self) -> FUNC153_IN_SEL_W { - FUNC153_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func153_in_inv_sel(&mut self) -> FUNC153_IN_INV_SEL_W { - FUNC153_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig153_in_sel(&mut self) -> SIG153_IN_SEL_W { - SIG153_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func153_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func153_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC153_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC153_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func153_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC153_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func153_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC153_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC153_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC153_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func154_in_sel_cfg.rs b/esp32p4/src/gpio/func154_in_sel_cfg.rs deleted file mode 100644 index c182246a12..0000000000 --- a/esp32p4/src/gpio/func154_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC154_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC154_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC154_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC154_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC154_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC154_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC154_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC154_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC154_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC154_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG154_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG154_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG154_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG154_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func154_in_sel(&self) -> FUNC154_IN_SEL_R { - FUNC154_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func154_in_inv_sel(&self) -> FUNC154_IN_INV_SEL_R { - FUNC154_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig154_in_sel(&self) -> SIG154_IN_SEL_R { - SIG154_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC154_IN_SEL_CFG") - .field( - "func154_in_sel", - &format_args!("{}", self.func154_in_sel().bits()), - ) - .field( - "func154_in_inv_sel", - &format_args!("{}", self.func154_in_inv_sel().bit()), - ) - .field( - "sig154_in_sel", - &format_args!("{}", self.sig154_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func154_in_sel(&mut self) -> FUNC154_IN_SEL_W { - FUNC154_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func154_in_inv_sel(&mut self) -> FUNC154_IN_INV_SEL_W { - FUNC154_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig154_in_sel(&mut self) -> SIG154_IN_SEL_W { - SIG154_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func154_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func154_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC154_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC154_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func154_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC154_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func154_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC154_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC154_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC154_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func155_in_sel_cfg.rs b/esp32p4/src/gpio/func155_in_sel_cfg.rs deleted file mode 100644 index fe78d0f4d0..0000000000 --- a/esp32p4/src/gpio/func155_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC155_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC155_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC155_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC155_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC155_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC155_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC155_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC155_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC155_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC155_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG155_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG155_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG155_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG155_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func155_in_sel(&self) -> FUNC155_IN_SEL_R { - FUNC155_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func155_in_inv_sel(&self) -> FUNC155_IN_INV_SEL_R { - FUNC155_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig155_in_sel(&self) -> SIG155_IN_SEL_R { - SIG155_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC155_IN_SEL_CFG") - .field( - "func155_in_sel", - &format_args!("{}", self.func155_in_sel().bits()), - ) - .field( - "func155_in_inv_sel", - &format_args!("{}", self.func155_in_inv_sel().bit()), - ) - .field( - "sig155_in_sel", - &format_args!("{}", self.sig155_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func155_in_sel(&mut self) -> FUNC155_IN_SEL_W { - FUNC155_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func155_in_inv_sel(&mut self) -> FUNC155_IN_INV_SEL_W { - FUNC155_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig155_in_sel(&mut self) -> SIG155_IN_SEL_W { - SIG155_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func155_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func155_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC155_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC155_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func155_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC155_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func155_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC155_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC155_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC155_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func156_in_sel_cfg.rs b/esp32p4/src/gpio/func156_in_sel_cfg.rs deleted file mode 100644 index 93f674b329..0000000000 --- a/esp32p4/src/gpio/func156_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC156_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC156_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC156_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC156_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC156_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC156_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC156_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC156_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC156_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC156_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG156_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG156_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG156_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG156_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func156_in_sel(&self) -> FUNC156_IN_SEL_R { - FUNC156_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func156_in_inv_sel(&self) -> FUNC156_IN_INV_SEL_R { - FUNC156_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig156_in_sel(&self) -> SIG156_IN_SEL_R { - SIG156_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC156_IN_SEL_CFG") - .field( - "func156_in_sel", - &format_args!("{}", self.func156_in_sel().bits()), - ) - .field( - "func156_in_inv_sel", - &format_args!("{}", self.func156_in_inv_sel().bit()), - ) - .field( - "sig156_in_sel", - &format_args!("{}", self.sig156_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func156_in_sel(&mut self) -> FUNC156_IN_SEL_W { - FUNC156_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func156_in_inv_sel(&mut self) -> FUNC156_IN_INV_SEL_W { - FUNC156_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig156_in_sel(&mut self) -> SIG156_IN_SEL_W { - SIG156_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func156_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func156_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC156_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC156_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func156_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC156_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func156_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC156_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC156_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC156_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func158_in_sel_cfg.rs b/esp32p4/src/gpio/func158_in_sel_cfg.rs deleted file mode 100644 index af8ecb91a2..0000000000 --- a/esp32p4/src/gpio/func158_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC158_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC158_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC158_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC158_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC158_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC158_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC158_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC158_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC158_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC158_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG158_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG158_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG158_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG158_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func158_in_sel(&self) -> FUNC158_IN_SEL_R { - FUNC158_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func158_in_inv_sel(&self) -> FUNC158_IN_INV_SEL_R { - FUNC158_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig158_in_sel(&self) -> SIG158_IN_SEL_R { - SIG158_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC158_IN_SEL_CFG") - .field( - "func158_in_sel", - &format_args!("{}", self.func158_in_sel().bits()), - ) - .field( - "func158_in_inv_sel", - &format_args!("{}", self.func158_in_inv_sel().bit()), - ) - .field( - "sig158_in_sel", - &format_args!("{}", self.sig158_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func158_in_sel(&mut self) -> FUNC158_IN_SEL_W { - FUNC158_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func158_in_inv_sel(&mut self) -> FUNC158_IN_INV_SEL_W { - FUNC158_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig158_in_sel(&mut self) -> SIG158_IN_SEL_W { - SIG158_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func158_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func158_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC158_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC158_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func158_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC158_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func158_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC158_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC158_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC158_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func159_in_sel_cfg.rs b/esp32p4/src/gpio/func159_in_sel_cfg.rs deleted file mode 100644 index 51c381ca48..0000000000 --- a/esp32p4/src/gpio/func159_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC159_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC159_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC159_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC159_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC159_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC159_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC159_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC159_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC159_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC159_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG159_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG159_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG159_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG159_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func159_in_sel(&self) -> FUNC159_IN_SEL_R { - FUNC159_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func159_in_inv_sel(&self) -> FUNC159_IN_INV_SEL_R { - FUNC159_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig159_in_sel(&self) -> SIG159_IN_SEL_R { - SIG159_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC159_IN_SEL_CFG") - .field( - "func159_in_sel", - &format_args!("{}", self.func159_in_sel().bits()), - ) - .field( - "func159_in_inv_sel", - &format_args!("{}", self.func159_in_inv_sel().bit()), - ) - .field( - "sig159_in_sel", - &format_args!("{}", self.sig159_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func159_in_sel(&mut self) -> FUNC159_IN_SEL_W { - FUNC159_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func159_in_inv_sel(&mut self) -> FUNC159_IN_INV_SEL_W { - FUNC159_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig159_in_sel(&mut self) -> SIG159_IN_SEL_W { - SIG159_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func159_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func159_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC159_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC159_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func159_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC159_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func159_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC159_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC159_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC159_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func15_in_sel_cfg.rs b/esp32p4/src/gpio/func15_in_sel_cfg.rs deleted file mode 100644 index e2693ec86f..0000000000 --- a/esp32p4/src/gpio/func15_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC15_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC15_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC15_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC15_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC15_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC15_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC15_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC15_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC15_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC15_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG15_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG15_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG15_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG15_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func15_in_sel(&self) -> FUNC15_IN_SEL_R { - FUNC15_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func15_in_inv_sel(&self) -> FUNC15_IN_INV_SEL_R { - FUNC15_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig15_in_sel(&self) -> SIG15_IN_SEL_R { - SIG15_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC15_IN_SEL_CFG") - .field( - "func15_in_sel", - &format_args!("{}", self.func15_in_sel().bits()), - ) - .field( - "func15_in_inv_sel", - &format_args!("{}", self.func15_in_inv_sel().bit()), - ) - .field( - "sig15_in_sel", - &format_args!("{}", self.sig15_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func15_in_sel(&mut self) -> FUNC15_IN_SEL_W { - FUNC15_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func15_in_inv_sel(&mut self) -> FUNC15_IN_INV_SEL_W { - FUNC15_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig15_in_sel(&mut self) -> SIG15_IN_SEL_W { - SIG15_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func15_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func15_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC15_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC15_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func15_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC15_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func15_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC15_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC15_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC15_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func160_in_sel_cfg.rs b/esp32p4/src/gpio/func160_in_sel_cfg.rs deleted file mode 100644 index a857e695e2..0000000000 --- a/esp32p4/src/gpio/func160_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC160_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC160_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC160_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC160_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC160_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC160_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC160_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC160_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC160_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC160_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG160_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG160_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG160_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG160_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func160_in_sel(&self) -> FUNC160_IN_SEL_R { - FUNC160_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func160_in_inv_sel(&self) -> FUNC160_IN_INV_SEL_R { - FUNC160_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig160_in_sel(&self) -> SIG160_IN_SEL_R { - SIG160_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC160_IN_SEL_CFG") - .field( - "func160_in_sel", - &format_args!("{}", self.func160_in_sel().bits()), - ) - .field( - "func160_in_inv_sel", - &format_args!("{}", self.func160_in_inv_sel().bit()), - ) - .field( - "sig160_in_sel", - &format_args!("{}", self.sig160_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func160_in_sel(&mut self) -> FUNC160_IN_SEL_W { - FUNC160_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func160_in_inv_sel(&mut self) -> FUNC160_IN_INV_SEL_W { - FUNC160_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig160_in_sel(&mut self) -> SIG160_IN_SEL_W { - SIG160_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func160_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func160_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC160_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC160_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func160_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC160_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func160_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC160_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC160_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC160_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func161_in_sel_cfg.rs b/esp32p4/src/gpio/func161_in_sel_cfg.rs deleted file mode 100644 index fafa41aa67..0000000000 --- a/esp32p4/src/gpio/func161_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC161_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC161_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC161_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC161_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC161_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC161_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC161_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC161_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC161_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC161_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG161_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG161_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG161_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG161_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func161_in_sel(&self) -> FUNC161_IN_SEL_R { - FUNC161_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func161_in_inv_sel(&self) -> FUNC161_IN_INV_SEL_R { - FUNC161_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig161_in_sel(&self) -> SIG161_IN_SEL_R { - SIG161_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC161_IN_SEL_CFG") - .field( - "func161_in_sel", - &format_args!("{}", self.func161_in_sel().bits()), - ) - .field( - "func161_in_inv_sel", - &format_args!("{}", self.func161_in_inv_sel().bit()), - ) - .field( - "sig161_in_sel", - &format_args!("{}", self.sig161_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func161_in_sel(&mut self) -> FUNC161_IN_SEL_W { - FUNC161_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func161_in_inv_sel(&mut self) -> FUNC161_IN_INV_SEL_W { - FUNC161_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig161_in_sel(&mut self) -> SIG161_IN_SEL_W { - SIG161_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func161_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func161_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC161_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC161_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func161_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC161_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func161_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC161_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC161_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC161_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func162_in_sel_cfg.rs b/esp32p4/src/gpio/func162_in_sel_cfg.rs deleted file mode 100644 index b6702bc523..0000000000 --- a/esp32p4/src/gpio/func162_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC162_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC162_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC162_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC162_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC162_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC162_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC162_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC162_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC162_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC162_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG162_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG162_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG162_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG162_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func162_in_sel(&self) -> FUNC162_IN_SEL_R { - FUNC162_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func162_in_inv_sel(&self) -> FUNC162_IN_INV_SEL_R { - FUNC162_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig162_in_sel(&self) -> SIG162_IN_SEL_R { - SIG162_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC162_IN_SEL_CFG") - .field( - "func162_in_sel", - &format_args!("{}", self.func162_in_sel().bits()), - ) - .field( - "func162_in_inv_sel", - &format_args!("{}", self.func162_in_inv_sel().bit()), - ) - .field( - "sig162_in_sel", - &format_args!("{}", self.sig162_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func162_in_sel(&mut self) -> FUNC162_IN_SEL_W { - FUNC162_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func162_in_inv_sel(&mut self) -> FUNC162_IN_INV_SEL_W { - FUNC162_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig162_in_sel(&mut self) -> SIG162_IN_SEL_W { - SIG162_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func162_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func162_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC162_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC162_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func162_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC162_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func162_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC162_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC162_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC162_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func163_in_sel_cfg.rs b/esp32p4/src/gpio/func163_in_sel_cfg.rs deleted file mode 100644 index dc373d8bc6..0000000000 --- a/esp32p4/src/gpio/func163_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC163_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC163_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC163_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC163_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC163_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC163_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC163_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC163_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC163_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC163_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG163_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG163_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG163_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG163_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func163_in_sel(&self) -> FUNC163_IN_SEL_R { - FUNC163_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func163_in_inv_sel(&self) -> FUNC163_IN_INV_SEL_R { - FUNC163_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig163_in_sel(&self) -> SIG163_IN_SEL_R { - SIG163_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC163_IN_SEL_CFG") - .field( - "func163_in_sel", - &format_args!("{}", self.func163_in_sel().bits()), - ) - .field( - "func163_in_inv_sel", - &format_args!("{}", self.func163_in_inv_sel().bit()), - ) - .field( - "sig163_in_sel", - &format_args!("{}", self.sig163_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func163_in_sel(&mut self) -> FUNC163_IN_SEL_W { - FUNC163_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func163_in_inv_sel(&mut self) -> FUNC163_IN_INV_SEL_W { - FUNC163_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig163_in_sel(&mut self) -> SIG163_IN_SEL_W { - SIG163_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func163_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func163_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC163_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC163_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func163_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC163_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func163_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC163_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC163_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC163_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func164_in_sel_cfg.rs b/esp32p4/src/gpio/func164_in_sel_cfg.rs deleted file mode 100644 index ac5088ebea..0000000000 --- a/esp32p4/src/gpio/func164_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC164_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC164_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC164_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC164_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC164_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC164_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC164_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC164_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC164_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC164_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG164_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG164_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG164_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG164_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func164_in_sel(&self) -> FUNC164_IN_SEL_R { - FUNC164_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func164_in_inv_sel(&self) -> FUNC164_IN_INV_SEL_R { - FUNC164_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig164_in_sel(&self) -> SIG164_IN_SEL_R { - SIG164_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC164_IN_SEL_CFG") - .field( - "func164_in_sel", - &format_args!("{}", self.func164_in_sel().bits()), - ) - .field( - "func164_in_inv_sel", - &format_args!("{}", self.func164_in_inv_sel().bit()), - ) - .field( - "sig164_in_sel", - &format_args!("{}", self.sig164_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func164_in_sel(&mut self) -> FUNC164_IN_SEL_W { - FUNC164_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func164_in_inv_sel(&mut self) -> FUNC164_IN_INV_SEL_W { - FUNC164_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig164_in_sel(&mut self) -> SIG164_IN_SEL_W { - SIG164_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func164_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func164_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC164_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC164_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func164_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC164_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func164_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC164_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC164_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC164_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func165_in_sel_cfg.rs b/esp32p4/src/gpio/func165_in_sel_cfg.rs deleted file mode 100644 index 2eb14278b8..0000000000 --- a/esp32p4/src/gpio/func165_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC165_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC165_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC165_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC165_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC165_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC165_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC165_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC165_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC165_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC165_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG165_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG165_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG165_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG165_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func165_in_sel(&self) -> FUNC165_IN_SEL_R { - FUNC165_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func165_in_inv_sel(&self) -> FUNC165_IN_INV_SEL_R { - FUNC165_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig165_in_sel(&self) -> SIG165_IN_SEL_R { - SIG165_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC165_IN_SEL_CFG") - .field( - "func165_in_sel", - &format_args!("{}", self.func165_in_sel().bits()), - ) - .field( - "func165_in_inv_sel", - &format_args!("{}", self.func165_in_inv_sel().bit()), - ) - .field( - "sig165_in_sel", - &format_args!("{}", self.sig165_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func165_in_sel(&mut self) -> FUNC165_IN_SEL_W { - FUNC165_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func165_in_inv_sel(&mut self) -> FUNC165_IN_INV_SEL_W { - FUNC165_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig165_in_sel(&mut self) -> SIG165_IN_SEL_W { - SIG165_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func165_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func165_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC165_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC165_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func165_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC165_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func165_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC165_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC165_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC165_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func166_in_sel_cfg.rs b/esp32p4/src/gpio/func166_in_sel_cfg.rs deleted file mode 100644 index d66e4936f0..0000000000 --- a/esp32p4/src/gpio/func166_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC166_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC166_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC166_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC166_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC166_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC166_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC166_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC166_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC166_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC166_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG166_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG166_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG166_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG166_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func166_in_sel(&self) -> FUNC166_IN_SEL_R { - FUNC166_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func166_in_inv_sel(&self) -> FUNC166_IN_INV_SEL_R { - FUNC166_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig166_in_sel(&self) -> SIG166_IN_SEL_R { - SIG166_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC166_IN_SEL_CFG") - .field( - "func166_in_sel", - &format_args!("{}", self.func166_in_sel().bits()), - ) - .field( - "func166_in_inv_sel", - &format_args!("{}", self.func166_in_inv_sel().bit()), - ) - .field( - "sig166_in_sel", - &format_args!("{}", self.sig166_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func166_in_sel(&mut self) -> FUNC166_IN_SEL_W { - FUNC166_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func166_in_inv_sel(&mut self) -> FUNC166_IN_INV_SEL_W { - FUNC166_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig166_in_sel(&mut self) -> SIG166_IN_SEL_W { - SIG166_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func166_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func166_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC166_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC166_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func166_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC166_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func166_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC166_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC166_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC166_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func167_in_sel_cfg.rs b/esp32p4/src/gpio/func167_in_sel_cfg.rs deleted file mode 100644 index 3e912614df..0000000000 --- a/esp32p4/src/gpio/func167_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC167_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC167_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC167_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC167_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC167_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC167_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC167_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC167_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC167_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC167_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG167_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG167_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG167_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG167_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func167_in_sel(&self) -> FUNC167_IN_SEL_R { - FUNC167_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func167_in_inv_sel(&self) -> FUNC167_IN_INV_SEL_R { - FUNC167_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig167_in_sel(&self) -> SIG167_IN_SEL_R { - SIG167_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC167_IN_SEL_CFG") - .field( - "func167_in_sel", - &format_args!("{}", self.func167_in_sel().bits()), - ) - .field( - "func167_in_inv_sel", - &format_args!("{}", self.func167_in_inv_sel().bit()), - ) - .field( - "sig167_in_sel", - &format_args!("{}", self.sig167_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func167_in_sel(&mut self) -> FUNC167_IN_SEL_W { - FUNC167_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func167_in_inv_sel(&mut self) -> FUNC167_IN_INV_SEL_W { - FUNC167_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig167_in_sel(&mut self) -> SIG167_IN_SEL_W { - SIG167_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func167_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func167_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC167_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC167_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func167_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC167_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func167_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC167_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC167_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC167_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func168_in_sel_cfg.rs b/esp32p4/src/gpio/func168_in_sel_cfg.rs deleted file mode 100644 index e1d1097d0e..0000000000 --- a/esp32p4/src/gpio/func168_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC168_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC168_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC168_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC168_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC168_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC168_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC168_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC168_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC168_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC168_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG168_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG168_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG168_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG168_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func168_in_sel(&self) -> FUNC168_IN_SEL_R { - FUNC168_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func168_in_inv_sel(&self) -> FUNC168_IN_INV_SEL_R { - FUNC168_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig168_in_sel(&self) -> SIG168_IN_SEL_R { - SIG168_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC168_IN_SEL_CFG") - .field( - "func168_in_sel", - &format_args!("{}", self.func168_in_sel().bits()), - ) - .field( - "func168_in_inv_sel", - &format_args!("{}", self.func168_in_inv_sel().bit()), - ) - .field( - "sig168_in_sel", - &format_args!("{}", self.sig168_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func168_in_sel(&mut self) -> FUNC168_IN_SEL_W { - FUNC168_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func168_in_inv_sel(&mut self) -> FUNC168_IN_INV_SEL_W { - FUNC168_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig168_in_sel(&mut self) -> SIG168_IN_SEL_W { - SIG168_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func168_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func168_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC168_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC168_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func168_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC168_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func168_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC168_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC168_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC168_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func169_in_sel_cfg.rs b/esp32p4/src/gpio/func169_in_sel_cfg.rs deleted file mode 100644 index 57f1b9aaf7..0000000000 --- a/esp32p4/src/gpio/func169_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC169_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC169_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC169_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC169_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC169_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC169_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC169_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC169_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC169_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC169_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG169_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG169_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG169_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG169_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func169_in_sel(&self) -> FUNC169_IN_SEL_R { - FUNC169_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func169_in_inv_sel(&self) -> FUNC169_IN_INV_SEL_R { - FUNC169_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig169_in_sel(&self) -> SIG169_IN_SEL_R { - SIG169_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC169_IN_SEL_CFG") - .field( - "func169_in_sel", - &format_args!("{}", self.func169_in_sel().bits()), - ) - .field( - "func169_in_inv_sel", - &format_args!("{}", self.func169_in_inv_sel().bit()), - ) - .field( - "sig169_in_sel", - &format_args!("{}", self.sig169_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func169_in_sel(&mut self) -> FUNC169_IN_SEL_W { - FUNC169_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func169_in_inv_sel(&mut self) -> FUNC169_IN_INV_SEL_W { - FUNC169_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig169_in_sel(&mut self) -> SIG169_IN_SEL_W { - SIG169_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func169_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func169_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC169_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC169_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func169_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC169_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func169_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC169_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC169_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC169_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func16_in_sel_cfg.rs b/esp32p4/src/gpio/func16_in_sel_cfg.rs deleted file mode 100644 index c50e57ffb8..0000000000 --- a/esp32p4/src/gpio/func16_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC16_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC16_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC16_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC16_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC16_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC16_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC16_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC16_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC16_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC16_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG16_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG16_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG16_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG16_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func16_in_sel(&self) -> FUNC16_IN_SEL_R { - FUNC16_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func16_in_inv_sel(&self) -> FUNC16_IN_INV_SEL_R { - FUNC16_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig16_in_sel(&self) -> SIG16_IN_SEL_R { - SIG16_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC16_IN_SEL_CFG") - .field( - "func16_in_sel", - &format_args!("{}", self.func16_in_sel().bits()), - ) - .field( - "func16_in_inv_sel", - &format_args!("{}", self.func16_in_inv_sel().bit()), - ) - .field( - "sig16_in_sel", - &format_args!("{}", self.sig16_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func16_in_sel(&mut self) -> FUNC16_IN_SEL_W { - FUNC16_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func16_in_inv_sel(&mut self) -> FUNC16_IN_INV_SEL_W { - FUNC16_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig16_in_sel(&mut self) -> SIG16_IN_SEL_W { - SIG16_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func16_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func16_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC16_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC16_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func16_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC16_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func16_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC16_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC16_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC16_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func170_in_sel_cfg.rs b/esp32p4/src/gpio/func170_in_sel_cfg.rs deleted file mode 100644 index e083246b65..0000000000 --- a/esp32p4/src/gpio/func170_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC170_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC170_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC170_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC170_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC170_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC170_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC170_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC170_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC170_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC170_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG170_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG170_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG170_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG170_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func170_in_sel(&self) -> FUNC170_IN_SEL_R { - FUNC170_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func170_in_inv_sel(&self) -> FUNC170_IN_INV_SEL_R { - FUNC170_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig170_in_sel(&self) -> SIG170_IN_SEL_R { - SIG170_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC170_IN_SEL_CFG") - .field( - "func170_in_sel", - &format_args!("{}", self.func170_in_sel().bits()), - ) - .field( - "func170_in_inv_sel", - &format_args!("{}", self.func170_in_inv_sel().bit()), - ) - .field( - "sig170_in_sel", - &format_args!("{}", self.sig170_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func170_in_sel(&mut self) -> FUNC170_IN_SEL_W { - FUNC170_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func170_in_inv_sel(&mut self) -> FUNC170_IN_INV_SEL_W { - FUNC170_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig170_in_sel(&mut self) -> SIG170_IN_SEL_W { - SIG170_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func170_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func170_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC170_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC170_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func170_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC170_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func170_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC170_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC170_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC170_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func171_in_sel_cfg.rs b/esp32p4/src/gpio/func171_in_sel_cfg.rs deleted file mode 100644 index 5e0fa9cdbf..0000000000 --- a/esp32p4/src/gpio/func171_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC171_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC171_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC171_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC171_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC171_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC171_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC171_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC171_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC171_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC171_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG171_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG171_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG171_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG171_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func171_in_sel(&self) -> FUNC171_IN_SEL_R { - FUNC171_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func171_in_inv_sel(&self) -> FUNC171_IN_INV_SEL_R { - FUNC171_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig171_in_sel(&self) -> SIG171_IN_SEL_R { - SIG171_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC171_IN_SEL_CFG") - .field( - "func171_in_sel", - &format_args!("{}", self.func171_in_sel().bits()), - ) - .field( - "func171_in_inv_sel", - &format_args!("{}", self.func171_in_inv_sel().bit()), - ) - .field( - "sig171_in_sel", - &format_args!("{}", self.sig171_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func171_in_sel(&mut self) -> FUNC171_IN_SEL_W { - FUNC171_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func171_in_inv_sel(&mut self) -> FUNC171_IN_INV_SEL_W { - FUNC171_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig171_in_sel(&mut self) -> SIG171_IN_SEL_W { - SIG171_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func171_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func171_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC171_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC171_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func171_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC171_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func171_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC171_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC171_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC171_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func172_in_sel_cfg.rs b/esp32p4/src/gpio/func172_in_sel_cfg.rs deleted file mode 100644 index 43825a9344..0000000000 --- a/esp32p4/src/gpio/func172_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC172_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC172_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC172_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC172_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC172_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC172_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC172_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC172_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC172_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC172_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG172_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG172_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG172_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG172_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func172_in_sel(&self) -> FUNC172_IN_SEL_R { - FUNC172_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func172_in_inv_sel(&self) -> FUNC172_IN_INV_SEL_R { - FUNC172_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig172_in_sel(&self) -> SIG172_IN_SEL_R { - SIG172_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC172_IN_SEL_CFG") - .field( - "func172_in_sel", - &format_args!("{}", self.func172_in_sel().bits()), - ) - .field( - "func172_in_inv_sel", - &format_args!("{}", self.func172_in_inv_sel().bit()), - ) - .field( - "sig172_in_sel", - &format_args!("{}", self.sig172_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func172_in_sel(&mut self) -> FUNC172_IN_SEL_W { - FUNC172_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func172_in_inv_sel(&mut self) -> FUNC172_IN_INV_SEL_W { - FUNC172_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig172_in_sel(&mut self) -> SIG172_IN_SEL_W { - SIG172_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func172_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func172_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC172_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC172_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func172_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC172_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func172_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC172_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC172_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC172_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func173_in_sel_cfg.rs b/esp32p4/src/gpio/func173_in_sel_cfg.rs deleted file mode 100644 index b87bb3d573..0000000000 --- a/esp32p4/src/gpio/func173_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC173_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC173_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC173_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC173_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC173_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC173_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC173_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC173_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC173_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC173_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG173_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG173_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG173_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG173_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func173_in_sel(&self) -> FUNC173_IN_SEL_R { - FUNC173_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func173_in_inv_sel(&self) -> FUNC173_IN_INV_SEL_R { - FUNC173_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig173_in_sel(&self) -> SIG173_IN_SEL_R { - SIG173_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC173_IN_SEL_CFG") - .field( - "func173_in_sel", - &format_args!("{}", self.func173_in_sel().bits()), - ) - .field( - "func173_in_inv_sel", - &format_args!("{}", self.func173_in_inv_sel().bit()), - ) - .field( - "sig173_in_sel", - &format_args!("{}", self.sig173_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func173_in_sel(&mut self) -> FUNC173_IN_SEL_W { - FUNC173_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func173_in_inv_sel(&mut self) -> FUNC173_IN_INV_SEL_W { - FUNC173_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig173_in_sel(&mut self) -> SIG173_IN_SEL_W { - SIG173_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func173_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func173_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC173_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC173_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func173_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC173_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func173_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC173_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC173_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC173_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func174_in_sel_cfg.rs b/esp32p4/src/gpio/func174_in_sel_cfg.rs deleted file mode 100644 index 424d893e6e..0000000000 --- a/esp32p4/src/gpio/func174_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC174_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC174_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC174_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC174_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC174_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC174_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC174_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC174_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC174_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC174_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG174_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG174_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG174_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG174_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func174_in_sel(&self) -> FUNC174_IN_SEL_R { - FUNC174_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func174_in_inv_sel(&self) -> FUNC174_IN_INV_SEL_R { - FUNC174_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig174_in_sel(&self) -> SIG174_IN_SEL_R { - SIG174_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC174_IN_SEL_CFG") - .field( - "func174_in_sel", - &format_args!("{}", self.func174_in_sel().bits()), - ) - .field( - "func174_in_inv_sel", - &format_args!("{}", self.func174_in_inv_sel().bit()), - ) - .field( - "sig174_in_sel", - &format_args!("{}", self.sig174_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func174_in_sel(&mut self) -> FUNC174_IN_SEL_W { - FUNC174_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func174_in_inv_sel(&mut self) -> FUNC174_IN_INV_SEL_W { - FUNC174_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig174_in_sel(&mut self) -> SIG174_IN_SEL_W { - SIG174_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func174_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func174_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC174_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC174_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func174_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC174_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func174_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC174_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC174_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC174_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func175_in_sel_cfg.rs b/esp32p4/src/gpio/func175_in_sel_cfg.rs deleted file mode 100644 index 32b38f2f7e..0000000000 --- a/esp32p4/src/gpio/func175_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC175_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC175_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC175_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC175_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC175_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC175_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC175_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC175_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC175_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC175_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG175_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG175_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG175_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG175_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func175_in_sel(&self) -> FUNC175_IN_SEL_R { - FUNC175_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func175_in_inv_sel(&self) -> FUNC175_IN_INV_SEL_R { - FUNC175_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig175_in_sel(&self) -> SIG175_IN_SEL_R { - SIG175_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC175_IN_SEL_CFG") - .field( - "func175_in_sel", - &format_args!("{}", self.func175_in_sel().bits()), - ) - .field( - "func175_in_inv_sel", - &format_args!("{}", self.func175_in_inv_sel().bit()), - ) - .field( - "sig175_in_sel", - &format_args!("{}", self.sig175_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func175_in_sel(&mut self) -> FUNC175_IN_SEL_W { - FUNC175_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func175_in_inv_sel(&mut self) -> FUNC175_IN_INV_SEL_W { - FUNC175_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig175_in_sel(&mut self) -> SIG175_IN_SEL_W { - SIG175_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func175_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func175_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC175_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC175_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func175_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC175_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func175_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC175_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC175_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC175_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func176_in_sel_cfg.rs b/esp32p4/src/gpio/func176_in_sel_cfg.rs deleted file mode 100644 index 2f5340929b..0000000000 --- a/esp32p4/src/gpio/func176_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC176_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC176_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC176_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC176_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC176_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC176_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC176_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC176_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC176_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC176_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG176_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG176_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG176_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG176_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func176_in_sel(&self) -> FUNC176_IN_SEL_R { - FUNC176_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func176_in_inv_sel(&self) -> FUNC176_IN_INV_SEL_R { - FUNC176_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig176_in_sel(&self) -> SIG176_IN_SEL_R { - SIG176_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC176_IN_SEL_CFG") - .field( - "func176_in_sel", - &format_args!("{}", self.func176_in_sel().bits()), - ) - .field( - "func176_in_inv_sel", - &format_args!("{}", self.func176_in_inv_sel().bit()), - ) - .field( - "sig176_in_sel", - &format_args!("{}", self.sig176_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func176_in_sel(&mut self) -> FUNC176_IN_SEL_W { - FUNC176_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func176_in_inv_sel(&mut self) -> FUNC176_IN_INV_SEL_W { - FUNC176_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig176_in_sel(&mut self) -> SIG176_IN_SEL_W { - SIG176_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func176_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func176_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC176_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC176_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func176_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC176_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func176_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC176_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC176_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC176_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func177_in_sel_cfg.rs b/esp32p4/src/gpio/func177_in_sel_cfg.rs deleted file mode 100644 index e459fd1661..0000000000 --- a/esp32p4/src/gpio/func177_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC177_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC177_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC177_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC177_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC177_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC177_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC177_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC177_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC177_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC177_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG177_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG177_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG177_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG177_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func177_in_sel(&self) -> FUNC177_IN_SEL_R { - FUNC177_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func177_in_inv_sel(&self) -> FUNC177_IN_INV_SEL_R { - FUNC177_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig177_in_sel(&self) -> SIG177_IN_SEL_R { - SIG177_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC177_IN_SEL_CFG") - .field( - "func177_in_sel", - &format_args!("{}", self.func177_in_sel().bits()), - ) - .field( - "func177_in_inv_sel", - &format_args!("{}", self.func177_in_inv_sel().bit()), - ) - .field( - "sig177_in_sel", - &format_args!("{}", self.sig177_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func177_in_sel(&mut self) -> FUNC177_IN_SEL_W { - FUNC177_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func177_in_inv_sel(&mut self) -> FUNC177_IN_INV_SEL_W { - FUNC177_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig177_in_sel(&mut self) -> SIG177_IN_SEL_W { - SIG177_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func177_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func177_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC177_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC177_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func177_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC177_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func177_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC177_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC177_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC177_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func178_in_sel_cfg.rs b/esp32p4/src/gpio/func178_in_sel_cfg.rs deleted file mode 100644 index 38e4fa4270..0000000000 --- a/esp32p4/src/gpio/func178_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC178_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC178_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC178_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC178_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC178_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC178_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC178_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC178_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC178_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC178_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG178_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG178_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG178_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG178_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func178_in_sel(&self) -> FUNC178_IN_SEL_R { - FUNC178_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func178_in_inv_sel(&self) -> FUNC178_IN_INV_SEL_R { - FUNC178_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig178_in_sel(&self) -> SIG178_IN_SEL_R { - SIG178_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC178_IN_SEL_CFG") - .field( - "func178_in_sel", - &format_args!("{}", self.func178_in_sel().bits()), - ) - .field( - "func178_in_inv_sel", - &format_args!("{}", self.func178_in_inv_sel().bit()), - ) - .field( - "sig178_in_sel", - &format_args!("{}", self.sig178_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func178_in_sel(&mut self) -> FUNC178_IN_SEL_W { - FUNC178_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func178_in_inv_sel(&mut self) -> FUNC178_IN_INV_SEL_W { - FUNC178_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig178_in_sel(&mut self) -> SIG178_IN_SEL_W { - SIG178_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func178_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func178_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC178_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC178_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func178_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC178_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func178_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC178_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC178_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC178_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func179_in_sel_cfg.rs b/esp32p4/src/gpio/func179_in_sel_cfg.rs deleted file mode 100644 index ec71b210ae..0000000000 --- a/esp32p4/src/gpio/func179_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC179_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC179_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC179_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC179_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC179_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC179_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC179_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC179_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC179_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC179_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG179_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG179_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG179_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG179_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func179_in_sel(&self) -> FUNC179_IN_SEL_R { - FUNC179_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func179_in_inv_sel(&self) -> FUNC179_IN_INV_SEL_R { - FUNC179_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig179_in_sel(&self) -> SIG179_IN_SEL_R { - SIG179_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC179_IN_SEL_CFG") - .field( - "func179_in_sel", - &format_args!("{}", self.func179_in_sel().bits()), - ) - .field( - "func179_in_inv_sel", - &format_args!("{}", self.func179_in_inv_sel().bit()), - ) - .field( - "sig179_in_sel", - &format_args!("{}", self.sig179_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func179_in_sel(&mut self) -> FUNC179_IN_SEL_W { - FUNC179_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func179_in_inv_sel(&mut self) -> FUNC179_IN_INV_SEL_W { - FUNC179_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig179_in_sel(&mut self) -> SIG179_IN_SEL_W { - SIG179_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func179_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func179_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC179_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC179_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func179_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC179_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func179_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC179_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC179_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC179_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func17_in_sel_cfg.rs b/esp32p4/src/gpio/func17_in_sel_cfg.rs deleted file mode 100644 index 431c9b8911..0000000000 --- a/esp32p4/src/gpio/func17_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC17_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC17_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC17_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC17_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC17_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC17_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC17_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC17_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC17_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC17_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG17_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG17_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG17_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG17_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func17_in_sel(&self) -> FUNC17_IN_SEL_R { - FUNC17_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func17_in_inv_sel(&self) -> FUNC17_IN_INV_SEL_R { - FUNC17_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig17_in_sel(&self) -> SIG17_IN_SEL_R { - SIG17_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC17_IN_SEL_CFG") - .field( - "func17_in_sel", - &format_args!("{}", self.func17_in_sel().bits()), - ) - .field( - "func17_in_inv_sel", - &format_args!("{}", self.func17_in_inv_sel().bit()), - ) - .field( - "sig17_in_sel", - &format_args!("{}", self.sig17_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func17_in_sel(&mut self) -> FUNC17_IN_SEL_W { - FUNC17_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func17_in_inv_sel(&mut self) -> FUNC17_IN_INV_SEL_W { - FUNC17_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig17_in_sel(&mut self) -> SIG17_IN_SEL_W { - SIG17_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func17_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func17_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC17_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC17_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func17_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC17_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func17_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC17_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC17_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC17_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func180_in_sel_cfg.rs b/esp32p4/src/gpio/func180_in_sel_cfg.rs deleted file mode 100644 index f725b65243..0000000000 --- a/esp32p4/src/gpio/func180_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC180_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC180_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC180_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC180_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC180_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC180_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC180_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC180_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC180_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC180_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG180_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG180_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG180_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG180_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func180_in_sel(&self) -> FUNC180_IN_SEL_R { - FUNC180_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func180_in_inv_sel(&self) -> FUNC180_IN_INV_SEL_R { - FUNC180_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig180_in_sel(&self) -> SIG180_IN_SEL_R { - SIG180_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC180_IN_SEL_CFG") - .field( - "func180_in_sel", - &format_args!("{}", self.func180_in_sel().bits()), - ) - .field( - "func180_in_inv_sel", - &format_args!("{}", self.func180_in_inv_sel().bit()), - ) - .field( - "sig180_in_sel", - &format_args!("{}", self.sig180_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func180_in_sel(&mut self) -> FUNC180_IN_SEL_W { - FUNC180_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func180_in_inv_sel(&mut self) -> FUNC180_IN_INV_SEL_W { - FUNC180_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig180_in_sel(&mut self) -> SIG180_IN_SEL_W { - SIG180_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func180_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func180_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC180_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC180_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func180_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC180_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func180_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC180_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC180_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC180_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func181_in_sel_cfg.rs b/esp32p4/src/gpio/func181_in_sel_cfg.rs deleted file mode 100644 index 771d55e01c..0000000000 --- a/esp32p4/src/gpio/func181_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC181_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC181_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC181_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC181_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC181_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC181_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC181_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC181_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC181_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC181_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG181_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG181_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG181_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG181_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func181_in_sel(&self) -> FUNC181_IN_SEL_R { - FUNC181_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func181_in_inv_sel(&self) -> FUNC181_IN_INV_SEL_R { - FUNC181_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig181_in_sel(&self) -> SIG181_IN_SEL_R { - SIG181_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC181_IN_SEL_CFG") - .field( - "func181_in_sel", - &format_args!("{}", self.func181_in_sel().bits()), - ) - .field( - "func181_in_inv_sel", - &format_args!("{}", self.func181_in_inv_sel().bit()), - ) - .field( - "sig181_in_sel", - &format_args!("{}", self.sig181_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func181_in_sel(&mut self) -> FUNC181_IN_SEL_W { - FUNC181_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func181_in_inv_sel(&mut self) -> FUNC181_IN_INV_SEL_W { - FUNC181_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig181_in_sel(&mut self) -> SIG181_IN_SEL_W { - SIG181_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func181_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func181_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC181_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC181_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func181_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC181_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func181_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC181_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC181_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC181_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func182_in_sel_cfg.rs b/esp32p4/src/gpio/func182_in_sel_cfg.rs deleted file mode 100644 index 1f64255bfe..0000000000 --- a/esp32p4/src/gpio/func182_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC182_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC182_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC182_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC182_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC182_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC182_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC182_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC182_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC182_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC182_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG182_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG182_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG182_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG182_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func182_in_sel(&self) -> FUNC182_IN_SEL_R { - FUNC182_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func182_in_inv_sel(&self) -> FUNC182_IN_INV_SEL_R { - FUNC182_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig182_in_sel(&self) -> SIG182_IN_SEL_R { - SIG182_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC182_IN_SEL_CFG") - .field( - "func182_in_sel", - &format_args!("{}", self.func182_in_sel().bits()), - ) - .field( - "func182_in_inv_sel", - &format_args!("{}", self.func182_in_inv_sel().bit()), - ) - .field( - "sig182_in_sel", - &format_args!("{}", self.sig182_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func182_in_sel(&mut self) -> FUNC182_IN_SEL_W { - FUNC182_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func182_in_inv_sel(&mut self) -> FUNC182_IN_INV_SEL_W { - FUNC182_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig182_in_sel(&mut self) -> SIG182_IN_SEL_W { - SIG182_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func182_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func182_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC182_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC182_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func182_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC182_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func182_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC182_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC182_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC182_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func183_in_sel_cfg.rs b/esp32p4/src/gpio/func183_in_sel_cfg.rs deleted file mode 100644 index d652053dc9..0000000000 --- a/esp32p4/src/gpio/func183_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC183_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC183_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC183_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC183_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC183_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC183_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC183_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC183_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC183_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC183_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG183_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG183_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG183_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG183_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func183_in_sel(&self) -> FUNC183_IN_SEL_R { - FUNC183_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func183_in_inv_sel(&self) -> FUNC183_IN_INV_SEL_R { - FUNC183_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig183_in_sel(&self) -> SIG183_IN_SEL_R { - SIG183_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC183_IN_SEL_CFG") - .field( - "func183_in_sel", - &format_args!("{}", self.func183_in_sel().bits()), - ) - .field( - "func183_in_inv_sel", - &format_args!("{}", self.func183_in_inv_sel().bit()), - ) - .field( - "sig183_in_sel", - &format_args!("{}", self.sig183_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func183_in_sel(&mut self) -> FUNC183_IN_SEL_W { - FUNC183_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func183_in_inv_sel(&mut self) -> FUNC183_IN_INV_SEL_W { - FUNC183_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig183_in_sel(&mut self) -> SIG183_IN_SEL_W { - SIG183_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func183_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func183_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC183_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC183_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func183_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC183_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func183_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC183_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC183_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC183_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func184_in_sel_cfg.rs b/esp32p4/src/gpio/func184_in_sel_cfg.rs deleted file mode 100644 index 7452404ae8..0000000000 --- a/esp32p4/src/gpio/func184_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC184_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC184_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC184_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC184_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC184_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC184_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC184_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC184_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC184_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC184_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG184_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG184_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG184_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG184_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func184_in_sel(&self) -> FUNC184_IN_SEL_R { - FUNC184_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func184_in_inv_sel(&self) -> FUNC184_IN_INV_SEL_R { - FUNC184_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig184_in_sel(&self) -> SIG184_IN_SEL_R { - SIG184_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC184_IN_SEL_CFG") - .field( - "func184_in_sel", - &format_args!("{}", self.func184_in_sel().bits()), - ) - .field( - "func184_in_inv_sel", - &format_args!("{}", self.func184_in_inv_sel().bit()), - ) - .field( - "sig184_in_sel", - &format_args!("{}", self.sig184_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func184_in_sel(&mut self) -> FUNC184_IN_SEL_W { - FUNC184_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func184_in_inv_sel(&mut self) -> FUNC184_IN_INV_SEL_W { - FUNC184_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig184_in_sel(&mut self) -> SIG184_IN_SEL_W { - SIG184_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func184_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func184_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC184_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC184_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func184_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC184_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func184_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC184_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC184_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC184_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func185_in_sel_cfg.rs b/esp32p4/src/gpio/func185_in_sel_cfg.rs deleted file mode 100644 index 3738b1934d..0000000000 --- a/esp32p4/src/gpio/func185_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC185_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC185_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC185_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC185_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC185_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC185_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC185_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC185_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC185_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC185_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG185_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG185_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG185_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG185_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func185_in_sel(&self) -> FUNC185_IN_SEL_R { - FUNC185_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func185_in_inv_sel(&self) -> FUNC185_IN_INV_SEL_R { - FUNC185_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig185_in_sel(&self) -> SIG185_IN_SEL_R { - SIG185_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC185_IN_SEL_CFG") - .field( - "func185_in_sel", - &format_args!("{}", self.func185_in_sel().bits()), - ) - .field( - "func185_in_inv_sel", - &format_args!("{}", self.func185_in_inv_sel().bit()), - ) - .field( - "sig185_in_sel", - &format_args!("{}", self.sig185_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func185_in_sel(&mut self) -> FUNC185_IN_SEL_W { - FUNC185_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func185_in_inv_sel(&mut self) -> FUNC185_IN_INV_SEL_W { - FUNC185_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig185_in_sel(&mut self) -> SIG185_IN_SEL_W { - SIG185_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func185_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func185_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC185_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC185_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func185_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC185_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func185_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC185_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC185_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC185_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func186_in_sel_cfg.rs b/esp32p4/src/gpio/func186_in_sel_cfg.rs deleted file mode 100644 index 390f8cc987..0000000000 --- a/esp32p4/src/gpio/func186_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC186_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC186_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC186_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC186_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC186_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC186_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC186_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC186_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC186_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC186_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG186_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG186_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG186_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG186_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func186_in_sel(&self) -> FUNC186_IN_SEL_R { - FUNC186_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func186_in_inv_sel(&self) -> FUNC186_IN_INV_SEL_R { - FUNC186_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig186_in_sel(&self) -> SIG186_IN_SEL_R { - SIG186_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC186_IN_SEL_CFG") - .field( - "func186_in_sel", - &format_args!("{}", self.func186_in_sel().bits()), - ) - .field( - "func186_in_inv_sel", - &format_args!("{}", self.func186_in_inv_sel().bit()), - ) - .field( - "sig186_in_sel", - &format_args!("{}", self.sig186_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func186_in_sel(&mut self) -> FUNC186_IN_SEL_W { - FUNC186_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func186_in_inv_sel(&mut self) -> FUNC186_IN_INV_SEL_W { - FUNC186_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig186_in_sel(&mut self) -> SIG186_IN_SEL_W { - SIG186_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func186_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func186_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC186_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC186_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func186_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC186_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func186_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC186_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC186_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC186_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func187_in_sel_cfg.rs b/esp32p4/src/gpio/func187_in_sel_cfg.rs deleted file mode 100644 index c8e4f202be..0000000000 --- a/esp32p4/src/gpio/func187_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC187_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC187_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC187_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC187_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC187_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC187_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC187_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC187_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC187_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC187_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG187_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG187_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG187_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG187_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func187_in_sel(&self) -> FUNC187_IN_SEL_R { - FUNC187_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func187_in_inv_sel(&self) -> FUNC187_IN_INV_SEL_R { - FUNC187_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig187_in_sel(&self) -> SIG187_IN_SEL_R { - SIG187_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC187_IN_SEL_CFG") - .field( - "func187_in_sel", - &format_args!("{}", self.func187_in_sel().bits()), - ) - .field( - "func187_in_inv_sel", - &format_args!("{}", self.func187_in_inv_sel().bit()), - ) - .field( - "sig187_in_sel", - &format_args!("{}", self.sig187_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func187_in_sel(&mut self) -> FUNC187_IN_SEL_W { - FUNC187_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func187_in_inv_sel(&mut self) -> FUNC187_IN_INV_SEL_W { - FUNC187_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig187_in_sel(&mut self) -> SIG187_IN_SEL_W { - SIG187_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func187_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func187_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC187_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC187_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func187_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC187_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func187_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC187_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC187_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC187_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func188_in_sel_cfg.rs b/esp32p4/src/gpio/func188_in_sel_cfg.rs deleted file mode 100644 index 355386c0ec..0000000000 --- a/esp32p4/src/gpio/func188_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC188_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC188_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC188_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC188_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC188_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC188_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC188_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC188_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC188_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC188_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG188_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG188_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG188_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG188_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func188_in_sel(&self) -> FUNC188_IN_SEL_R { - FUNC188_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func188_in_inv_sel(&self) -> FUNC188_IN_INV_SEL_R { - FUNC188_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig188_in_sel(&self) -> SIG188_IN_SEL_R { - SIG188_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC188_IN_SEL_CFG") - .field( - "func188_in_sel", - &format_args!("{}", self.func188_in_sel().bits()), - ) - .field( - "func188_in_inv_sel", - &format_args!("{}", self.func188_in_inv_sel().bit()), - ) - .field( - "sig188_in_sel", - &format_args!("{}", self.sig188_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func188_in_sel(&mut self) -> FUNC188_IN_SEL_W { - FUNC188_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func188_in_inv_sel(&mut self) -> FUNC188_IN_INV_SEL_W { - FUNC188_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig188_in_sel(&mut self) -> SIG188_IN_SEL_W { - SIG188_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func188_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func188_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC188_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC188_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func188_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC188_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func188_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC188_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC188_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC188_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func189_in_sel_cfg.rs b/esp32p4/src/gpio/func189_in_sel_cfg.rs deleted file mode 100644 index 6f93f4f287..0000000000 --- a/esp32p4/src/gpio/func189_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC189_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC189_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC189_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC189_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC189_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC189_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC189_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC189_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC189_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC189_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG189_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG189_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG189_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG189_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func189_in_sel(&self) -> FUNC189_IN_SEL_R { - FUNC189_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func189_in_inv_sel(&self) -> FUNC189_IN_INV_SEL_R { - FUNC189_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig189_in_sel(&self) -> SIG189_IN_SEL_R { - SIG189_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC189_IN_SEL_CFG") - .field( - "func189_in_sel", - &format_args!("{}", self.func189_in_sel().bits()), - ) - .field( - "func189_in_inv_sel", - &format_args!("{}", self.func189_in_inv_sel().bit()), - ) - .field( - "sig189_in_sel", - &format_args!("{}", self.sig189_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func189_in_sel(&mut self) -> FUNC189_IN_SEL_W { - FUNC189_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func189_in_inv_sel(&mut self) -> FUNC189_IN_INV_SEL_W { - FUNC189_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig189_in_sel(&mut self) -> SIG189_IN_SEL_W { - SIG189_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func189_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func189_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC189_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC189_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func189_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC189_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func189_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC189_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC189_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC189_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func18_in_sel_cfg.rs b/esp32p4/src/gpio/func18_in_sel_cfg.rs deleted file mode 100644 index fb17832a72..0000000000 --- a/esp32p4/src/gpio/func18_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC18_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC18_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC18_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC18_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC18_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC18_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC18_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC18_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC18_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC18_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG18_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG18_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG18_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG18_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func18_in_sel(&self) -> FUNC18_IN_SEL_R { - FUNC18_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func18_in_inv_sel(&self) -> FUNC18_IN_INV_SEL_R { - FUNC18_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig18_in_sel(&self) -> SIG18_IN_SEL_R { - SIG18_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC18_IN_SEL_CFG") - .field( - "func18_in_sel", - &format_args!("{}", self.func18_in_sel().bits()), - ) - .field( - "func18_in_inv_sel", - &format_args!("{}", self.func18_in_inv_sel().bit()), - ) - .field( - "sig18_in_sel", - &format_args!("{}", self.sig18_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func18_in_sel(&mut self) -> FUNC18_IN_SEL_W { - FUNC18_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func18_in_inv_sel(&mut self) -> FUNC18_IN_INV_SEL_W { - FUNC18_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig18_in_sel(&mut self) -> SIG18_IN_SEL_W { - SIG18_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func18_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func18_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC18_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC18_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func18_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC18_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func18_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC18_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC18_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC18_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func190_in_sel_cfg.rs b/esp32p4/src/gpio/func190_in_sel_cfg.rs deleted file mode 100644 index 3ef3d5c868..0000000000 --- a/esp32p4/src/gpio/func190_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC190_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC190_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC190_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC190_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC190_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC190_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC190_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC190_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC190_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC190_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG190_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG190_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG190_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG190_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func190_in_sel(&self) -> FUNC190_IN_SEL_R { - FUNC190_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func190_in_inv_sel(&self) -> FUNC190_IN_INV_SEL_R { - FUNC190_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig190_in_sel(&self) -> SIG190_IN_SEL_R { - SIG190_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC190_IN_SEL_CFG") - .field( - "func190_in_sel", - &format_args!("{}", self.func190_in_sel().bits()), - ) - .field( - "func190_in_inv_sel", - &format_args!("{}", self.func190_in_inv_sel().bit()), - ) - .field( - "sig190_in_sel", - &format_args!("{}", self.sig190_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func190_in_sel(&mut self) -> FUNC190_IN_SEL_W { - FUNC190_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func190_in_inv_sel(&mut self) -> FUNC190_IN_INV_SEL_W { - FUNC190_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig190_in_sel(&mut self) -> SIG190_IN_SEL_W { - SIG190_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func190_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func190_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC190_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC190_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func190_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC190_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func190_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC190_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC190_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC190_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func191_in_sel_cfg.rs b/esp32p4/src/gpio/func191_in_sel_cfg.rs deleted file mode 100644 index cb89ee0db5..0000000000 --- a/esp32p4/src/gpio/func191_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC191_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC191_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC191_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC191_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC191_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC191_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC191_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC191_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC191_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC191_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG191_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG191_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG191_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG191_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func191_in_sel(&self) -> FUNC191_IN_SEL_R { - FUNC191_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func191_in_inv_sel(&self) -> FUNC191_IN_INV_SEL_R { - FUNC191_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig191_in_sel(&self) -> SIG191_IN_SEL_R { - SIG191_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC191_IN_SEL_CFG") - .field( - "func191_in_sel", - &format_args!("{}", self.func191_in_sel().bits()), - ) - .field( - "func191_in_inv_sel", - &format_args!("{}", self.func191_in_inv_sel().bit()), - ) - .field( - "sig191_in_sel", - &format_args!("{}", self.sig191_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func191_in_sel(&mut self) -> FUNC191_IN_SEL_W { - FUNC191_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func191_in_inv_sel(&mut self) -> FUNC191_IN_INV_SEL_W { - FUNC191_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig191_in_sel(&mut self) -> SIG191_IN_SEL_W { - SIG191_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func191_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func191_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC191_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC191_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func191_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC191_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func191_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC191_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC191_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC191_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func192_in_sel_cfg.rs b/esp32p4/src/gpio/func192_in_sel_cfg.rs deleted file mode 100644 index d4183206d3..0000000000 --- a/esp32p4/src/gpio/func192_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC192_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC192_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC192_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC192_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC192_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC192_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC192_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC192_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC192_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC192_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG192_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG192_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG192_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG192_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func192_in_sel(&self) -> FUNC192_IN_SEL_R { - FUNC192_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func192_in_inv_sel(&self) -> FUNC192_IN_INV_SEL_R { - FUNC192_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig192_in_sel(&self) -> SIG192_IN_SEL_R { - SIG192_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC192_IN_SEL_CFG") - .field( - "func192_in_sel", - &format_args!("{}", self.func192_in_sel().bits()), - ) - .field( - "func192_in_inv_sel", - &format_args!("{}", self.func192_in_inv_sel().bit()), - ) - .field( - "sig192_in_sel", - &format_args!("{}", self.sig192_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func192_in_sel(&mut self) -> FUNC192_IN_SEL_W { - FUNC192_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func192_in_inv_sel(&mut self) -> FUNC192_IN_INV_SEL_W { - FUNC192_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig192_in_sel(&mut self) -> SIG192_IN_SEL_W { - SIG192_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func192_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func192_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC192_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC192_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func192_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC192_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func192_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC192_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC192_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC192_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func193_in_sel_cfg.rs b/esp32p4/src/gpio/func193_in_sel_cfg.rs deleted file mode 100644 index b448efd131..0000000000 --- a/esp32p4/src/gpio/func193_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC193_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC193_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC193_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC193_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC193_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC193_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC193_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC193_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC193_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC193_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG193_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG193_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG193_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG193_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func193_in_sel(&self) -> FUNC193_IN_SEL_R { - FUNC193_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func193_in_inv_sel(&self) -> FUNC193_IN_INV_SEL_R { - FUNC193_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig193_in_sel(&self) -> SIG193_IN_SEL_R { - SIG193_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC193_IN_SEL_CFG") - .field( - "func193_in_sel", - &format_args!("{}", self.func193_in_sel().bits()), - ) - .field( - "func193_in_inv_sel", - &format_args!("{}", self.func193_in_inv_sel().bit()), - ) - .field( - "sig193_in_sel", - &format_args!("{}", self.sig193_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func193_in_sel(&mut self) -> FUNC193_IN_SEL_W { - FUNC193_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func193_in_inv_sel(&mut self) -> FUNC193_IN_INV_SEL_W { - FUNC193_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig193_in_sel(&mut self) -> SIG193_IN_SEL_W { - SIG193_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func193_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func193_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC193_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC193_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func193_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC193_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func193_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC193_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC193_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC193_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func194_in_sel_cfg.rs b/esp32p4/src/gpio/func194_in_sel_cfg.rs deleted file mode 100644 index 6f064ba8b1..0000000000 --- a/esp32p4/src/gpio/func194_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC194_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC194_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC194_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC194_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC194_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC194_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC194_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC194_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC194_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC194_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG194_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG194_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG194_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG194_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func194_in_sel(&self) -> FUNC194_IN_SEL_R { - FUNC194_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func194_in_inv_sel(&self) -> FUNC194_IN_INV_SEL_R { - FUNC194_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig194_in_sel(&self) -> SIG194_IN_SEL_R { - SIG194_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC194_IN_SEL_CFG") - .field( - "func194_in_sel", - &format_args!("{}", self.func194_in_sel().bits()), - ) - .field( - "func194_in_inv_sel", - &format_args!("{}", self.func194_in_inv_sel().bit()), - ) - .field( - "sig194_in_sel", - &format_args!("{}", self.sig194_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func194_in_sel(&mut self) -> FUNC194_IN_SEL_W { - FUNC194_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func194_in_inv_sel(&mut self) -> FUNC194_IN_INV_SEL_W { - FUNC194_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig194_in_sel(&mut self) -> SIG194_IN_SEL_W { - SIG194_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func194_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func194_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC194_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC194_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func194_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC194_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func194_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC194_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC194_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC194_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func195_in_sel_cfg.rs b/esp32p4/src/gpio/func195_in_sel_cfg.rs deleted file mode 100644 index 2a7c157ff0..0000000000 --- a/esp32p4/src/gpio/func195_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC195_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC195_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC195_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC195_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC195_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC195_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC195_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC195_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC195_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC195_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG195_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG195_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG195_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG195_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func195_in_sel(&self) -> FUNC195_IN_SEL_R { - FUNC195_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func195_in_inv_sel(&self) -> FUNC195_IN_INV_SEL_R { - FUNC195_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig195_in_sel(&self) -> SIG195_IN_SEL_R { - SIG195_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC195_IN_SEL_CFG") - .field( - "func195_in_sel", - &format_args!("{}", self.func195_in_sel().bits()), - ) - .field( - "func195_in_inv_sel", - &format_args!("{}", self.func195_in_inv_sel().bit()), - ) - .field( - "sig195_in_sel", - &format_args!("{}", self.sig195_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func195_in_sel(&mut self) -> FUNC195_IN_SEL_W { - FUNC195_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func195_in_inv_sel(&mut self) -> FUNC195_IN_INV_SEL_W { - FUNC195_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig195_in_sel(&mut self) -> SIG195_IN_SEL_W { - SIG195_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func195_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func195_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC195_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC195_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func195_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC195_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func195_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC195_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC195_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC195_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func196_in_sel_cfg.rs b/esp32p4/src/gpio/func196_in_sel_cfg.rs deleted file mode 100644 index f046b9e506..0000000000 --- a/esp32p4/src/gpio/func196_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC196_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC196_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC196_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC196_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC196_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC196_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC196_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC196_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC196_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC196_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG196_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG196_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG196_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG196_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func196_in_sel(&self) -> FUNC196_IN_SEL_R { - FUNC196_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func196_in_inv_sel(&self) -> FUNC196_IN_INV_SEL_R { - FUNC196_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig196_in_sel(&self) -> SIG196_IN_SEL_R { - SIG196_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC196_IN_SEL_CFG") - .field( - "func196_in_sel", - &format_args!("{}", self.func196_in_sel().bits()), - ) - .field( - "func196_in_inv_sel", - &format_args!("{}", self.func196_in_inv_sel().bit()), - ) - .field( - "sig196_in_sel", - &format_args!("{}", self.sig196_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func196_in_sel(&mut self) -> FUNC196_IN_SEL_W { - FUNC196_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func196_in_inv_sel(&mut self) -> FUNC196_IN_INV_SEL_W { - FUNC196_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig196_in_sel(&mut self) -> SIG196_IN_SEL_W { - SIG196_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func196_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func196_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC196_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC196_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func196_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC196_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func196_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC196_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC196_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC196_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func197_in_sel_cfg.rs b/esp32p4/src/gpio/func197_in_sel_cfg.rs deleted file mode 100644 index 52bbbccbd0..0000000000 --- a/esp32p4/src/gpio/func197_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC197_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC197_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC197_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC197_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC197_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC197_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC197_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC197_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC197_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC197_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG197_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG197_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG197_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG197_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func197_in_sel(&self) -> FUNC197_IN_SEL_R { - FUNC197_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func197_in_inv_sel(&self) -> FUNC197_IN_INV_SEL_R { - FUNC197_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig197_in_sel(&self) -> SIG197_IN_SEL_R { - SIG197_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC197_IN_SEL_CFG") - .field( - "func197_in_sel", - &format_args!("{}", self.func197_in_sel().bits()), - ) - .field( - "func197_in_inv_sel", - &format_args!("{}", self.func197_in_inv_sel().bit()), - ) - .field( - "sig197_in_sel", - &format_args!("{}", self.sig197_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func197_in_sel(&mut self) -> FUNC197_IN_SEL_W { - FUNC197_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func197_in_inv_sel(&mut self) -> FUNC197_IN_INV_SEL_W { - FUNC197_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig197_in_sel(&mut self) -> SIG197_IN_SEL_W { - SIG197_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func197_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func197_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC197_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC197_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func197_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC197_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func197_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC197_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC197_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC197_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func198_in_sel_cfg.rs b/esp32p4/src/gpio/func198_in_sel_cfg.rs deleted file mode 100644 index 78b7fec4f6..0000000000 --- a/esp32p4/src/gpio/func198_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC198_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC198_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC198_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC198_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC198_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC198_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC198_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC198_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC198_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC198_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG198_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG198_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG198_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG198_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func198_in_sel(&self) -> FUNC198_IN_SEL_R { - FUNC198_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func198_in_inv_sel(&self) -> FUNC198_IN_INV_SEL_R { - FUNC198_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig198_in_sel(&self) -> SIG198_IN_SEL_R { - SIG198_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC198_IN_SEL_CFG") - .field( - "func198_in_sel", - &format_args!("{}", self.func198_in_sel().bits()), - ) - .field( - "func198_in_inv_sel", - &format_args!("{}", self.func198_in_inv_sel().bit()), - ) - .field( - "sig198_in_sel", - &format_args!("{}", self.sig198_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func198_in_sel(&mut self) -> FUNC198_IN_SEL_W { - FUNC198_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func198_in_inv_sel(&mut self) -> FUNC198_IN_INV_SEL_W { - FUNC198_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig198_in_sel(&mut self) -> SIG198_IN_SEL_W { - SIG198_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func198_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func198_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC198_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC198_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func198_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC198_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func198_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC198_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC198_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC198_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func199_in_sel_cfg.rs b/esp32p4/src/gpio/func199_in_sel_cfg.rs deleted file mode 100644 index c215e59da2..0000000000 --- a/esp32p4/src/gpio/func199_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC199_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC199_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC199_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC199_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC199_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC199_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC199_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC199_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC199_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC199_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG199_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG199_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG199_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG199_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func199_in_sel(&self) -> FUNC199_IN_SEL_R { - FUNC199_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func199_in_inv_sel(&self) -> FUNC199_IN_INV_SEL_R { - FUNC199_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig199_in_sel(&self) -> SIG199_IN_SEL_R { - SIG199_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC199_IN_SEL_CFG") - .field( - "func199_in_sel", - &format_args!("{}", self.func199_in_sel().bits()), - ) - .field( - "func199_in_inv_sel", - &format_args!("{}", self.func199_in_inv_sel().bit()), - ) - .field( - "sig199_in_sel", - &format_args!("{}", self.sig199_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func199_in_sel(&mut self) -> FUNC199_IN_SEL_W { - FUNC199_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func199_in_inv_sel(&mut self) -> FUNC199_IN_INV_SEL_W { - FUNC199_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig199_in_sel(&mut self) -> SIG199_IN_SEL_W { - SIG199_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func199_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func199_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC199_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC199_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func199_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC199_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func199_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC199_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC199_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC199_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func19_in_sel_cfg.rs b/esp32p4/src/gpio/func19_in_sel_cfg.rs deleted file mode 100644 index 5ae2bcec14..0000000000 --- a/esp32p4/src/gpio/func19_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC19_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC19_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC19_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC19_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC19_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC19_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC19_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC19_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC19_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC19_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG19_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG19_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG19_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG19_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func19_in_sel(&self) -> FUNC19_IN_SEL_R { - FUNC19_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func19_in_inv_sel(&self) -> FUNC19_IN_INV_SEL_R { - FUNC19_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig19_in_sel(&self) -> SIG19_IN_SEL_R { - SIG19_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC19_IN_SEL_CFG") - .field( - "func19_in_sel", - &format_args!("{}", self.func19_in_sel().bits()), - ) - .field( - "func19_in_inv_sel", - &format_args!("{}", self.func19_in_inv_sel().bit()), - ) - .field( - "sig19_in_sel", - &format_args!("{}", self.sig19_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func19_in_sel(&mut self) -> FUNC19_IN_SEL_W { - FUNC19_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func19_in_inv_sel(&mut self) -> FUNC19_IN_INV_SEL_W { - FUNC19_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig19_in_sel(&mut self) -> SIG19_IN_SEL_W { - SIG19_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func19_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func19_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC19_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC19_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func19_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC19_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func19_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC19_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC19_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC19_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func1_in_sel_cfg.rs b/esp32p4/src/gpio/func1_in_sel_cfg.rs deleted file mode 100644 index 969d01eae1..0000000000 --- a/esp32p4/src/gpio/func1_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC1_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC1_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC1_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC1_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC1_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC1_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC1_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC1_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC1_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC1_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG1_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG1_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG1_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG1_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func1_in_sel(&self) -> FUNC1_IN_SEL_R { - FUNC1_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func1_in_inv_sel(&self) -> FUNC1_IN_INV_SEL_R { - FUNC1_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig1_in_sel(&self) -> SIG1_IN_SEL_R { - SIG1_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC1_IN_SEL_CFG") - .field( - "func1_in_sel", - &format_args!("{}", self.func1_in_sel().bits()), - ) - .field( - "func1_in_inv_sel", - &format_args!("{}", self.func1_in_inv_sel().bit()), - ) - .field("sig1_in_sel", &format_args!("{}", self.sig1_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func1_in_sel(&mut self) -> FUNC1_IN_SEL_W { - FUNC1_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func1_in_inv_sel(&mut self) -> FUNC1_IN_INV_SEL_W { - FUNC1_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig1_in_sel(&mut self) -> SIG1_IN_SEL_W { - SIG1_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func1_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func1_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC1_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC1_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func1_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC1_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func1_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC1_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC1_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC1_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func200_in_sel_cfg.rs b/esp32p4/src/gpio/func200_in_sel_cfg.rs deleted file mode 100644 index ef83786791..0000000000 --- a/esp32p4/src/gpio/func200_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC200_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC200_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC200_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC200_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC200_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC200_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC200_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC200_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC200_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC200_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG200_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG200_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG200_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG200_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func200_in_sel(&self) -> FUNC200_IN_SEL_R { - FUNC200_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func200_in_inv_sel(&self) -> FUNC200_IN_INV_SEL_R { - FUNC200_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig200_in_sel(&self) -> SIG200_IN_SEL_R { - SIG200_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC200_IN_SEL_CFG") - .field( - "func200_in_sel", - &format_args!("{}", self.func200_in_sel().bits()), - ) - .field( - "func200_in_inv_sel", - &format_args!("{}", self.func200_in_inv_sel().bit()), - ) - .field( - "sig200_in_sel", - &format_args!("{}", self.sig200_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func200_in_sel(&mut self) -> FUNC200_IN_SEL_W { - FUNC200_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func200_in_inv_sel(&mut self) -> FUNC200_IN_INV_SEL_W { - FUNC200_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig200_in_sel(&mut self) -> SIG200_IN_SEL_W { - SIG200_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func200_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func200_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC200_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC200_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func200_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC200_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func200_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC200_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC200_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC200_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func201_in_sel_cfg.rs b/esp32p4/src/gpio/func201_in_sel_cfg.rs deleted file mode 100644 index f5299ea5ad..0000000000 --- a/esp32p4/src/gpio/func201_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC201_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC201_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC201_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC201_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC201_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC201_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC201_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC201_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC201_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC201_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG201_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG201_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG201_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG201_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func201_in_sel(&self) -> FUNC201_IN_SEL_R { - FUNC201_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func201_in_inv_sel(&self) -> FUNC201_IN_INV_SEL_R { - FUNC201_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig201_in_sel(&self) -> SIG201_IN_SEL_R { - SIG201_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC201_IN_SEL_CFG") - .field( - "func201_in_sel", - &format_args!("{}", self.func201_in_sel().bits()), - ) - .field( - "func201_in_inv_sel", - &format_args!("{}", self.func201_in_inv_sel().bit()), - ) - .field( - "sig201_in_sel", - &format_args!("{}", self.sig201_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func201_in_sel(&mut self) -> FUNC201_IN_SEL_W { - FUNC201_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func201_in_inv_sel(&mut self) -> FUNC201_IN_INV_SEL_W { - FUNC201_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig201_in_sel(&mut self) -> SIG201_IN_SEL_W { - SIG201_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func201_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func201_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC201_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC201_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func201_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC201_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func201_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC201_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC201_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC201_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func202_in_sel_cfg.rs b/esp32p4/src/gpio/func202_in_sel_cfg.rs deleted file mode 100644 index bfa474bb34..0000000000 --- a/esp32p4/src/gpio/func202_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC202_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC202_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC202_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC202_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC202_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC202_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC202_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC202_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC202_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC202_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG202_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG202_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG202_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG202_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func202_in_sel(&self) -> FUNC202_IN_SEL_R { - FUNC202_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func202_in_inv_sel(&self) -> FUNC202_IN_INV_SEL_R { - FUNC202_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig202_in_sel(&self) -> SIG202_IN_SEL_R { - SIG202_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC202_IN_SEL_CFG") - .field( - "func202_in_sel", - &format_args!("{}", self.func202_in_sel().bits()), - ) - .field( - "func202_in_inv_sel", - &format_args!("{}", self.func202_in_inv_sel().bit()), - ) - .field( - "sig202_in_sel", - &format_args!("{}", self.sig202_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func202_in_sel(&mut self) -> FUNC202_IN_SEL_W { - FUNC202_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func202_in_inv_sel(&mut self) -> FUNC202_IN_INV_SEL_W { - FUNC202_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig202_in_sel(&mut self) -> SIG202_IN_SEL_W { - SIG202_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func202_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func202_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC202_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC202_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func202_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC202_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func202_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC202_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC202_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC202_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func203_in_sel_cfg.rs b/esp32p4/src/gpio/func203_in_sel_cfg.rs deleted file mode 100644 index 5118935ba6..0000000000 --- a/esp32p4/src/gpio/func203_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC203_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC203_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC203_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC203_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC203_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC203_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC203_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC203_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC203_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC203_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG203_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG203_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG203_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG203_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func203_in_sel(&self) -> FUNC203_IN_SEL_R { - FUNC203_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func203_in_inv_sel(&self) -> FUNC203_IN_INV_SEL_R { - FUNC203_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig203_in_sel(&self) -> SIG203_IN_SEL_R { - SIG203_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC203_IN_SEL_CFG") - .field( - "func203_in_sel", - &format_args!("{}", self.func203_in_sel().bits()), - ) - .field( - "func203_in_inv_sel", - &format_args!("{}", self.func203_in_inv_sel().bit()), - ) - .field( - "sig203_in_sel", - &format_args!("{}", self.sig203_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func203_in_sel(&mut self) -> FUNC203_IN_SEL_W { - FUNC203_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func203_in_inv_sel(&mut self) -> FUNC203_IN_INV_SEL_W { - FUNC203_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig203_in_sel(&mut self) -> SIG203_IN_SEL_W { - SIG203_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func203_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func203_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC203_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC203_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func203_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC203_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func203_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC203_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC203_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC203_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func20_in_sel_cfg.rs b/esp32p4/src/gpio/func20_in_sel_cfg.rs deleted file mode 100644 index 8cf0306254..0000000000 --- a/esp32p4/src/gpio/func20_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC20_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC20_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC20_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC20_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC20_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC20_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC20_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC20_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC20_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC20_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG20_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG20_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG20_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG20_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func20_in_sel(&self) -> FUNC20_IN_SEL_R { - FUNC20_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func20_in_inv_sel(&self) -> FUNC20_IN_INV_SEL_R { - FUNC20_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig20_in_sel(&self) -> SIG20_IN_SEL_R { - SIG20_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC20_IN_SEL_CFG") - .field( - "func20_in_sel", - &format_args!("{}", self.func20_in_sel().bits()), - ) - .field( - "func20_in_inv_sel", - &format_args!("{}", self.func20_in_inv_sel().bit()), - ) - .field( - "sig20_in_sel", - &format_args!("{}", self.sig20_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func20_in_sel(&mut self) -> FUNC20_IN_SEL_W { - FUNC20_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func20_in_inv_sel(&mut self) -> FUNC20_IN_INV_SEL_W { - FUNC20_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig20_in_sel(&mut self) -> SIG20_IN_SEL_W { - SIG20_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func20_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func20_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC20_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC20_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func20_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC20_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func20_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC20_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC20_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC20_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func214_in_sel_cfg.rs b/esp32p4/src/gpio/func214_in_sel_cfg.rs deleted file mode 100644 index 6fb1238b82..0000000000 --- a/esp32p4/src/gpio/func214_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC214_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC214_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC214_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC214_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC214_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC214_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC214_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC214_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC214_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC214_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG214_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG214_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG214_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG214_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func214_in_sel(&self) -> FUNC214_IN_SEL_R { - FUNC214_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func214_in_inv_sel(&self) -> FUNC214_IN_INV_SEL_R { - FUNC214_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig214_in_sel(&self) -> SIG214_IN_SEL_R { - SIG214_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC214_IN_SEL_CFG") - .field( - "func214_in_sel", - &format_args!("{}", self.func214_in_sel().bits()), - ) - .field( - "func214_in_inv_sel", - &format_args!("{}", self.func214_in_inv_sel().bit()), - ) - .field( - "sig214_in_sel", - &format_args!("{}", self.sig214_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func214_in_sel(&mut self) -> FUNC214_IN_SEL_W { - FUNC214_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func214_in_inv_sel(&mut self) -> FUNC214_IN_INV_SEL_W { - FUNC214_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig214_in_sel(&mut self) -> SIG214_IN_SEL_W { - SIG214_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func214_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func214_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC214_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC214_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func214_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC214_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func214_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC214_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC214_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC214_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func215_in_sel_cfg.rs b/esp32p4/src/gpio/func215_in_sel_cfg.rs deleted file mode 100644 index 2eac2c9909..0000000000 --- a/esp32p4/src/gpio/func215_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC215_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC215_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC215_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC215_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC215_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC215_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC215_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC215_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC215_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC215_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG215_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG215_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG215_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG215_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func215_in_sel(&self) -> FUNC215_IN_SEL_R { - FUNC215_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func215_in_inv_sel(&self) -> FUNC215_IN_INV_SEL_R { - FUNC215_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig215_in_sel(&self) -> SIG215_IN_SEL_R { - SIG215_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC215_IN_SEL_CFG") - .field( - "func215_in_sel", - &format_args!("{}", self.func215_in_sel().bits()), - ) - .field( - "func215_in_inv_sel", - &format_args!("{}", self.func215_in_inv_sel().bit()), - ) - .field( - "sig215_in_sel", - &format_args!("{}", self.sig215_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func215_in_sel(&mut self) -> FUNC215_IN_SEL_W { - FUNC215_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func215_in_inv_sel(&mut self) -> FUNC215_IN_INV_SEL_W { - FUNC215_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig215_in_sel(&mut self) -> SIG215_IN_SEL_W { - SIG215_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func215_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func215_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC215_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC215_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func215_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC215_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func215_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC215_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC215_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC215_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func216_in_sel_cfg.rs b/esp32p4/src/gpio/func216_in_sel_cfg.rs deleted file mode 100644 index 71bd28bc64..0000000000 --- a/esp32p4/src/gpio/func216_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC216_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC216_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC216_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC216_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC216_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC216_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC216_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC216_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC216_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC216_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG216_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG216_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG216_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG216_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func216_in_sel(&self) -> FUNC216_IN_SEL_R { - FUNC216_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func216_in_inv_sel(&self) -> FUNC216_IN_INV_SEL_R { - FUNC216_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig216_in_sel(&self) -> SIG216_IN_SEL_R { - SIG216_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC216_IN_SEL_CFG") - .field( - "func216_in_sel", - &format_args!("{}", self.func216_in_sel().bits()), - ) - .field( - "func216_in_inv_sel", - &format_args!("{}", self.func216_in_inv_sel().bit()), - ) - .field( - "sig216_in_sel", - &format_args!("{}", self.sig216_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func216_in_sel(&mut self) -> FUNC216_IN_SEL_W { - FUNC216_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func216_in_inv_sel(&mut self) -> FUNC216_IN_INV_SEL_W { - FUNC216_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig216_in_sel(&mut self) -> SIG216_IN_SEL_W { - SIG216_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func216_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func216_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC216_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC216_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func216_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC216_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func216_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC216_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC216_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC216_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func217_in_sel_cfg.rs b/esp32p4/src/gpio/func217_in_sel_cfg.rs deleted file mode 100644 index 4be80c8f1a..0000000000 --- a/esp32p4/src/gpio/func217_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC217_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC217_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC217_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC217_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC217_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC217_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC217_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC217_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC217_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC217_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG217_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG217_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG217_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG217_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func217_in_sel(&self) -> FUNC217_IN_SEL_R { - FUNC217_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func217_in_inv_sel(&self) -> FUNC217_IN_INV_SEL_R { - FUNC217_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig217_in_sel(&self) -> SIG217_IN_SEL_R { - SIG217_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC217_IN_SEL_CFG") - .field( - "func217_in_sel", - &format_args!("{}", self.func217_in_sel().bits()), - ) - .field( - "func217_in_inv_sel", - &format_args!("{}", self.func217_in_inv_sel().bit()), - ) - .field( - "sig217_in_sel", - &format_args!("{}", self.sig217_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func217_in_sel(&mut self) -> FUNC217_IN_SEL_W { - FUNC217_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func217_in_inv_sel(&mut self) -> FUNC217_IN_INV_SEL_W { - FUNC217_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig217_in_sel(&mut self) -> SIG217_IN_SEL_W { - SIG217_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func217_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func217_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC217_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC217_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func217_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC217_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func217_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC217_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC217_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC217_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func218_in_sel_cfg.rs b/esp32p4/src/gpio/func218_in_sel_cfg.rs deleted file mode 100644 index dfee6debf8..0000000000 --- a/esp32p4/src/gpio/func218_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC218_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC218_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC218_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC218_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC218_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC218_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC218_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC218_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC218_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC218_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG218_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG218_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG218_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG218_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func218_in_sel(&self) -> FUNC218_IN_SEL_R { - FUNC218_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func218_in_inv_sel(&self) -> FUNC218_IN_INV_SEL_R { - FUNC218_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig218_in_sel(&self) -> SIG218_IN_SEL_R { - SIG218_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC218_IN_SEL_CFG") - .field( - "func218_in_sel", - &format_args!("{}", self.func218_in_sel().bits()), - ) - .field( - "func218_in_inv_sel", - &format_args!("{}", self.func218_in_inv_sel().bit()), - ) - .field( - "sig218_in_sel", - &format_args!("{}", self.sig218_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func218_in_sel(&mut self) -> FUNC218_IN_SEL_W { - FUNC218_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func218_in_inv_sel(&mut self) -> FUNC218_IN_INV_SEL_W { - FUNC218_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig218_in_sel(&mut self) -> SIG218_IN_SEL_W { - SIG218_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func218_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func218_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC218_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC218_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func218_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC218_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func218_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC218_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC218_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC218_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func219_in_sel_cfg.rs b/esp32p4/src/gpio/func219_in_sel_cfg.rs deleted file mode 100644 index 8f76f89f71..0000000000 --- a/esp32p4/src/gpio/func219_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC219_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC219_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC219_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC219_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC219_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC219_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC219_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC219_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC219_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC219_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG219_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG219_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG219_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG219_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func219_in_sel(&self) -> FUNC219_IN_SEL_R { - FUNC219_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func219_in_inv_sel(&self) -> FUNC219_IN_INV_SEL_R { - FUNC219_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig219_in_sel(&self) -> SIG219_IN_SEL_R { - SIG219_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC219_IN_SEL_CFG") - .field( - "func219_in_sel", - &format_args!("{}", self.func219_in_sel().bits()), - ) - .field( - "func219_in_inv_sel", - &format_args!("{}", self.func219_in_inv_sel().bit()), - ) - .field( - "sig219_in_sel", - &format_args!("{}", self.sig219_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func219_in_sel(&mut self) -> FUNC219_IN_SEL_W { - FUNC219_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func219_in_inv_sel(&mut self) -> FUNC219_IN_INV_SEL_W { - FUNC219_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig219_in_sel(&mut self) -> SIG219_IN_SEL_W { - SIG219_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func219_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func219_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC219_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC219_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func219_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC219_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func219_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC219_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC219_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC219_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func21_in_sel_cfg.rs b/esp32p4/src/gpio/func21_in_sel_cfg.rs deleted file mode 100644 index 89597fdcf7..0000000000 --- a/esp32p4/src/gpio/func21_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC21_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC21_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC21_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC21_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC21_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC21_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC21_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC21_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC21_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC21_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG21_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG21_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG21_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG21_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func21_in_sel(&self) -> FUNC21_IN_SEL_R { - FUNC21_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func21_in_inv_sel(&self) -> FUNC21_IN_INV_SEL_R { - FUNC21_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig21_in_sel(&self) -> SIG21_IN_SEL_R { - SIG21_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC21_IN_SEL_CFG") - .field( - "func21_in_sel", - &format_args!("{}", self.func21_in_sel().bits()), - ) - .field( - "func21_in_inv_sel", - &format_args!("{}", self.func21_in_inv_sel().bit()), - ) - .field( - "sig21_in_sel", - &format_args!("{}", self.sig21_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func21_in_sel(&mut self) -> FUNC21_IN_SEL_W { - FUNC21_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func21_in_inv_sel(&mut self) -> FUNC21_IN_INV_SEL_W { - FUNC21_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig21_in_sel(&mut self) -> SIG21_IN_SEL_W { - SIG21_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func21_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func21_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC21_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC21_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func21_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC21_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func21_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC21_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC21_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC21_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func220_in_sel_cfg.rs b/esp32p4/src/gpio/func220_in_sel_cfg.rs deleted file mode 100644 index 3e49bf0e38..0000000000 --- a/esp32p4/src/gpio/func220_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC220_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC220_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC220_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC220_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC220_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC220_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC220_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC220_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC220_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC220_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG220_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG220_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG220_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG220_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func220_in_sel(&self) -> FUNC220_IN_SEL_R { - FUNC220_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func220_in_inv_sel(&self) -> FUNC220_IN_INV_SEL_R { - FUNC220_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig220_in_sel(&self) -> SIG220_IN_SEL_R { - SIG220_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC220_IN_SEL_CFG") - .field( - "func220_in_sel", - &format_args!("{}", self.func220_in_sel().bits()), - ) - .field( - "func220_in_inv_sel", - &format_args!("{}", self.func220_in_inv_sel().bit()), - ) - .field( - "sig220_in_sel", - &format_args!("{}", self.sig220_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func220_in_sel(&mut self) -> FUNC220_IN_SEL_W { - FUNC220_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func220_in_inv_sel(&mut self) -> FUNC220_IN_INV_SEL_W { - FUNC220_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig220_in_sel(&mut self) -> SIG220_IN_SEL_W { - SIG220_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func220_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func220_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC220_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC220_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func220_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC220_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func220_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC220_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC220_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC220_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func221_in_sel_cfg.rs b/esp32p4/src/gpio/func221_in_sel_cfg.rs deleted file mode 100644 index c5c8849a42..0000000000 --- a/esp32p4/src/gpio/func221_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC221_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC221_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC221_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC221_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC221_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC221_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC221_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC221_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC221_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC221_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG221_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG221_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG221_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG221_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func221_in_sel(&self) -> FUNC221_IN_SEL_R { - FUNC221_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func221_in_inv_sel(&self) -> FUNC221_IN_INV_SEL_R { - FUNC221_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig221_in_sel(&self) -> SIG221_IN_SEL_R { - SIG221_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC221_IN_SEL_CFG") - .field( - "func221_in_sel", - &format_args!("{}", self.func221_in_sel().bits()), - ) - .field( - "func221_in_inv_sel", - &format_args!("{}", self.func221_in_inv_sel().bit()), - ) - .field( - "sig221_in_sel", - &format_args!("{}", self.sig221_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func221_in_sel(&mut self) -> FUNC221_IN_SEL_W { - FUNC221_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func221_in_inv_sel(&mut self) -> FUNC221_IN_INV_SEL_W { - FUNC221_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig221_in_sel(&mut self) -> SIG221_IN_SEL_W { - SIG221_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func221_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func221_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC221_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC221_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func221_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC221_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func221_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC221_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC221_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC221_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func222_in_sel_cfg.rs b/esp32p4/src/gpio/func222_in_sel_cfg.rs deleted file mode 100644 index c365ef1f9a..0000000000 --- a/esp32p4/src/gpio/func222_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC222_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC222_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC222_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC222_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC222_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC222_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC222_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC222_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC222_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC222_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG222_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG222_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG222_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG222_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func222_in_sel(&self) -> FUNC222_IN_SEL_R { - FUNC222_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func222_in_inv_sel(&self) -> FUNC222_IN_INV_SEL_R { - FUNC222_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig222_in_sel(&self) -> SIG222_IN_SEL_R { - SIG222_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC222_IN_SEL_CFG") - .field( - "func222_in_sel", - &format_args!("{}", self.func222_in_sel().bits()), - ) - .field( - "func222_in_inv_sel", - &format_args!("{}", self.func222_in_inv_sel().bit()), - ) - .field( - "sig222_in_sel", - &format_args!("{}", self.sig222_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func222_in_sel(&mut self) -> FUNC222_IN_SEL_W { - FUNC222_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func222_in_inv_sel(&mut self) -> FUNC222_IN_INV_SEL_W { - FUNC222_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig222_in_sel(&mut self) -> SIG222_IN_SEL_W { - SIG222_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func222_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func222_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC222_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC222_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func222_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC222_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func222_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC222_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC222_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC222_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func223_in_sel_cfg.rs b/esp32p4/src/gpio/func223_in_sel_cfg.rs deleted file mode 100644 index 52c4a9182c..0000000000 --- a/esp32p4/src/gpio/func223_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC223_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC223_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC223_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC223_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC223_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC223_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC223_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC223_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC223_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC223_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG223_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG223_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG223_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG223_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func223_in_sel(&self) -> FUNC223_IN_SEL_R { - FUNC223_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func223_in_inv_sel(&self) -> FUNC223_IN_INV_SEL_R { - FUNC223_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig223_in_sel(&self) -> SIG223_IN_SEL_R { - SIG223_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC223_IN_SEL_CFG") - .field( - "func223_in_sel", - &format_args!("{}", self.func223_in_sel().bits()), - ) - .field( - "func223_in_inv_sel", - &format_args!("{}", self.func223_in_inv_sel().bit()), - ) - .field( - "sig223_in_sel", - &format_args!("{}", self.sig223_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func223_in_sel(&mut self) -> FUNC223_IN_SEL_W { - FUNC223_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func223_in_inv_sel(&mut self) -> FUNC223_IN_INV_SEL_W { - FUNC223_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig223_in_sel(&mut self) -> SIG223_IN_SEL_W { - SIG223_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func223_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func223_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC223_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC223_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func223_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC223_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func223_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC223_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC223_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC223_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func224_in_sel_cfg.rs b/esp32p4/src/gpio/func224_in_sel_cfg.rs deleted file mode 100644 index b2761a79ad..0000000000 --- a/esp32p4/src/gpio/func224_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC224_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC224_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC224_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC224_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC224_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC224_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC224_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC224_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC224_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC224_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG224_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG224_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG224_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG224_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func224_in_sel(&self) -> FUNC224_IN_SEL_R { - FUNC224_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func224_in_inv_sel(&self) -> FUNC224_IN_INV_SEL_R { - FUNC224_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig224_in_sel(&self) -> SIG224_IN_SEL_R { - SIG224_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC224_IN_SEL_CFG") - .field( - "func224_in_sel", - &format_args!("{}", self.func224_in_sel().bits()), - ) - .field( - "func224_in_inv_sel", - &format_args!("{}", self.func224_in_inv_sel().bit()), - ) - .field( - "sig224_in_sel", - &format_args!("{}", self.sig224_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func224_in_sel(&mut self) -> FUNC224_IN_SEL_W { - FUNC224_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func224_in_inv_sel(&mut self) -> FUNC224_IN_INV_SEL_W { - FUNC224_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig224_in_sel(&mut self) -> SIG224_IN_SEL_W { - SIG224_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func224_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func224_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC224_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC224_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func224_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC224_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func224_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC224_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC224_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC224_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func225_in_sel_cfg.rs b/esp32p4/src/gpio/func225_in_sel_cfg.rs deleted file mode 100644 index 895933ed1d..0000000000 --- a/esp32p4/src/gpio/func225_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC225_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC225_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC225_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC225_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC225_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC225_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC225_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC225_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC225_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC225_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG225_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG225_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG225_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG225_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func225_in_sel(&self) -> FUNC225_IN_SEL_R { - FUNC225_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func225_in_inv_sel(&self) -> FUNC225_IN_INV_SEL_R { - FUNC225_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig225_in_sel(&self) -> SIG225_IN_SEL_R { - SIG225_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC225_IN_SEL_CFG") - .field( - "func225_in_sel", - &format_args!("{}", self.func225_in_sel().bits()), - ) - .field( - "func225_in_inv_sel", - &format_args!("{}", self.func225_in_inv_sel().bit()), - ) - .field( - "sig225_in_sel", - &format_args!("{}", self.sig225_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func225_in_sel(&mut self) -> FUNC225_IN_SEL_W { - FUNC225_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func225_in_inv_sel(&mut self) -> FUNC225_IN_INV_SEL_W { - FUNC225_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig225_in_sel(&mut self) -> SIG225_IN_SEL_W { - SIG225_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func225_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func225_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC225_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC225_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func225_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC225_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func225_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC225_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC225_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC225_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func226_in_sel_cfg.rs b/esp32p4/src/gpio/func226_in_sel_cfg.rs deleted file mode 100644 index 77f46d2c70..0000000000 --- a/esp32p4/src/gpio/func226_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC226_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC226_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC226_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC226_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC226_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC226_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC226_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC226_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC226_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC226_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG226_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG226_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG226_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG226_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func226_in_sel(&self) -> FUNC226_IN_SEL_R { - FUNC226_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func226_in_inv_sel(&self) -> FUNC226_IN_INV_SEL_R { - FUNC226_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig226_in_sel(&self) -> SIG226_IN_SEL_R { - SIG226_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC226_IN_SEL_CFG") - .field( - "func226_in_sel", - &format_args!("{}", self.func226_in_sel().bits()), - ) - .field( - "func226_in_inv_sel", - &format_args!("{}", self.func226_in_inv_sel().bit()), - ) - .field( - "sig226_in_sel", - &format_args!("{}", self.sig226_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func226_in_sel(&mut self) -> FUNC226_IN_SEL_W { - FUNC226_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func226_in_inv_sel(&mut self) -> FUNC226_IN_INV_SEL_W { - FUNC226_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig226_in_sel(&mut self) -> SIG226_IN_SEL_W { - SIG226_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func226_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func226_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC226_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC226_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func226_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC226_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func226_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC226_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC226_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC226_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func227_in_sel_cfg.rs b/esp32p4/src/gpio/func227_in_sel_cfg.rs deleted file mode 100644 index 49849899ac..0000000000 --- a/esp32p4/src/gpio/func227_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC227_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC227_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC227_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC227_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC227_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC227_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC227_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC227_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC227_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC227_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG227_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG227_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG227_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG227_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func227_in_sel(&self) -> FUNC227_IN_SEL_R { - FUNC227_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func227_in_inv_sel(&self) -> FUNC227_IN_INV_SEL_R { - FUNC227_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig227_in_sel(&self) -> SIG227_IN_SEL_R { - SIG227_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC227_IN_SEL_CFG") - .field( - "func227_in_sel", - &format_args!("{}", self.func227_in_sel().bits()), - ) - .field( - "func227_in_inv_sel", - &format_args!("{}", self.func227_in_inv_sel().bit()), - ) - .field( - "sig227_in_sel", - &format_args!("{}", self.sig227_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func227_in_sel(&mut self) -> FUNC227_IN_SEL_W { - FUNC227_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func227_in_inv_sel(&mut self) -> FUNC227_IN_INV_SEL_W { - FUNC227_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig227_in_sel(&mut self) -> SIG227_IN_SEL_W { - SIG227_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func227_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func227_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC227_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC227_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func227_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC227_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func227_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC227_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC227_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC227_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func228_in_sel_cfg.rs b/esp32p4/src/gpio/func228_in_sel_cfg.rs deleted file mode 100644 index 0aa94c1d22..0000000000 --- a/esp32p4/src/gpio/func228_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC228_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC228_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC228_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC228_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC228_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC228_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC228_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC228_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC228_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC228_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG228_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG228_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG228_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG228_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func228_in_sel(&self) -> FUNC228_IN_SEL_R { - FUNC228_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func228_in_inv_sel(&self) -> FUNC228_IN_INV_SEL_R { - FUNC228_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig228_in_sel(&self) -> SIG228_IN_SEL_R { - SIG228_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC228_IN_SEL_CFG") - .field( - "func228_in_sel", - &format_args!("{}", self.func228_in_sel().bits()), - ) - .field( - "func228_in_inv_sel", - &format_args!("{}", self.func228_in_inv_sel().bit()), - ) - .field( - "sig228_in_sel", - &format_args!("{}", self.sig228_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func228_in_sel(&mut self) -> FUNC228_IN_SEL_W { - FUNC228_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func228_in_inv_sel(&mut self) -> FUNC228_IN_INV_SEL_W { - FUNC228_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig228_in_sel(&mut self) -> SIG228_IN_SEL_W { - SIG228_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func228_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func228_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC228_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC228_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func228_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC228_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func228_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC228_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC228_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC228_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func229_in_sel_cfg.rs b/esp32p4/src/gpio/func229_in_sel_cfg.rs deleted file mode 100644 index 5656afc583..0000000000 --- a/esp32p4/src/gpio/func229_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC229_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC229_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC229_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC229_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC229_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC229_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC229_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC229_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC229_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC229_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG229_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG229_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG229_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG229_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func229_in_sel(&self) -> FUNC229_IN_SEL_R { - FUNC229_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func229_in_inv_sel(&self) -> FUNC229_IN_INV_SEL_R { - FUNC229_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig229_in_sel(&self) -> SIG229_IN_SEL_R { - SIG229_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC229_IN_SEL_CFG") - .field( - "func229_in_sel", - &format_args!("{}", self.func229_in_sel().bits()), - ) - .field( - "func229_in_inv_sel", - &format_args!("{}", self.func229_in_inv_sel().bit()), - ) - .field( - "sig229_in_sel", - &format_args!("{}", self.sig229_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func229_in_sel(&mut self) -> FUNC229_IN_SEL_W { - FUNC229_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func229_in_inv_sel(&mut self) -> FUNC229_IN_INV_SEL_W { - FUNC229_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig229_in_sel(&mut self) -> SIG229_IN_SEL_W { - SIG229_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func229_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func229_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC229_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC229_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func229_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC229_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func229_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC229_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC229_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC229_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func22_in_sel_cfg.rs b/esp32p4/src/gpio/func22_in_sel_cfg.rs deleted file mode 100644 index b365f3c478..0000000000 --- a/esp32p4/src/gpio/func22_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC22_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC22_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC22_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC22_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC22_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC22_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC22_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC22_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC22_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC22_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG22_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG22_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG22_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG22_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func22_in_sel(&self) -> FUNC22_IN_SEL_R { - FUNC22_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func22_in_inv_sel(&self) -> FUNC22_IN_INV_SEL_R { - FUNC22_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig22_in_sel(&self) -> SIG22_IN_SEL_R { - SIG22_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC22_IN_SEL_CFG") - .field( - "func22_in_sel", - &format_args!("{}", self.func22_in_sel().bits()), - ) - .field( - "func22_in_inv_sel", - &format_args!("{}", self.func22_in_inv_sel().bit()), - ) - .field( - "sig22_in_sel", - &format_args!("{}", self.sig22_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func22_in_sel(&mut self) -> FUNC22_IN_SEL_W { - FUNC22_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func22_in_inv_sel(&mut self) -> FUNC22_IN_INV_SEL_W { - FUNC22_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig22_in_sel(&mut self) -> SIG22_IN_SEL_W { - SIG22_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func22_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func22_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC22_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC22_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func22_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC22_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func22_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC22_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC22_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC22_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func230_in_sel_cfg.rs b/esp32p4/src/gpio/func230_in_sel_cfg.rs deleted file mode 100644 index 50dc803223..0000000000 --- a/esp32p4/src/gpio/func230_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC230_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC230_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC230_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC230_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC230_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC230_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC230_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC230_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC230_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC230_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG230_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG230_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG230_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG230_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func230_in_sel(&self) -> FUNC230_IN_SEL_R { - FUNC230_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func230_in_inv_sel(&self) -> FUNC230_IN_INV_SEL_R { - FUNC230_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig230_in_sel(&self) -> SIG230_IN_SEL_R { - SIG230_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC230_IN_SEL_CFG") - .field( - "func230_in_sel", - &format_args!("{}", self.func230_in_sel().bits()), - ) - .field( - "func230_in_inv_sel", - &format_args!("{}", self.func230_in_inv_sel().bit()), - ) - .field( - "sig230_in_sel", - &format_args!("{}", self.sig230_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func230_in_sel(&mut self) -> FUNC230_IN_SEL_W { - FUNC230_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func230_in_inv_sel(&mut self) -> FUNC230_IN_INV_SEL_W { - FUNC230_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig230_in_sel(&mut self) -> SIG230_IN_SEL_W { - SIG230_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func230_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func230_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC230_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC230_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func230_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC230_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func230_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC230_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC230_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC230_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func231_in_sel_cfg.rs b/esp32p4/src/gpio/func231_in_sel_cfg.rs deleted file mode 100644 index 87a9a4a65d..0000000000 --- a/esp32p4/src/gpio/func231_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC231_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC231_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC231_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC231_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC231_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC231_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC231_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC231_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC231_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC231_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG231_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG231_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG231_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG231_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func231_in_sel(&self) -> FUNC231_IN_SEL_R { - FUNC231_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func231_in_inv_sel(&self) -> FUNC231_IN_INV_SEL_R { - FUNC231_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig231_in_sel(&self) -> SIG231_IN_SEL_R { - SIG231_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC231_IN_SEL_CFG") - .field( - "func231_in_sel", - &format_args!("{}", self.func231_in_sel().bits()), - ) - .field( - "func231_in_inv_sel", - &format_args!("{}", self.func231_in_inv_sel().bit()), - ) - .field( - "sig231_in_sel", - &format_args!("{}", self.sig231_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func231_in_sel(&mut self) -> FUNC231_IN_SEL_W { - FUNC231_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func231_in_inv_sel(&mut self) -> FUNC231_IN_INV_SEL_W { - FUNC231_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig231_in_sel(&mut self) -> SIG231_IN_SEL_W { - SIG231_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func231_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func231_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC231_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC231_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func231_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC231_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func231_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC231_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC231_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC231_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func232_in_sel_cfg.rs b/esp32p4/src/gpio/func232_in_sel_cfg.rs deleted file mode 100644 index 802bcb46d8..0000000000 --- a/esp32p4/src/gpio/func232_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC232_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC232_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC232_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC232_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC232_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC232_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC232_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC232_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC232_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC232_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG232_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG232_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG232_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG232_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func232_in_sel(&self) -> FUNC232_IN_SEL_R { - FUNC232_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func232_in_inv_sel(&self) -> FUNC232_IN_INV_SEL_R { - FUNC232_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig232_in_sel(&self) -> SIG232_IN_SEL_R { - SIG232_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC232_IN_SEL_CFG") - .field( - "func232_in_sel", - &format_args!("{}", self.func232_in_sel().bits()), - ) - .field( - "func232_in_inv_sel", - &format_args!("{}", self.func232_in_inv_sel().bit()), - ) - .field( - "sig232_in_sel", - &format_args!("{}", self.sig232_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func232_in_sel(&mut self) -> FUNC232_IN_SEL_W { - FUNC232_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func232_in_inv_sel(&mut self) -> FUNC232_IN_INV_SEL_W { - FUNC232_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig232_in_sel(&mut self) -> SIG232_IN_SEL_W { - SIG232_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func232_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func232_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC232_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC232_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func232_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC232_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func232_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC232_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC232_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC232_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func233_in_sel_cfg.rs b/esp32p4/src/gpio/func233_in_sel_cfg.rs deleted file mode 100644 index 386bcf2407..0000000000 --- a/esp32p4/src/gpio/func233_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC233_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC233_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC233_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC233_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC233_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC233_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC233_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC233_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC233_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC233_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG233_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG233_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG233_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG233_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func233_in_sel(&self) -> FUNC233_IN_SEL_R { - FUNC233_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func233_in_inv_sel(&self) -> FUNC233_IN_INV_SEL_R { - FUNC233_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig233_in_sel(&self) -> SIG233_IN_SEL_R { - SIG233_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC233_IN_SEL_CFG") - .field( - "func233_in_sel", - &format_args!("{}", self.func233_in_sel().bits()), - ) - .field( - "func233_in_inv_sel", - &format_args!("{}", self.func233_in_inv_sel().bit()), - ) - .field( - "sig233_in_sel", - &format_args!("{}", self.sig233_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func233_in_sel(&mut self) -> FUNC233_IN_SEL_W { - FUNC233_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func233_in_inv_sel(&mut self) -> FUNC233_IN_INV_SEL_W { - FUNC233_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig233_in_sel(&mut self) -> SIG233_IN_SEL_W { - SIG233_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func233_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func233_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC233_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC233_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func233_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC233_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func233_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC233_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC233_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC233_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func234_in_sel_cfg.rs b/esp32p4/src/gpio/func234_in_sel_cfg.rs deleted file mode 100644 index 1f055bf74a..0000000000 --- a/esp32p4/src/gpio/func234_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC234_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC234_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC234_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC234_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC234_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC234_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC234_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC234_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC234_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC234_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG234_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG234_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG234_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG234_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func234_in_sel(&self) -> FUNC234_IN_SEL_R { - FUNC234_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func234_in_inv_sel(&self) -> FUNC234_IN_INV_SEL_R { - FUNC234_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig234_in_sel(&self) -> SIG234_IN_SEL_R { - SIG234_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC234_IN_SEL_CFG") - .field( - "func234_in_sel", - &format_args!("{}", self.func234_in_sel().bits()), - ) - .field( - "func234_in_inv_sel", - &format_args!("{}", self.func234_in_inv_sel().bit()), - ) - .field( - "sig234_in_sel", - &format_args!("{}", self.sig234_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func234_in_sel(&mut self) -> FUNC234_IN_SEL_W { - FUNC234_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func234_in_inv_sel(&mut self) -> FUNC234_IN_INV_SEL_W { - FUNC234_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig234_in_sel(&mut self) -> SIG234_IN_SEL_W { - SIG234_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func234_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func234_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC234_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC234_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func234_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC234_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func234_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC234_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC234_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC234_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func235_in_sel_cfg.rs b/esp32p4/src/gpio/func235_in_sel_cfg.rs deleted file mode 100644 index da058f47e8..0000000000 --- a/esp32p4/src/gpio/func235_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC235_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC235_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC235_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC235_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC235_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC235_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC235_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC235_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC235_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC235_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG235_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG235_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG235_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG235_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func235_in_sel(&self) -> FUNC235_IN_SEL_R { - FUNC235_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func235_in_inv_sel(&self) -> FUNC235_IN_INV_SEL_R { - FUNC235_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig235_in_sel(&self) -> SIG235_IN_SEL_R { - SIG235_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC235_IN_SEL_CFG") - .field( - "func235_in_sel", - &format_args!("{}", self.func235_in_sel().bits()), - ) - .field( - "func235_in_inv_sel", - &format_args!("{}", self.func235_in_inv_sel().bit()), - ) - .field( - "sig235_in_sel", - &format_args!("{}", self.sig235_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func235_in_sel(&mut self) -> FUNC235_IN_SEL_W { - FUNC235_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func235_in_inv_sel(&mut self) -> FUNC235_IN_INV_SEL_W { - FUNC235_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig235_in_sel(&mut self) -> SIG235_IN_SEL_W { - SIG235_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func235_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func235_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC235_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC235_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func235_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC235_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func235_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC235_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC235_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC235_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func236_in_sel_cfg.rs b/esp32p4/src/gpio/func236_in_sel_cfg.rs deleted file mode 100644 index afdecf7857..0000000000 --- a/esp32p4/src/gpio/func236_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC236_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC236_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC236_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC236_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC236_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC236_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC236_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC236_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC236_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC236_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG236_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG236_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG236_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG236_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func236_in_sel(&self) -> FUNC236_IN_SEL_R { - FUNC236_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func236_in_inv_sel(&self) -> FUNC236_IN_INV_SEL_R { - FUNC236_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig236_in_sel(&self) -> SIG236_IN_SEL_R { - SIG236_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC236_IN_SEL_CFG") - .field( - "func236_in_sel", - &format_args!("{}", self.func236_in_sel().bits()), - ) - .field( - "func236_in_inv_sel", - &format_args!("{}", self.func236_in_inv_sel().bit()), - ) - .field( - "sig236_in_sel", - &format_args!("{}", self.sig236_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func236_in_sel(&mut self) -> FUNC236_IN_SEL_W { - FUNC236_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func236_in_inv_sel(&mut self) -> FUNC236_IN_INV_SEL_W { - FUNC236_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig236_in_sel(&mut self) -> SIG236_IN_SEL_W { - SIG236_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func236_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func236_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC236_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC236_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func236_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC236_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func236_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC236_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC236_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC236_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func237_in_sel_cfg.rs b/esp32p4/src/gpio/func237_in_sel_cfg.rs deleted file mode 100644 index 8f3477b155..0000000000 --- a/esp32p4/src/gpio/func237_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC237_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC237_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC237_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC237_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC237_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC237_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC237_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC237_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC237_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC237_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG237_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG237_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG237_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG237_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func237_in_sel(&self) -> FUNC237_IN_SEL_R { - FUNC237_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func237_in_inv_sel(&self) -> FUNC237_IN_INV_SEL_R { - FUNC237_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig237_in_sel(&self) -> SIG237_IN_SEL_R { - SIG237_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC237_IN_SEL_CFG") - .field( - "func237_in_sel", - &format_args!("{}", self.func237_in_sel().bits()), - ) - .field( - "func237_in_inv_sel", - &format_args!("{}", self.func237_in_inv_sel().bit()), - ) - .field( - "sig237_in_sel", - &format_args!("{}", self.sig237_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func237_in_sel(&mut self) -> FUNC237_IN_SEL_W { - FUNC237_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func237_in_inv_sel(&mut self) -> FUNC237_IN_INV_SEL_W { - FUNC237_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig237_in_sel(&mut self) -> SIG237_IN_SEL_W { - SIG237_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func237_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func237_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC237_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC237_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func237_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC237_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func237_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC237_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC237_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC237_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func238_in_sel_cfg.rs b/esp32p4/src/gpio/func238_in_sel_cfg.rs deleted file mode 100644 index e961c7396b..0000000000 --- a/esp32p4/src/gpio/func238_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC238_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC238_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC238_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC238_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC238_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC238_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC238_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC238_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC238_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC238_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG238_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG238_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG238_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG238_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func238_in_sel(&self) -> FUNC238_IN_SEL_R { - FUNC238_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func238_in_inv_sel(&self) -> FUNC238_IN_INV_SEL_R { - FUNC238_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig238_in_sel(&self) -> SIG238_IN_SEL_R { - SIG238_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC238_IN_SEL_CFG") - .field( - "func238_in_sel", - &format_args!("{}", self.func238_in_sel().bits()), - ) - .field( - "func238_in_inv_sel", - &format_args!("{}", self.func238_in_inv_sel().bit()), - ) - .field( - "sig238_in_sel", - &format_args!("{}", self.sig238_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func238_in_sel(&mut self) -> FUNC238_IN_SEL_W { - FUNC238_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func238_in_inv_sel(&mut self) -> FUNC238_IN_INV_SEL_W { - FUNC238_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig238_in_sel(&mut self) -> SIG238_IN_SEL_W { - SIG238_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func238_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func238_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC238_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC238_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func238_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC238_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func238_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC238_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC238_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC238_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func239_in_sel_cfg.rs b/esp32p4/src/gpio/func239_in_sel_cfg.rs deleted file mode 100644 index 9f9d4d9672..0000000000 --- a/esp32p4/src/gpio/func239_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC239_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC239_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC239_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC239_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC239_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC239_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC239_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC239_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC239_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC239_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG239_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG239_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG239_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG239_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func239_in_sel(&self) -> FUNC239_IN_SEL_R { - FUNC239_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func239_in_inv_sel(&self) -> FUNC239_IN_INV_SEL_R { - FUNC239_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig239_in_sel(&self) -> SIG239_IN_SEL_R { - SIG239_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC239_IN_SEL_CFG") - .field( - "func239_in_sel", - &format_args!("{}", self.func239_in_sel().bits()), - ) - .field( - "func239_in_inv_sel", - &format_args!("{}", self.func239_in_inv_sel().bit()), - ) - .field( - "sig239_in_sel", - &format_args!("{}", self.sig239_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func239_in_sel(&mut self) -> FUNC239_IN_SEL_W { - FUNC239_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func239_in_inv_sel(&mut self) -> FUNC239_IN_INV_SEL_W { - FUNC239_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig239_in_sel(&mut self) -> SIG239_IN_SEL_W { - SIG239_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func239_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func239_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC239_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC239_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func239_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC239_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func239_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC239_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC239_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC239_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func23_in_sel_cfg.rs b/esp32p4/src/gpio/func23_in_sel_cfg.rs deleted file mode 100644 index fe6108f32b..0000000000 --- a/esp32p4/src/gpio/func23_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC23_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC23_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC23_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC23_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC23_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC23_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC23_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC23_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC23_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC23_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG23_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG23_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG23_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG23_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func23_in_sel(&self) -> FUNC23_IN_SEL_R { - FUNC23_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func23_in_inv_sel(&self) -> FUNC23_IN_INV_SEL_R { - FUNC23_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig23_in_sel(&self) -> SIG23_IN_SEL_R { - SIG23_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC23_IN_SEL_CFG") - .field( - "func23_in_sel", - &format_args!("{}", self.func23_in_sel().bits()), - ) - .field( - "func23_in_inv_sel", - &format_args!("{}", self.func23_in_inv_sel().bit()), - ) - .field( - "sig23_in_sel", - &format_args!("{}", self.sig23_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func23_in_sel(&mut self) -> FUNC23_IN_SEL_W { - FUNC23_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func23_in_inv_sel(&mut self) -> FUNC23_IN_INV_SEL_W { - FUNC23_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig23_in_sel(&mut self) -> SIG23_IN_SEL_W { - SIG23_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func23_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func23_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC23_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC23_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func23_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC23_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func23_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC23_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC23_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC23_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func240_in_sel_cfg.rs b/esp32p4/src/gpio/func240_in_sel_cfg.rs deleted file mode 100644 index 8d188176df..0000000000 --- a/esp32p4/src/gpio/func240_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC240_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC240_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC240_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC240_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC240_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC240_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC240_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC240_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC240_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC240_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG240_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG240_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG240_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG240_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func240_in_sel(&self) -> FUNC240_IN_SEL_R { - FUNC240_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func240_in_inv_sel(&self) -> FUNC240_IN_INV_SEL_R { - FUNC240_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig240_in_sel(&self) -> SIG240_IN_SEL_R { - SIG240_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC240_IN_SEL_CFG") - .field( - "func240_in_sel", - &format_args!("{}", self.func240_in_sel().bits()), - ) - .field( - "func240_in_inv_sel", - &format_args!("{}", self.func240_in_inv_sel().bit()), - ) - .field( - "sig240_in_sel", - &format_args!("{}", self.sig240_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func240_in_sel(&mut self) -> FUNC240_IN_SEL_W { - FUNC240_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func240_in_inv_sel(&mut self) -> FUNC240_IN_INV_SEL_W { - FUNC240_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig240_in_sel(&mut self) -> SIG240_IN_SEL_W { - SIG240_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func240_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func240_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC240_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC240_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func240_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC240_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func240_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC240_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC240_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC240_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func241_in_sel_cfg.rs b/esp32p4/src/gpio/func241_in_sel_cfg.rs deleted file mode 100644 index b564ffa512..0000000000 --- a/esp32p4/src/gpio/func241_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC241_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC241_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC241_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC241_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC241_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC241_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC241_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC241_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC241_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC241_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG241_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG241_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG241_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG241_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func241_in_sel(&self) -> FUNC241_IN_SEL_R { - FUNC241_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func241_in_inv_sel(&self) -> FUNC241_IN_INV_SEL_R { - FUNC241_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig241_in_sel(&self) -> SIG241_IN_SEL_R { - SIG241_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC241_IN_SEL_CFG") - .field( - "func241_in_sel", - &format_args!("{}", self.func241_in_sel().bits()), - ) - .field( - "func241_in_inv_sel", - &format_args!("{}", self.func241_in_inv_sel().bit()), - ) - .field( - "sig241_in_sel", - &format_args!("{}", self.sig241_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func241_in_sel(&mut self) -> FUNC241_IN_SEL_W { - FUNC241_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func241_in_inv_sel(&mut self) -> FUNC241_IN_INV_SEL_W { - FUNC241_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig241_in_sel(&mut self) -> SIG241_IN_SEL_W { - SIG241_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func241_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func241_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC241_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC241_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func241_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC241_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func241_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC241_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC241_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC241_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func242_in_sel_cfg.rs b/esp32p4/src/gpio/func242_in_sel_cfg.rs deleted file mode 100644 index 2a75d90b4e..0000000000 --- a/esp32p4/src/gpio/func242_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC242_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC242_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC242_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC242_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC242_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC242_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC242_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC242_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC242_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC242_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG242_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG242_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG242_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG242_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func242_in_sel(&self) -> FUNC242_IN_SEL_R { - FUNC242_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func242_in_inv_sel(&self) -> FUNC242_IN_INV_SEL_R { - FUNC242_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig242_in_sel(&self) -> SIG242_IN_SEL_R { - SIG242_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC242_IN_SEL_CFG") - .field( - "func242_in_sel", - &format_args!("{}", self.func242_in_sel().bits()), - ) - .field( - "func242_in_inv_sel", - &format_args!("{}", self.func242_in_inv_sel().bit()), - ) - .field( - "sig242_in_sel", - &format_args!("{}", self.sig242_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func242_in_sel(&mut self) -> FUNC242_IN_SEL_W { - FUNC242_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func242_in_inv_sel(&mut self) -> FUNC242_IN_INV_SEL_W { - FUNC242_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig242_in_sel(&mut self) -> SIG242_IN_SEL_W { - SIG242_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func242_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func242_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC242_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC242_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func242_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC242_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func242_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC242_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC242_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC242_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func243_in_sel_cfg.rs b/esp32p4/src/gpio/func243_in_sel_cfg.rs deleted file mode 100644 index fb44a9e88b..0000000000 --- a/esp32p4/src/gpio/func243_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC243_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC243_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC243_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC243_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC243_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC243_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC243_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC243_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC243_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC243_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG243_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG243_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG243_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG243_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func243_in_sel(&self) -> FUNC243_IN_SEL_R { - FUNC243_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func243_in_inv_sel(&self) -> FUNC243_IN_INV_SEL_R { - FUNC243_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig243_in_sel(&self) -> SIG243_IN_SEL_R { - SIG243_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC243_IN_SEL_CFG") - .field( - "func243_in_sel", - &format_args!("{}", self.func243_in_sel().bits()), - ) - .field( - "func243_in_inv_sel", - &format_args!("{}", self.func243_in_inv_sel().bit()), - ) - .field( - "sig243_in_sel", - &format_args!("{}", self.sig243_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func243_in_sel(&mut self) -> FUNC243_IN_SEL_W { - FUNC243_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func243_in_inv_sel(&mut self) -> FUNC243_IN_INV_SEL_W { - FUNC243_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig243_in_sel(&mut self) -> SIG243_IN_SEL_W { - SIG243_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func243_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func243_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC243_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC243_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func243_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC243_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func243_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC243_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC243_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC243_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func244_in_sel_cfg.rs b/esp32p4/src/gpio/func244_in_sel_cfg.rs deleted file mode 100644 index 019375e956..0000000000 --- a/esp32p4/src/gpio/func244_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC244_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC244_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC244_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC244_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC244_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC244_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC244_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC244_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC244_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC244_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG244_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG244_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG244_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG244_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func244_in_sel(&self) -> FUNC244_IN_SEL_R { - FUNC244_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func244_in_inv_sel(&self) -> FUNC244_IN_INV_SEL_R { - FUNC244_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig244_in_sel(&self) -> SIG244_IN_SEL_R { - SIG244_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC244_IN_SEL_CFG") - .field( - "func244_in_sel", - &format_args!("{}", self.func244_in_sel().bits()), - ) - .field( - "func244_in_inv_sel", - &format_args!("{}", self.func244_in_inv_sel().bit()), - ) - .field( - "sig244_in_sel", - &format_args!("{}", self.sig244_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func244_in_sel(&mut self) -> FUNC244_IN_SEL_W { - FUNC244_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func244_in_inv_sel(&mut self) -> FUNC244_IN_INV_SEL_W { - FUNC244_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig244_in_sel(&mut self) -> SIG244_IN_SEL_W { - SIG244_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func244_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func244_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC244_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC244_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func244_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC244_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func244_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC244_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC244_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC244_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func245_in_sel_cfg.rs b/esp32p4/src/gpio/func245_in_sel_cfg.rs deleted file mode 100644 index fd8656cb31..0000000000 --- a/esp32p4/src/gpio/func245_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC245_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC245_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC245_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC245_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC245_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC245_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC245_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC245_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC245_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC245_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG245_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG245_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG245_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG245_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func245_in_sel(&self) -> FUNC245_IN_SEL_R { - FUNC245_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func245_in_inv_sel(&self) -> FUNC245_IN_INV_SEL_R { - FUNC245_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig245_in_sel(&self) -> SIG245_IN_SEL_R { - SIG245_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC245_IN_SEL_CFG") - .field( - "func245_in_sel", - &format_args!("{}", self.func245_in_sel().bits()), - ) - .field( - "func245_in_inv_sel", - &format_args!("{}", self.func245_in_inv_sel().bit()), - ) - .field( - "sig245_in_sel", - &format_args!("{}", self.sig245_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func245_in_sel(&mut self) -> FUNC245_IN_SEL_W { - FUNC245_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func245_in_inv_sel(&mut self) -> FUNC245_IN_INV_SEL_W { - FUNC245_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig245_in_sel(&mut self) -> SIG245_IN_SEL_W { - SIG245_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func245_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func245_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC245_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC245_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func245_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC245_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func245_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC245_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC245_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC245_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func246_in_sel_cfg.rs b/esp32p4/src/gpio/func246_in_sel_cfg.rs deleted file mode 100644 index e8c2df11e1..0000000000 --- a/esp32p4/src/gpio/func246_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC246_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC246_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC246_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC246_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC246_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC246_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC246_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC246_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC246_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC246_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG246_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG246_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG246_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG246_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func246_in_sel(&self) -> FUNC246_IN_SEL_R { - FUNC246_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func246_in_inv_sel(&self) -> FUNC246_IN_INV_SEL_R { - FUNC246_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig246_in_sel(&self) -> SIG246_IN_SEL_R { - SIG246_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC246_IN_SEL_CFG") - .field( - "func246_in_sel", - &format_args!("{}", self.func246_in_sel().bits()), - ) - .field( - "func246_in_inv_sel", - &format_args!("{}", self.func246_in_inv_sel().bit()), - ) - .field( - "sig246_in_sel", - &format_args!("{}", self.sig246_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func246_in_sel(&mut self) -> FUNC246_IN_SEL_W { - FUNC246_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func246_in_inv_sel(&mut self) -> FUNC246_IN_INV_SEL_W { - FUNC246_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig246_in_sel(&mut self) -> SIG246_IN_SEL_W { - SIG246_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func246_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func246_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC246_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC246_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func246_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC246_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func246_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC246_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC246_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC246_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func247_in_sel_cfg.rs b/esp32p4/src/gpio/func247_in_sel_cfg.rs deleted file mode 100644 index 1070fc289e..0000000000 --- a/esp32p4/src/gpio/func247_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC247_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC247_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC247_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC247_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC247_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC247_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC247_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC247_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC247_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC247_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG247_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG247_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG247_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG247_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func247_in_sel(&self) -> FUNC247_IN_SEL_R { - FUNC247_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func247_in_inv_sel(&self) -> FUNC247_IN_INV_SEL_R { - FUNC247_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig247_in_sel(&self) -> SIG247_IN_SEL_R { - SIG247_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC247_IN_SEL_CFG") - .field( - "func247_in_sel", - &format_args!("{}", self.func247_in_sel().bits()), - ) - .field( - "func247_in_inv_sel", - &format_args!("{}", self.func247_in_inv_sel().bit()), - ) - .field( - "sig247_in_sel", - &format_args!("{}", self.sig247_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func247_in_sel(&mut self) -> FUNC247_IN_SEL_W { - FUNC247_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func247_in_inv_sel(&mut self) -> FUNC247_IN_INV_SEL_W { - FUNC247_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig247_in_sel(&mut self) -> SIG247_IN_SEL_W { - SIG247_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func247_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func247_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC247_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC247_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func247_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC247_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func247_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC247_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC247_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC247_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func248_in_sel_cfg.rs b/esp32p4/src/gpio/func248_in_sel_cfg.rs deleted file mode 100644 index 92a3812600..0000000000 --- a/esp32p4/src/gpio/func248_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC248_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC248_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC248_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC248_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC248_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC248_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC248_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC248_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC248_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC248_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG248_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG248_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG248_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG248_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func248_in_sel(&self) -> FUNC248_IN_SEL_R { - FUNC248_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func248_in_inv_sel(&self) -> FUNC248_IN_INV_SEL_R { - FUNC248_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig248_in_sel(&self) -> SIG248_IN_SEL_R { - SIG248_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC248_IN_SEL_CFG") - .field( - "func248_in_sel", - &format_args!("{}", self.func248_in_sel().bits()), - ) - .field( - "func248_in_inv_sel", - &format_args!("{}", self.func248_in_inv_sel().bit()), - ) - .field( - "sig248_in_sel", - &format_args!("{}", self.sig248_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func248_in_sel(&mut self) -> FUNC248_IN_SEL_W { - FUNC248_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func248_in_inv_sel(&mut self) -> FUNC248_IN_INV_SEL_W { - FUNC248_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig248_in_sel(&mut self) -> SIG248_IN_SEL_W { - SIG248_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func248_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func248_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC248_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC248_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func248_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC248_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func248_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC248_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC248_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC248_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func249_in_sel_cfg.rs b/esp32p4/src/gpio/func249_in_sel_cfg.rs deleted file mode 100644 index 8af98da754..0000000000 --- a/esp32p4/src/gpio/func249_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC249_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC249_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC249_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC249_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC249_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC249_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC249_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC249_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC249_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC249_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG249_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG249_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG249_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG249_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func249_in_sel(&self) -> FUNC249_IN_SEL_R { - FUNC249_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func249_in_inv_sel(&self) -> FUNC249_IN_INV_SEL_R { - FUNC249_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig249_in_sel(&self) -> SIG249_IN_SEL_R { - SIG249_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC249_IN_SEL_CFG") - .field( - "func249_in_sel", - &format_args!("{}", self.func249_in_sel().bits()), - ) - .field( - "func249_in_inv_sel", - &format_args!("{}", self.func249_in_inv_sel().bit()), - ) - .field( - "sig249_in_sel", - &format_args!("{}", self.sig249_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func249_in_sel(&mut self) -> FUNC249_IN_SEL_W { - FUNC249_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func249_in_inv_sel(&mut self) -> FUNC249_IN_INV_SEL_W { - FUNC249_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig249_in_sel(&mut self) -> SIG249_IN_SEL_W { - SIG249_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func249_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func249_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC249_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC249_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func249_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC249_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func249_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC249_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC249_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC249_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func24_in_sel_cfg.rs b/esp32p4/src/gpio/func24_in_sel_cfg.rs deleted file mode 100644 index 81d9645c81..0000000000 --- a/esp32p4/src/gpio/func24_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC24_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC24_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC24_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC24_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC24_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC24_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC24_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC24_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC24_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC24_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG24_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG24_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG24_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG24_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func24_in_sel(&self) -> FUNC24_IN_SEL_R { - FUNC24_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func24_in_inv_sel(&self) -> FUNC24_IN_INV_SEL_R { - FUNC24_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig24_in_sel(&self) -> SIG24_IN_SEL_R { - SIG24_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC24_IN_SEL_CFG") - .field( - "func24_in_sel", - &format_args!("{}", self.func24_in_sel().bits()), - ) - .field( - "func24_in_inv_sel", - &format_args!("{}", self.func24_in_inv_sel().bit()), - ) - .field( - "sig24_in_sel", - &format_args!("{}", self.sig24_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func24_in_sel(&mut self) -> FUNC24_IN_SEL_W { - FUNC24_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func24_in_inv_sel(&mut self) -> FUNC24_IN_INV_SEL_W { - FUNC24_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig24_in_sel(&mut self) -> SIG24_IN_SEL_W { - SIG24_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func24_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func24_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC24_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC24_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func24_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC24_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func24_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC24_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC24_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC24_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func250_in_sel_cfg.rs b/esp32p4/src/gpio/func250_in_sel_cfg.rs deleted file mode 100644 index f8aebe703e..0000000000 --- a/esp32p4/src/gpio/func250_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC250_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC250_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC250_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC250_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC250_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC250_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC250_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC250_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC250_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC250_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG250_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG250_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG250_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG250_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func250_in_sel(&self) -> FUNC250_IN_SEL_R { - FUNC250_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func250_in_inv_sel(&self) -> FUNC250_IN_INV_SEL_R { - FUNC250_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig250_in_sel(&self) -> SIG250_IN_SEL_R { - SIG250_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC250_IN_SEL_CFG") - .field( - "func250_in_sel", - &format_args!("{}", self.func250_in_sel().bits()), - ) - .field( - "func250_in_inv_sel", - &format_args!("{}", self.func250_in_inv_sel().bit()), - ) - .field( - "sig250_in_sel", - &format_args!("{}", self.sig250_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func250_in_sel(&mut self) -> FUNC250_IN_SEL_W { - FUNC250_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func250_in_inv_sel(&mut self) -> FUNC250_IN_INV_SEL_W { - FUNC250_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig250_in_sel(&mut self) -> SIG250_IN_SEL_W { - SIG250_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func250_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func250_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC250_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC250_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func250_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC250_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func250_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC250_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC250_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC250_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func251_in_sel_cfg.rs b/esp32p4/src/gpio/func251_in_sel_cfg.rs deleted file mode 100644 index 6744f0b15d..0000000000 --- a/esp32p4/src/gpio/func251_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC251_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC251_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC251_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC251_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC251_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC251_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC251_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC251_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC251_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC251_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG251_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG251_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG251_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG251_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func251_in_sel(&self) -> FUNC251_IN_SEL_R { - FUNC251_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func251_in_inv_sel(&self) -> FUNC251_IN_INV_SEL_R { - FUNC251_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig251_in_sel(&self) -> SIG251_IN_SEL_R { - SIG251_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC251_IN_SEL_CFG") - .field( - "func251_in_sel", - &format_args!("{}", self.func251_in_sel().bits()), - ) - .field( - "func251_in_inv_sel", - &format_args!("{}", self.func251_in_inv_sel().bit()), - ) - .field( - "sig251_in_sel", - &format_args!("{}", self.sig251_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func251_in_sel(&mut self) -> FUNC251_IN_SEL_W { - FUNC251_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func251_in_inv_sel(&mut self) -> FUNC251_IN_INV_SEL_W { - FUNC251_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig251_in_sel(&mut self) -> SIG251_IN_SEL_W { - SIG251_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func251_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func251_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC251_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC251_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func251_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC251_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func251_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC251_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC251_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC251_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func252_in_sel_cfg.rs b/esp32p4/src/gpio/func252_in_sel_cfg.rs deleted file mode 100644 index 9fd13284a9..0000000000 --- a/esp32p4/src/gpio/func252_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC252_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC252_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC252_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC252_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC252_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC252_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC252_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC252_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC252_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC252_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG252_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG252_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG252_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG252_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func252_in_sel(&self) -> FUNC252_IN_SEL_R { - FUNC252_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func252_in_inv_sel(&self) -> FUNC252_IN_INV_SEL_R { - FUNC252_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig252_in_sel(&self) -> SIG252_IN_SEL_R { - SIG252_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC252_IN_SEL_CFG") - .field( - "func252_in_sel", - &format_args!("{}", self.func252_in_sel().bits()), - ) - .field( - "func252_in_inv_sel", - &format_args!("{}", self.func252_in_inv_sel().bit()), - ) - .field( - "sig252_in_sel", - &format_args!("{}", self.sig252_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func252_in_sel(&mut self) -> FUNC252_IN_SEL_W { - FUNC252_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func252_in_inv_sel(&mut self) -> FUNC252_IN_INV_SEL_W { - FUNC252_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig252_in_sel(&mut self) -> SIG252_IN_SEL_W { - SIG252_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func252_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func252_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC252_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC252_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func252_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC252_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func252_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC252_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC252_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC252_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func253_in_sel_cfg.rs b/esp32p4/src/gpio/func253_in_sel_cfg.rs deleted file mode 100644 index 2dac53f330..0000000000 --- a/esp32p4/src/gpio/func253_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC253_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC253_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC253_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC253_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC253_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC253_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC253_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC253_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC253_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC253_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG253_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG253_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG253_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG253_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func253_in_sel(&self) -> FUNC253_IN_SEL_R { - FUNC253_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func253_in_inv_sel(&self) -> FUNC253_IN_INV_SEL_R { - FUNC253_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig253_in_sel(&self) -> SIG253_IN_SEL_R { - SIG253_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC253_IN_SEL_CFG") - .field( - "func253_in_sel", - &format_args!("{}", self.func253_in_sel().bits()), - ) - .field( - "func253_in_inv_sel", - &format_args!("{}", self.func253_in_inv_sel().bit()), - ) - .field( - "sig253_in_sel", - &format_args!("{}", self.sig253_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func253_in_sel(&mut self) -> FUNC253_IN_SEL_W { - FUNC253_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func253_in_inv_sel(&mut self) -> FUNC253_IN_INV_SEL_W { - FUNC253_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig253_in_sel(&mut self) -> SIG253_IN_SEL_W { - SIG253_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func253_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func253_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC253_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC253_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func253_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC253_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func253_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC253_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC253_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC253_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func254_in_sel_cfg.rs b/esp32p4/src/gpio/func254_in_sel_cfg.rs deleted file mode 100644 index 3dc7bb22b0..0000000000 --- a/esp32p4/src/gpio/func254_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC254_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC254_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC254_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC254_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC254_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC254_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC254_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC254_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC254_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC254_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG254_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG254_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG254_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG254_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func254_in_sel(&self) -> FUNC254_IN_SEL_R { - FUNC254_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func254_in_inv_sel(&self) -> FUNC254_IN_INV_SEL_R { - FUNC254_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig254_in_sel(&self) -> SIG254_IN_SEL_R { - SIG254_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC254_IN_SEL_CFG") - .field( - "func254_in_sel", - &format_args!("{}", self.func254_in_sel().bits()), - ) - .field( - "func254_in_inv_sel", - &format_args!("{}", self.func254_in_inv_sel().bit()), - ) - .field( - "sig254_in_sel", - &format_args!("{}", self.sig254_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func254_in_sel(&mut self) -> FUNC254_IN_SEL_W { - FUNC254_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func254_in_inv_sel(&mut self) -> FUNC254_IN_INV_SEL_W { - FUNC254_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig254_in_sel(&mut self) -> SIG254_IN_SEL_W { - SIG254_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func254_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func254_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC254_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC254_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func254_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC254_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func254_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC254_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC254_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC254_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func255_in_sel_cfg.rs b/esp32p4/src/gpio/func255_in_sel_cfg.rs deleted file mode 100644 index abdee1bef1..0000000000 --- a/esp32p4/src/gpio/func255_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC255_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC255_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC255_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC255_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC255_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC255_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC255_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC255_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC255_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC255_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG255_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG255_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG255_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG255_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func255_in_sel(&self) -> FUNC255_IN_SEL_R { - FUNC255_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func255_in_inv_sel(&self) -> FUNC255_IN_INV_SEL_R { - FUNC255_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig255_in_sel(&self) -> SIG255_IN_SEL_R { - SIG255_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC255_IN_SEL_CFG") - .field( - "func255_in_sel", - &format_args!("{}", self.func255_in_sel().bits()), - ) - .field( - "func255_in_inv_sel", - &format_args!("{}", self.func255_in_inv_sel().bit()), - ) - .field( - "sig255_in_sel", - &format_args!("{}", self.sig255_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func255_in_sel(&mut self) -> FUNC255_IN_SEL_W { - FUNC255_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func255_in_inv_sel(&mut self) -> FUNC255_IN_INV_SEL_W { - FUNC255_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig255_in_sel(&mut self) -> SIG255_IN_SEL_W { - SIG255_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func255_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func255_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC255_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC255_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func255_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC255_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func255_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC255_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC255_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC255_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func25_in_sel_cfg.rs b/esp32p4/src/gpio/func25_in_sel_cfg.rs deleted file mode 100644 index 0df6a73fa0..0000000000 --- a/esp32p4/src/gpio/func25_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC25_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC25_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC25_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC25_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC25_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC25_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC25_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC25_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC25_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC25_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG25_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG25_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG25_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG25_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func25_in_sel(&self) -> FUNC25_IN_SEL_R { - FUNC25_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func25_in_inv_sel(&self) -> FUNC25_IN_INV_SEL_R { - FUNC25_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig25_in_sel(&self) -> SIG25_IN_SEL_R { - SIG25_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC25_IN_SEL_CFG") - .field( - "func25_in_sel", - &format_args!("{}", self.func25_in_sel().bits()), - ) - .field( - "func25_in_inv_sel", - &format_args!("{}", self.func25_in_inv_sel().bit()), - ) - .field( - "sig25_in_sel", - &format_args!("{}", self.sig25_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func25_in_sel(&mut self) -> FUNC25_IN_SEL_W { - FUNC25_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func25_in_inv_sel(&mut self) -> FUNC25_IN_INV_SEL_W { - FUNC25_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig25_in_sel(&mut self) -> SIG25_IN_SEL_W { - SIG25_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func25_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func25_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC25_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC25_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func25_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC25_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func25_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC25_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC25_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC25_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func26_in_sel_cfg.rs b/esp32p4/src/gpio/func26_in_sel_cfg.rs deleted file mode 100644 index 157b7dacd7..0000000000 --- a/esp32p4/src/gpio/func26_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC26_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC26_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC26_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC26_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC26_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC26_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC26_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC26_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC26_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC26_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG26_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG26_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG26_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG26_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func26_in_sel(&self) -> FUNC26_IN_SEL_R { - FUNC26_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func26_in_inv_sel(&self) -> FUNC26_IN_INV_SEL_R { - FUNC26_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig26_in_sel(&self) -> SIG26_IN_SEL_R { - SIG26_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC26_IN_SEL_CFG") - .field( - "func26_in_sel", - &format_args!("{}", self.func26_in_sel().bits()), - ) - .field( - "func26_in_inv_sel", - &format_args!("{}", self.func26_in_inv_sel().bit()), - ) - .field( - "sig26_in_sel", - &format_args!("{}", self.sig26_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func26_in_sel(&mut self) -> FUNC26_IN_SEL_W { - FUNC26_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func26_in_inv_sel(&mut self) -> FUNC26_IN_INV_SEL_W { - FUNC26_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig26_in_sel(&mut self) -> SIG26_IN_SEL_W { - SIG26_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func26_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func26_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC26_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC26_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func26_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC26_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func26_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC26_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC26_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC26_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func27_in_sel_cfg.rs b/esp32p4/src/gpio/func27_in_sel_cfg.rs deleted file mode 100644 index fcaf7a7aff..0000000000 --- a/esp32p4/src/gpio/func27_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC27_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC27_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC27_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC27_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC27_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC27_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC27_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC27_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC27_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC27_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG27_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG27_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG27_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG27_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func27_in_sel(&self) -> FUNC27_IN_SEL_R { - FUNC27_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func27_in_inv_sel(&self) -> FUNC27_IN_INV_SEL_R { - FUNC27_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig27_in_sel(&self) -> SIG27_IN_SEL_R { - SIG27_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC27_IN_SEL_CFG") - .field( - "func27_in_sel", - &format_args!("{}", self.func27_in_sel().bits()), - ) - .field( - "func27_in_inv_sel", - &format_args!("{}", self.func27_in_inv_sel().bit()), - ) - .field( - "sig27_in_sel", - &format_args!("{}", self.sig27_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func27_in_sel(&mut self) -> FUNC27_IN_SEL_W { - FUNC27_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func27_in_inv_sel(&mut self) -> FUNC27_IN_INV_SEL_W { - FUNC27_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig27_in_sel(&mut self) -> SIG27_IN_SEL_W { - SIG27_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func27_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func27_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC27_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC27_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func27_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC27_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func27_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC27_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC27_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC27_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func28_in_sel_cfg.rs b/esp32p4/src/gpio/func28_in_sel_cfg.rs deleted file mode 100644 index 781e422dd5..0000000000 --- a/esp32p4/src/gpio/func28_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC28_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC28_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC28_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC28_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC28_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC28_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC28_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC28_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC28_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC28_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG28_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG28_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG28_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG28_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func28_in_sel(&self) -> FUNC28_IN_SEL_R { - FUNC28_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func28_in_inv_sel(&self) -> FUNC28_IN_INV_SEL_R { - FUNC28_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig28_in_sel(&self) -> SIG28_IN_SEL_R { - SIG28_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC28_IN_SEL_CFG") - .field( - "func28_in_sel", - &format_args!("{}", self.func28_in_sel().bits()), - ) - .field( - "func28_in_inv_sel", - &format_args!("{}", self.func28_in_inv_sel().bit()), - ) - .field( - "sig28_in_sel", - &format_args!("{}", self.sig28_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func28_in_sel(&mut self) -> FUNC28_IN_SEL_W { - FUNC28_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func28_in_inv_sel(&mut self) -> FUNC28_IN_INV_SEL_W { - FUNC28_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig28_in_sel(&mut self) -> SIG28_IN_SEL_W { - SIG28_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func28_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func28_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC28_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC28_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func28_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC28_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func28_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC28_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC28_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC28_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func29_in_sel_cfg.rs b/esp32p4/src/gpio/func29_in_sel_cfg.rs deleted file mode 100644 index 6da11fc74b..0000000000 --- a/esp32p4/src/gpio/func29_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC29_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC29_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC29_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC29_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC29_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC29_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC29_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC29_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC29_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC29_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG29_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG29_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG29_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG29_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func29_in_sel(&self) -> FUNC29_IN_SEL_R { - FUNC29_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func29_in_inv_sel(&self) -> FUNC29_IN_INV_SEL_R { - FUNC29_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig29_in_sel(&self) -> SIG29_IN_SEL_R { - SIG29_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC29_IN_SEL_CFG") - .field( - "func29_in_sel", - &format_args!("{}", self.func29_in_sel().bits()), - ) - .field( - "func29_in_inv_sel", - &format_args!("{}", self.func29_in_inv_sel().bit()), - ) - .field( - "sig29_in_sel", - &format_args!("{}", self.sig29_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func29_in_sel(&mut self) -> FUNC29_IN_SEL_W { - FUNC29_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func29_in_inv_sel(&mut self) -> FUNC29_IN_INV_SEL_W { - FUNC29_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig29_in_sel(&mut self) -> SIG29_IN_SEL_W { - SIG29_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func29_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func29_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC29_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC29_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func29_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC29_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func29_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC29_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC29_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC29_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func2_in_sel_cfg.rs b/esp32p4/src/gpio/func2_in_sel_cfg.rs deleted file mode 100644 index f0e86a1c2f..0000000000 --- a/esp32p4/src/gpio/func2_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC2_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC2_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC2_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC2_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC2_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC2_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC2_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC2_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC2_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC2_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG2_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG2_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG2_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG2_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func2_in_sel(&self) -> FUNC2_IN_SEL_R { - FUNC2_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func2_in_inv_sel(&self) -> FUNC2_IN_INV_SEL_R { - FUNC2_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig2_in_sel(&self) -> SIG2_IN_SEL_R { - SIG2_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC2_IN_SEL_CFG") - .field( - "func2_in_sel", - &format_args!("{}", self.func2_in_sel().bits()), - ) - .field( - "func2_in_inv_sel", - &format_args!("{}", self.func2_in_inv_sel().bit()), - ) - .field("sig2_in_sel", &format_args!("{}", self.sig2_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func2_in_sel(&mut self) -> FUNC2_IN_SEL_W { - FUNC2_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func2_in_inv_sel(&mut self) -> FUNC2_IN_INV_SEL_W { - FUNC2_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig2_in_sel(&mut self) -> SIG2_IN_SEL_W { - SIG2_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func2_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func2_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC2_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC2_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func2_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC2_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func2_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC2_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC2_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC2_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func30_in_sel_cfg.rs b/esp32p4/src/gpio/func30_in_sel_cfg.rs deleted file mode 100644 index c43fb68292..0000000000 --- a/esp32p4/src/gpio/func30_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC30_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC30_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC30_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC30_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC30_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC30_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC30_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC30_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC30_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC30_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG30_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG30_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG30_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG30_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func30_in_sel(&self) -> FUNC30_IN_SEL_R { - FUNC30_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func30_in_inv_sel(&self) -> FUNC30_IN_INV_SEL_R { - FUNC30_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig30_in_sel(&self) -> SIG30_IN_SEL_R { - SIG30_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC30_IN_SEL_CFG") - .field( - "func30_in_sel", - &format_args!("{}", self.func30_in_sel().bits()), - ) - .field( - "func30_in_inv_sel", - &format_args!("{}", self.func30_in_inv_sel().bit()), - ) - .field( - "sig30_in_sel", - &format_args!("{}", self.sig30_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func30_in_sel(&mut self) -> FUNC30_IN_SEL_W { - FUNC30_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func30_in_inv_sel(&mut self) -> FUNC30_IN_INV_SEL_W { - FUNC30_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig30_in_sel(&mut self) -> SIG30_IN_SEL_W { - SIG30_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func30_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func30_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC30_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC30_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func30_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC30_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func30_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC30_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC30_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC30_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func31_in_sel_cfg.rs b/esp32p4/src/gpio/func31_in_sel_cfg.rs deleted file mode 100644 index 8d761076dd..0000000000 --- a/esp32p4/src/gpio/func31_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC31_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC31_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC31_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC31_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC31_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC31_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC31_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC31_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC31_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC31_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG31_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG31_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG31_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG31_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func31_in_sel(&self) -> FUNC31_IN_SEL_R { - FUNC31_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func31_in_inv_sel(&self) -> FUNC31_IN_INV_SEL_R { - FUNC31_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig31_in_sel(&self) -> SIG31_IN_SEL_R { - SIG31_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC31_IN_SEL_CFG") - .field( - "func31_in_sel", - &format_args!("{}", self.func31_in_sel().bits()), - ) - .field( - "func31_in_inv_sel", - &format_args!("{}", self.func31_in_inv_sel().bit()), - ) - .field( - "sig31_in_sel", - &format_args!("{}", self.sig31_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func31_in_sel(&mut self) -> FUNC31_IN_SEL_W { - FUNC31_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func31_in_inv_sel(&mut self) -> FUNC31_IN_INV_SEL_W { - FUNC31_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig31_in_sel(&mut self) -> SIG31_IN_SEL_W { - SIG31_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func31_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func31_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC31_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC31_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func31_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC31_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func31_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC31_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC31_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC31_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func32_in_sel_cfg.rs b/esp32p4/src/gpio/func32_in_sel_cfg.rs deleted file mode 100644 index ab49038479..0000000000 --- a/esp32p4/src/gpio/func32_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC32_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC32_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC32_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC32_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC32_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC32_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC32_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC32_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC32_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC32_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG32_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG32_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG32_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG32_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func32_in_sel(&self) -> FUNC32_IN_SEL_R { - FUNC32_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func32_in_inv_sel(&self) -> FUNC32_IN_INV_SEL_R { - FUNC32_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig32_in_sel(&self) -> SIG32_IN_SEL_R { - SIG32_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC32_IN_SEL_CFG") - .field( - "func32_in_sel", - &format_args!("{}", self.func32_in_sel().bits()), - ) - .field( - "func32_in_inv_sel", - &format_args!("{}", self.func32_in_inv_sel().bit()), - ) - .field( - "sig32_in_sel", - &format_args!("{}", self.sig32_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func32_in_sel(&mut self) -> FUNC32_IN_SEL_W { - FUNC32_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func32_in_inv_sel(&mut self) -> FUNC32_IN_INV_SEL_W { - FUNC32_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig32_in_sel(&mut self) -> SIG32_IN_SEL_W { - SIG32_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func32_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func32_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC32_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC32_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func32_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC32_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func32_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC32_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC32_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC32_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func33_in_sel_cfg.rs b/esp32p4/src/gpio/func33_in_sel_cfg.rs deleted file mode 100644 index d2a6eb72b3..0000000000 --- a/esp32p4/src/gpio/func33_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC33_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC33_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC33_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC33_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC33_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC33_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC33_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC33_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC33_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC33_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG33_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG33_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG33_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG33_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func33_in_sel(&self) -> FUNC33_IN_SEL_R { - FUNC33_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func33_in_inv_sel(&self) -> FUNC33_IN_INV_SEL_R { - FUNC33_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig33_in_sel(&self) -> SIG33_IN_SEL_R { - SIG33_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC33_IN_SEL_CFG") - .field( - "func33_in_sel", - &format_args!("{}", self.func33_in_sel().bits()), - ) - .field( - "func33_in_inv_sel", - &format_args!("{}", self.func33_in_inv_sel().bit()), - ) - .field( - "sig33_in_sel", - &format_args!("{}", self.sig33_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func33_in_sel(&mut self) -> FUNC33_IN_SEL_W { - FUNC33_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func33_in_inv_sel(&mut self) -> FUNC33_IN_INV_SEL_W { - FUNC33_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig33_in_sel(&mut self) -> SIG33_IN_SEL_W { - SIG33_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func33_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func33_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC33_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC33_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func33_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC33_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func33_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC33_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC33_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC33_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func34_in_sel_cfg.rs b/esp32p4/src/gpio/func34_in_sel_cfg.rs deleted file mode 100644 index c694caf56e..0000000000 --- a/esp32p4/src/gpio/func34_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC34_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC34_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC34_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC34_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC34_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC34_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC34_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC34_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC34_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC34_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG34_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG34_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG34_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG34_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func34_in_sel(&self) -> FUNC34_IN_SEL_R { - FUNC34_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func34_in_inv_sel(&self) -> FUNC34_IN_INV_SEL_R { - FUNC34_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig34_in_sel(&self) -> SIG34_IN_SEL_R { - SIG34_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC34_IN_SEL_CFG") - .field( - "func34_in_sel", - &format_args!("{}", self.func34_in_sel().bits()), - ) - .field( - "func34_in_inv_sel", - &format_args!("{}", self.func34_in_inv_sel().bit()), - ) - .field( - "sig34_in_sel", - &format_args!("{}", self.sig34_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func34_in_sel(&mut self) -> FUNC34_IN_SEL_W { - FUNC34_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func34_in_inv_sel(&mut self) -> FUNC34_IN_INV_SEL_W { - FUNC34_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig34_in_sel(&mut self) -> SIG34_IN_SEL_W { - SIG34_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func34_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func34_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC34_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC34_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func34_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC34_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func34_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC34_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC34_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC34_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func35_in_sel_cfg.rs b/esp32p4/src/gpio/func35_in_sel_cfg.rs deleted file mode 100644 index 0b0447dc35..0000000000 --- a/esp32p4/src/gpio/func35_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC35_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC35_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC35_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC35_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC35_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC35_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC35_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC35_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC35_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC35_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG35_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG35_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG35_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG35_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func35_in_sel(&self) -> FUNC35_IN_SEL_R { - FUNC35_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func35_in_inv_sel(&self) -> FUNC35_IN_INV_SEL_R { - FUNC35_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig35_in_sel(&self) -> SIG35_IN_SEL_R { - SIG35_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC35_IN_SEL_CFG") - .field( - "func35_in_sel", - &format_args!("{}", self.func35_in_sel().bits()), - ) - .field( - "func35_in_inv_sel", - &format_args!("{}", self.func35_in_inv_sel().bit()), - ) - .field( - "sig35_in_sel", - &format_args!("{}", self.sig35_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func35_in_sel(&mut self) -> FUNC35_IN_SEL_W { - FUNC35_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func35_in_inv_sel(&mut self) -> FUNC35_IN_INV_SEL_W { - FUNC35_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig35_in_sel(&mut self) -> SIG35_IN_SEL_W { - SIG35_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func35_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func35_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC35_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC35_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func35_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC35_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func35_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC35_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC35_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC35_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func36_in_sel_cfg.rs b/esp32p4/src/gpio/func36_in_sel_cfg.rs deleted file mode 100644 index d62bbcd7e6..0000000000 --- a/esp32p4/src/gpio/func36_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC36_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC36_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC36_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC36_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC36_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC36_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC36_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC36_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC36_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC36_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG36_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG36_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG36_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG36_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func36_in_sel(&self) -> FUNC36_IN_SEL_R { - FUNC36_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func36_in_inv_sel(&self) -> FUNC36_IN_INV_SEL_R { - FUNC36_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig36_in_sel(&self) -> SIG36_IN_SEL_R { - SIG36_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC36_IN_SEL_CFG") - .field( - "func36_in_sel", - &format_args!("{}", self.func36_in_sel().bits()), - ) - .field( - "func36_in_inv_sel", - &format_args!("{}", self.func36_in_inv_sel().bit()), - ) - .field( - "sig36_in_sel", - &format_args!("{}", self.sig36_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func36_in_sel(&mut self) -> FUNC36_IN_SEL_W { - FUNC36_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func36_in_inv_sel(&mut self) -> FUNC36_IN_INV_SEL_W { - FUNC36_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig36_in_sel(&mut self) -> SIG36_IN_SEL_W { - SIG36_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func36_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func36_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC36_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC36_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func36_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC36_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func36_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC36_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC36_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC36_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func37_in_sel_cfg.rs b/esp32p4/src/gpio/func37_in_sel_cfg.rs deleted file mode 100644 index b131c3ce1b..0000000000 --- a/esp32p4/src/gpio/func37_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC37_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC37_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC37_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC37_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC37_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC37_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC37_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC37_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC37_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC37_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG37_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG37_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG37_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG37_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func37_in_sel(&self) -> FUNC37_IN_SEL_R { - FUNC37_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func37_in_inv_sel(&self) -> FUNC37_IN_INV_SEL_R { - FUNC37_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig37_in_sel(&self) -> SIG37_IN_SEL_R { - SIG37_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC37_IN_SEL_CFG") - .field( - "func37_in_sel", - &format_args!("{}", self.func37_in_sel().bits()), - ) - .field( - "func37_in_inv_sel", - &format_args!("{}", self.func37_in_inv_sel().bit()), - ) - .field( - "sig37_in_sel", - &format_args!("{}", self.sig37_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func37_in_sel(&mut self) -> FUNC37_IN_SEL_W { - FUNC37_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func37_in_inv_sel(&mut self) -> FUNC37_IN_INV_SEL_W { - FUNC37_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig37_in_sel(&mut self) -> SIG37_IN_SEL_W { - SIG37_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func37_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func37_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC37_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC37_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func37_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC37_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func37_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC37_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC37_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC37_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func38_in_sel_cfg.rs b/esp32p4/src/gpio/func38_in_sel_cfg.rs deleted file mode 100644 index bf37b34932..0000000000 --- a/esp32p4/src/gpio/func38_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC38_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC38_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC38_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC38_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC38_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC38_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC38_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC38_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC38_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC38_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG38_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG38_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG38_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG38_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func38_in_sel(&self) -> FUNC38_IN_SEL_R { - FUNC38_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func38_in_inv_sel(&self) -> FUNC38_IN_INV_SEL_R { - FUNC38_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig38_in_sel(&self) -> SIG38_IN_SEL_R { - SIG38_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC38_IN_SEL_CFG") - .field( - "func38_in_sel", - &format_args!("{}", self.func38_in_sel().bits()), - ) - .field( - "func38_in_inv_sel", - &format_args!("{}", self.func38_in_inv_sel().bit()), - ) - .field( - "sig38_in_sel", - &format_args!("{}", self.sig38_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func38_in_sel(&mut self) -> FUNC38_IN_SEL_W { - FUNC38_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func38_in_inv_sel(&mut self) -> FUNC38_IN_INV_SEL_W { - FUNC38_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig38_in_sel(&mut self) -> SIG38_IN_SEL_W { - SIG38_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func38_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func38_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC38_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC38_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func38_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC38_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func38_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC38_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC38_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC38_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func39_in_sel_cfg.rs b/esp32p4/src/gpio/func39_in_sel_cfg.rs deleted file mode 100644 index e59ab91e87..0000000000 --- a/esp32p4/src/gpio/func39_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC39_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC39_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC39_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC39_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC39_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC39_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC39_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC39_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC39_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC39_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG39_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG39_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG39_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG39_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func39_in_sel(&self) -> FUNC39_IN_SEL_R { - FUNC39_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func39_in_inv_sel(&self) -> FUNC39_IN_INV_SEL_R { - FUNC39_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig39_in_sel(&self) -> SIG39_IN_SEL_R { - SIG39_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC39_IN_SEL_CFG") - .field( - "func39_in_sel", - &format_args!("{}", self.func39_in_sel().bits()), - ) - .field( - "func39_in_inv_sel", - &format_args!("{}", self.func39_in_inv_sel().bit()), - ) - .field( - "sig39_in_sel", - &format_args!("{}", self.sig39_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func39_in_sel(&mut self) -> FUNC39_IN_SEL_W { - FUNC39_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func39_in_inv_sel(&mut self) -> FUNC39_IN_INV_SEL_W { - FUNC39_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig39_in_sel(&mut self) -> SIG39_IN_SEL_W { - SIG39_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func39_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func39_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC39_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC39_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func39_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC39_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func39_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC39_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC39_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC39_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func3_in_sel_cfg.rs b/esp32p4/src/gpio/func3_in_sel_cfg.rs deleted file mode 100644 index 3cdd30e36e..0000000000 --- a/esp32p4/src/gpio/func3_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC3_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC3_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC3_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC3_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC3_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC3_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC3_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC3_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC3_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC3_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG3_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG3_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG3_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG3_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func3_in_sel(&self) -> FUNC3_IN_SEL_R { - FUNC3_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func3_in_inv_sel(&self) -> FUNC3_IN_INV_SEL_R { - FUNC3_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig3_in_sel(&self) -> SIG3_IN_SEL_R { - SIG3_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC3_IN_SEL_CFG") - .field( - "func3_in_sel", - &format_args!("{}", self.func3_in_sel().bits()), - ) - .field( - "func3_in_inv_sel", - &format_args!("{}", self.func3_in_inv_sel().bit()), - ) - .field("sig3_in_sel", &format_args!("{}", self.sig3_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func3_in_sel(&mut self) -> FUNC3_IN_SEL_W { - FUNC3_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func3_in_inv_sel(&mut self) -> FUNC3_IN_INV_SEL_W { - FUNC3_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig3_in_sel(&mut self) -> SIG3_IN_SEL_W { - SIG3_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func3_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func3_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC3_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC3_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func3_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC3_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func3_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC3_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC3_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC3_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func40_in_sel_cfg.rs b/esp32p4/src/gpio/func40_in_sel_cfg.rs deleted file mode 100644 index 538776c779..0000000000 --- a/esp32p4/src/gpio/func40_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC40_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC40_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC40_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC40_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC40_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC40_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC40_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC40_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC40_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC40_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG40_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG40_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG40_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG40_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func40_in_sel(&self) -> FUNC40_IN_SEL_R { - FUNC40_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func40_in_inv_sel(&self) -> FUNC40_IN_INV_SEL_R { - FUNC40_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig40_in_sel(&self) -> SIG40_IN_SEL_R { - SIG40_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC40_IN_SEL_CFG") - .field( - "func40_in_sel", - &format_args!("{}", self.func40_in_sel().bits()), - ) - .field( - "func40_in_inv_sel", - &format_args!("{}", self.func40_in_inv_sel().bit()), - ) - .field( - "sig40_in_sel", - &format_args!("{}", self.sig40_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func40_in_sel(&mut self) -> FUNC40_IN_SEL_W { - FUNC40_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func40_in_inv_sel(&mut self) -> FUNC40_IN_INV_SEL_W { - FUNC40_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig40_in_sel(&mut self) -> SIG40_IN_SEL_W { - SIG40_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func40_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func40_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC40_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC40_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func40_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC40_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func40_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC40_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC40_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC40_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func41_in_sel_cfg.rs b/esp32p4/src/gpio/func41_in_sel_cfg.rs deleted file mode 100644 index 1804fe9f0d..0000000000 --- a/esp32p4/src/gpio/func41_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC41_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC41_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC41_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC41_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC41_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC41_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC41_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC41_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC41_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC41_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG41_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG41_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG41_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG41_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func41_in_sel(&self) -> FUNC41_IN_SEL_R { - FUNC41_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func41_in_inv_sel(&self) -> FUNC41_IN_INV_SEL_R { - FUNC41_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig41_in_sel(&self) -> SIG41_IN_SEL_R { - SIG41_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC41_IN_SEL_CFG") - .field( - "func41_in_sel", - &format_args!("{}", self.func41_in_sel().bits()), - ) - .field( - "func41_in_inv_sel", - &format_args!("{}", self.func41_in_inv_sel().bit()), - ) - .field( - "sig41_in_sel", - &format_args!("{}", self.sig41_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func41_in_sel(&mut self) -> FUNC41_IN_SEL_W { - FUNC41_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func41_in_inv_sel(&mut self) -> FUNC41_IN_INV_SEL_W { - FUNC41_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig41_in_sel(&mut self) -> SIG41_IN_SEL_W { - SIG41_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func41_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func41_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC41_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC41_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func41_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC41_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func41_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC41_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC41_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC41_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func42_in_sel_cfg.rs b/esp32p4/src/gpio/func42_in_sel_cfg.rs deleted file mode 100644 index 39088f91a0..0000000000 --- a/esp32p4/src/gpio/func42_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC42_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC42_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC42_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC42_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC42_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC42_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC42_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC42_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC42_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC42_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG42_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG42_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG42_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG42_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func42_in_sel(&self) -> FUNC42_IN_SEL_R { - FUNC42_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func42_in_inv_sel(&self) -> FUNC42_IN_INV_SEL_R { - FUNC42_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig42_in_sel(&self) -> SIG42_IN_SEL_R { - SIG42_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC42_IN_SEL_CFG") - .field( - "func42_in_sel", - &format_args!("{}", self.func42_in_sel().bits()), - ) - .field( - "func42_in_inv_sel", - &format_args!("{}", self.func42_in_inv_sel().bit()), - ) - .field( - "sig42_in_sel", - &format_args!("{}", self.sig42_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func42_in_sel(&mut self) -> FUNC42_IN_SEL_W { - FUNC42_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func42_in_inv_sel(&mut self) -> FUNC42_IN_INV_SEL_W { - FUNC42_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig42_in_sel(&mut self) -> SIG42_IN_SEL_W { - SIG42_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func42_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func42_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC42_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC42_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func42_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC42_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func42_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC42_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC42_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC42_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func43_in_sel_cfg.rs b/esp32p4/src/gpio/func43_in_sel_cfg.rs deleted file mode 100644 index 7f9c08f144..0000000000 --- a/esp32p4/src/gpio/func43_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC43_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC43_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC43_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC43_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC43_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC43_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC43_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC43_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC43_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC43_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG43_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG43_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG43_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG43_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func43_in_sel(&self) -> FUNC43_IN_SEL_R { - FUNC43_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func43_in_inv_sel(&self) -> FUNC43_IN_INV_SEL_R { - FUNC43_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig43_in_sel(&self) -> SIG43_IN_SEL_R { - SIG43_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC43_IN_SEL_CFG") - .field( - "func43_in_sel", - &format_args!("{}", self.func43_in_sel().bits()), - ) - .field( - "func43_in_inv_sel", - &format_args!("{}", self.func43_in_inv_sel().bit()), - ) - .field( - "sig43_in_sel", - &format_args!("{}", self.sig43_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func43_in_sel(&mut self) -> FUNC43_IN_SEL_W { - FUNC43_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func43_in_inv_sel(&mut self) -> FUNC43_IN_INV_SEL_W { - FUNC43_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig43_in_sel(&mut self) -> SIG43_IN_SEL_W { - SIG43_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func43_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func43_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC43_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC43_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func43_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC43_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func43_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC43_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC43_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC43_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func44_in_sel_cfg.rs b/esp32p4/src/gpio/func44_in_sel_cfg.rs deleted file mode 100644 index 4da3541f37..0000000000 --- a/esp32p4/src/gpio/func44_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC44_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC44_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC44_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC44_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC44_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC44_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC44_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC44_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC44_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC44_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG44_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG44_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG44_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG44_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func44_in_sel(&self) -> FUNC44_IN_SEL_R { - FUNC44_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func44_in_inv_sel(&self) -> FUNC44_IN_INV_SEL_R { - FUNC44_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig44_in_sel(&self) -> SIG44_IN_SEL_R { - SIG44_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC44_IN_SEL_CFG") - .field( - "func44_in_sel", - &format_args!("{}", self.func44_in_sel().bits()), - ) - .field( - "func44_in_inv_sel", - &format_args!("{}", self.func44_in_inv_sel().bit()), - ) - .field( - "sig44_in_sel", - &format_args!("{}", self.sig44_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func44_in_sel(&mut self) -> FUNC44_IN_SEL_W { - FUNC44_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func44_in_inv_sel(&mut self) -> FUNC44_IN_INV_SEL_W { - FUNC44_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig44_in_sel(&mut self) -> SIG44_IN_SEL_W { - SIG44_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func44_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func44_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC44_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC44_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func44_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC44_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func44_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC44_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC44_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC44_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func45_in_sel_cfg.rs b/esp32p4/src/gpio/func45_in_sel_cfg.rs deleted file mode 100644 index 0ef63e72d9..0000000000 --- a/esp32p4/src/gpio/func45_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC45_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC45_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC45_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC45_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC45_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC45_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC45_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC45_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC45_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC45_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG45_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG45_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG45_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG45_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func45_in_sel(&self) -> FUNC45_IN_SEL_R { - FUNC45_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func45_in_inv_sel(&self) -> FUNC45_IN_INV_SEL_R { - FUNC45_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig45_in_sel(&self) -> SIG45_IN_SEL_R { - SIG45_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC45_IN_SEL_CFG") - .field( - "func45_in_sel", - &format_args!("{}", self.func45_in_sel().bits()), - ) - .field( - "func45_in_inv_sel", - &format_args!("{}", self.func45_in_inv_sel().bit()), - ) - .field( - "sig45_in_sel", - &format_args!("{}", self.sig45_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func45_in_sel(&mut self) -> FUNC45_IN_SEL_W { - FUNC45_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func45_in_inv_sel(&mut self) -> FUNC45_IN_INV_SEL_W { - FUNC45_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig45_in_sel(&mut self) -> SIG45_IN_SEL_W { - SIG45_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func45_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func45_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC45_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC45_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func45_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC45_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func45_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC45_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC45_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC45_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func47_in_sel_cfg.rs b/esp32p4/src/gpio/func47_in_sel_cfg.rs deleted file mode 100644 index a0c5e3e7d4..0000000000 --- a/esp32p4/src/gpio/func47_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC47_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC47_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC47_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC47_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC47_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC47_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC47_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC47_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC47_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC47_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG47_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG47_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG47_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG47_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func47_in_sel(&self) -> FUNC47_IN_SEL_R { - FUNC47_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func47_in_inv_sel(&self) -> FUNC47_IN_INV_SEL_R { - FUNC47_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig47_in_sel(&self) -> SIG47_IN_SEL_R { - SIG47_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC47_IN_SEL_CFG") - .field( - "func47_in_sel", - &format_args!("{}", self.func47_in_sel().bits()), - ) - .field( - "func47_in_inv_sel", - &format_args!("{}", self.func47_in_inv_sel().bit()), - ) - .field( - "sig47_in_sel", - &format_args!("{}", self.sig47_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func47_in_sel(&mut self) -> FUNC47_IN_SEL_W { - FUNC47_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func47_in_inv_sel(&mut self) -> FUNC47_IN_INV_SEL_W { - FUNC47_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig47_in_sel(&mut self) -> SIG47_IN_SEL_W { - SIG47_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func47_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func47_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC47_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC47_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func47_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC47_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func47_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC47_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC47_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC47_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func48_in_sel_cfg.rs b/esp32p4/src/gpio/func48_in_sel_cfg.rs deleted file mode 100644 index deb39be4e7..0000000000 --- a/esp32p4/src/gpio/func48_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC48_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC48_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC48_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC48_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC48_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC48_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC48_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC48_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC48_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC48_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG48_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG48_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG48_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG48_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func48_in_sel(&self) -> FUNC48_IN_SEL_R { - FUNC48_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func48_in_inv_sel(&self) -> FUNC48_IN_INV_SEL_R { - FUNC48_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig48_in_sel(&self) -> SIG48_IN_SEL_R { - SIG48_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC48_IN_SEL_CFG") - .field( - "func48_in_sel", - &format_args!("{}", self.func48_in_sel().bits()), - ) - .field( - "func48_in_inv_sel", - &format_args!("{}", self.func48_in_inv_sel().bit()), - ) - .field( - "sig48_in_sel", - &format_args!("{}", self.sig48_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func48_in_sel(&mut self) -> FUNC48_IN_SEL_W { - FUNC48_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func48_in_inv_sel(&mut self) -> FUNC48_IN_INV_SEL_W { - FUNC48_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig48_in_sel(&mut self) -> SIG48_IN_SEL_W { - SIG48_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func48_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func48_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC48_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC48_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func48_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC48_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func48_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC48_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC48_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC48_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func49_in_sel_cfg.rs b/esp32p4/src/gpio/func49_in_sel_cfg.rs deleted file mode 100644 index 8a4557796e..0000000000 --- a/esp32p4/src/gpio/func49_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC49_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC49_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC49_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC49_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC49_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC49_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC49_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC49_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC49_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC49_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG49_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG49_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG49_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG49_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func49_in_sel(&self) -> FUNC49_IN_SEL_R { - FUNC49_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func49_in_inv_sel(&self) -> FUNC49_IN_INV_SEL_R { - FUNC49_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig49_in_sel(&self) -> SIG49_IN_SEL_R { - SIG49_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC49_IN_SEL_CFG") - .field( - "func49_in_sel", - &format_args!("{}", self.func49_in_sel().bits()), - ) - .field( - "func49_in_inv_sel", - &format_args!("{}", self.func49_in_inv_sel().bit()), - ) - .field( - "sig49_in_sel", - &format_args!("{}", self.sig49_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func49_in_sel(&mut self) -> FUNC49_IN_SEL_W { - FUNC49_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func49_in_inv_sel(&mut self) -> FUNC49_IN_INV_SEL_W { - FUNC49_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig49_in_sel(&mut self) -> SIG49_IN_SEL_W { - SIG49_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func49_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func49_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC49_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC49_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func49_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC49_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func49_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC49_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC49_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC49_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func4_in_sel_cfg.rs b/esp32p4/src/gpio/func4_in_sel_cfg.rs deleted file mode 100644 index f1ccf14a51..0000000000 --- a/esp32p4/src/gpio/func4_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC4_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC4_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC4_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC4_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC4_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC4_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC4_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC4_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC4_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC4_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG4_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG4_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG4_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG4_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func4_in_sel(&self) -> FUNC4_IN_SEL_R { - FUNC4_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func4_in_inv_sel(&self) -> FUNC4_IN_INV_SEL_R { - FUNC4_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig4_in_sel(&self) -> SIG4_IN_SEL_R { - SIG4_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC4_IN_SEL_CFG") - .field( - "func4_in_sel", - &format_args!("{}", self.func4_in_sel().bits()), - ) - .field( - "func4_in_inv_sel", - &format_args!("{}", self.func4_in_inv_sel().bit()), - ) - .field("sig4_in_sel", &format_args!("{}", self.sig4_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func4_in_sel(&mut self) -> FUNC4_IN_SEL_W { - FUNC4_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func4_in_inv_sel(&mut self) -> FUNC4_IN_INV_SEL_W { - FUNC4_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig4_in_sel(&mut self) -> SIG4_IN_SEL_W { - SIG4_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func4_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func4_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC4_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC4_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func4_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC4_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func4_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC4_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC4_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC4_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func50_in_sel_cfg.rs b/esp32p4/src/gpio/func50_in_sel_cfg.rs deleted file mode 100644 index fd0cc4a08e..0000000000 --- a/esp32p4/src/gpio/func50_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC50_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC50_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC50_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC50_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC50_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC50_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC50_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC50_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC50_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC50_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG50_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG50_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG50_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG50_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func50_in_sel(&self) -> FUNC50_IN_SEL_R { - FUNC50_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func50_in_inv_sel(&self) -> FUNC50_IN_INV_SEL_R { - FUNC50_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig50_in_sel(&self) -> SIG50_IN_SEL_R { - SIG50_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC50_IN_SEL_CFG") - .field( - "func50_in_sel", - &format_args!("{}", self.func50_in_sel().bits()), - ) - .field( - "func50_in_inv_sel", - &format_args!("{}", self.func50_in_inv_sel().bit()), - ) - .field( - "sig50_in_sel", - &format_args!("{}", self.sig50_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func50_in_sel(&mut self) -> FUNC50_IN_SEL_W { - FUNC50_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func50_in_inv_sel(&mut self) -> FUNC50_IN_INV_SEL_W { - FUNC50_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig50_in_sel(&mut self) -> SIG50_IN_SEL_W { - SIG50_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func50_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func50_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC50_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC50_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func50_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC50_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func50_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC50_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC50_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC50_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func51_in_sel_cfg.rs b/esp32p4/src/gpio/func51_in_sel_cfg.rs deleted file mode 100644 index d8696a171b..0000000000 --- a/esp32p4/src/gpio/func51_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC51_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC51_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC51_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC51_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC51_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC51_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC51_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC51_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC51_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC51_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG51_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG51_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG51_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG51_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func51_in_sel(&self) -> FUNC51_IN_SEL_R { - FUNC51_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func51_in_inv_sel(&self) -> FUNC51_IN_INV_SEL_R { - FUNC51_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig51_in_sel(&self) -> SIG51_IN_SEL_R { - SIG51_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC51_IN_SEL_CFG") - .field( - "func51_in_sel", - &format_args!("{}", self.func51_in_sel().bits()), - ) - .field( - "func51_in_inv_sel", - &format_args!("{}", self.func51_in_inv_sel().bit()), - ) - .field( - "sig51_in_sel", - &format_args!("{}", self.sig51_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func51_in_sel(&mut self) -> FUNC51_IN_SEL_W { - FUNC51_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func51_in_inv_sel(&mut self) -> FUNC51_IN_INV_SEL_W { - FUNC51_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig51_in_sel(&mut self) -> SIG51_IN_SEL_W { - SIG51_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func51_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func51_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC51_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC51_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func51_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC51_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func51_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC51_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC51_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC51_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func52_in_sel_cfg.rs b/esp32p4/src/gpio/func52_in_sel_cfg.rs deleted file mode 100644 index 5b1ebadee0..0000000000 --- a/esp32p4/src/gpio/func52_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC52_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC52_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC52_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC52_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC52_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC52_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC52_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC52_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC52_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC52_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG52_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG52_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG52_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG52_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func52_in_sel(&self) -> FUNC52_IN_SEL_R { - FUNC52_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func52_in_inv_sel(&self) -> FUNC52_IN_INV_SEL_R { - FUNC52_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig52_in_sel(&self) -> SIG52_IN_SEL_R { - SIG52_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC52_IN_SEL_CFG") - .field( - "func52_in_sel", - &format_args!("{}", self.func52_in_sel().bits()), - ) - .field( - "func52_in_inv_sel", - &format_args!("{}", self.func52_in_inv_sel().bit()), - ) - .field( - "sig52_in_sel", - &format_args!("{}", self.sig52_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func52_in_sel(&mut self) -> FUNC52_IN_SEL_W { - FUNC52_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func52_in_inv_sel(&mut self) -> FUNC52_IN_INV_SEL_W { - FUNC52_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig52_in_sel(&mut self) -> SIG52_IN_SEL_W { - SIG52_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func52_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func52_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC52_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC52_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func52_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC52_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func52_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC52_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC52_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC52_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func53_in_sel_cfg.rs b/esp32p4/src/gpio/func53_in_sel_cfg.rs deleted file mode 100644 index 48e63b0c46..0000000000 --- a/esp32p4/src/gpio/func53_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC53_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC53_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC53_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC53_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC53_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC53_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC53_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC53_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC53_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC53_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG53_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG53_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG53_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG53_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func53_in_sel(&self) -> FUNC53_IN_SEL_R { - FUNC53_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func53_in_inv_sel(&self) -> FUNC53_IN_INV_SEL_R { - FUNC53_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig53_in_sel(&self) -> SIG53_IN_SEL_R { - SIG53_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC53_IN_SEL_CFG") - .field( - "func53_in_sel", - &format_args!("{}", self.func53_in_sel().bits()), - ) - .field( - "func53_in_inv_sel", - &format_args!("{}", self.func53_in_inv_sel().bit()), - ) - .field( - "sig53_in_sel", - &format_args!("{}", self.sig53_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func53_in_sel(&mut self) -> FUNC53_IN_SEL_W { - FUNC53_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func53_in_inv_sel(&mut self) -> FUNC53_IN_INV_SEL_W { - FUNC53_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig53_in_sel(&mut self) -> SIG53_IN_SEL_W { - SIG53_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func53_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func53_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC53_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC53_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func53_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC53_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func53_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC53_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC53_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC53_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func54_in_sel_cfg.rs b/esp32p4/src/gpio/func54_in_sel_cfg.rs deleted file mode 100644 index 2dce02fcb3..0000000000 --- a/esp32p4/src/gpio/func54_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC54_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC54_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC54_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC54_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC54_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC54_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC54_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC54_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC54_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC54_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG54_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG54_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG54_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG54_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func54_in_sel(&self) -> FUNC54_IN_SEL_R { - FUNC54_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func54_in_inv_sel(&self) -> FUNC54_IN_INV_SEL_R { - FUNC54_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig54_in_sel(&self) -> SIG54_IN_SEL_R { - SIG54_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC54_IN_SEL_CFG") - .field( - "func54_in_sel", - &format_args!("{}", self.func54_in_sel().bits()), - ) - .field( - "func54_in_inv_sel", - &format_args!("{}", self.func54_in_inv_sel().bit()), - ) - .field( - "sig54_in_sel", - &format_args!("{}", self.sig54_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func54_in_sel(&mut self) -> FUNC54_IN_SEL_W { - FUNC54_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func54_in_inv_sel(&mut self) -> FUNC54_IN_INV_SEL_W { - FUNC54_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig54_in_sel(&mut self) -> SIG54_IN_SEL_W { - SIG54_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func54_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func54_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC54_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC54_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func54_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC54_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func54_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC54_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC54_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC54_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func55_in_sel_cfg.rs b/esp32p4/src/gpio/func55_in_sel_cfg.rs deleted file mode 100644 index 845cd4295f..0000000000 --- a/esp32p4/src/gpio/func55_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC55_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC55_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC55_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC55_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC55_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC55_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC55_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC55_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC55_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC55_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG55_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG55_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG55_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG55_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func55_in_sel(&self) -> FUNC55_IN_SEL_R { - FUNC55_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func55_in_inv_sel(&self) -> FUNC55_IN_INV_SEL_R { - FUNC55_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig55_in_sel(&self) -> SIG55_IN_SEL_R { - SIG55_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC55_IN_SEL_CFG") - .field( - "func55_in_sel", - &format_args!("{}", self.func55_in_sel().bits()), - ) - .field( - "func55_in_inv_sel", - &format_args!("{}", self.func55_in_inv_sel().bit()), - ) - .field( - "sig55_in_sel", - &format_args!("{}", self.sig55_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func55_in_sel(&mut self) -> FUNC55_IN_SEL_W { - FUNC55_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func55_in_inv_sel(&mut self) -> FUNC55_IN_INV_SEL_W { - FUNC55_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig55_in_sel(&mut self) -> SIG55_IN_SEL_W { - SIG55_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func55_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func55_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC55_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC55_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func55_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC55_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func55_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC55_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC55_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC55_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func56_in_sel_cfg.rs b/esp32p4/src/gpio/func56_in_sel_cfg.rs deleted file mode 100644 index b629ad8487..0000000000 --- a/esp32p4/src/gpio/func56_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC56_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC56_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC56_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC56_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC56_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC56_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC56_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC56_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC56_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC56_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG56_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG56_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG56_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG56_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func56_in_sel(&self) -> FUNC56_IN_SEL_R { - FUNC56_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func56_in_inv_sel(&self) -> FUNC56_IN_INV_SEL_R { - FUNC56_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig56_in_sel(&self) -> SIG56_IN_SEL_R { - SIG56_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC56_IN_SEL_CFG") - .field( - "func56_in_sel", - &format_args!("{}", self.func56_in_sel().bits()), - ) - .field( - "func56_in_inv_sel", - &format_args!("{}", self.func56_in_inv_sel().bit()), - ) - .field( - "sig56_in_sel", - &format_args!("{}", self.sig56_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func56_in_sel(&mut self) -> FUNC56_IN_SEL_W { - FUNC56_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func56_in_inv_sel(&mut self) -> FUNC56_IN_INV_SEL_W { - FUNC56_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig56_in_sel(&mut self) -> SIG56_IN_SEL_W { - SIG56_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func56_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func56_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC56_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC56_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func56_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC56_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func56_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC56_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC56_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC56_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func57_in_sel_cfg.rs b/esp32p4/src/gpio/func57_in_sel_cfg.rs deleted file mode 100644 index 4b63fa4b7d..0000000000 --- a/esp32p4/src/gpio/func57_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC57_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC57_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC57_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC57_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC57_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC57_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC57_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC57_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC57_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC57_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG57_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG57_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG57_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG57_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func57_in_sel(&self) -> FUNC57_IN_SEL_R { - FUNC57_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func57_in_inv_sel(&self) -> FUNC57_IN_INV_SEL_R { - FUNC57_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig57_in_sel(&self) -> SIG57_IN_SEL_R { - SIG57_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC57_IN_SEL_CFG") - .field( - "func57_in_sel", - &format_args!("{}", self.func57_in_sel().bits()), - ) - .field( - "func57_in_inv_sel", - &format_args!("{}", self.func57_in_inv_sel().bit()), - ) - .field( - "sig57_in_sel", - &format_args!("{}", self.sig57_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func57_in_sel(&mut self) -> FUNC57_IN_SEL_W { - FUNC57_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func57_in_inv_sel(&mut self) -> FUNC57_IN_INV_SEL_W { - FUNC57_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig57_in_sel(&mut self) -> SIG57_IN_SEL_W { - SIG57_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func57_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func57_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC57_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC57_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func57_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC57_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func57_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC57_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC57_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC57_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func58_in_sel_cfg.rs b/esp32p4/src/gpio/func58_in_sel_cfg.rs deleted file mode 100644 index fec503bf56..0000000000 --- a/esp32p4/src/gpio/func58_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC58_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC58_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC58_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC58_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC58_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC58_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC58_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC58_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC58_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC58_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG58_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG58_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG58_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG58_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func58_in_sel(&self) -> FUNC58_IN_SEL_R { - FUNC58_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func58_in_inv_sel(&self) -> FUNC58_IN_INV_SEL_R { - FUNC58_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig58_in_sel(&self) -> SIG58_IN_SEL_R { - SIG58_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC58_IN_SEL_CFG") - .field( - "func58_in_sel", - &format_args!("{}", self.func58_in_sel().bits()), - ) - .field( - "func58_in_inv_sel", - &format_args!("{}", self.func58_in_inv_sel().bit()), - ) - .field( - "sig58_in_sel", - &format_args!("{}", self.sig58_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func58_in_sel(&mut self) -> FUNC58_IN_SEL_W { - FUNC58_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func58_in_inv_sel(&mut self) -> FUNC58_IN_INV_SEL_W { - FUNC58_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig58_in_sel(&mut self) -> SIG58_IN_SEL_W { - SIG58_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func58_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func58_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC58_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC58_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func58_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC58_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func58_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC58_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC58_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC58_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func59_in_sel_cfg.rs b/esp32p4/src/gpio/func59_in_sel_cfg.rs deleted file mode 100644 index 5754aa2dd5..0000000000 --- a/esp32p4/src/gpio/func59_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC59_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC59_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC59_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC59_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC59_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC59_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC59_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC59_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC59_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC59_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG59_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG59_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG59_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG59_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func59_in_sel(&self) -> FUNC59_IN_SEL_R { - FUNC59_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func59_in_inv_sel(&self) -> FUNC59_IN_INV_SEL_R { - FUNC59_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig59_in_sel(&self) -> SIG59_IN_SEL_R { - SIG59_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC59_IN_SEL_CFG") - .field( - "func59_in_sel", - &format_args!("{}", self.func59_in_sel().bits()), - ) - .field( - "func59_in_inv_sel", - &format_args!("{}", self.func59_in_inv_sel().bit()), - ) - .field( - "sig59_in_sel", - &format_args!("{}", self.sig59_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func59_in_sel(&mut self) -> FUNC59_IN_SEL_W { - FUNC59_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func59_in_inv_sel(&mut self) -> FUNC59_IN_INV_SEL_W { - FUNC59_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig59_in_sel(&mut self) -> SIG59_IN_SEL_W { - SIG59_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func59_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func59_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC59_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC59_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func59_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC59_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func59_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC59_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC59_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC59_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func5_in_sel_cfg.rs b/esp32p4/src/gpio/func5_in_sel_cfg.rs deleted file mode 100644 index 34976da9dd..0000000000 --- a/esp32p4/src/gpio/func5_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC5_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC5_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC5_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC5_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC5_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC5_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC5_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC5_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC5_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC5_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG5_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG5_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG5_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG5_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func5_in_sel(&self) -> FUNC5_IN_SEL_R { - FUNC5_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func5_in_inv_sel(&self) -> FUNC5_IN_INV_SEL_R { - FUNC5_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig5_in_sel(&self) -> SIG5_IN_SEL_R { - SIG5_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC5_IN_SEL_CFG") - .field( - "func5_in_sel", - &format_args!("{}", self.func5_in_sel().bits()), - ) - .field( - "func5_in_inv_sel", - &format_args!("{}", self.func5_in_inv_sel().bit()), - ) - .field("sig5_in_sel", &format_args!("{}", self.sig5_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func5_in_sel(&mut self) -> FUNC5_IN_SEL_W { - FUNC5_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func5_in_inv_sel(&mut self) -> FUNC5_IN_INV_SEL_W { - FUNC5_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig5_in_sel(&mut self) -> SIG5_IN_SEL_W { - SIG5_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func5_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func5_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC5_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC5_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func5_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC5_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func5_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC5_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC5_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC5_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func60_in_sel_cfg.rs b/esp32p4/src/gpio/func60_in_sel_cfg.rs deleted file mode 100644 index e698de8167..0000000000 --- a/esp32p4/src/gpio/func60_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC60_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC60_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC60_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC60_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC60_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC60_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC60_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC60_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC60_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC60_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG60_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG60_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG60_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG60_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func60_in_sel(&self) -> FUNC60_IN_SEL_R { - FUNC60_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func60_in_inv_sel(&self) -> FUNC60_IN_INV_SEL_R { - FUNC60_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig60_in_sel(&self) -> SIG60_IN_SEL_R { - SIG60_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC60_IN_SEL_CFG") - .field( - "func60_in_sel", - &format_args!("{}", self.func60_in_sel().bits()), - ) - .field( - "func60_in_inv_sel", - &format_args!("{}", self.func60_in_inv_sel().bit()), - ) - .field( - "sig60_in_sel", - &format_args!("{}", self.sig60_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func60_in_sel(&mut self) -> FUNC60_IN_SEL_W { - FUNC60_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func60_in_inv_sel(&mut self) -> FUNC60_IN_INV_SEL_W { - FUNC60_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig60_in_sel(&mut self) -> SIG60_IN_SEL_W { - SIG60_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func60_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func60_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC60_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC60_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func60_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC60_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func60_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC60_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC60_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC60_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func61_in_sel_cfg.rs b/esp32p4/src/gpio/func61_in_sel_cfg.rs deleted file mode 100644 index c1907d9af2..0000000000 --- a/esp32p4/src/gpio/func61_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC61_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC61_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC61_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC61_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC61_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC61_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC61_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC61_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC61_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC61_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG61_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG61_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG61_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG61_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func61_in_sel(&self) -> FUNC61_IN_SEL_R { - FUNC61_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func61_in_inv_sel(&self) -> FUNC61_IN_INV_SEL_R { - FUNC61_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig61_in_sel(&self) -> SIG61_IN_SEL_R { - SIG61_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC61_IN_SEL_CFG") - .field( - "func61_in_sel", - &format_args!("{}", self.func61_in_sel().bits()), - ) - .field( - "func61_in_inv_sel", - &format_args!("{}", self.func61_in_inv_sel().bit()), - ) - .field( - "sig61_in_sel", - &format_args!("{}", self.sig61_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func61_in_sel(&mut self) -> FUNC61_IN_SEL_W { - FUNC61_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func61_in_inv_sel(&mut self) -> FUNC61_IN_INV_SEL_W { - FUNC61_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig61_in_sel(&mut self) -> SIG61_IN_SEL_W { - SIG61_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func61_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func61_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC61_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC61_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func61_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC61_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func61_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC61_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC61_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC61_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func62_in_sel_cfg.rs b/esp32p4/src/gpio/func62_in_sel_cfg.rs deleted file mode 100644 index 03c51cc7a0..0000000000 --- a/esp32p4/src/gpio/func62_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC62_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC62_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC62_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC62_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC62_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC62_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC62_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC62_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC62_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC62_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG62_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG62_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG62_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG62_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func62_in_sel(&self) -> FUNC62_IN_SEL_R { - FUNC62_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func62_in_inv_sel(&self) -> FUNC62_IN_INV_SEL_R { - FUNC62_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig62_in_sel(&self) -> SIG62_IN_SEL_R { - SIG62_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC62_IN_SEL_CFG") - .field( - "func62_in_sel", - &format_args!("{}", self.func62_in_sel().bits()), - ) - .field( - "func62_in_inv_sel", - &format_args!("{}", self.func62_in_inv_sel().bit()), - ) - .field( - "sig62_in_sel", - &format_args!("{}", self.sig62_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func62_in_sel(&mut self) -> FUNC62_IN_SEL_W { - FUNC62_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func62_in_inv_sel(&mut self) -> FUNC62_IN_INV_SEL_W { - FUNC62_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig62_in_sel(&mut self) -> SIG62_IN_SEL_W { - SIG62_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func62_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func62_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC62_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC62_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func62_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC62_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func62_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC62_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC62_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC62_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func63_in_sel_cfg.rs b/esp32p4/src/gpio/func63_in_sel_cfg.rs deleted file mode 100644 index d00dc35196..0000000000 --- a/esp32p4/src/gpio/func63_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC63_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC63_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC63_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC63_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC63_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC63_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC63_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC63_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC63_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC63_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG63_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG63_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG63_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG63_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func63_in_sel(&self) -> FUNC63_IN_SEL_R { - FUNC63_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func63_in_inv_sel(&self) -> FUNC63_IN_INV_SEL_R { - FUNC63_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig63_in_sel(&self) -> SIG63_IN_SEL_R { - SIG63_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC63_IN_SEL_CFG") - .field( - "func63_in_sel", - &format_args!("{}", self.func63_in_sel().bits()), - ) - .field( - "func63_in_inv_sel", - &format_args!("{}", self.func63_in_inv_sel().bit()), - ) - .field( - "sig63_in_sel", - &format_args!("{}", self.sig63_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func63_in_sel(&mut self) -> FUNC63_IN_SEL_W { - FUNC63_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func63_in_inv_sel(&mut self) -> FUNC63_IN_INV_SEL_W { - FUNC63_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig63_in_sel(&mut self) -> SIG63_IN_SEL_W { - SIG63_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func63_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func63_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC63_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC63_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func63_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC63_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func63_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC63_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC63_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC63_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func64_in_sel_cfg.rs b/esp32p4/src/gpio/func64_in_sel_cfg.rs deleted file mode 100644 index 4a3271a7cd..0000000000 --- a/esp32p4/src/gpio/func64_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC64_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC64_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC64_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC64_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC64_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC64_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC64_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC64_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC64_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC64_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG64_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG64_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG64_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG64_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func64_in_sel(&self) -> FUNC64_IN_SEL_R { - FUNC64_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func64_in_inv_sel(&self) -> FUNC64_IN_INV_SEL_R { - FUNC64_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig64_in_sel(&self) -> SIG64_IN_SEL_R { - SIG64_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC64_IN_SEL_CFG") - .field( - "func64_in_sel", - &format_args!("{}", self.func64_in_sel().bits()), - ) - .field( - "func64_in_inv_sel", - &format_args!("{}", self.func64_in_inv_sel().bit()), - ) - .field( - "sig64_in_sel", - &format_args!("{}", self.sig64_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func64_in_sel(&mut self) -> FUNC64_IN_SEL_W { - FUNC64_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func64_in_inv_sel(&mut self) -> FUNC64_IN_INV_SEL_W { - FUNC64_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig64_in_sel(&mut self) -> SIG64_IN_SEL_W { - SIG64_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func64_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func64_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC64_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC64_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func64_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC64_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func64_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC64_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC64_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC64_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func65_in_sel_cfg.rs b/esp32p4/src/gpio/func65_in_sel_cfg.rs deleted file mode 100644 index af4a2fbe22..0000000000 --- a/esp32p4/src/gpio/func65_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC65_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC65_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC65_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC65_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC65_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC65_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC65_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC65_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC65_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC65_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG65_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG65_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG65_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG65_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func65_in_sel(&self) -> FUNC65_IN_SEL_R { - FUNC65_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func65_in_inv_sel(&self) -> FUNC65_IN_INV_SEL_R { - FUNC65_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig65_in_sel(&self) -> SIG65_IN_SEL_R { - SIG65_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC65_IN_SEL_CFG") - .field( - "func65_in_sel", - &format_args!("{}", self.func65_in_sel().bits()), - ) - .field( - "func65_in_inv_sel", - &format_args!("{}", self.func65_in_inv_sel().bit()), - ) - .field( - "sig65_in_sel", - &format_args!("{}", self.sig65_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func65_in_sel(&mut self) -> FUNC65_IN_SEL_W { - FUNC65_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func65_in_inv_sel(&mut self) -> FUNC65_IN_INV_SEL_W { - FUNC65_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig65_in_sel(&mut self) -> SIG65_IN_SEL_W { - SIG65_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func65_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func65_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC65_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC65_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func65_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC65_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func65_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC65_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC65_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC65_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func66_in_sel_cfg.rs b/esp32p4/src/gpio/func66_in_sel_cfg.rs deleted file mode 100644 index 24b35659ea..0000000000 --- a/esp32p4/src/gpio/func66_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC66_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC66_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC66_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC66_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC66_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC66_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC66_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC66_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC66_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC66_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG66_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG66_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG66_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG66_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func66_in_sel(&self) -> FUNC66_IN_SEL_R { - FUNC66_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func66_in_inv_sel(&self) -> FUNC66_IN_INV_SEL_R { - FUNC66_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig66_in_sel(&self) -> SIG66_IN_SEL_R { - SIG66_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC66_IN_SEL_CFG") - .field( - "func66_in_sel", - &format_args!("{}", self.func66_in_sel().bits()), - ) - .field( - "func66_in_inv_sel", - &format_args!("{}", self.func66_in_inv_sel().bit()), - ) - .field( - "sig66_in_sel", - &format_args!("{}", self.sig66_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func66_in_sel(&mut self) -> FUNC66_IN_SEL_W { - FUNC66_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func66_in_inv_sel(&mut self) -> FUNC66_IN_INV_SEL_W { - FUNC66_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig66_in_sel(&mut self) -> SIG66_IN_SEL_W { - SIG66_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func66_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func66_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC66_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC66_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func66_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC66_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func66_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC66_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC66_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC66_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func68_in_sel_cfg.rs b/esp32p4/src/gpio/func68_in_sel_cfg.rs deleted file mode 100644 index 1e7990cbc9..0000000000 --- a/esp32p4/src/gpio/func68_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC68_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC68_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC68_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC68_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC68_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC68_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC68_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC68_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC68_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC68_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG68_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG68_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG68_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG68_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func68_in_sel(&self) -> FUNC68_IN_SEL_R { - FUNC68_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func68_in_inv_sel(&self) -> FUNC68_IN_INV_SEL_R { - FUNC68_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig68_in_sel(&self) -> SIG68_IN_SEL_R { - SIG68_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC68_IN_SEL_CFG") - .field( - "func68_in_sel", - &format_args!("{}", self.func68_in_sel().bits()), - ) - .field( - "func68_in_inv_sel", - &format_args!("{}", self.func68_in_inv_sel().bit()), - ) - .field( - "sig68_in_sel", - &format_args!("{}", self.sig68_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func68_in_sel(&mut self) -> FUNC68_IN_SEL_W { - FUNC68_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func68_in_inv_sel(&mut self) -> FUNC68_IN_INV_SEL_W { - FUNC68_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig68_in_sel(&mut self) -> SIG68_IN_SEL_W { - SIG68_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func68_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func68_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC68_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC68_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func68_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC68_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func68_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC68_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC68_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC68_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func69_in_sel_cfg.rs b/esp32p4/src/gpio/func69_in_sel_cfg.rs deleted file mode 100644 index 0b52d562ec..0000000000 --- a/esp32p4/src/gpio/func69_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC69_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC69_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC69_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC69_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC69_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC69_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC69_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC69_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC69_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC69_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG69_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG69_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG69_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG69_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func69_in_sel(&self) -> FUNC69_IN_SEL_R { - FUNC69_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func69_in_inv_sel(&self) -> FUNC69_IN_INV_SEL_R { - FUNC69_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig69_in_sel(&self) -> SIG69_IN_SEL_R { - SIG69_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC69_IN_SEL_CFG") - .field( - "func69_in_sel", - &format_args!("{}", self.func69_in_sel().bits()), - ) - .field( - "func69_in_inv_sel", - &format_args!("{}", self.func69_in_inv_sel().bit()), - ) - .field( - "sig69_in_sel", - &format_args!("{}", self.sig69_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func69_in_sel(&mut self) -> FUNC69_IN_SEL_W { - FUNC69_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func69_in_inv_sel(&mut self) -> FUNC69_IN_INV_SEL_W { - FUNC69_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig69_in_sel(&mut self) -> SIG69_IN_SEL_W { - SIG69_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func69_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func69_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC69_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC69_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func69_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC69_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func69_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC69_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC69_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC69_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func6_in_sel_cfg.rs b/esp32p4/src/gpio/func6_in_sel_cfg.rs deleted file mode 100644 index 583be2c451..0000000000 --- a/esp32p4/src/gpio/func6_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC6_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC6_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC6_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC6_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC6_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC6_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC6_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC6_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC6_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC6_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG6_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG6_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG6_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG6_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func6_in_sel(&self) -> FUNC6_IN_SEL_R { - FUNC6_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func6_in_inv_sel(&self) -> FUNC6_IN_INV_SEL_R { - FUNC6_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig6_in_sel(&self) -> SIG6_IN_SEL_R { - SIG6_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC6_IN_SEL_CFG") - .field( - "func6_in_sel", - &format_args!("{}", self.func6_in_sel().bits()), - ) - .field( - "func6_in_inv_sel", - &format_args!("{}", self.func6_in_inv_sel().bit()), - ) - .field("sig6_in_sel", &format_args!("{}", self.sig6_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func6_in_sel(&mut self) -> FUNC6_IN_SEL_W { - FUNC6_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func6_in_inv_sel(&mut self) -> FUNC6_IN_INV_SEL_W { - FUNC6_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig6_in_sel(&mut self) -> SIG6_IN_SEL_W { - SIG6_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func6_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func6_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC6_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC6_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func6_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC6_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func6_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC6_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC6_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC6_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func70_in_sel_cfg.rs b/esp32p4/src/gpio/func70_in_sel_cfg.rs deleted file mode 100644 index 0da4cd8e17..0000000000 --- a/esp32p4/src/gpio/func70_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC70_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC70_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC70_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC70_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC70_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC70_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC70_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC70_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC70_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC70_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG70_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG70_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG70_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG70_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func70_in_sel(&self) -> FUNC70_IN_SEL_R { - FUNC70_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func70_in_inv_sel(&self) -> FUNC70_IN_INV_SEL_R { - FUNC70_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig70_in_sel(&self) -> SIG70_IN_SEL_R { - SIG70_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC70_IN_SEL_CFG") - .field( - "func70_in_sel", - &format_args!("{}", self.func70_in_sel().bits()), - ) - .field( - "func70_in_inv_sel", - &format_args!("{}", self.func70_in_inv_sel().bit()), - ) - .field( - "sig70_in_sel", - &format_args!("{}", self.sig70_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func70_in_sel(&mut self) -> FUNC70_IN_SEL_W { - FUNC70_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func70_in_inv_sel(&mut self) -> FUNC70_IN_INV_SEL_W { - FUNC70_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig70_in_sel(&mut self) -> SIG70_IN_SEL_W { - SIG70_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func70_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func70_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC70_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC70_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func70_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC70_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func70_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC70_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC70_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC70_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func71_in_sel_cfg.rs b/esp32p4/src/gpio/func71_in_sel_cfg.rs deleted file mode 100644 index 555c7d12d9..0000000000 --- a/esp32p4/src/gpio/func71_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC71_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC71_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC71_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC71_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC71_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC71_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC71_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC71_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC71_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC71_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG71_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG71_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG71_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG71_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func71_in_sel(&self) -> FUNC71_IN_SEL_R { - FUNC71_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func71_in_inv_sel(&self) -> FUNC71_IN_INV_SEL_R { - FUNC71_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig71_in_sel(&self) -> SIG71_IN_SEL_R { - SIG71_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC71_IN_SEL_CFG") - .field( - "func71_in_sel", - &format_args!("{}", self.func71_in_sel().bits()), - ) - .field( - "func71_in_inv_sel", - &format_args!("{}", self.func71_in_inv_sel().bit()), - ) - .field( - "sig71_in_sel", - &format_args!("{}", self.sig71_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func71_in_sel(&mut self) -> FUNC71_IN_SEL_W { - FUNC71_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func71_in_inv_sel(&mut self) -> FUNC71_IN_INV_SEL_W { - FUNC71_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig71_in_sel(&mut self) -> SIG71_IN_SEL_W { - SIG71_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func71_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func71_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC71_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC71_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func71_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC71_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func71_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC71_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC71_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC71_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func74_in_sel_cfg.rs b/esp32p4/src/gpio/func74_in_sel_cfg.rs deleted file mode 100644 index c870b55d71..0000000000 --- a/esp32p4/src/gpio/func74_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC74_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC74_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC74_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC74_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC74_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC74_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC74_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC74_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC74_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC74_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG74_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG74_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG74_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG74_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func74_in_sel(&self) -> FUNC74_IN_SEL_R { - FUNC74_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func74_in_inv_sel(&self) -> FUNC74_IN_INV_SEL_R { - FUNC74_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig74_in_sel(&self) -> SIG74_IN_SEL_R { - SIG74_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC74_IN_SEL_CFG") - .field( - "func74_in_sel", - &format_args!("{}", self.func74_in_sel().bits()), - ) - .field( - "func74_in_inv_sel", - &format_args!("{}", self.func74_in_inv_sel().bit()), - ) - .field( - "sig74_in_sel", - &format_args!("{}", self.sig74_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func74_in_sel(&mut self) -> FUNC74_IN_SEL_W { - FUNC74_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func74_in_inv_sel(&mut self) -> FUNC74_IN_INV_SEL_W { - FUNC74_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig74_in_sel(&mut self) -> SIG74_IN_SEL_W { - SIG74_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func74_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func74_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC74_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC74_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func74_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC74_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func74_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC74_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC74_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC74_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func75_in_sel_cfg.rs b/esp32p4/src/gpio/func75_in_sel_cfg.rs deleted file mode 100644 index f201b4aca0..0000000000 --- a/esp32p4/src/gpio/func75_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC75_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC75_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC75_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC75_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC75_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC75_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC75_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC75_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC75_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC75_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG75_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG75_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG75_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG75_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func75_in_sel(&self) -> FUNC75_IN_SEL_R { - FUNC75_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func75_in_inv_sel(&self) -> FUNC75_IN_INV_SEL_R { - FUNC75_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig75_in_sel(&self) -> SIG75_IN_SEL_R { - SIG75_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC75_IN_SEL_CFG") - .field( - "func75_in_sel", - &format_args!("{}", self.func75_in_sel().bits()), - ) - .field( - "func75_in_inv_sel", - &format_args!("{}", self.func75_in_inv_sel().bit()), - ) - .field( - "sig75_in_sel", - &format_args!("{}", self.sig75_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func75_in_sel(&mut self) -> FUNC75_IN_SEL_W { - FUNC75_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func75_in_inv_sel(&mut self) -> FUNC75_IN_INV_SEL_W { - FUNC75_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig75_in_sel(&mut self) -> SIG75_IN_SEL_W { - SIG75_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func75_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func75_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC75_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC75_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func75_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC75_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func75_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC75_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC75_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC75_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func76_in_sel_cfg.rs b/esp32p4/src/gpio/func76_in_sel_cfg.rs deleted file mode 100644 index 6f29358dd0..0000000000 --- a/esp32p4/src/gpio/func76_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC76_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC76_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC76_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC76_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC76_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC76_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC76_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC76_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC76_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC76_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG76_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG76_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG76_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG76_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func76_in_sel(&self) -> FUNC76_IN_SEL_R { - FUNC76_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func76_in_inv_sel(&self) -> FUNC76_IN_INV_SEL_R { - FUNC76_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig76_in_sel(&self) -> SIG76_IN_SEL_R { - SIG76_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC76_IN_SEL_CFG") - .field( - "func76_in_sel", - &format_args!("{}", self.func76_in_sel().bits()), - ) - .field( - "func76_in_inv_sel", - &format_args!("{}", self.func76_in_inv_sel().bit()), - ) - .field( - "sig76_in_sel", - &format_args!("{}", self.sig76_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func76_in_sel(&mut self) -> FUNC76_IN_SEL_W { - FUNC76_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func76_in_inv_sel(&mut self) -> FUNC76_IN_INV_SEL_W { - FUNC76_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig76_in_sel(&mut self) -> SIG76_IN_SEL_W { - SIG76_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func76_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func76_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC76_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC76_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func76_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC76_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func76_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC76_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC76_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC76_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func77_in_sel_cfg.rs b/esp32p4/src/gpio/func77_in_sel_cfg.rs deleted file mode 100644 index 7b2e05b7b0..0000000000 --- a/esp32p4/src/gpio/func77_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC77_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC77_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC77_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC77_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC77_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC77_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC77_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC77_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC77_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC77_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG77_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG77_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG77_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG77_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func77_in_sel(&self) -> FUNC77_IN_SEL_R { - FUNC77_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func77_in_inv_sel(&self) -> FUNC77_IN_INV_SEL_R { - FUNC77_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig77_in_sel(&self) -> SIG77_IN_SEL_R { - SIG77_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC77_IN_SEL_CFG") - .field( - "func77_in_sel", - &format_args!("{}", self.func77_in_sel().bits()), - ) - .field( - "func77_in_inv_sel", - &format_args!("{}", self.func77_in_inv_sel().bit()), - ) - .field( - "sig77_in_sel", - &format_args!("{}", self.sig77_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func77_in_sel(&mut self) -> FUNC77_IN_SEL_W { - FUNC77_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func77_in_inv_sel(&mut self) -> FUNC77_IN_INV_SEL_W { - FUNC77_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig77_in_sel(&mut self) -> SIG77_IN_SEL_W { - SIG77_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func77_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func77_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC77_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC77_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func77_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC77_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func77_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC77_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC77_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC77_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func78_in_sel_cfg.rs b/esp32p4/src/gpio/func78_in_sel_cfg.rs deleted file mode 100644 index e142426d5e..0000000000 --- a/esp32p4/src/gpio/func78_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC78_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC78_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC78_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC78_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC78_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC78_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC78_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC78_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC78_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC78_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG78_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG78_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG78_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG78_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func78_in_sel(&self) -> FUNC78_IN_SEL_R { - FUNC78_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func78_in_inv_sel(&self) -> FUNC78_IN_INV_SEL_R { - FUNC78_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig78_in_sel(&self) -> SIG78_IN_SEL_R { - SIG78_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC78_IN_SEL_CFG") - .field( - "func78_in_sel", - &format_args!("{}", self.func78_in_sel().bits()), - ) - .field( - "func78_in_inv_sel", - &format_args!("{}", self.func78_in_inv_sel().bit()), - ) - .field( - "sig78_in_sel", - &format_args!("{}", self.sig78_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func78_in_sel(&mut self) -> FUNC78_IN_SEL_W { - FUNC78_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func78_in_inv_sel(&mut self) -> FUNC78_IN_INV_SEL_W { - FUNC78_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig78_in_sel(&mut self) -> SIG78_IN_SEL_W { - SIG78_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func78_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func78_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC78_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC78_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func78_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC78_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func78_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC78_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC78_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC78_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func7_in_sel_cfg.rs b/esp32p4/src/gpio/func7_in_sel_cfg.rs deleted file mode 100644 index 45f202dc17..0000000000 --- a/esp32p4/src/gpio/func7_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC7_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC7_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC7_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC7_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC7_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC7_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC7_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC7_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC7_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC7_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG7_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG7_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG7_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG7_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func7_in_sel(&self) -> FUNC7_IN_SEL_R { - FUNC7_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func7_in_inv_sel(&self) -> FUNC7_IN_INV_SEL_R { - FUNC7_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig7_in_sel(&self) -> SIG7_IN_SEL_R { - SIG7_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC7_IN_SEL_CFG") - .field( - "func7_in_sel", - &format_args!("{}", self.func7_in_sel().bits()), - ) - .field( - "func7_in_inv_sel", - &format_args!("{}", self.func7_in_inv_sel().bit()), - ) - .field("sig7_in_sel", &format_args!("{}", self.sig7_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func7_in_sel(&mut self) -> FUNC7_IN_SEL_W { - FUNC7_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func7_in_inv_sel(&mut self) -> FUNC7_IN_INV_SEL_W { - FUNC7_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig7_in_sel(&mut self) -> SIG7_IN_SEL_W { - SIG7_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func7_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func7_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC7_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC7_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func7_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC7_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func7_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC7_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC7_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC7_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func80_in_sel_cfg.rs b/esp32p4/src/gpio/func80_in_sel_cfg.rs deleted file mode 100644 index 101126b4d4..0000000000 --- a/esp32p4/src/gpio/func80_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC80_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC80_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC80_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC80_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC80_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC80_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC80_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC80_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC80_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC80_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG80_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG80_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG80_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG80_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func80_in_sel(&self) -> FUNC80_IN_SEL_R { - FUNC80_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func80_in_inv_sel(&self) -> FUNC80_IN_INV_SEL_R { - FUNC80_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig80_in_sel(&self) -> SIG80_IN_SEL_R { - SIG80_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC80_IN_SEL_CFG") - .field( - "func80_in_sel", - &format_args!("{}", self.func80_in_sel().bits()), - ) - .field( - "func80_in_inv_sel", - &format_args!("{}", self.func80_in_inv_sel().bit()), - ) - .field( - "sig80_in_sel", - &format_args!("{}", self.sig80_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func80_in_sel(&mut self) -> FUNC80_IN_SEL_W { - FUNC80_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func80_in_inv_sel(&mut self) -> FUNC80_IN_INV_SEL_W { - FUNC80_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig80_in_sel(&mut self) -> SIG80_IN_SEL_W { - SIG80_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func80_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func80_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC80_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC80_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func80_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC80_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func80_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC80_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC80_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC80_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func83_in_sel_cfg.rs b/esp32p4/src/gpio/func83_in_sel_cfg.rs deleted file mode 100644 index f9c8d9e8b1..0000000000 --- a/esp32p4/src/gpio/func83_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC83_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC83_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC83_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC83_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC83_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC83_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC83_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC83_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC83_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC83_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG83_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG83_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG83_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG83_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func83_in_sel(&self) -> FUNC83_IN_SEL_R { - FUNC83_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func83_in_inv_sel(&self) -> FUNC83_IN_INV_SEL_R { - FUNC83_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig83_in_sel(&self) -> SIG83_IN_SEL_R { - SIG83_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC83_IN_SEL_CFG") - .field( - "func83_in_sel", - &format_args!("{}", self.func83_in_sel().bits()), - ) - .field( - "func83_in_inv_sel", - &format_args!("{}", self.func83_in_inv_sel().bit()), - ) - .field( - "sig83_in_sel", - &format_args!("{}", self.sig83_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func83_in_sel(&mut self) -> FUNC83_IN_SEL_W { - FUNC83_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func83_in_inv_sel(&mut self) -> FUNC83_IN_INV_SEL_W { - FUNC83_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig83_in_sel(&mut self) -> SIG83_IN_SEL_W { - SIG83_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func83_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func83_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC83_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC83_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func83_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC83_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func83_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC83_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC83_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC83_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func86_in_sel_cfg.rs b/esp32p4/src/gpio/func86_in_sel_cfg.rs deleted file mode 100644 index dabf2876f3..0000000000 --- a/esp32p4/src/gpio/func86_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC86_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC86_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC86_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC86_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC86_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC86_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC86_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC86_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC86_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC86_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG86_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG86_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG86_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG86_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func86_in_sel(&self) -> FUNC86_IN_SEL_R { - FUNC86_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func86_in_inv_sel(&self) -> FUNC86_IN_INV_SEL_R { - FUNC86_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig86_in_sel(&self) -> SIG86_IN_SEL_R { - SIG86_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC86_IN_SEL_CFG") - .field( - "func86_in_sel", - &format_args!("{}", self.func86_in_sel().bits()), - ) - .field( - "func86_in_inv_sel", - &format_args!("{}", self.func86_in_inv_sel().bit()), - ) - .field( - "sig86_in_sel", - &format_args!("{}", self.sig86_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func86_in_sel(&mut self) -> FUNC86_IN_SEL_W { - FUNC86_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func86_in_inv_sel(&mut self) -> FUNC86_IN_INV_SEL_W { - FUNC86_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig86_in_sel(&mut self) -> SIG86_IN_SEL_W { - SIG86_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func86_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func86_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC86_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC86_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func86_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC86_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func86_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC86_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC86_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC86_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func89_in_sel_cfg.rs b/esp32p4/src/gpio/func89_in_sel_cfg.rs deleted file mode 100644 index 0978990c18..0000000000 --- a/esp32p4/src/gpio/func89_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC89_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC89_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC89_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC89_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC89_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC89_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC89_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC89_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC89_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC89_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG89_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG89_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG89_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG89_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func89_in_sel(&self) -> FUNC89_IN_SEL_R { - FUNC89_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func89_in_inv_sel(&self) -> FUNC89_IN_INV_SEL_R { - FUNC89_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig89_in_sel(&self) -> SIG89_IN_SEL_R { - SIG89_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC89_IN_SEL_CFG") - .field( - "func89_in_sel", - &format_args!("{}", self.func89_in_sel().bits()), - ) - .field( - "func89_in_inv_sel", - &format_args!("{}", self.func89_in_inv_sel().bit()), - ) - .field( - "sig89_in_sel", - &format_args!("{}", self.sig89_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func89_in_sel(&mut self) -> FUNC89_IN_SEL_W { - FUNC89_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func89_in_inv_sel(&mut self) -> FUNC89_IN_INV_SEL_W { - FUNC89_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig89_in_sel(&mut self) -> SIG89_IN_SEL_W { - SIG89_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func89_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func89_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC89_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC89_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func89_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC89_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func89_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC89_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC89_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC89_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func8_in_sel_cfg.rs b/esp32p4/src/gpio/func8_in_sel_cfg.rs deleted file mode 100644 index 06c778a955..0000000000 --- a/esp32p4/src/gpio/func8_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC8_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC8_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC8_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC8_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC8_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC8_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC8_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC8_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC8_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC8_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG8_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG8_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG8_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG8_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func8_in_sel(&self) -> FUNC8_IN_SEL_R { - FUNC8_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func8_in_inv_sel(&self) -> FUNC8_IN_INV_SEL_R { - FUNC8_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig8_in_sel(&self) -> SIG8_IN_SEL_R { - SIG8_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC8_IN_SEL_CFG") - .field( - "func8_in_sel", - &format_args!("{}", self.func8_in_sel().bits()), - ) - .field( - "func8_in_inv_sel", - &format_args!("{}", self.func8_in_inv_sel().bit()), - ) - .field("sig8_in_sel", &format_args!("{}", self.sig8_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func8_in_sel(&mut self) -> FUNC8_IN_SEL_W { - FUNC8_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func8_in_inv_sel(&mut self) -> FUNC8_IN_INV_SEL_W { - FUNC8_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig8_in_sel(&mut self) -> SIG8_IN_SEL_W { - SIG8_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func8_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func8_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC8_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC8_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func8_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC8_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func8_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC8_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC8_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC8_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func90_in_sel_cfg.rs b/esp32p4/src/gpio/func90_in_sel_cfg.rs deleted file mode 100644 index 883064ff5b..0000000000 --- a/esp32p4/src/gpio/func90_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC90_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC90_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC90_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC90_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC90_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC90_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC90_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC90_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC90_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC90_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG90_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG90_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG90_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG90_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func90_in_sel(&self) -> FUNC90_IN_SEL_R { - FUNC90_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func90_in_inv_sel(&self) -> FUNC90_IN_INV_SEL_R { - FUNC90_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig90_in_sel(&self) -> SIG90_IN_SEL_R { - SIG90_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC90_IN_SEL_CFG") - .field( - "func90_in_sel", - &format_args!("{}", self.func90_in_sel().bits()), - ) - .field( - "func90_in_inv_sel", - &format_args!("{}", self.func90_in_inv_sel().bit()), - ) - .field( - "sig90_in_sel", - &format_args!("{}", self.sig90_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func90_in_sel(&mut self) -> FUNC90_IN_SEL_W { - FUNC90_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func90_in_inv_sel(&mut self) -> FUNC90_IN_INV_SEL_W { - FUNC90_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig90_in_sel(&mut self) -> SIG90_IN_SEL_W { - SIG90_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func90_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func90_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC90_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC90_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func90_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC90_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func90_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC90_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC90_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC90_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func91_in_sel_cfg.rs b/esp32p4/src/gpio/func91_in_sel_cfg.rs deleted file mode 100644 index 93e39140d6..0000000000 --- a/esp32p4/src/gpio/func91_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC91_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC91_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC91_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC91_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC91_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC91_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC91_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC91_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC91_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC91_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG91_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG91_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG91_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG91_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func91_in_sel(&self) -> FUNC91_IN_SEL_R { - FUNC91_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func91_in_inv_sel(&self) -> FUNC91_IN_INV_SEL_R { - FUNC91_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig91_in_sel(&self) -> SIG91_IN_SEL_R { - SIG91_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC91_IN_SEL_CFG") - .field( - "func91_in_sel", - &format_args!("{}", self.func91_in_sel().bits()), - ) - .field( - "func91_in_inv_sel", - &format_args!("{}", self.func91_in_inv_sel().bit()), - ) - .field( - "sig91_in_sel", - &format_args!("{}", self.sig91_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func91_in_sel(&mut self) -> FUNC91_IN_SEL_W { - FUNC91_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func91_in_inv_sel(&mut self) -> FUNC91_IN_INV_SEL_W { - FUNC91_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig91_in_sel(&mut self) -> SIG91_IN_SEL_W { - SIG91_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func91_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func91_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC91_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC91_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func91_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC91_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func91_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC91_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC91_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC91_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func92_in_sel_cfg.rs b/esp32p4/src/gpio/func92_in_sel_cfg.rs deleted file mode 100644 index 5e1a1a12d3..0000000000 --- a/esp32p4/src/gpio/func92_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC92_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC92_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC92_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC92_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC92_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC92_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC92_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC92_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC92_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC92_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG92_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG92_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG92_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG92_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func92_in_sel(&self) -> FUNC92_IN_SEL_R { - FUNC92_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func92_in_inv_sel(&self) -> FUNC92_IN_INV_SEL_R { - FUNC92_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig92_in_sel(&self) -> SIG92_IN_SEL_R { - SIG92_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC92_IN_SEL_CFG") - .field( - "func92_in_sel", - &format_args!("{}", self.func92_in_sel().bits()), - ) - .field( - "func92_in_inv_sel", - &format_args!("{}", self.func92_in_inv_sel().bit()), - ) - .field( - "sig92_in_sel", - &format_args!("{}", self.sig92_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func92_in_sel(&mut self) -> FUNC92_IN_SEL_W { - FUNC92_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func92_in_inv_sel(&mut self) -> FUNC92_IN_INV_SEL_W { - FUNC92_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig92_in_sel(&mut self) -> SIG92_IN_SEL_W { - SIG92_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func92_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func92_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC92_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC92_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func92_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC92_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func92_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC92_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC92_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC92_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func93_in_sel_cfg.rs b/esp32p4/src/gpio/func93_in_sel_cfg.rs deleted file mode 100644 index 54fde61ed0..0000000000 --- a/esp32p4/src/gpio/func93_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC93_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC93_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC93_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC93_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC93_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC93_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC93_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC93_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC93_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC93_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG93_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG93_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG93_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG93_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func93_in_sel(&self) -> FUNC93_IN_SEL_R { - FUNC93_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func93_in_inv_sel(&self) -> FUNC93_IN_INV_SEL_R { - FUNC93_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig93_in_sel(&self) -> SIG93_IN_SEL_R { - SIG93_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC93_IN_SEL_CFG") - .field( - "func93_in_sel", - &format_args!("{}", self.func93_in_sel().bits()), - ) - .field( - "func93_in_inv_sel", - &format_args!("{}", self.func93_in_inv_sel().bit()), - ) - .field( - "sig93_in_sel", - &format_args!("{}", self.sig93_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func93_in_sel(&mut self) -> FUNC93_IN_SEL_W { - FUNC93_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func93_in_inv_sel(&mut self) -> FUNC93_IN_INV_SEL_W { - FUNC93_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig93_in_sel(&mut self) -> SIG93_IN_SEL_W { - SIG93_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func93_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func93_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC93_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC93_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func93_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC93_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func93_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC93_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC93_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC93_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func94_in_sel_cfg.rs b/esp32p4/src/gpio/func94_in_sel_cfg.rs deleted file mode 100644 index 48d467aecb..0000000000 --- a/esp32p4/src/gpio/func94_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC94_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC94_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC94_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC94_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC94_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC94_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC94_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC94_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC94_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC94_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG94_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG94_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG94_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG94_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func94_in_sel(&self) -> FUNC94_IN_SEL_R { - FUNC94_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func94_in_inv_sel(&self) -> FUNC94_IN_INV_SEL_R { - FUNC94_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig94_in_sel(&self) -> SIG94_IN_SEL_R { - SIG94_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC94_IN_SEL_CFG") - .field( - "func94_in_sel", - &format_args!("{}", self.func94_in_sel().bits()), - ) - .field( - "func94_in_inv_sel", - &format_args!("{}", self.func94_in_inv_sel().bit()), - ) - .field( - "sig94_in_sel", - &format_args!("{}", self.sig94_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func94_in_sel(&mut self) -> FUNC94_IN_SEL_W { - FUNC94_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func94_in_inv_sel(&mut self) -> FUNC94_IN_INV_SEL_W { - FUNC94_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig94_in_sel(&mut self) -> SIG94_IN_SEL_W { - SIG94_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func94_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func94_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC94_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC94_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func94_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC94_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func94_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC94_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC94_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC94_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func95_in_sel_cfg.rs b/esp32p4/src/gpio/func95_in_sel_cfg.rs deleted file mode 100644 index 6a1fcfa26e..0000000000 --- a/esp32p4/src/gpio/func95_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC95_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC95_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC95_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC95_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC95_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC95_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC95_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC95_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC95_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC95_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG95_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG95_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG95_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG95_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func95_in_sel(&self) -> FUNC95_IN_SEL_R { - FUNC95_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func95_in_inv_sel(&self) -> FUNC95_IN_INV_SEL_R { - FUNC95_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig95_in_sel(&self) -> SIG95_IN_SEL_R { - SIG95_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC95_IN_SEL_CFG") - .field( - "func95_in_sel", - &format_args!("{}", self.func95_in_sel().bits()), - ) - .field( - "func95_in_inv_sel", - &format_args!("{}", self.func95_in_inv_sel().bit()), - ) - .field( - "sig95_in_sel", - &format_args!("{}", self.sig95_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func95_in_sel(&mut self) -> FUNC95_IN_SEL_W { - FUNC95_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func95_in_inv_sel(&mut self) -> FUNC95_IN_INV_SEL_W { - FUNC95_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig95_in_sel(&mut self) -> SIG95_IN_SEL_W { - SIG95_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func95_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func95_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC95_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC95_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func95_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC95_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func95_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC95_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC95_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC95_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func96_in_sel_cfg.rs b/esp32p4/src/gpio/func96_in_sel_cfg.rs deleted file mode 100644 index ed55533c44..0000000000 --- a/esp32p4/src/gpio/func96_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC96_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC96_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC96_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC96_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC96_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC96_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC96_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC96_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC96_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC96_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG96_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG96_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG96_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG96_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func96_in_sel(&self) -> FUNC96_IN_SEL_R { - FUNC96_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func96_in_inv_sel(&self) -> FUNC96_IN_INV_SEL_R { - FUNC96_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig96_in_sel(&self) -> SIG96_IN_SEL_R { - SIG96_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC96_IN_SEL_CFG") - .field( - "func96_in_sel", - &format_args!("{}", self.func96_in_sel().bits()), - ) - .field( - "func96_in_inv_sel", - &format_args!("{}", self.func96_in_inv_sel().bit()), - ) - .field( - "sig96_in_sel", - &format_args!("{}", self.sig96_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func96_in_sel(&mut self) -> FUNC96_IN_SEL_W { - FUNC96_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func96_in_inv_sel(&mut self) -> FUNC96_IN_INV_SEL_W { - FUNC96_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig96_in_sel(&mut self) -> SIG96_IN_SEL_W { - SIG96_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func96_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func96_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC96_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC96_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func96_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC96_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func96_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC96_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC96_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC96_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func97_in_sel_cfg.rs b/esp32p4/src/gpio/func97_in_sel_cfg.rs deleted file mode 100644 index 9e6cfebeca..0000000000 --- a/esp32p4/src/gpio/func97_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC97_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC97_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC97_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC97_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC97_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC97_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC97_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC97_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC97_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC97_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG97_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG97_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG97_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG97_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func97_in_sel(&self) -> FUNC97_IN_SEL_R { - FUNC97_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func97_in_inv_sel(&self) -> FUNC97_IN_INV_SEL_R { - FUNC97_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig97_in_sel(&self) -> SIG97_IN_SEL_R { - SIG97_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC97_IN_SEL_CFG") - .field( - "func97_in_sel", - &format_args!("{}", self.func97_in_sel().bits()), - ) - .field( - "func97_in_inv_sel", - &format_args!("{}", self.func97_in_inv_sel().bit()), - ) - .field( - "sig97_in_sel", - &format_args!("{}", self.sig97_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func97_in_sel(&mut self) -> FUNC97_IN_SEL_W { - FUNC97_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func97_in_inv_sel(&mut self) -> FUNC97_IN_INV_SEL_W { - FUNC97_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig97_in_sel(&mut self) -> SIG97_IN_SEL_W { - SIG97_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func97_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func97_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC97_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC97_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func97_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC97_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func97_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC97_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC97_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC97_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func98_in_sel_cfg.rs b/esp32p4/src/gpio/func98_in_sel_cfg.rs deleted file mode 100644 index 5d926f49a9..0000000000 --- a/esp32p4/src/gpio/func98_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC98_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC98_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC98_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC98_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC98_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC98_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC98_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC98_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC98_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC98_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG98_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG98_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG98_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG98_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func98_in_sel(&self) -> FUNC98_IN_SEL_R { - FUNC98_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func98_in_inv_sel(&self) -> FUNC98_IN_INV_SEL_R { - FUNC98_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig98_in_sel(&self) -> SIG98_IN_SEL_R { - SIG98_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC98_IN_SEL_CFG") - .field( - "func98_in_sel", - &format_args!("{}", self.func98_in_sel().bits()), - ) - .field( - "func98_in_inv_sel", - &format_args!("{}", self.func98_in_inv_sel().bit()), - ) - .field( - "sig98_in_sel", - &format_args!("{}", self.sig98_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func98_in_sel(&mut self) -> FUNC98_IN_SEL_W { - FUNC98_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func98_in_inv_sel(&mut self) -> FUNC98_IN_INV_SEL_W { - FUNC98_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig98_in_sel(&mut self) -> SIG98_IN_SEL_W { - SIG98_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func98_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func98_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC98_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC98_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func98_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC98_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func98_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC98_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC98_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC98_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func99_in_sel_cfg.rs b/esp32p4/src/gpio/func99_in_sel_cfg.rs deleted file mode 100644 index 0a11a12654..0000000000 --- a/esp32p4/src/gpio/func99_in_sel_cfg.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = "Register `FUNC99_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC99_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC99_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC99_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC99_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC99_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC99_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC99_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC99_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC99_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG99_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG99_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG99_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG99_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func99_in_sel(&self) -> FUNC99_IN_SEL_R { - FUNC99_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func99_in_inv_sel(&self) -> FUNC99_IN_INV_SEL_R { - FUNC99_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig99_in_sel(&self) -> SIG99_IN_SEL_R { - SIG99_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC99_IN_SEL_CFG") - .field( - "func99_in_sel", - &format_args!("{}", self.func99_in_sel().bits()), - ) - .field( - "func99_in_inv_sel", - &format_args!("{}", self.func99_in_inv_sel().bit()), - ) - .field( - "sig99_in_sel", - &format_args!("{}", self.sig99_in_sel().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func99_in_sel(&mut self) -> FUNC99_IN_SEL_W { - FUNC99_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func99_in_inv_sel(&mut self) -> FUNC99_IN_INV_SEL_W { - FUNC99_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig99_in_sel(&mut self) -> SIG99_IN_SEL_W { - SIG99_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func99_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func99_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC99_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC99_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func99_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC99_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func99_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC99_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC99_IN_SEL_CFG to value 0x3e"] -impl crate::Resettable for FUNC99_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3e; -} diff --git a/esp32p4/src/gpio/func9_in_sel_cfg.rs b/esp32p4/src/gpio/func9_in_sel_cfg.rs deleted file mode 100644 index b2eed6f442..0000000000 --- a/esp32p4/src/gpio/func9_in_sel_cfg.rs +++ /dev/null @@ -1,101 +0,0 @@ -#[doc = "Register `FUNC9_IN_SEL_CFG` reader"] -pub type R = crate::R; -#[doc = "Register `FUNC9_IN_SEL_CFG` writer"] -pub type W = crate::W; -#[doc = "Field `FUNC9_IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC9_IN_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC9_IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] -pub type FUNC9_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `FUNC9_IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC9_IN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC9_IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] -pub type FUNC9_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SIG9_IN_SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG9_IN_SEL_R = crate::BitReader; -#[doc = "Field `SIG9_IN_SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] -pub type SIG9_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - pub fn func9_in_sel(&self) -> FUNC9_IN_SEL_R { - FUNC9_IN_SEL_R::new((self.bits & 0x3f) as u8) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - pub fn func9_in_inv_sel(&self) -> FUNC9_IN_INV_SEL_R { - FUNC9_IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - pub fn sig9_in_sel(&self) -> SIG9_IN_SEL_R { - SIG9_IN_SEL_R::new(((self.bits >> 7) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FUNC9_IN_SEL_CFG") - .field( - "func9_in_sel", - &format_args!("{}", self.func9_in_sel().bits()), - ) - .field( - "func9_in_inv_sel", - &format_args!("{}", self.func9_in_inv_sel().bit()), - ) - .field("sig9_in_sel", &format_args!("{}", self.sig9_in_sel().bit())) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] - #[inline(always)] - #[must_use] - pub fn func9_in_sel(&mut self) -> FUNC9_IN_SEL_W { - FUNC9_IN_SEL_W::new(self, 0) - } - #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] - #[inline(always)] - #[must_use] - pub fn func9_in_inv_sel(&mut self) -> FUNC9_IN_INV_SEL_W { - FUNC9_IN_INV_SEL_W::new(self, 6) - } - #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] - #[inline(always)] - #[must_use] - pub fn sig9_in_sel(&mut self) -> SIG9_IN_SEL_W { - SIG9_IN_SEL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func9_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func9_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FUNC9_IN_SEL_CFG_SPEC; -impl crate::RegisterSpec for FUNC9_IN_SEL_CFG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`func9_in_sel_cfg::R`](R) reader structure"] -impl crate::Readable for FUNC9_IN_SEL_CFG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`func9_in_sel_cfg::W`](W) writer structure"] -impl crate::Writable for FUNC9_IN_SEL_CFG_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets FUNC9_IN_SEL_CFG to value 0x3f"] -impl crate::Resettable for FUNC9_IN_SEL_CFG_SPEC { - const RESET_VALUE: Self::Ux = 0x3f; -} diff --git a/esp32p4/src/gpio/func_in_sel_cfg.rs b/esp32p4/src/gpio/func_in_sel_cfg.rs new file mode 100644 index 0000000000..67d004aa99 --- /dev/null +++ b/esp32p4/src/gpio/func_in_sel_cfg.rs @@ -0,0 +1,95 @@ +#[doc = "Register `FUNC%s_IN_SEL_CFG` reader"] +pub type R = crate::R; +#[doc = "Register `FUNC%s_IN_SEL_CFG` writer"] +pub type W = crate::W; +#[doc = "Field `IN_SEL` reader - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] +pub type IN_SEL_R = crate::FieldReader; +#[doc = "Field `IN_SEL` writer - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] +pub type IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +#[doc = "Field `IN_INV_SEL` reader - set this bit to invert input signal. 1:invert. 0:not invert."] +pub type IN_INV_SEL_R = crate::BitReader; +#[doc = "Field `IN_INV_SEL` writer - set this bit to invert input signal. 1:invert. 0:not invert."] +pub type IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SEL` reader - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] +pub type SEL_R = crate::BitReader; +#[doc = "Field `SEL` writer - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] +pub type SEL_W<'a, REG> = crate::BitWriter<'a, REG>; +impl R { + #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] + #[inline(always)] + pub fn in_sel(&self) -> IN_SEL_R { + IN_SEL_R::new((self.bits & 0x3f) as u8) + } + #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] + #[inline(always)] + pub fn in_inv_sel(&self) -> IN_INV_SEL_R { + IN_INV_SEL_R::new(((self.bits >> 6) & 1) != 0) + } + #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] + #[inline(always)] + pub fn sel(&self) -> SEL_R { + SEL_R::new(((self.bits >> 7) & 1) != 0) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("FUNC_IN_SEL_CFG") + .field("in_sel", &format_args!("{}", self.in_sel().bits())) + .field("in_inv_sel", &format_args!("{}", self.in_inv_sel().bit())) + .field("sel", &format_args!("{}", self.sel().bit())) + .finish() + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for crate::generic::Reg { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.read(), f) + } +} +impl W { + #[doc = "Bits 0:5 - set this value: s=0-56: connect GPIO\\[s\\] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level."] + #[inline(always)] + #[must_use] + pub fn in_sel(&mut self) -> IN_SEL_W { + IN_SEL_W::new(self, 0) + } + #[doc = "Bit 6 - set this bit to invert input signal. 1:invert. 0:not invert."] + #[inline(always)] + #[must_use] + pub fn in_inv_sel(&mut self) -> IN_INV_SEL_W { + IN_INV_SEL_W::new(self, 6) + } + #[doc = "Bit 7 - set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO."] + #[inline(always)] + #[must_use] + pub fn sel(&mut self) -> SEL_W { + SEL_W::new(self, 7) + } + #[doc = r" Writes raw bits to the register."] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.bits = bits; + self + } +} +#[doc = "GPIO input function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func_in_sel_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct FUNC_IN_SEL_CFG_SPEC; +impl crate::RegisterSpec for FUNC_IN_SEL_CFG_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`func_in_sel_cfg::R`](R) reader structure"] +impl crate::Readable for FUNC_IN_SEL_CFG_SPEC {} +#[doc = "`write(|w| ..)` method takes [`func_in_sel_cfg::W`](W) writer structure"] +impl crate::Writable for FUNC_IN_SEL_CFG_SPEC { + const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +} +#[doc = "`reset()` method sets FUNC%s_IN_SEL_CFG to value 0"] +impl crate::Resettable for FUNC_IN_SEL_CFG_SPEC { + const RESET_VALUE: Self::Ux = 0; +} diff --git a/esp32p4/src/gpio/func_out_sel_cfg.rs b/esp32p4/src/gpio/func_out_sel_cfg.rs index 92ff66521b..d6d706bf92 100644 --- a/esp32p4/src/gpio/func_out_sel_cfg.rs +++ b/esp32p4/src/gpio/func_out_sel_cfg.rs @@ -2,64 +2,52 @@ pub type R = crate::R; #[doc = "Register `FUNC%s_OUT_SEL_CFG` writer"] pub type W = crate::W; -#[doc = "Field `FUNC_OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] -pub type FUNC_OUT_SEL_R = crate::FieldReader; -#[doc = "Field `FUNC_OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] -pub type FUNC_OUT_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `FUNC_OUT_INV_SEL` reader - set this bit to invert output signal.1:invert.0:not invert."] -pub type FUNC_OUT_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC_OUT_INV_SEL` writer - set this bit to invert output signal.1:invert.0:not invert."] -pub type FUNC_OUT_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `FUNC_OEN_SEL` reader - set this bit to select output enable signal.1:use GPIO_ENABLE_REG\\[n\\] as output enable signal.0:use peripheral output enable signal."] -pub type FUNC_OEN_SEL_R = crate::BitReader; -#[doc = "Field `FUNC_OEN_SEL` writer - set this bit to select output enable signal.1:use GPIO_ENABLE_REG\\[n\\] as output enable signal.0:use peripheral output enable signal."] -pub type FUNC_OEN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `FUNC_OEN_INV_SEL` reader - set this bit to invert output enable signal.1:invert.0:not invert."] -pub type FUNC_OEN_INV_SEL_R = crate::BitReader; -#[doc = "Field `FUNC_OEN_INV_SEL` writer - set this bit to invert output enable signal.1:invert.0:not invert."] -pub type FUNC_OEN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +pub type OUT_SEL_R = crate::FieldReader; +#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +pub type OUT_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `INV_SEL` reader - set this bit to invert output signal.1:invert.0:not invert."] +pub type INV_SEL_R = crate::BitReader; +#[doc = "Field `INV_SEL` writer - set this bit to invert output signal.1:invert.0:not invert."] +pub type INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `OEN_SEL` reader - set this bit to select output enable signal.1:use GPIO_ENABLE_REG\\[n\\] as output enable signal.0:use peripheral output enable signal."] +pub type OEN_SEL_R = crate::BitReader; +#[doc = "Field `OEN_SEL` writer - set this bit to select output enable signal.1:use GPIO_ENABLE_REG\\[n\\] as output enable signal.0:use peripheral output enable signal."] +pub type OEN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `OEN_INV_SEL` reader - set this bit to invert output enable signal.1:invert.0:not invert."] +pub type OEN_INV_SEL_R = crate::BitReader; +#[doc = "Field `OEN_INV_SEL` writer - set this bit to invert output enable signal.1:invert.0:not invert."] +pub type OEN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:8 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] - pub fn func_out_sel(&self) -> FUNC_OUT_SEL_R { - FUNC_OUT_SEL_R::new((self.bits & 0x01ff) as u16) + pub fn out_sel(&self) -> OUT_SEL_R { + OUT_SEL_R::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 9 - set this bit to invert output signal.1:invert.0:not invert."] #[inline(always)] - pub fn func_out_inv_sel(&self) -> FUNC_OUT_INV_SEL_R { - FUNC_OUT_INV_SEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn inv_sel(&self) -> INV_SEL_R { + INV_SEL_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - set this bit to select output enable signal.1:use GPIO_ENABLE_REG\\[n\\] as output enable signal.0:use peripheral output enable signal."] #[inline(always)] - pub fn func_oen_sel(&self) -> FUNC_OEN_SEL_R { - FUNC_OEN_SEL_R::new(((self.bits >> 10) & 1) != 0) + pub fn oen_sel(&self) -> OEN_SEL_R { + OEN_SEL_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - set this bit to invert output enable signal.1:invert.0:not invert."] #[inline(always)] - pub fn func_oen_inv_sel(&self) -> FUNC_OEN_INV_SEL_R { - FUNC_OEN_INV_SEL_R::new(((self.bits >> 11) & 1) != 0) + pub fn oen_inv_sel(&self) -> OEN_INV_SEL_R { + OEN_INV_SEL_R::new(((self.bits >> 11) & 1) != 0) } } #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("FUNC_OUT_SEL_CFG") - .field( - "func_out_sel", - &format_args!("{}", self.func_out_sel().bits()), - ) - .field( - "func_out_inv_sel", - &format_args!("{}", self.func_out_inv_sel().bit()), - ) - .field( - "func_oen_sel", - &format_args!("{}", self.func_oen_sel().bit()), - ) - .field( - "func_oen_inv_sel", - &format_args!("{}", self.func_oen_inv_sel().bit()), - ) + .field("out_sel", &format_args!("{}", self.out_sel().bits())) + .field("inv_sel", &format_args!("{}", self.inv_sel().bit())) + .field("oen_sel", &format_args!("{}", self.oen_sel().bit())) + .field("oen_inv_sel", &format_args!("{}", self.oen_inv_sel().bit())) .finish() } } @@ -73,26 +61,26 @@ impl W { #[doc = "Bits 0:8 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] #[must_use] - pub fn func_out_sel(&mut self) -> FUNC_OUT_SEL_W { - FUNC_OUT_SEL_W::new(self, 0) + pub fn out_sel(&mut self) -> OUT_SEL_W { + OUT_SEL_W::new(self, 0) } #[doc = "Bit 9 - set this bit to invert output signal.1:invert.0:not invert."] #[inline(always)] #[must_use] - pub fn func_out_inv_sel(&mut self) -> FUNC_OUT_INV_SEL_W { - FUNC_OUT_INV_SEL_W::new(self, 9) + pub fn inv_sel(&mut self) -> INV_SEL_W { + INV_SEL_W::new(self, 9) } #[doc = "Bit 10 - set this bit to select output enable signal.1:use GPIO_ENABLE_REG\\[n\\] as output enable signal.0:use peripheral output enable signal."] #[inline(always)] #[must_use] - pub fn func_oen_sel(&mut self) -> FUNC_OEN_SEL_W { - FUNC_OEN_SEL_W::new(self, 10) + pub fn oen_sel(&mut self) -> OEN_SEL_W { + OEN_SEL_W::new(self, 10) } #[doc = "Bit 11 - set this bit to invert output enable signal.1:invert.0:not invert."] #[inline(always)] #[must_use] - pub fn func_oen_inv_sel(&mut self) -> FUNC_OEN_INV_SEL_W { - FUNC_OEN_INV_SEL_W::new(self, 11) + pub fn oen_inv_sel(&mut self) -> OEN_INV_SEL_W { + OEN_INV_SEL_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/esp32p4/src/io_mux.rs b/esp32p4/src/io_mux.rs index 5e5fe908b3..165314071c 100644 --- a/esp32p4/src/io_mux.rs +++ b/esp32p4/src/io_mux.rs @@ -3,351 +3,21 @@ #[cfg_attr(feature = "impl-register-debug", derive(Debug))] pub struct RegisterBlock { _reserved0: [u8; 0x04], - gpio0: GPIO0, - gpio1: GPIO1, - gpio2: GPIO2, - gpio3: GPIO3, - gpio4: GPIO4, - gpio5: GPIO5, - gpio6: GPIO6, - gpio7: GPIO7, - gpio8: GPIO8, - gpio9: GPIO9, - gpio10: GPIO10, - gpio11: GPIO11, - gpio12: GPIO12, - gpio13: GPIO13, - gpio14: GPIO14, - gpio15: GPIO15, - gpio16: GPIO16, - gpio17: GPIO17, - gpio18: GPIO18, - gpio19: GPIO19, - gpio20: GPIO20, - gpio21: GPIO21, - gpio22: GPIO22, - gpio23: GPIO23, - gpio24: GPIO24, - gpio25: GPIO25, - gpio26: GPIO26, - gpio27: GPIO27, - gpio28: GPIO28, - gpio29: GPIO29, - gpio30: GPIO30, - gpio31: GPIO31, - gpio32: GPIO32, - gpio33: GPIO33, - gpio34: GPIO34, - gpio35: GPIO35, - gpio36: GPIO36, - gpio37: GPIO37, - gpio38: GPIO38, - gpio39: GPIO39, - gpio40: GPIO40, - gpio41: GPIO41, - gpio42: GPIO42, - gpio43: GPIO43, - gpio44: GPIO44, - gpio45: GPIO45, - gpio46: GPIO46, - gpio47: GPIO47, - gpio48: GPIO48, - gpio49: GPIO49, - gpio50: GPIO50, - gpio51: GPIO51, - gpio52: GPIO52, - gpio53: GPIO53, - gpio54: GPIO54, - gpio55: GPIO55, - gpio56: GPIO56, - _reserved57: [u8; 0x1c], + gpio: [GPIO; 54], + _reserved1: [u8; 0x28], date: DATE, } impl RegisterBlock { - #[doc = "0x04 - iomux control register for gpio0"] + #[doc = "0x04..0xdc - IO_MUX Control Register"] #[inline(always)] - pub const fn gpio0(&self) -> &GPIO0 { - &self.gpio0 + pub const fn gpio(&self, n: usize) -> &GPIO { + &self.gpio[n] } - #[doc = "0x08 - iomux control register for gpio1"] + #[doc = "Iterator for array of:"] + #[doc = "0x04..0xdc - IO_MUX Control Register"] #[inline(always)] - pub const fn gpio1(&self) -> &GPIO1 { - &self.gpio1 - } - #[doc = "0x0c - iomux control register for gpio2"] - #[inline(always)] - pub const fn gpio2(&self) -> &GPIO2 { - &self.gpio2 - } - #[doc = "0x10 - iomux control register for gpio3"] - #[inline(always)] - pub const fn gpio3(&self) -> &GPIO3 { - &self.gpio3 - } - #[doc = "0x14 - iomux control register for gpio4"] - #[inline(always)] - pub const fn gpio4(&self) -> &GPIO4 { - &self.gpio4 - } - #[doc = "0x18 - iomux control register for gpio5"] - #[inline(always)] - pub const fn gpio5(&self) -> &GPIO5 { - &self.gpio5 - } - #[doc = "0x1c - iomux control register for gpio6"] - #[inline(always)] - pub const fn gpio6(&self) -> &GPIO6 { - &self.gpio6 - } - #[doc = "0x20 - iomux control register for gpio7"] - #[inline(always)] - pub const fn gpio7(&self) -> &GPIO7 { - &self.gpio7 - } - #[doc = "0x24 - iomux control register for gpio8"] - #[inline(always)] - pub const fn gpio8(&self) -> &GPIO8 { - &self.gpio8 - } - #[doc = "0x28 - iomux control register for gpio9"] - #[inline(always)] - pub const fn gpio9(&self) -> &GPIO9 { - &self.gpio9 - } - #[doc = "0x2c - iomux control register for gpio10"] - #[inline(always)] - pub const fn gpio10(&self) -> &GPIO10 { - &self.gpio10 - } - #[doc = "0x30 - iomux control register for gpio11"] - #[inline(always)] - pub const fn gpio11(&self) -> &GPIO11 { - &self.gpio11 - } - #[doc = "0x34 - iomux control register for gpio12"] - #[inline(always)] - pub const fn gpio12(&self) -> &GPIO12 { - &self.gpio12 - } - #[doc = "0x38 - iomux control register for gpio13"] - #[inline(always)] - pub const fn gpio13(&self) -> &GPIO13 { - &self.gpio13 - } - #[doc = "0x3c - iomux control register for gpio14"] - #[inline(always)] - pub const fn gpio14(&self) -> &GPIO14 { - &self.gpio14 - } - #[doc = "0x40 - iomux control register for gpio15"] - #[inline(always)] - pub const fn gpio15(&self) -> &GPIO15 { - &self.gpio15 - } - #[doc = "0x44 - iomux control register for gpio16"] - #[inline(always)] - pub const fn gpio16(&self) -> &GPIO16 { - &self.gpio16 - } - #[doc = "0x48 - iomux control register for gpio17"] - #[inline(always)] - pub const fn gpio17(&self) -> &GPIO17 { - &self.gpio17 - } - #[doc = "0x4c - iomux control register for gpio18"] - #[inline(always)] - pub const fn gpio18(&self) -> &GPIO18 { - &self.gpio18 - } - #[doc = "0x50 - iomux control register for gpio19"] - #[inline(always)] - pub const fn gpio19(&self) -> &GPIO19 { - &self.gpio19 - } - #[doc = "0x54 - iomux control register for gpio20"] - #[inline(always)] - pub const fn gpio20(&self) -> &GPIO20 { - &self.gpio20 - } - #[doc = "0x58 - iomux control register for gpio21"] - #[inline(always)] - pub const fn gpio21(&self) -> &GPIO21 { - &self.gpio21 - } - #[doc = "0x5c - iomux control register for gpio22"] - #[inline(always)] - pub const fn gpio22(&self) -> &GPIO22 { - &self.gpio22 - } - #[doc = "0x60 - iomux control register for gpio23"] - #[inline(always)] - pub const fn gpio23(&self) -> &GPIO23 { - &self.gpio23 - } - #[doc = "0x64 - iomux control register for gpio24"] - #[inline(always)] - pub const fn gpio24(&self) -> &GPIO24 { - &self.gpio24 - } - #[doc = "0x68 - iomux control register for gpio25"] - #[inline(always)] - pub const fn gpio25(&self) -> &GPIO25 { - &self.gpio25 - } - #[doc = "0x6c - iomux control register for gpio26"] - #[inline(always)] - pub const fn gpio26(&self) -> &GPIO26 { - &self.gpio26 - } - #[doc = "0x70 - iomux control register for gpio27"] - #[inline(always)] - pub const fn gpio27(&self) -> &GPIO27 { - &self.gpio27 - } - #[doc = "0x74 - iomux control register for gpio28"] - #[inline(always)] - pub const fn gpio28(&self) -> &GPIO28 { - &self.gpio28 - } - #[doc = "0x78 - iomux control register for gpio29"] - #[inline(always)] - pub const fn gpio29(&self) -> &GPIO29 { - &self.gpio29 - } - #[doc = "0x7c - iomux control register for gpio30"] - #[inline(always)] - pub const fn gpio30(&self) -> &GPIO30 { - &self.gpio30 - } - #[doc = "0x80 - iomux control register for gpio31"] - #[inline(always)] - pub const fn gpio31(&self) -> &GPIO31 { - &self.gpio31 - } - #[doc = "0x84 - iomux control register for gpio32"] - #[inline(always)] - pub const fn gpio32(&self) -> &GPIO32 { - &self.gpio32 - } - #[doc = "0x88 - iomux control register for gpio33"] - #[inline(always)] - pub const fn gpio33(&self) -> &GPIO33 { - &self.gpio33 - } - #[doc = "0x8c - iomux control register for gpio34"] - #[inline(always)] - pub const fn gpio34(&self) -> &GPIO34 { - &self.gpio34 - } - #[doc = "0x90 - iomux control register for gpio35"] - #[inline(always)] - pub const fn gpio35(&self) -> &GPIO35 { - &self.gpio35 - } - #[doc = "0x94 - iomux control register for gpio36"] - #[inline(always)] - pub const fn gpio36(&self) -> &GPIO36 { - &self.gpio36 - } - #[doc = "0x98 - iomux control register for gpio37"] - #[inline(always)] - pub const fn gpio37(&self) -> &GPIO37 { - &self.gpio37 - } - #[doc = "0x9c - iomux control register for gpio38"] - #[inline(always)] - pub const fn gpio38(&self) -> &GPIO38 { - &self.gpio38 - } - #[doc = "0xa0 - iomux control register for gpio39"] - #[inline(always)] - pub const fn gpio39(&self) -> &GPIO39 { - &self.gpio39 - } - #[doc = "0xa4 - iomux control register for gpio40"] - #[inline(always)] - pub const fn gpio40(&self) -> &GPIO40 { - &self.gpio40 - } - #[doc = "0xa8 - iomux control register for gpio41"] - #[inline(always)] - pub const fn gpio41(&self) -> &GPIO41 { - &self.gpio41 - } - #[doc = "0xac - iomux control register for gpio42"] - #[inline(always)] - pub const fn gpio42(&self) -> &GPIO42 { - &self.gpio42 - } - #[doc = "0xb0 - iomux control register for gpio43"] - #[inline(always)] - pub const fn gpio43(&self) -> &GPIO43 { - &self.gpio43 - } - #[doc = "0xb4 - iomux control register for gpio44"] - #[inline(always)] - pub const fn gpio44(&self) -> &GPIO44 { - &self.gpio44 - } - #[doc = "0xb8 - iomux control register for gpio45"] - #[inline(always)] - pub const fn gpio45(&self) -> &GPIO45 { - &self.gpio45 - } - #[doc = "0xbc - iomux control register for gpio46"] - #[inline(always)] - pub const fn gpio46(&self) -> &GPIO46 { - &self.gpio46 - } - #[doc = "0xc0 - iomux control register for gpio47"] - #[inline(always)] - pub const fn gpio47(&self) -> &GPIO47 { - &self.gpio47 - } - #[doc = "0xc4 - iomux control register for gpio48"] - #[inline(always)] - pub const fn gpio48(&self) -> &GPIO48 { - &self.gpio48 - } - #[doc = "0xc8 - iomux control register for gpio49"] - #[inline(always)] - pub const fn gpio49(&self) -> &GPIO49 { - &self.gpio49 - } - #[doc = "0xcc - iomux control register for gpio50"] - #[inline(always)] - pub const fn gpio50(&self) -> &GPIO50 { - &self.gpio50 - } - #[doc = "0xd0 - iomux control register for gpio51"] - #[inline(always)] - pub const fn gpio51(&self) -> &GPIO51 { - &self.gpio51 - } - #[doc = "0xd4 - iomux control register for gpio52"] - #[inline(always)] - pub const fn gpio52(&self) -> &GPIO52 { - &self.gpio52 - } - #[doc = "0xd8 - iomux control register for gpio53"] - #[inline(always)] - pub const fn gpio53(&self) -> &GPIO53 { - &self.gpio53 - } - #[doc = "0xdc - iomux control register for gpio54"] - #[inline(always)] - pub const fn gpio54(&self) -> &GPIO54 { - &self.gpio54 - } - #[doc = "0xe0 - iomux control register for gpio55"] - #[inline(always)] - pub const fn gpio55(&self) -> &GPIO55 { - &self.gpio55 - } - #[doc = "0xe4 - iomux control register for gpio56"] - #[inline(always)] - pub const fn gpio56(&self) -> &GPIO56 { - &self.gpio56 + pub fn gpio_iter(&self) -> impl Iterator { + self.gpio.iter() } #[doc = "0x104 - iomux version"] #[inline(always)] @@ -355,235 +25,11 @@ impl RegisterBlock { &self.date } } -#[doc = "gpio0 (rw) register accessor: iomux control register for gpio0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio0`] module"] -pub type GPIO0 = crate::Reg; -#[doc = "iomux control register for gpio0"] -pub mod gpio0; -#[doc = "gpio1 (rw) register accessor: iomux control register for gpio1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio1`] module"] -pub type GPIO1 = crate::Reg; -#[doc = "iomux control register for gpio1"] -pub mod gpio1; -#[doc = "gpio2 (rw) register accessor: iomux control register for gpio2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio2`] module"] -pub type GPIO2 = crate::Reg; -#[doc = "iomux control register for gpio2"] -pub mod gpio2; -#[doc = "gpio3 (rw) register accessor: iomux control register for gpio3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio3`] module"] -pub type GPIO3 = crate::Reg; -#[doc = "iomux control register for gpio3"] -pub mod gpio3; -#[doc = "gpio4 (rw) register accessor: iomux control register for gpio4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio4`] module"] -pub type GPIO4 = crate::Reg; -#[doc = "iomux control register for gpio4"] -pub mod gpio4; -#[doc = "gpio5 (rw) register accessor: iomux control register for gpio5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio5`] module"] -pub type GPIO5 = crate::Reg; -#[doc = "iomux control register for gpio5"] -pub mod gpio5; -#[doc = "gpio6 (rw) register accessor: iomux control register for gpio6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio6`] module"] -pub type GPIO6 = crate::Reg; -#[doc = "iomux control register for gpio6"] -pub mod gpio6; -#[doc = "gpio7 (rw) register accessor: iomux control register for gpio7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio7`] module"] -pub type GPIO7 = crate::Reg; -#[doc = "iomux control register for gpio7"] -pub mod gpio7; -#[doc = "gpio8 (rw) register accessor: iomux control register for gpio8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio8`] module"] -pub type GPIO8 = crate::Reg; -#[doc = "iomux control register for gpio8"] -pub mod gpio8; -#[doc = "gpio9 (rw) register accessor: iomux control register for gpio9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio9`] module"] -pub type GPIO9 = crate::Reg; -#[doc = "iomux control register for gpio9"] -pub mod gpio9; -#[doc = "gpio10 (rw) register accessor: iomux control register for gpio10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio10`] module"] -pub type GPIO10 = crate::Reg; -#[doc = "iomux control register for gpio10"] -pub mod gpio10; -#[doc = "gpio11 (rw) register accessor: iomux control register for gpio11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio11`] module"] -pub type GPIO11 = crate::Reg; -#[doc = "iomux control register for gpio11"] -pub mod gpio11; -#[doc = "gpio12 (rw) register accessor: iomux control register for gpio12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio12`] module"] -pub type GPIO12 = crate::Reg; -#[doc = "iomux control register for gpio12"] -pub mod gpio12; -#[doc = "gpio13 (rw) register accessor: iomux control register for gpio13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio13`] module"] -pub type GPIO13 = crate::Reg; -#[doc = "iomux control register for gpio13"] -pub mod gpio13; -#[doc = "gpio14 (rw) register accessor: iomux control register for gpio14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio14`] module"] -pub type GPIO14 = crate::Reg; -#[doc = "iomux control register for gpio14"] -pub mod gpio14; -#[doc = "gpio15 (rw) register accessor: iomux control register for gpio15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio15::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio15::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio15`] module"] -pub type GPIO15 = crate::Reg; -#[doc = "iomux control register for gpio15"] -pub mod gpio15; -#[doc = "gpio16 (rw) register accessor: iomux control register for gpio16\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio16::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio16::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio16`] module"] -pub type GPIO16 = crate::Reg; -#[doc = "iomux control register for gpio16"] -pub mod gpio16; -#[doc = "gpio17 (rw) register accessor: iomux control register for gpio17\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio17::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio17::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio17`] module"] -pub type GPIO17 = crate::Reg; -#[doc = "iomux control register for gpio17"] -pub mod gpio17; -#[doc = "gpio18 (rw) register accessor: iomux control register for gpio18\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio18::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio18::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio18`] module"] -pub type GPIO18 = crate::Reg; -#[doc = "iomux control register for gpio18"] -pub mod gpio18; -#[doc = "gpio19 (rw) register accessor: iomux control register for gpio19\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio19::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio19::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio19`] module"] -pub type GPIO19 = crate::Reg; -#[doc = "iomux control register for gpio19"] -pub mod gpio19; -#[doc = "gpio20 (rw) register accessor: iomux control register for gpio20\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio20::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio20::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio20`] module"] -pub type GPIO20 = crate::Reg; -#[doc = "iomux control register for gpio20"] -pub mod gpio20; -#[doc = "gpio21 (rw) register accessor: iomux control register for gpio21\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio21::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio21::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio21`] module"] -pub type GPIO21 = crate::Reg; -#[doc = "iomux control register for gpio21"] -pub mod gpio21; -#[doc = "gpio22 (rw) register accessor: iomux control register for gpio22\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio22::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio22::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio22`] module"] -pub type GPIO22 = crate::Reg; -#[doc = "iomux control register for gpio22"] -pub mod gpio22; -#[doc = "gpio23 (rw) register accessor: iomux control register for gpio23\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio23::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio23::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio23`] module"] -pub type GPIO23 = crate::Reg; -#[doc = "iomux control register for gpio23"] -pub mod gpio23; -#[doc = "gpio24 (rw) register accessor: iomux control register for gpio24\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio24::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio24::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio24`] module"] -pub type GPIO24 = crate::Reg; -#[doc = "iomux control register for gpio24"] -pub mod gpio24; -#[doc = "gpio25 (rw) register accessor: iomux control register for gpio25\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio25::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio25::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio25`] module"] -pub type GPIO25 = crate::Reg; -#[doc = "iomux control register for gpio25"] -pub mod gpio25; -#[doc = "gpio26 (rw) register accessor: iomux control register for gpio26\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio26::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio26::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio26`] module"] -pub type GPIO26 = crate::Reg; -#[doc = "iomux control register for gpio26"] -pub mod gpio26; -#[doc = "gpio27 (rw) register accessor: iomux control register for gpio27\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio27::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio27::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio27`] module"] -pub type GPIO27 = crate::Reg; -#[doc = "iomux control register for gpio27"] -pub mod gpio27; -#[doc = "gpio28 (rw) register accessor: iomux control register for gpio28\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio28::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio28::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio28`] module"] -pub type GPIO28 = crate::Reg; -#[doc = "iomux control register for gpio28"] -pub mod gpio28; -#[doc = "gpio29 (rw) register accessor: iomux control register for gpio29\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio29::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio29::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio29`] module"] -pub type GPIO29 = crate::Reg; -#[doc = "iomux control register for gpio29"] -pub mod gpio29; -#[doc = "gpio30 (rw) register accessor: iomux control register for gpio30\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio30::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio30::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio30`] module"] -pub type GPIO30 = crate::Reg; -#[doc = "iomux control register for gpio30"] -pub mod gpio30; -#[doc = "gpio31 (rw) register accessor: iomux control register for gpio31\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio31::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio31::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio31`] module"] -pub type GPIO31 = crate::Reg; -#[doc = "iomux control register for gpio31"] -pub mod gpio31; -#[doc = "gpio32 (rw) register accessor: iomux control register for gpio32\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio32::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio32::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio32`] module"] -pub type GPIO32 = crate::Reg; -#[doc = "iomux control register for gpio32"] -pub mod gpio32; -#[doc = "gpio33 (rw) register accessor: iomux control register for gpio33\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio33::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio33::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio33`] module"] -pub type GPIO33 = crate::Reg; -#[doc = "iomux control register for gpio33"] -pub mod gpio33; -#[doc = "gpio34 (rw) register accessor: iomux control register for gpio34\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio34::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio34::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio34`] module"] -pub type GPIO34 = crate::Reg; -#[doc = "iomux control register for gpio34"] -pub mod gpio34; -#[doc = "gpio35 (rw) register accessor: iomux control register for gpio35\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio35::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio35::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio35`] module"] -pub type GPIO35 = crate::Reg; -#[doc = "iomux control register for gpio35"] -pub mod gpio35; -#[doc = "gpio36 (rw) register accessor: iomux control register for gpio36\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio36::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio36::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio36`] module"] -pub type GPIO36 = crate::Reg; -#[doc = "iomux control register for gpio36"] -pub mod gpio36; -#[doc = "gpio37 (rw) register accessor: iomux control register for gpio37\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio37::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio37::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio37`] module"] -pub type GPIO37 = crate::Reg; -#[doc = "iomux control register for gpio37"] -pub mod gpio37; -#[doc = "gpio38 (rw) register accessor: iomux control register for gpio38\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio38::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio38::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio38`] module"] -pub type GPIO38 = crate::Reg; -#[doc = "iomux control register for gpio38"] -pub mod gpio38; -#[doc = "gpio39 (rw) register accessor: iomux control register for gpio39\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio39::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio39::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio39`] module"] -pub type GPIO39 = crate::Reg; -#[doc = "iomux control register for gpio39"] -pub mod gpio39; -#[doc = "gpio40 (rw) register accessor: iomux control register for gpio40\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio40::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio40::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio40`] module"] -pub type GPIO40 = crate::Reg; -#[doc = "iomux control register for gpio40"] -pub mod gpio40; -#[doc = "gpio41 (rw) register accessor: iomux control register for gpio41\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio41::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio41::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio41`] module"] -pub type GPIO41 = crate::Reg; -#[doc = "iomux control register for gpio41"] -pub mod gpio41; -#[doc = "gpio42 (rw) register accessor: iomux control register for gpio42\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio42::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio42::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio42`] module"] -pub type GPIO42 = crate::Reg; -#[doc = "iomux control register for gpio42"] -pub mod gpio42; -#[doc = "gpio43 (rw) register accessor: iomux control register for gpio43\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio43::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio43::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio43`] module"] -pub type GPIO43 = crate::Reg; -#[doc = "iomux control register for gpio43"] -pub mod gpio43; -#[doc = "gpio44 (rw) register accessor: iomux control register for gpio44\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio44::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio44::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio44`] module"] -pub type GPIO44 = crate::Reg; -#[doc = "iomux control register for gpio44"] -pub mod gpio44; -#[doc = "gpio45 (rw) register accessor: iomux control register for gpio45\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio45::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio45::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio45`] module"] -pub type GPIO45 = crate::Reg; -#[doc = "iomux control register for gpio45"] -pub mod gpio45; -#[doc = "gpio46 (rw) register accessor: iomux control register for gpio46\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio46::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio46::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio46`] module"] -pub type GPIO46 = crate::Reg; -#[doc = "iomux control register for gpio46"] -pub mod gpio46; -#[doc = "gpio47 (rw) register accessor: iomux control register for gpio47\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio47::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio47::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio47`] module"] -pub type GPIO47 = crate::Reg; -#[doc = "iomux control register for gpio47"] -pub mod gpio47; -#[doc = "gpio48 (rw) register accessor: iomux control register for gpio48\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio48::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio48::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio48`] module"] -pub type GPIO48 = crate::Reg; -#[doc = "iomux control register for gpio48"] -pub mod gpio48; -#[doc = "gpio49 (rw) register accessor: iomux control register for gpio49\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio49::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio49::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio49`] module"] -pub type GPIO49 = crate::Reg; -#[doc = "iomux control register for gpio49"] -pub mod gpio49; -#[doc = "gpio50 (rw) register accessor: iomux control register for gpio50\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio50::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio50::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio50`] module"] -pub type GPIO50 = crate::Reg; -#[doc = "iomux control register for gpio50"] -pub mod gpio50; -#[doc = "gpio51 (rw) register accessor: iomux control register for gpio51\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio51::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio51::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio51`] module"] -pub type GPIO51 = crate::Reg; -#[doc = "iomux control register for gpio51"] -pub mod gpio51; -#[doc = "gpio52 (rw) register accessor: iomux control register for gpio52\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio52::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio52::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio52`] module"] -pub type GPIO52 = crate::Reg; -#[doc = "iomux control register for gpio52"] -pub mod gpio52; -#[doc = "gpio53 (rw) register accessor: iomux control register for gpio53\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio53::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio53::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio53`] module"] -pub type GPIO53 = crate::Reg; -#[doc = "iomux control register for gpio53"] -pub mod gpio53; -#[doc = "gpio54 (rw) register accessor: iomux control register for gpio54\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio54::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio54::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio54`] module"] -pub type GPIO54 = crate::Reg; -#[doc = "iomux control register for gpio54"] -pub mod gpio54; -#[doc = "gpio55 (rw) register accessor: iomux control register for gpio55\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio55::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio55::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio55`] module"] -pub type GPIO55 = crate::Reg; -#[doc = "iomux control register for gpio55"] -pub mod gpio55; -#[doc = "gpio56 (rw) register accessor: iomux control register for gpio56\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio56::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio56::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio56`] module"] -pub type GPIO56 = crate::Reg; -#[doc = "iomux control register for gpio56"] -pub mod gpio56; #[doc = "DATE (rw) register accessor: iomux version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"] pub type DATE = crate::Reg; #[doc = "iomux version"] pub mod date; +#[doc = "GPIO (rw) register accessor: IO_MUX Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio`] module"] +pub type GPIO = crate::Reg; +#[doc = "IO_MUX Control Register"] +pub mod gpio; diff --git a/esp32p4/src/io_mux/gpio.rs b/esp32p4/src/io_mux/gpio.rs new file mode 100644 index 0000000000..4b5ccf7306 --- /dev/null +++ b/esp32p4/src/io_mux/gpio.rs @@ -0,0 +1,239 @@ +#[doc = "Register `GPIO%s` reader"] +pub type R = crate::R; +#[doc = "Register `GPIO%s` writer"] +pub type W = crate::W; +#[doc = "Field `MCU_OE` reader - Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable"] +pub type MCU_OE_R = crate::BitReader; +#[doc = "Field `MCU_OE` writer - Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable"] +pub type MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `SLP_SEL` reader - Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter"] +pub type SLP_SEL_R = crate::BitReader; +#[doc = "Field `SLP_SEL` writer - Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter"] +pub type SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MCU_WPD` reader - Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable"] +pub type MCU_WPD_R = crate::BitReader; +#[doc = "Field `MCU_WPD` writer - Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable"] +pub type MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MCU_WPU` reader - Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable"] +pub type MCU_WPU_R = crate::BitReader; +#[doc = "Field `MCU_WPU` writer - Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable"] +pub type MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MCU_IE` reader - Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable"] +pub type MCU_IE_R = crate::BitReader; +#[doc = "Field `MCU_IE` writer - Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable"] +pub type MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `MCU_DRV` reader - Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"] +pub type MCU_DRV_R = crate::FieldReader; +#[doc = "Field `MCU_DRV` writer - Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"] +pub type MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `FUN_WPD` reader - Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable"] +pub type FUN_WPD_R = crate::BitReader; +#[doc = "Field `FUN_WPD` writer - Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable"] +pub type FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FUN_WPU` reader - Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable"] +pub type FUN_WPU_R = crate::BitReader; +#[doc = "Field `FUN_WPU` writer - Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable"] +pub type FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FUN_IE` reader - Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable"] +pub type FUN_IE_R = crate::BitReader; +#[doc = "Field `FUN_IE` writer - Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable"] +pub type FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `FUN_DRV` reader - Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"] +pub type FUN_DRV_R = crate::FieldReader; +#[doc = "Field `FUN_DRV` writer - Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"] +pub type FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `MCU_SEL` reader - Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......"] +pub type MCU_SEL_R = crate::FieldReader; +#[doc = "Field `MCU_SEL` writer - Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......"] +pub type MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `FILTER_EN` reader - Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable"] +pub type FILTER_EN_R = crate::BitReader; +#[doc = "Field `FILTER_EN` writer - Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable"] +pub type FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +impl R { + #[doc = "Bit 0 - Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable"] + #[inline(always)] + pub fn mcu_oe(&self) -> MCU_OE_R { + MCU_OE_R::new((self.bits & 1) != 0) + } + #[doc = "Bit 1 - Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter"] + #[inline(always)] + pub fn slp_sel(&self) -> SLP_SEL_R { + SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) + } + #[doc = "Bit 2 - Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable"] + #[inline(always)] + pub fn mcu_wpd(&self) -> MCU_WPD_R { + MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) + } + #[doc = "Bit 3 - Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable"] + #[inline(always)] + pub fn mcu_wpu(&self) -> MCU_WPU_R { + MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) + } + #[doc = "Bit 4 - Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable"] + #[inline(always)] + pub fn mcu_ie(&self) -> MCU_IE_R { + MCU_IE_R::new(((self.bits >> 4) & 1) != 0) + } + #[doc = "Bits 5:6 - Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"] + #[inline(always)] + pub fn mcu_drv(&self) -> MCU_DRV_R { + MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) + } + #[doc = "Bit 7 - Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable"] + #[inline(always)] + pub fn fun_wpd(&self) -> FUN_WPD_R { + FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable"] + #[inline(always)] + pub fn fun_wpu(&self) -> FUN_WPU_R { + FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 9 - Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable"] + #[inline(always)] + pub fn fun_ie(&self) -> FUN_IE_R { + FUN_IE_R::new(((self.bits >> 9) & 1) != 0) + } + #[doc = "Bits 10:11 - Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"] + #[inline(always)] + pub fn fun_drv(&self) -> FUN_DRV_R { + FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) + } + #[doc = "Bits 12:14 - Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......"] + #[inline(always)] + pub fn mcu_sel(&self) -> MCU_SEL_R { + MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) + } + #[doc = "Bit 15 - Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable"] + #[inline(always)] + pub fn filter_en(&self) -> FILTER_EN_R { + FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("GPIO") + .field("mcu_oe", &format_args!("{}", self.mcu_oe().bit())) + .field("slp_sel", &format_args!("{}", self.slp_sel().bit())) + .field("mcu_wpd", &format_args!("{}", self.mcu_wpd().bit())) + .field("mcu_wpu", &format_args!("{}", self.mcu_wpu().bit())) + .field("mcu_ie", &format_args!("{}", self.mcu_ie().bit())) + .field("mcu_drv", &format_args!("{}", self.mcu_drv().bits())) + .field("fun_wpd", &format_args!("{}", self.fun_wpd().bit())) + .field("fun_wpu", &format_args!("{}", self.fun_wpu().bit())) + .field("fun_ie", &format_args!("{}", self.fun_ie().bit())) + .field("fun_drv", &format_args!("{}", self.fun_drv().bits())) + .field("mcu_sel", &format_args!("{}", self.mcu_sel().bits())) + .field("filter_en", &format_args!("{}", self.filter_en().bit())) + .finish() + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for crate::generic::Reg { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.read(), f) + } +} +impl W { + #[doc = "Bit 0 - Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable"] + #[inline(always)] + #[must_use] + pub fn mcu_oe(&mut self) -> MCU_OE_W { + MCU_OE_W::new(self, 0) + } + #[doc = "Bit 1 - Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter"] + #[inline(always)] + #[must_use] + pub fn slp_sel(&mut self) -> SLP_SEL_W { + SLP_SEL_W::new(self, 1) + } + #[doc = "Bit 2 - Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable"] + #[inline(always)] + #[must_use] + pub fn mcu_wpd(&mut self) -> MCU_WPD_W { + MCU_WPD_W::new(self, 2) + } + #[doc = "Bit 3 - Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable"] + #[inline(always)] + #[must_use] + pub fn mcu_wpu(&mut self) -> MCU_WPU_W { + MCU_WPU_W::new(self, 3) + } + #[doc = "Bit 4 - Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable"] + #[inline(always)] + #[must_use] + pub fn mcu_ie(&mut self) -> MCU_IE_W { + MCU_IE_W::new(self, 4) + } + #[doc = "Bits 5:6 - Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"] + #[inline(always)] + #[must_use] + pub fn mcu_drv(&mut self) -> MCU_DRV_W { + MCU_DRV_W::new(self, 5) + } + #[doc = "Bit 7 - Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable"] + #[inline(always)] + #[must_use] + pub fn fun_wpd(&mut self) -> FUN_WPD_W { + FUN_WPD_W::new(self, 7) + } + #[doc = "Bit 8 - Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable"] + #[inline(always)] + #[must_use] + pub fn fun_wpu(&mut self) -> FUN_WPU_W { + FUN_WPU_W::new(self, 8) + } + #[doc = "Bit 9 - Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable"] + #[inline(always)] + #[must_use] + pub fn fun_ie(&mut self) -> FUN_IE_W { + FUN_IE_W::new(self, 9) + } + #[doc = "Bits 10:11 - Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"] + #[inline(always)] + #[must_use] + pub fn fun_drv(&mut self) -> FUN_DRV_W { + FUN_DRV_W::new(self, 10) + } + #[doc = "Bits 12:14 - Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......"] + #[inline(always)] + #[must_use] + pub fn mcu_sel(&mut self) -> MCU_SEL_W { + MCU_SEL_W::new(self, 12) + } + #[doc = "Bit 15 - Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable"] + #[inline(always)] + #[must_use] + pub fn filter_en(&mut self) -> FILTER_EN_W { + FILTER_EN_W::new(self, 15) + } + #[doc = r" Writes raw bits to the register."] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.bits = bits; + self + } +} +#[doc = "IO_MUX Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct GPIO_SPEC; +impl crate::RegisterSpec for GPIO_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`gpio::R`](R) reader structure"] +impl crate::Readable for GPIO_SPEC {} +#[doc = "`write(|w| ..)` method takes [`gpio::W`](W) writer structure"] +impl crate::Writable for GPIO_SPEC { + const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; +} +#[doc = "`reset()` method sets GPIO%s to value 0"] +impl crate::Resettable for GPIO_SPEC { + const RESET_VALUE: Self::Ux = 0; +} diff --git a/esp32p4/src/io_mux/gpio0.rs b/esp32p4/src/io_mux/gpio0.rs deleted file mode 100644 index 9444ab9fc7..0000000000 --- a/esp32p4/src/io_mux/gpio0.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio0` reader"] -pub type R = crate::R; -#[doc = "Register `gpio0` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO0_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO0_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO0_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO0_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO0_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO0_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO0_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO0_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO0_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO0_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO0_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO0_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO0_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO0_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO0_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO0_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO0_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO0_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO0_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO0_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO0_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO0_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO0_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO0_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO0_FUN_WPD` reader - pull-down enable"] -pub type GPIO0_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO0_FUN_WPD` writer - pull-down enable"] -pub type GPIO0_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO0_FUN_WPU` reader - pull-up enable"] -pub type GPIO0_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO0_FUN_WPU` writer - pull-up enable"] -pub type GPIO0_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO0_FUN_IE` reader - input enable"] -pub type GPIO0_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO0_FUN_IE` writer - input enable"] -pub type GPIO0_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO0_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO0_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO0_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO0_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO0_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO0_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO0_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO0_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO0_FILTER_EN` reader - input filter enable"] -pub type GPIO0_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO0_FILTER_EN` writer - input filter enable"] -pub type GPIO0_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio0_mcu_oe(&self) -> GPIO0_MCU_OE_R { - GPIO0_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio0_slp_sel(&self) -> GPIO0_SLP_SEL_R { - GPIO0_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio0_mcu_wpd(&self) -> GPIO0_MCU_WPD_R { - GPIO0_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio0_mcu_wpu(&self) -> GPIO0_MCU_WPU_R { - GPIO0_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio0_mcu_ie(&self) -> GPIO0_MCU_IE_R { - GPIO0_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio0_mcu_drv(&self) -> GPIO0_MCU_DRV_R { - GPIO0_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio0_fun_wpd(&self) -> GPIO0_FUN_WPD_R { - GPIO0_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio0_fun_wpu(&self) -> GPIO0_FUN_WPU_R { - GPIO0_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio0_fun_ie(&self) -> GPIO0_FUN_IE_R { - GPIO0_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio0_fun_drv(&self) -> GPIO0_FUN_DRV_R { - GPIO0_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio0_mcu_sel(&self) -> GPIO0_MCU_SEL_R { - GPIO0_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio0_filter_en(&self) -> GPIO0_FILTER_EN_R { - GPIO0_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio0") - .field( - "gpio0_mcu_oe", - &format_args!("{}", self.gpio0_mcu_oe().bit()), - ) - .field( - "gpio0_slp_sel", - &format_args!("{}", self.gpio0_slp_sel().bit()), - ) - .field( - "gpio0_mcu_wpd", - &format_args!("{}", self.gpio0_mcu_wpd().bit()), - ) - .field( - "gpio0_mcu_wpu", - &format_args!("{}", self.gpio0_mcu_wpu().bit()), - ) - .field( - "gpio0_mcu_ie", - &format_args!("{}", self.gpio0_mcu_ie().bit()), - ) - .field( - "gpio0_mcu_drv", - &format_args!("{}", self.gpio0_mcu_drv().bits()), - ) - .field( - "gpio0_fun_wpd", - &format_args!("{}", self.gpio0_fun_wpd().bit()), - ) - .field( - "gpio0_fun_wpu", - &format_args!("{}", self.gpio0_fun_wpu().bit()), - ) - .field( - "gpio0_fun_ie", - &format_args!("{}", self.gpio0_fun_ie().bit()), - ) - .field( - "gpio0_fun_drv", - &format_args!("{}", self.gpio0_fun_drv().bits()), - ) - .field( - "gpio0_mcu_sel", - &format_args!("{}", self.gpio0_mcu_sel().bits()), - ) - .field( - "gpio0_filter_en", - &format_args!("{}", self.gpio0_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio0_mcu_oe(&mut self) -> GPIO0_MCU_OE_W { - GPIO0_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio0_slp_sel(&mut self) -> GPIO0_SLP_SEL_W { - GPIO0_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio0_mcu_wpd(&mut self) -> GPIO0_MCU_WPD_W { - GPIO0_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio0_mcu_wpu(&mut self) -> GPIO0_MCU_WPU_W { - GPIO0_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio0_mcu_ie(&mut self) -> GPIO0_MCU_IE_W { - GPIO0_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio0_mcu_drv(&mut self) -> GPIO0_MCU_DRV_W { - GPIO0_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio0_fun_wpd(&mut self) -> GPIO0_FUN_WPD_W { - GPIO0_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio0_fun_wpu(&mut self) -> GPIO0_FUN_WPU_W { - GPIO0_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio0_fun_ie(&mut self) -> GPIO0_FUN_IE_W { - GPIO0_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio0_fun_drv(&mut self) -> GPIO0_FUN_DRV_W { - GPIO0_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio0_mcu_sel(&mut self) -> GPIO0_MCU_SEL_W { - GPIO0_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio0_filter_en(&mut self) -> GPIO0_FILTER_EN_W { - GPIO0_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO0_SPEC; -impl crate::RegisterSpec for GPIO0_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio0::R`](R) reader structure"] -impl crate::Readable for GPIO0_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio0::W`](W) writer structure"] -impl crate::Writable for GPIO0_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio0 to value 0x0800"] -impl crate::Resettable for GPIO0_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio1.rs b/esp32p4/src/io_mux/gpio1.rs deleted file mode 100644 index 4346046157..0000000000 --- a/esp32p4/src/io_mux/gpio1.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio1` reader"] -pub type R = crate::R; -#[doc = "Register `gpio1` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO1_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO1_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO1_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO1_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO1_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO1_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO1_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO1_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO1_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO1_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO1_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO1_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO1_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO1_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO1_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO1_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO1_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO1_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO1_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO1_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO1_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO1_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO1_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO1_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO1_FUN_WPD` reader - pull-down enable"] -pub type GPIO1_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO1_FUN_WPD` writer - pull-down enable"] -pub type GPIO1_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO1_FUN_WPU` reader - pull-up enable"] -pub type GPIO1_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO1_FUN_WPU` writer - pull-up enable"] -pub type GPIO1_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO1_FUN_IE` reader - input enable"] -pub type GPIO1_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO1_FUN_IE` writer - input enable"] -pub type GPIO1_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO1_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO1_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO1_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO1_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO1_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO1_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO1_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO1_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO1_FILTER_EN` reader - input filter enable"] -pub type GPIO1_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO1_FILTER_EN` writer - input filter enable"] -pub type GPIO1_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio1_mcu_oe(&self) -> GPIO1_MCU_OE_R { - GPIO1_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio1_slp_sel(&self) -> GPIO1_SLP_SEL_R { - GPIO1_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio1_mcu_wpd(&self) -> GPIO1_MCU_WPD_R { - GPIO1_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio1_mcu_wpu(&self) -> GPIO1_MCU_WPU_R { - GPIO1_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio1_mcu_ie(&self) -> GPIO1_MCU_IE_R { - GPIO1_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio1_mcu_drv(&self) -> GPIO1_MCU_DRV_R { - GPIO1_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio1_fun_wpd(&self) -> GPIO1_FUN_WPD_R { - GPIO1_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio1_fun_wpu(&self) -> GPIO1_FUN_WPU_R { - GPIO1_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio1_fun_ie(&self) -> GPIO1_FUN_IE_R { - GPIO1_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio1_fun_drv(&self) -> GPIO1_FUN_DRV_R { - GPIO1_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio1_mcu_sel(&self) -> GPIO1_MCU_SEL_R { - GPIO1_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio1_filter_en(&self) -> GPIO1_FILTER_EN_R { - GPIO1_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio1") - .field( - "gpio1_mcu_oe", - &format_args!("{}", self.gpio1_mcu_oe().bit()), - ) - .field( - "gpio1_slp_sel", - &format_args!("{}", self.gpio1_slp_sel().bit()), - ) - .field( - "gpio1_mcu_wpd", - &format_args!("{}", self.gpio1_mcu_wpd().bit()), - ) - .field( - "gpio1_mcu_wpu", - &format_args!("{}", self.gpio1_mcu_wpu().bit()), - ) - .field( - "gpio1_mcu_ie", - &format_args!("{}", self.gpio1_mcu_ie().bit()), - ) - .field( - "gpio1_mcu_drv", - &format_args!("{}", self.gpio1_mcu_drv().bits()), - ) - .field( - "gpio1_fun_wpd", - &format_args!("{}", self.gpio1_fun_wpd().bit()), - ) - .field( - "gpio1_fun_wpu", - &format_args!("{}", self.gpio1_fun_wpu().bit()), - ) - .field( - "gpio1_fun_ie", - &format_args!("{}", self.gpio1_fun_ie().bit()), - ) - .field( - "gpio1_fun_drv", - &format_args!("{}", self.gpio1_fun_drv().bits()), - ) - .field( - "gpio1_mcu_sel", - &format_args!("{}", self.gpio1_mcu_sel().bits()), - ) - .field( - "gpio1_filter_en", - &format_args!("{}", self.gpio1_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio1_mcu_oe(&mut self) -> GPIO1_MCU_OE_W { - GPIO1_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio1_slp_sel(&mut self) -> GPIO1_SLP_SEL_W { - GPIO1_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio1_mcu_wpd(&mut self) -> GPIO1_MCU_WPD_W { - GPIO1_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio1_mcu_wpu(&mut self) -> GPIO1_MCU_WPU_W { - GPIO1_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio1_mcu_ie(&mut self) -> GPIO1_MCU_IE_W { - GPIO1_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio1_mcu_drv(&mut self) -> GPIO1_MCU_DRV_W { - GPIO1_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio1_fun_wpd(&mut self) -> GPIO1_FUN_WPD_W { - GPIO1_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio1_fun_wpu(&mut self) -> GPIO1_FUN_WPU_W { - GPIO1_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio1_fun_ie(&mut self) -> GPIO1_FUN_IE_W { - GPIO1_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio1_fun_drv(&mut self) -> GPIO1_FUN_DRV_W { - GPIO1_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio1_mcu_sel(&mut self) -> GPIO1_MCU_SEL_W { - GPIO1_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio1_filter_en(&mut self) -> GPIO1_FILTER_EN_W { - GPIO1_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO1_SPEC; -impl crate::RegisterSpec for GPIO1_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio1::R`](R) reader structure"] -impl crate::Readable for GPIO1_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio1::W`](W) writer structure"] -impl crate::Writable for GPIO1_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio1 to value 0x0800"] -impl crate::Resettable for GPIO1_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio10.rs b/esp32p4/src/io_mux/gpio10.rs deleted file mode 100644 index fe79cc580d..0000000000 --- a/esp32p4/src/io_mux/gpio10.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio10` reader"] -pub type R = crate::R; -#[doc = "Register `gpio10` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO10_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO10_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO10_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO10_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO10_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO10_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO10_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO10_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO10_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO10_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO10_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO10_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO10_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO10_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO10_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO10_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO10_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO10_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO10_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO10_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO10_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO10_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO10_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO10_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO10_FUN_WPD` reader - pull-down enable"] -pub type GPIO10_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO10_FUN_WPD` writer - pull-down enable"] -pub type GPIO10_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO10_FUN_WPU` reader - pull-up enable"] -pub type GPIO10_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO10_FUN_WPU` writer - pull-up enable"] -pub type GPIO10_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO10_FUN_IE` reader - input enable"] -pub type GPIO10_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO10_FUN_IE` writer - input enable"] -pub type GPIO10_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO10_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO10_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO10_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO10_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO10_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO10_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO10_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO10_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO10_FILTER_EN` reader - input filter enable"] -pub type GPIO10_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO10_FILTER_EN` writer - input filter enable"] -pub type GPIO10_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio10_mcu_oe(&self) -> GPIO10_MCU_OE_R { - GPIO10_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio10_slp_sel(&self) -> GPIO10_SLP_SEL_R { - GPIO10_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio10_mcu_wpd(&self) -> GPIO10_MCU_WPD_R { - GPIO10_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio10_mcu_wpu(&self) -> GPIO10_MCU_WPU_R { - GPIO10_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio10_mcu_ie(&self) -> GPIO10_MCU_IE_R { - GPIO10_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio10_mcu_drv(&self) -> GPIO10_MCU_DRV_R { - GPIO10_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio10_fun_wpd(&self) -> GPIO10_FUN_WPD_R { - GPIO10_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio10_fun_wpu(&self) -> GPIO10_FUN_WPU_R { - GPIO10_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio10_fun_ie(&self) -> GPIO10_FUN_IE_R { - GPIO10_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio10_fun_drv(&self) -> GPIO10_FUN_DRV_R { - GPIO10_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio10_mcu_sel(&self) -> GPIO10_MCU_SEL_R { - GPIO10_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio10_filter_en(&self) -> GPIO10_FILTER_EN_R { - GPIO10_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio10") - .field( - "gpio10_mcu_oe", - &format_args!("{}", self.gpio10_mcu_oe().bit()), - ) - .field( - "gpio10_slp_sel", - &format_args!("{}", self.gpio10_slp_sel().bit()), - ) - .field( - "gpio10_mcu_wpd", - &format_args!("{}", self.gpio10_mcu_wpd().bit()), - ) - .field( - "gpio10_mcu_wpu", - &format_args!("{}", self.gpio10_mcu_wpu().bit()), - ) - .field( - "gpio10_mcu_ie", - &format_args!("{}", self.gpio10_mcu_ie().bit()), - ) - .field( - "gpio10_mcu_drv", - &format_args!("{}", self.gpio10_mcu_drv().bits()), - ) - .field( - "gpio10_fun_wpd", - &format_args!("{}", self.gpio10_fun_wpd().bit()), - ) - .field( - "gpio10_fun_wpu", - &format_args!("{}", self.gpio10_fun_wpu().bit()), - ) - .field( - "gpio10_fun_ie", - &format_args!("{}", self.gpio10_fun_ie().bit()), - ) - .field( - "gpio10_fun_drv", - &format_args!("{}", self.gpio10_fun_drv().bits()), - ) - .field( - "gpio10_mcu_sel", - &format_args!("{}", self.gpio10_mcu_sel().bits()), - ) - .field( - "gpio10_filter_en", - &format_args!("{}", self.gpio10_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio10_mcu_oe(&mut self) -> GPIO10_MCU_OE_W { - GPIO10_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio10_slp_sel(&mut self) -> GPIO10_SLP_SEL_W { - GPIO10_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio10_mcu_wpd(&mut self) -> GPIO10_MCU_WPD_W { - GPIO10_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio10_mcu_wpu(&mut self) -> GPIO10_MCU_WPU_W { - GPIO10_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio10_mcu_ie(&mut self) -> GPIO10_MCU_IE_W { - GPIO10_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio10_mcu_drv(&mut self) -> GPIO10_MCU_DRV_W { - GPIO10_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio10_fun_wpd(&mut self) -> GPIO10_FUN_WPD_W { - GPIO10_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio10_fun_wpu(&mut self) -> GPIO10_FUN_WPU_W { - GPIO10_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio10_fun_ie(&mut self) -> GPIO10_FUN_IE_W { - GPIO10_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio10_fun_drv(&mut self) -> GPIO10_FUN_DRV_W { - GPIO10_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio10_mcu_sel(&mut self) -> GPIO10_MCU_SEL_W { - GPIO10_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio10_filter_en(&mut self) -> GPIO10_FILTER_EN_W { - GPIO10_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO10_SPEC; -impl crate::RegisterSpec for GPIO10_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio10::R`](R) reader structure"] -impl crate::Readable for GPIO10_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio10::W`](W) writer structure"] -impl crate::Writable for GPIO10_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio10 to value 0x0800"] -impl crate::Resettable for GPIO10_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio11.rs b/esp32p4/src/io_mux/gpio11.rs deleted file mode 100644 index a1de807422..0000000000 --- a/esp32p4/src/io_mux/gpio11.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio11` reader"] -pub type R = crate::R; -#[doc = "Register `gpio11` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO11_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO11_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO11_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO11_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO11_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO11_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO11_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO11_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO11_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO11_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO11_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO11_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO11_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO11_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO11_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO11_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO11_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO11_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO11_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO11_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO11_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO11_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO11_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO11_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO11_FUN_WPD` reader - pull-down enable"] -pub type GPIO11_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO11_FUN_WPD` writer - pull-down enable"] -pub type GPIO11_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO11_FUN_WPU` reader - pull-up enable"] -pub type GPIO11_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO11_FUN_WPU` writer - pull-up enable"] -pub type GPIO11_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO11_FUN_IE` reader - input enable"] -pub type GPIO11_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO11_FUN_IE` writer - input enable"] -pub type GPIO11_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO11_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO11_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO11_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO11_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO11_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO11_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO11_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO11_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO11_FILTER_EN` reader - input filter enable"] -pub type GPIO11_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO11_FILTER_EN` writer - input filter enable"] -pub type GPIO11_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio11_mcu_oe(&self) -> GPIO11_MCU_OE_R { - GPIO11_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio11_slp_sel(&self) -> GPIO11_SLP_SEL_R { - GPIO11_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio11_mcu_wpd(&self) -> GPIO11_MCU_WPD_R { - GPIO11_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio11_mcu_wpu(&self) -> GPIO11_MCU_WPU_R { - GPIO11_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio11_mcu_ie(&self) -> GPIO11_MCU_IE_R { - GPIO11_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio11_mcu_drv(&self) -> GPIO11_MCU_DRV_R { - GPIO11_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio11_fun_wpd(&self) -> GPIO11_FUN_WPD_R { - GPIO11_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio11_fun_wpu(&self) -> GPIO11_FUN_WPU_R { - GPIO11_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio11_fun_ie(&self) -> GPIO11_FUN_IE_R { - GPIO11_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio11_fun_drv(&self) -> GPIO11_FUN_DRV_R { - GPIO11_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio11_mcu_sel(&self) -> GPIO11_MCU_SEL_R { - GPIO11_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio11_filter_en(&self) -> GPIO11_FILTER_EN_R { - GPIO11_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio11") - .field( - "gpio11_mcu_oe", - &format_args!("{}", self.gpio11_mcu_oe().bit()), - ) - .field( - "gpio11_slp_sel", - &format_args!("{}", self.gpio11_slp_sel().bit()), - ) - .field( - "gpio11_mcu_wpd", - &format_args!("{}", self.gpio11_mcu_wpd().bit()), - ) - .field( - "gpio11_mcu_wpu", - &format_args!("{}", self.gpio11_mcu_wpu().bit()), - ) - .field( - "gpio11_mcu_ie", - &format_args!("{}", self.gpio11_mcu_ie().bit()), - ) - .field( - "gpio11_mcu_drv", - &format_args!("{}", self.gpio11_mcu_drv().bits()), - ) - .field( - "gpio11_fun_wpd", - &format_args!("{}", self.gpio11_fun_wpd().bit()), - ) - .field( - "gpio11_fun_wpu", - &format_args!("{}", self.gpio11_fun_wpu().bit()), - ) - .field( - "gpio11_fun_ie", - &format_args!("{}", self.gpio11_fun_ie().bit()), - ) - .field( - "gpio11_fun_drv", - &format_args!("{}", self.gpio11_fun_drv().bits()), - ) - .field( - "gpio11_mcu_sel", - &format_args!("{}", self.gpio11_mcu_sel().bits()), - ) - .field( - "gpio11_filter_en", - &format_args!("{}", self.gpio11_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio11_mcu_oe(&mut self) -> GPIO11_MCU_OE_W { - GPIO11_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio11_slp_sel(&mut self) -> GPIO11_SLP_SEL_W { - GPIO11_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio11_mcu_wpd(&mut self) -> GPIO11_MCU_WPD_W { - GPIO11_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio11_mcu_wpu(&mut self) -> GPIO11_MCU_WPU_W { - GPIO11_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio11_mcu_ie(&mut self) -> GPIO11_MCU_IE_W { - GPIO11_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio11_mcu_drv(&mut self) -> GPIO11_MCU_DRV_W { - GPIO11_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio11_fun_wpd(&mut self) -> GPIO11_FUN_WPD_W { - GPIO11_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio11_fun_wpu(&mut self) -> GPIO11_FUN_WPU_W { - GPIO11_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio11_fun_ie(&mut self) -> GPIO11_FUN_IE_W { - GPIO11_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio11_fun_drv(&mut self) -> GPIO11_FUN_DRV_W { - GPIO11_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio11_mcu_sel(&mut self) -> GPIO11_MCU_SEL_W { - GPIO11_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio11_filter_en(&mut self) -> GPIO11_FILTER_EN_W { - GPIO11_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO11_SPEC; -impl crate::RegisterSpec for GPIO11_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio11::R`](R) reader structure"] -impl crate::Readable for GPIO11_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio11::W`](W) writer structure"] -impl crate::Writable for GPIO11_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio11 to value 0x0800"] -impl crate::Resettable for GPIO11_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio12.rs b/esp32p4/src/io_mux/gpio12.rs deleted file mode 100644 index 453d72545c..0000000000 --- a/esp32p4/src/io_mux/gpio12.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio12` reader"] -pub type R = crate::R; -#[doc = "Register `gpio12` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO12_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO12_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO12_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO12_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO12_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO12_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO12_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO12_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO12_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO12_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO12_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO12_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO12_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO12_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO12_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO12_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO12_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO12_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO12_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO12_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO12_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO12_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO12_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO12_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO12_FUN_WPD` reader - pull-down enable"] -pub type GPIO12_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO12_FUN_WPD` writer - pull-down enable"] -pub type GPIO12_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO12_FUN_WPU` reader - pull-up enable"] -pub type GPIO12_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO12_FUN_WPU` writer - pull-up enable"] -pub type GPIO12_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO12_FUN_IE` reader - input enable"] -pub type GPIO12_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO12_FUN_IE` writer - input enable"] -pub type GPIO12_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO12_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO12_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO12_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO12_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO12_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO12_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO12_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO12_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO12_FILTER_EN` reader - input filter enable"] -pub type GPIO12_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO12_FILTER_EN` writer - input filter enable"] -pub type GPIO12_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio12_mcu_oe(&self) -> GPIO12_MCU_OE_R { - GPIO12_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio12_slp_sel(&self) -> GPIO12_SLP_SEL_R { - GPIO12_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio12_mcu_wpd(&self) -> GPIO12_MCU_WPD_R { - GPIO12_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio12_mcu_wpu(&self) -> GPIO12_MCU_WPU_R { - GPIO12_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio12_mcu_ie(&self) -> GPIO12_MCU_IE_R { - GPIO12_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio12_mcu_drv(&self) -> GPIO12_MCU_DRV_R { - GPIO12_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio12_fun_wpd(&self) -> GPIO12_FUN_WPD_R { - GPIO12_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio12_fun_wpu(&self) -> GPIO12_FUN_WPU_R { - GPIO12_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio12_fun_ie(&self) -> GPIO12_FUN_IE_R { - GPIO12_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio12_fun_drv(&self) -> GPIO12_FUN_DRV_R { - GPIO12_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio12_mcu_sel(&self) -> GPIO12_MCU_SEL_R { - GPIO12_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio12_filter_en(&self) -> GPIO12_FILTER_EN_R { - GPIO12_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio12") - .field( - "gpio12_mcu_oe", - &format_args!("{}", self.gpio12_mcu_oe().bit()), - ) - .field( - "gpio12_slp_sel", - &format_args!("{}", self.gpio12_slp_sel().bit()), - ) - .field( - "gpio12_mcu_wpd", - &format_args!("{}", self.gpio12_mcu_wpd().bit()), - ) - .field( - "gpio12_mcu_wpu", - &format_args!("{}", self.gpio12_mcu_wpu().bit()), - ) - .field( - "gpio12_mcu_ie", - &format_args!("{}", self.gpio12_mcu_ie().bit()), - ) - .field( - "gpio12_mcu_drv", - &format_args!("{}", self.gpio12_mcu_drv().bits()), - ) - .field( - "gpio12_fun_wpd", - &format_args!("{}", self.gpio12_fun_wpd().bit()), - ) - .field( - "gpio12_fun_wpu", - &format_args!("{}", self.gpio12_fun_wpu().bit()), - ) - .field( - "gpio12_fun_ie", - &format_args!("{}", self.gpio12_fun_ie().bit()), - ) - .field( - "gpio12_fun_drv", - &format_args!("{}", self.gpio12_fun_drv().bits()), - ) - .field( - "gpio12_mcu_sel", - &format_args!("{}", self.gpio12_mcu_sel().bits()), - ) - .field( - "gpio12_filter_en", - &format_args!("{}", self.gpio12_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio12_mcu_oe(&mut self) -> GPIO12_MCU_OE_W { - GPIO12_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio12_slp_sel(&mut self) -> GPIO12_SLP_SEL_W { - GPIO12_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio12_mcu_wpd(&mut self) -> GPIO12_MCU_WPD_W { - GPIO12_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio12_mcu_wpu(&mut self) -> GPIO12_MCU_WPU_W { - GPIO12_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio12_mcu_ie(&mut self) -> GPIO12_MCU_IE_W { - GPIO12_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio12_mcu_drv(&mut self) -> GPIO12_MCU_DRV_W { - GPIO12_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio12_fun_wpd(&mut self) -> GPIO12_FUN_WPD_W { - GPIO12_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio12_fun_wpu(&mut self) -> GPIO12_FUN_WPU_W { - GPIO12_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio12_fun_ie(&mut self) -> GPIO12_FUN_IE_W { - GPIO12_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio12_fun_drv(&mut self) -> GPIO12_FUN_DRV_W { - GPIO12_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio12_mcu_sel(&mut self) -> GPIO12_MCU_SEL_W { - GPIO12_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio12_filter_en(&mut self) -> GPIO12_FILTER_EN_W { - GPIO12_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO12_SPEC; -impl crate::RegisterSpec for GPIO12_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio12::R`](R) reader structure"] -impl crate::Readable for GPIO12_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio12::W`](W) writer structure"] -impl crate::Writable for GPIO12_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio12 to value 0x0800"] -impl crate::Resettable for GPIO12_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio13.rs b/esp32p4/src/io_mux/gpio13.rs deleted file mode 100644 index f0a39d0a42..0000000000 --- a/esp32p4/src/io_mux/gpio13.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio13` reader"] -pub type R = crate::R; -#[doc = "Register `gpio13` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO13_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO13_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO13_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO13_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO13_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO13_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO13_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO13_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO13_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO13_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO13_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO13_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO13_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO13_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO13_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO13_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO13_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO13_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO13_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO13_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO13_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO13_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO13_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO13_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO13_FUN_WPD` reader - pull-down enable"] -pub type GPIO13_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO13_FUN_WPD` writer - pull-down enable"] -pub type GPIO13_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO13_FUN_WPU` reader - pull-up enable"] -pub type GPIO13_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO13_FUN_WPU` writer - pull-up enable"] -pub type GPIO13_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO13_FUN_IE` reader - input enable"] -pub type GPIO13_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO13_FUN_IE` writer - input enable"] -pub type GPIO13_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO13_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO13_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO13_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO13_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO13_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO13_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO13_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO13_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO13_FILTER_EN` reader - input filter enable"] -pub type GPIO13_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO13_FILTER_EN` writer - input filter enable"] -pub type GPIO13_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio13_mcu_oe(&self) -> GPIO13_MCU_OE_R { - GPIO13_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio13_slp_sel(&self) -> GPIO13_SLP_SEL_R { - GPIO13_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio13_mcu_wpd(&self) -> GPIO13_MCU_WPD_R { - GPIO13_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio13_mcu_wpu(&self) -> GPIO13_MCU_WPU_R { - GPIO13_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio13_mcu_ie(&self) -> GPIO13_MCU_IE_R { - GPIO13_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio13_mcu_drv(&self) -> GPIO13_MCU_DRV_R { - GPIO13_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio13_fun_wpd(&self) -> GPIO13_FUN_WPD_R { - GPIO13_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio13_fun_wpu(&self) -> GPIO13_FUN_WPU_R { - GPIO13_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio13_fun_ie(&self) -> GPIO13_FUN_IE_R { - GPIO13_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio13_fun_drv(&self) -> GPIO13_FUN_DRV_R { - GPIO13_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio13_mcu_sel(&self) -> GPIO13_MCU_SEL_R { - GPIO13_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio13_filter_en(&self) -> GPIO13_FILTER_EN_R { - GPIO13_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio13") - .field( - "gpio13_mcu_oe", - &format_args!("{}", self.gpio13_mcu_oe().bit()), - ) - .field( - "gpio13_slp_sel", - &format_args!("{}", self.gpio13_slp_sel().bit()), - ) - .field( - "gpio13_mcu_wpd", - &format_args!("{}", self.gpio13_mcu_wpd().bit()), - ) - .field( - "gpio13_mcu_wpu", - &format_args!("{}", self.gpio13_mcu_wpu().bit()), - ) - .field( - "gpio13_mcu_ie", - &format_args!("{}", self.gpio13_mcu_ie().bit()), - ) - .field( - "gpio13_mcu_drv", - &format_args!("{}", self.gpio13_mcu_drv().bits()), - ) - .field( - "gpio13_fun_wpd", - &format_args!("{}", self.gpio13_fun_wpd().bit()), - ) - .field( - "gpio13_fun_wpu", - &format_args!("{}", self.gpio13_fun_wpu().bit()), - ) - .field( - "gpio13_fun_ie", - &format_args!("{}", self.gpio13_fun_ie().bit()), - ) - .field( - "gpio13_fun_drv", - &format_args!("{}", self.gpio13_fun_drv().bits()), - ) - .field( - "gpio13_mcu_sel", - &format_args!("{}", self.gpio13_mcu_sel().bits()), - ) - .field( - "gpio13_filter_en", - &format_args!("{}", self.gpio13_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio13_mcu_oe(&mut self) -> GPIO13_MCU_OE_W { - GPIO13_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio13_slp_sel(&mut self) -> GPIO13_SLP_SEL_W { - GPIO13_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio13_mcu_wpd(&mut self) -> GPIO13_MCU_WPD_W { - GPIO13_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio13_mcu_wpu(&mut self) -> GPIO13_MCU_WPU_W { - GPIO13_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio13_mcu_ie(&mut self) -> GPIO13_MCU_IE_W { - GPIO13_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio13_mcu_drv(&mut self) -> GPIO13_MCU_DRV_W { - GPIO13_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio13_fun_wpd(&mut self) -> GPIO13_FUN_WPD_W { - GPIO13_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio13_fun_wpu(&mut self) -> GPIO13_FUN_WPU_W { - GPIO13_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio13_fun_ie(&mut self) -> GPIO13_FUN_IE_W { - GPIO13_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio13_fun_drv(&mut self) -> GPIO13_FUN_DRV_W { - GPIO13_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio13_mcu_sel(&mut self) -> GPIO13_MCU_SEL_W { - GPIO13_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio13_filter_en(&mut self) -> GPIO13_FILTER_EN_W { - GPIO13_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO13_SPEC; -impl crate::RegisterSpec for GPIO13_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio13::R`](R) reader structure"] -impl crate::Readable for GPIO13_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio13::W`](W) writer structure"] -impl crate::Writable for GPIO13_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio13 to value 0x0800"] -impl crate::Resettable for GPIO13_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio14.rs b/esp32p4/src/io_mux/gpio14.rs deleted file mode 100644 index b8393c0e27..0000000000 --- a/esp32p4/src/io_mux/gpio14.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio14` reader"] -pub type R = crate::R; -#[doc = "Register `gpio14` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO14_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO14_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO14_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO14_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO14_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO14_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO14_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO14_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO14_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO14_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO14_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO14_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO14_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO14_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO14_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO14_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO14_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO14_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO14_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO14_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO14_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO14_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO14_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO14_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO14_FUN_WPD` reader - pull-down enable"] -pub type GPIO14_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO14_FUN_WPD` writer - pull-down enable"] -pub type GPIO14_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO14_FUN_WPU` reader - pull-up enable"] -pub type GPIO14_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO14_FUN_WPU` writer - pull-up enable"] -pub type GPIO14_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO14_FUN_IE` reader - input enable"] -pub type GPIO14_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO14_FUN_IE` writer - input enable"] -pub type GPIO14_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO14_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO14_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO14_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO14_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO14_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO14_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO14_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO14_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO14_FILTER_EN` reader - input filter enable"] -pub type GPIO14_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO14_FILTER_EN` writer - input filter enable"] -pub type GPIO14_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio14_mcu_oe(&self) -> GPIO14_MCU_OE_R { - GPIO14_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio14_slp_sel(&self) -> GPIO14_SLP_SEL_R { - GPIO14_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio14_mcu_wpd(&self) -> GPIO14_MCU_WPD_R { - GPIO14_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio14_mcu_wpu(&self) -> GPIO14_MCU_WPU_R { - GPIO14_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio14_mcu_ie(&self) -> GPIO14_MCU_IE_R { - GPIO14_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio14_mcu_drv(&self) -> GPIO14_MCU_DRV_R { - GPIO14_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio14_fun_wpd(&self) -> GPIO14_FUN_WPD_R { - GPIO14_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio14_fun_wpu(&self) -> GPIO14_FUN_WPU_R { - GPIO14_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio14_fun_ie(&self) -> GPIO14_FUN_IE_R { - GPIO14_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio14_fun_drv(&self) -> GPIO14_FUN_DRV_R { - GPIO14_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio14_mcu_sel(&self) -> GPIO14_MCU_SEL_R { - GPIO14_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio14_filter_en(&self) -> GPIO14_FILTER_EN_R { - GPIO14_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio14") - .field( - "gpio14_mcu_oe", - &format_args!("{}", self.gpio14_mcu_oe().bit()), - ) - .field( - "gpio14_slp_sel", - &format_args!("{}", self.gpio14_slp_sel().bit()), - ) - .field( - "gpio14_mcu_wpd", - &format_args!("{}", self.gpio14_mcu_wpd().bit()), - ) - .field( - "gpio14_mcu_wpu", - &format_args!("{}", self.gpio14_mcu_wpu().bit()), - ) - .field( - "gpio14_mcu_ie", - &format_args!("{}", self.gpio14_mcu_ie().bit()), - ) - .field( - "gpio14_mcu_drv", - &format_args!("{}", self.gpio14_mcu_drv().bits()), - ) - .field( - "gpio14_fun_wpd", - &format_args!("{}", self.gpio14_fun_wpd().bit()), - ) - .field( - "gpio14_fun_wpu", - &format_args!("{}", self.gpio14_fun_wpu().bit()), - ) - .field( - "gpio14_fun_ie", - &format_args!("{}", self.gpio14_fun_ie().bit()), - ) - .field( - "gpio14_fun_drv", - &format_args!("{}", self.gpio14_fun_drv().bits()), - ) - .field( - "gpio14_mcu_sel", - &format_args!("{}", self.gpio14_mcu_sel().bits()), - ) - .field( - "gpio14_filter_en", - &format_args!("{}", self.gpio14_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio14_mcu_oe(&mut self) -> GPIO14_MCU_OE_W { - GPIO14_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio14_slp_sel(&mut self) -> GPIO14_SLP_SEL_W { - GPIO14_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio14_mcu_wpd(&mut self) -> GPIO14_MCU_WPD_W { - GPIO14_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio14_mcu_wpu(&mut self) -> GPIO14_MCU_WPU_W { - GPIO14_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio14_mcu_ie(&mut self) -> GPIO14_MCU_IE_W { - GPIO14_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio14_mcu_drv(&mut self) -> GPIO14_MCU_DRV_W { - GPIO14_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio14_fun_wpd(&mut self) -> GPIO14_FUN_WPD_W { - GPIO14_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio14_fun_wpu(&mut self) -> GPIO14_FUN_WPU_W { - GPIO14_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio14_fun_ie(&mut self) -> GPIO14_FUN_IE_W { - GPIO14_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio14_fun_drv(&mut self) -> GPIO14_FUN_DRV_W { - GPIO14_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio14_mcu_sel(&mut self) -> GPIO14_MCU_SEL_W { - GPIO14_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio14_filter_en(&mut self) -> GPIO14_FILTER_EN_W { - GPIO14_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO14_SPEC; -impl crate::RegisterSpec for GPIO14_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio14::R`](R) reader structure"] -impl crate::Readable for GPIO14_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio14::W`](W) writer structure"] -impl crate::Writable for GPIO14_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio14 to value 0x0800"] -impl crate::Resettable for GPIO14_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio15.rs b/esp32p4/src/io_mux/gpio15.rs deleted file mode 100644 index e6ea5ce338..0000000000 --- a/esp32p4/src/io_mux/gpio15.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio15` reader"] -pub type R = crate::R; -#[doc = "Register `gpio15` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO15_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO15_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO15_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO15_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO15_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO15_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO15_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO15_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO15_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO15_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO15_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO15_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO15_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO15_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO15_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO15_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO15_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO15_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO15_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO15_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO15_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO15_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO15_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO15_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO15_FUN_WPD` reader - pull-down enable"] -pub type GPIO15_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO15_FUN_WPD` writer - pull-down enable"] -pub type GPIO15_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO15_FUN_WPU` reader - pull-up enable"] -pub type GPIO15_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO15_FUN_WPU` writer - pull-up enable"] -pub type GPIO15_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO15_FUN_IE` reader - input enable"] -pub type GPIO15_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO15_FUN_IE` writer - input enable"] -pub type GPIO15_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO15_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO15_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO15_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO15_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO15_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO15_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO15_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO15_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO15_FILTER_EN` reader - input filter enable"] -pub type GPIO15_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO15_FILTER_EN` writer - input filter enable"] -pub type GPIO15_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio15_mcu_oe(&self) -> GPIO15_MCU_OE_R { - GPIO15_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio15_slp_sel(&self) -> GPIO15_SLP_SEL_R { - GPIO15_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio15_mcu_wpd(&self) -> GPIO15_MCU_WPD_R { - GPIO15_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio15_mcu_wpu(&self) -> GPIO15_MCU_WPU_R { - GPIO15_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio15_mcu_ie(&self) -> GPIO15_MCU_IE_R { - GPIO15_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio15_mcu_drv(&self) -> GPIO15_MCU_DRV_R { - GPIO15_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio15_fun_wpd(&self) -> GPIO15_FUN_WPD_R { - GPIO15_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio15_fun_wpu(&self) -> GPIO15_FUN_WPU_R { - GPIO15_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio15_fun_ie(&self) -> GPIO15_FUN_IE_R { - GPIO15_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio15_fun_drv(&self) -> GPIO15_FUN_DRV_R { - GPIO15_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio15_mcu_sel(&self) -> GPIO15_MCU_SEL_R { - GPIO15_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio15_filter_en(&self) -> GPIO15_FILTER_EN_R { - GPIO15_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio15") - .field( - "gpio15_mcu_oe", - &format_args!("{}", self.gpio15_mcu_oe().bit()), - ) - .field( - "gpio15_slp_sel", - &format_args!("{}", self.gpio15_slp_sel().bit()), - ) - .field( - "gpio15_mcu_wpd", - &format_args!("{}", self.gpio15_mcu_wpd().bit()), - ) - .field( - "gpio15_mcu_wpu", - &format_args!("{}", self.gpio15_mcu_wpu().bit()), - ) - .field( - "gpio15_mcu_ie", - &format_args!("{}", self.gpio15_mcu_ie().bit()), - ) - .field( - "gpio15_mcu_drv", - &format_args!("{}", self.gpio15_mcu_drv().bits()), - ) - .field( - "gpio15_fun_wpd", - &format_args!("{}", self.gpio15_fun_wpd().bit()), - ) - .field( - "gpio15_fun_wpu", - &format_args!("{}", self.gpio15_fun_wpu().bit()), - ) - .field( - "gpio15_fun_ie", - &format_args!("{}", self.gpio15_fun_ie().bit()), - ) - .field( - "gpio15_fun_drv", - &format_args!("{}", self.gpio15_fun_drv().bits()), - ) - .field( - "gpio15_mcu_sel", - &format_args!("{}", self.gpio15_mcu_sel().bits()), - ) - .field( - "gpio15_filter_en", - &format_args!("{}", self.gpio15_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio15_mcu_oe(&mut self) -> GPIO15_MCU_OE_W { - GPIO15_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio15_slp_sel(&mut self) -> GPIO15_SLP_SEL_W { - GPIO15_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio15_mcu_wpd(&mut self) -> GPIO15_MCU_WPD_W { - GPIO15_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio15_mcu_wpu(&mut self) -> GPIO15_MCU_WPU_W { - GPIO15_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio15_mcu_ie(&mut self) -> GPIO15_MCU_IE_W { - GPIO15_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio15_mcu_drv(&mut self) -> GPIO15_MCU_DRV_W { - GPIO15_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio15_fun_wpd(&mut self) -> GPIO15_FUN_WPD_W { - GPIO15_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio15_fun_wpu(&mut self) -> GPIO15_FUN_WPU_W { - GPIO15_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio15_fun_ie(&mut self) -> GPIO15_FUN_IE_W { - GPIO15_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio15_fun_drv(&mut self) -> GPIO15_FUN_DRV_W { - GPIO15_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio15_mcu_sel(&mut self) -> GPIO15_MCU_SEL_W { - GPIO15_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio15_filter_en(&mut self) -> GPIO15_FILTER_EN_W { - GPIO15_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio15::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio15::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO15_SPEC; -impl crate::RegisterSpec for GPIO15_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio15::R`](R) reader structure"] -impl crate::Readable for GPIO15_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio15::W`](W) writer structure"] -impl crate::Writable for GPIO15_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio15 to value 0x0800"] -impl crate::Resettable for GPIO15_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio16.rs b/esp32p4/src/io_mux/gpio16.rs deleted file mode 100644 index ad0185b951..0000000000 --- a/esp32p4/src/io_mux/gpio16.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio16` reader"] -pub type R = crate::R; -#[doc = "Register `gpio16` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO16_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO16_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO16_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO16_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO16_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO16_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO16_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO16_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO16_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO16_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO16_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO16_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO16_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO16_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO16_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO16_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO16_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO16_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO16_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO16_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO16_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO16_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO16_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO16_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO16_FUN_WPD` reader - pull-down enable"] -pub type GPIO16_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO16_FUN_WPD` writer - pull-down enable"] -pub type GPIO16_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO16_FUN_WPU` reader - pull-up enable"] -pub type GPIO16_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO16_FUN_WPU` writer - pull-up enable"] -pub type GPIO16_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO16_FUN_IE` reader - input enable"] -pub type GPIO16_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO16_FUN_IE` writer - input enable"] -pub type GPIO16_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO16_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO16_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO16_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO16_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO16_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO16_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO16_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO16_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO16_FILTER_EN` reader - input filter enable"] -pub type GPIO16_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO16_FILTER_EN` writer - input filter enable"] -pub type GPIO16_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio16_mcu_oe(&self) -> GPIO16_MCU_OE_R { - GPIO16_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio16_slp_sel(&self) -> GPIO16_SLP_SEL_R { - GPIO16_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio16_mcu_wpd(&self) -> GPIO16_MCU_WPD_R { - GPIO16_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio16_mcu_wpu(&self) -> GPIO16_MCU_WPU_R { - GPIO16_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio16_mcu_ie(&self) -> GPIO16_MCU_IE_R { - GPIO16_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio16_mcu_drv(&self) -> GPIO16_MCU_DRV_R { - GPIO16_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio16_fun_wpd(&self) -> GPIO16_FUN_WPD_R { - GPIO16_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio16_fun_wpu(&self) -> GPIO16_FUN_WPU_R { - GPIO16_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio16_fun_ie(&self) -> GPIO16_FUN_IE_R { - GPIO16_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio16_fun_drv(&self) -> GPIO16_FUN_DRV_R { - GPIO16_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio16_mcu_sel(&self) -> GPIO16_MCU_SEL_R { - GPIO16_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio16_filter_en(&self) -> GPIO16_FILTER_EN_R { - GPIO16_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio16") - .field( - "gpio16_mcu_oe", - &format_args!("{}", self.gpio16_mcu_oe().bit()), - ) - .field( - "gpio16_slp_sel", - &format_args!("{}", self.gpio16_slp_sel().bit()), - ) - .field( - "gpio16_mcu_wpd", - &format_args!("{}", self.gpio16_mcu_wpd().bit()), - ) - .field( - "gpio16_mcu_wpu", - &format_args!("{}", self.gpio16_mcu_wpu().bit()), - ) - .field( - "gpio16_mcu_ie", - &format_args!("{}", self.gpio16_mcu_ie().bit()), - ) - .field( - "gpio16_mcu_drv", - &format_args!("{}", self.gpio16_mcu_drv().bits()), - ) - .field( - "gpio16_fun_wpd", - &format_args!("{}", self.gpio16_fun_wpd().bit()), - ) - .field( - "gpio16_fun_wpu", - &format_args!("{}", self.gpio16_fun_wpu().bit()), - ) - .field( - "gpio16_fun_ie", - &format_args!("{}", self.gpio16_fun_ie().bit()), - ) - .field( - "gpio16_fun_drv", - &format_args!("{}", self.gpio16_fun_drv().bits()), - ) - .field( - "gpio16_mcu_sel", - &format_args!("{}", self.gpio16_mcu_sel().bits()), - ) - .field( - "gpio16_filter_en", - &format_args!("{}", self.gpio16_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio16_mcu_oe(&mut self) -> GPIO16_MCU_OE_W { - GPIO16_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio16_slp_sel(&mut self) -> GPIO16_SLP_SEL_W { - GPIO16_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio16_mcu_wpd(&mut self) -> GPIO16_MCU_WPD_W { - GPIO16_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio16_mcu_wpu(&mut self) -> GPIO16_MCU_WPU_W { - GPIO16_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio16_mcu_ie(&mut self) -> GPIO16_MCU_IE_W { - GPIO16_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio16_mcu_drv(&mut self) -> GPIO16_MCU_DRV_W { - GPIO16_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio16_fun_wpd(&mut self) -> GPIO16_FUN_WPD_W { - GPIO16_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio16_fun_wpu(&mut self) -> GPIO16_FUN_WPU_W { - GPIO16_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio16_fun_ie(&mut self) -> GPIO16_FUN_IE_W { - GPIO16_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio16_fun_drv(&mut self) -> GPIO16_FUN_DRV_W { - GPIO16_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio16_mcu_sel(&mut self) -> GPIO16_MCU_SEL_W { - GPIO16_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio16_filter_en(&mut self) -> GPIO16_FILTER_EN_W { - GPIO16_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio16\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio16::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio16::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO16_SPEC; -impl crate::RegisterSpec for GPIO16_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio16::R`](R) reader structure"] -impl crate::Readable for GPIO16_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio16::W`](W) writer structure"] -impl crate::Writable for GPIO16_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio16 to value 0x0800"] -impl crate::Resettable for GPIO16_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio17.rs b/esp32p4/src/io_mux/gpio17.rs deleted file mode 100644 index df052122fc..0000000000 --- a/esp32p4/src/io_mux/gpio17.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio17` reader"] -pub type R = crate::R; -#[doc = "Register `gpio17` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO17_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO17_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO17_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO17_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO17_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO17_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO17_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO17_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO17_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO17_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO17_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO17_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO17_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO17_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO17_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO17_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO17_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO17_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO17_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO17_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO17_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO17_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO17_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO17_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO17_FUN_WPD` reader - pull-down enable"] -pub type GPIO17_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO17_FUN_WPD` writer - pull-down enable"] -pub type GPIO17_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO17_FUN_WPU` reader - pull-up enable"] -pub type GPIO17_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO17_FUN_WPU` writer - pull-up enable"] -pub type GPIO17_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO17_FUN_IE` reader - input enable"] -pub type GPIO17_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO17_FUN_IE` writer - input enable"] -pub type GPIO17_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO17_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO17_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO17_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO17_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO17_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO17_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO17_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO17_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO17_FILTER_EN` reader - input filter enable"] -pub type GPIO17_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO17_FILTER_EN` writer - input filter enable"] -pub type GPIO17_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio17_mcu_oe(&self) -> GPIO17_MCU_OE_R { - GPIO17_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio17_slp_sel(&self) -> GPIO17_SLP_SEL_R { - GPIO17_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio17_mcu_wpd(&self) -> GPIO17_MCU_WPD_R { - GPIO17_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio17_mcu_wpu(&self) -> GPIO17_MCU_WPU_R { - GPIO17_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio17_mcu_ie(&self) -> GPIO17_MCU_IE_R { - GPIO17_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio17_mcu_drv(&self) -> GPIO17_MCU_DRV_R { - GPIO17_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio17_fun_wpd(&self) -> GPIO17_FUN_WPD_R { - GPIO17_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio17_fun_wpu(&self) -> GPIO17_FUN_WPU_R { - GPIO17_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio17_fun_ie(&self) -> GPIO17_FUN_IE_R { - GPIO17_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio17_fun_drv(&self) -> GPIO17_FUN_DRV_R { - GPIO17_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio17_mcu_sel(&self) -> GPIO17_MCU_SEL_R { - GPIO17_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio17_filter_en(&self) -> GPIO17_FILTER_EN_R { - GPIO17_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio17") - .field( - "gpio17_mcu_oe", - &format_args!("{}", self.gpio17_mcu_oe().bit()), - ) - .field( - "gpio17_slp_sel", - &format_args!("{}", self.gpio17_slp_sel().bit()), - ) - .field( - "gpio17_mcu_wpd", - &format_args!("{}", self.gpio17_mcu_wpd().bit()), - ) - .field( - "gpio17_mcu_wpu", - &format_args!("{}", self.gpio17_mcu_wpu().bit()), - ) - .field( - "gpio17_mcu_ie", - &format_args!("{}", self.gpio17_mcu_ie().bit()), - ) - .field( - "gpio17_mcu_drv", - &format_args!("{}", self.gpio17_mcu_drv().bits()), - ) - .field( - "gpio17_fun_wpd", - &format_args!("{}", self.gpio17_fun_wpd().bit()), - ) - .field( - "gpio17_fun_wpu", - &format_args!("{}", self.gpio17_fun_wpu().bit()), - ) - .field( - "gpio17_fun_ie", - &format_args!("{}", self.gpio17_fun_ie().bit()), - ) - .field( - "gpio17_fun_drv", - &format_args!("{}", self.gpio17_fun_drv().bits()), - ) - .field( - "gpio17_mcu_sel", - &format_args!("{}", self.gpio17_mcu_sel().bits()), - ) - .field( - "gpio17_filter_en", - &format_args!("{}", self.gpio17_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio17_mcu_oe(&mut self) -> GPIO17_MCU_OE_W { - GPIO17_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio17_slp_sel(&mut self) -> GPIO17_SLP_SEL_W { - GPIO17_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio17_mcu_wpd(&mut self) -> GPIO17_MCU_WPD_W { - GPIO17_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio17_mcu_wpu(&mut self) -> GPIO17_MCU_WPU_W { - GPIO17_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio17_mcu_ie(&mut self) -> GPIO17_MCU_IE_W { - GPIO17_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio17_mcu_drv(&mut self) -> GPIO17_MCU_DRV_W { - GPIO17_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio17_fun_wpd(&mut self) -> GPIO17_FUN_WPD_W { - GPIO17_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio17_fun_wpu(&mut self) -> GPIO17_FUN_WPU_W { - GPIO17_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio17_fun_ie(&mut self) -> GPIO17_FUN_IE_W { - GPIO17_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio17_fun_drv(&mut self) -> GPIO17_FUN_DRV_W { - GPIO17_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio17_mcu_sel(&mut self) -> GPIO17_MCU_SEL_W { - GPIO17_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio17_filter_en(&mut self) -> GPIO17_FILTER_EN_W { - GPIO17_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio17\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio17::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio17::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO17_SPEC; -impl crate::RegisterSpec for GPIO17_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio17::R`](R) reader structure"] -impl crate::Readable for GPIO17_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio17::W`](W) writer structure"] -impl crate::Writable for GPIO17_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio17 to value 0x0800"] -impl crate::Resettable for GPIO17_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio18.rs b/esp32p4/src/io_mux/gpio18.rs deleted file mode 100644 index 9ede00bc0f..0000000000 --- a/esp32p4/src/io_mux/gpio18.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio18` reader"] -pub type R = crate::R; -#[doc = "Register `gpio18` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO18_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO18_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO18_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO18_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO18_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO18_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO18_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO18_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO18_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO18_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO18_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO18_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO18_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO18_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO18_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO18_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO18_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO18_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO18_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO18_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO18_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO18_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO18_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO18_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO18_FUN_WPD` reader - pull-down enable"] -pub type GPIO18_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO18_FUN_WPD` writer - pull-down enable"] -pub type GPIO18_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO18_FUN_WPU` reader - pull-up enable"] -pub type GPIO18_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO18_FUN_WPU` writer - pull-up enable"] -pub type GPIO18_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO18_FUN_IE` reader - input enable"] -pub type GPIO18_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO18_FUN_IE` writer - input enable"] -pub type GPIO18_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO18_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO18_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO18_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO18_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO18_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO18_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO18_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO18_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO18_FILTER_EN` reader - input filter enable"] -pub type GPIO18_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO18_FILTER_EN` writer - input filter enable"] -pub type GPIO18_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio18_mcu_oe(&self) -> GPIO18_MCU_OE_R { - GPIO18_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio18_slp_sel(&self) -> GPIO18_SLP_SEL_R { - GPIO18_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio18_mcu_wpd(&self) -> GPIO18_MCU_WPD_R { - GPIO18_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio18_mcu_wpu(&self) -> GPIO18_MCU_WPU_R { - GPIO18_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio18_mcu_ie(&self) -> GPIO18_MCU_IE_R { - GPIO18_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio18_mcu_drv(&self) -> GPIO18_MCU_DRV_R { - GPIO18_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio18_fun_wpd(&self) -> GPIO18_FUN_WPD_R { - GPIO18_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio18_fun_wpu(&self) -> GPIO18_FUN_WPU_R { - GPIO18_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio18_fun_ie(&self) -> GPIO18_FUN_IE_R { - GPIO18_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio18_fun_drv(&self) -> GPIO18_FUN_DRV_R { - GPIO18_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio18_mcu_sel(&self) -> GPIO18_MCU_SEL_R { - GPIO18_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio18_filter_en(&self) -> GPIO18_FILTER_EN_R { - GPIO18_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio18") - .field( - "gpio18_mcu_oe", - &format_args!("{}", self.gpio18_mcu_oe().bit()), - ) - .field( - "gpio18_slp_sel", - &format_args!("{}", self.gpio18_slp_sel().bit()), - ) - .field( - "gpio18_mcu_wpd", - &format_args!("{}", self.gpio18_mcu_wpd().bit()), - ) - .field( - "gpio18_mcu_wpu", - &format_args!("{}", self.gpio18_mcu_wpu().bit()), - ) - .field( - "gpio18_mcu_ie", - &format_args!("{}", self.gpio18_mcu_ie().bit()), - ) - .field( - "gpio18_mcu_drv", - &format_args!("{}", self.gpio18_mcu_drv().bits()), - ) - .field( - "gpio18_fun_wpd", - &format_args!("{}", self.gpio18_fun_wpd().bit()), - ) - .field( - "gpio18_fun_wpu", - &format_args!("{}", self.gpio18_fun_wpu().bit()), - ) - .field( - "gpio18_fun_ie", - &format_args!("{}", self.gpio18_fun_ie().bit()), - ) - .field( - "gpio18_fun_drv", - &format_args!("{}", self.gpio18_fun_drv().bits()), - ) - .field( - "gpio18_mcu_sel", - &format_args!("{}", self.gpio18_mcu_sel().bits()), - ) - .field( - "gpio18_filter_en", - &format_args!("{}", self.gpio18_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio18_mcu_oe(&mut self) -> GPIO18_MCU_OE_W { - GPIO18_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio18_slp_sel(&mut self) -> GPIO18_SLP_SEL_W { - GPIO18_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio18_mcu_wpd(&mut self) -> GPIO18_MCU_WPD_W { - GPIO18_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio18_mcu_wpu(&mut self) -> GPIO18_MCU_WPU_W { - GPIO18_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio18_mcu_ie(&mut self) -> GPIO18_MCU_IE_W { - GPIO18_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio18_mcu_drv(&mut self) -> GPIO18_MCU_DRV_W { - GPIO18_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio18_fun_wpd(&mut self) -> GPIO18_FUN_WPD_W { - GPIO18_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio18_fun_wpu(&mut self) -> GPIO18_FUN_WPU_W { - GPIO18_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio18_fun_ie(&mut self) -> GPIO18_FUN_IE_W { - GPIO18_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio18_fun_drv(&mut self) -> GPIO18_FUN_DRV_W { - GPIO18_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio18_mcu_sel(&mut self) -> GPIO18_MCU_SEL_W { - GPIO18_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio18_filter_en(&mut self) -> GPIO18_FILTER_EN_W { - GPIO18_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio18\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio18::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio18::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO18_SPEC; -impl crate::RegisterSpec for GPIO18_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio18::R`](R) reader structure"] -impl crate::Readable for GPIO18_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio18::W`](W) writer structure"] -impl crate::Writable for GPIO18_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio18 to value 0x0800"] -impl crate::Resettable for GPIO18_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio19.rs b/esp32p4/src/io_mux/gpio19.rs deleted file mode 100644 index 920da7523a..0000000000 --- a/esp32p4/src/io_mux/gpio19.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio19` reader"] -pub type R = crate::R; -#[doc = "Register `gpio19` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO19_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO19_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO19_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO19_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO19_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO19_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO19_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO19_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO19_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO19_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO19_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO19_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO19_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO19_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO19_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO19_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO19_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO19_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO19_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO19_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO19_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO19_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO19_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO19_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO19_FUN_WPD` reader - pull-down enable"] -pub type GPIO19_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO19_FUN_WPD` writer - pull-down enable"] -pub type GPIO19_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO19_FUN_WPU` reader - pull-up enable"] -pub type GPIO19_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO19_FUN_WPU` writer - pull-up enable"] -pub type GPIO19_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO19_FUN_IE` reader - input enable"] -pub type GPIO19_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO19_FUN_IE` writer - input enable"] -pub type GPIO19_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO19_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO19_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO19_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO19_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO19_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO19_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO19_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO19_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO19_FILTER_EN` reader - input filter enable"] -pub type GPIO19_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO19_FILTER_EN` writer - input filter enable"] -pub type GPIO19_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio19_mcu_oe(&self) -> GPIO19_MCU_OE_R { - GPIO19_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio19_slp_sel(&self) -> GPIO19_SLP_SEL_R { - GPIO19_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio19_mcu_wpd(&self) -> GPIO19_MCU_WPD_R { - GPIO19_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio19_mcu_wpu(&self) -> GPIO19_MCU_WPU_R { - GPIO19_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio19_mcu_ie(&self) -> GPIO19_MCU_IE_R { - GPIO19_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio19_mcu_drv(&self) -> GPIO19_MCU_DRV_R { - GPIO19_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio19_fun_wpd(&self) -> GPIO19_FUN_WPD_R { - GPIO19_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio19_fun_wpu(&self) -> GPIO19_FUN_WPU_R { - GPIO19_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio19_fun_ie(&self) -> GPIO19_FUN_IE_R { - GPIO19_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio19_fun_drv(&self) -> GPIO19_FUN_DRV_R { - GPIO19_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio19_mcu_sel(&self) -> GPIO19_MCU_SEL_R { - GPIO19_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio19_filter_en(&self) -> GPIO19_FILTER_EN_R { - GPIO19_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio19") - .field( - "gpio19_mcu_oe", - &format_args!("{}", self.gpio19_mcu_oe().bit()), - ) - .field( - "gpio19_slp_sel", - &format_args!("{}", self.gpio19_slp_sel().bit()), - ) - .field( - "gpio19_mcu_wpd", - &format_args!("{}", self.gpio19_mcu_wpd().bit()), - ) - .field( - "gpio19_mcu_wpu", - &format_args!("{}", self.gpio19_mcu_wpu().bit()), - ) - .field( - "gpio19_mcu_ie", - &format_args!("{}", self.gpio19_mcu_ie().bit()), - ) - .field( - "gpio19_mcu_drv", - &format_args!("{}", self.gpio19_mcu_drv().bits()), - ) - .field( - "gpio19_fun_wpd", - &format_args!("{}", self.gpio19_fun_wpd().bit()), - ) - .field( - "gpio19_fun_wpu", - &format_args!("{}", self.gpio19_fun_wpu().bit()), - ) - .field( - "gpio19_fun_ie", - &format_args!("{}", self.gpio19_fun_ie().bit()), - ) - .field( - "gpio19_fun_drv", - &format_args!("{}", self.gpio19_fun_drv().bits()), - ) - .field( - "gpio19_mcu_sel", - &format_args!("{}", self.gpio19_mcu_sel().bits()), - ) - .field( - "gpio19_filter_en", - &format_args!("{}", self.gpio19_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio19_mcu_oe(&mut self) -> GPIO19_MCU_OE_W { - GPIO19_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio19_slp_sel(&mut self) -> GPIO19_SLP_SEL_W { - GPIO19_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio19_mcu_wpd(&mut self) -> GPIO19_MCU_WPD_W { - GPIO19_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio19_mcu_wpu(&mut self) -> GPIO19_MCU_WPU_W { - GPIO19_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio19_mcu_ie(&mut self) -> GPIO19_MCU_IE_W { - GPIO19_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio19_mcu_drv(&mut self) -> GPIO19_MCU_DRV_W { - GPIO19_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio19_fun_wpd(&mut self) -> GPIO19_FUN_WPD_W { - GPIO19_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio19_fun_wpu(&mut self) -> GPIO19_FUN_WPU_W { - GPIO19_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio19_fun_ie(&mut self) -> GPIO19_FUN_IE_W { - GPIO19_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio19_fun_drv(&mut self) -> GPIO19_FUN_DRV_W { - GPIO19_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio19_mcu_sel(&mut self) -> GPIO19_MCU_SEL_W { - GPIO19_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio19_filter_en(&mut self) -> GPIO19_FILTER_EN_W { - GPIO19_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio19\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio19::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio19::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO19_SPEC; -impl crate::RegisterSpec for GPIO19_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio19::R`](R) reader structure"] -impl crate::Readable for GPIO19_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio19::W`](W) writer structure"] -impl crate::Writable for GPIO19_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio19 to value 0x0800"] -impl crate::Resettable for GPIO19_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio2.rs b/esp32p4/src/io_mux/gpio2.rs deleted file mode 100644 index 29aee629ca..0000000000 --- a/esp32p4/src/io_mux/gpio2.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio2` reader"] -pub type R = crate::R; -#[doc = "Register `gpio2` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO2_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO2_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO2_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO2_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO2_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO2_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO2_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO2_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO2_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO2_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO2_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO2_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO2_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO2_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO2_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO2_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO2_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO2_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO2_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO2_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO2_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO2_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO2_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO2_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO2_FUN_WPD` reader - pull-down enable"] -pub type GPIO2_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO2_FUN_WPD` writer - pull-down enable"] -pub type GPIO2_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO2_FUN_WPU` reader - pull-up enable"] -pub type GPIO2_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO2_FUN_WPU` writer - pull-up enable"] -pub type GPIO2_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO2_FUN_IE` reader - input enable"] -pub type GPIO2_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO2_FUN_IE` writer - input enable"] -pub type GPIO2_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO2_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO2_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO2_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO2_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO2_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO2_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO2_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO2_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO2_FILTER_EN` reader - input filter enable"] -pub type GPIO2_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO2_FILTER_EN` writer - input filter enable"] -pub type GPIO2_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio2_mcu_oe(&self) -> GPIO2_MCU_OE_R { - GPIO2_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio2_slp_sel(&self) -> GPIO2_SLP_SEL_R { - GPIO2_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio2_mcu_wpd(&self) -> GPIO2_MCU_WPD_R { - GPIO2_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio2_mcu_wpu(&self) -> GPIO2_MCU_WPU_R { - GPIO2_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio2_mcu_ie(&self) -> GPIO2_MCU_IE_R { - GPIO2_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio2_mcu_drv(&self) -> GPIO2_MCU_DRV_R { - GPIO2_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio2_fun_wpd(&self) -> GPIO2_FUN_WPD_R { - GPIO2_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio2_fun_wpu(&self) -> GPIO2_FUN_WPU_R { - GPIO2_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio2_fun_ie(&self) -> GPIO2_FUN_IE_R { - GPIO2_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio2_fun_drv(&self) -> GPIO2_FUN_DRV_R { - GPIO2_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio2_mcu_sel(&self) -> GPIO2_MCU_SEL_R { - GPIO2_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio2_filter_en(&self) -> GPIO2_FILTER_EN_R { - GPIO2_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio2") - .field( - "gpio2_mcu_oe", - &format_args!("{}", self.gpio2_mcu_oe().bit()), - ) - .field( - "gpio2_slp_sel", - &format_args!("{}", self.gpio2_slp_sel().bit()), - ) - .field( - "gpio2_mcu_wpd", - &format_args!("{}", self.gpio2_mcu_wpd().bit()), - ) - .field( - "gpio2_mcu_wpu", - &format_args!("{}", self.gpio2_mcu_wpu().bit()), - ) - .field( - "gpio2_mcu_ie", - &format_args!("{}", self.gpio2_mcu_ie().bit()), - ) - .field( - "gpio2_mcu_drv", - &format_args!("{}", self.gpio2_mcu_drv().bits()), - ) - .field( - "gpio2_fun_wpd", - &format_args!("{}", self.gpio2_fun_wpd().bit()), - ) - .field( - "gpio2_fun_wpu", - &format_args!("{}", self.gpio2_fun_wpu().bit()), - ) - .field( - "gpio2_fun_ie", - &format_args!("{}", self.gpio2_fun_ie().bit()), - ) - .field( - "gpio2_fun_drv", - &format_args!("{}", self.gpio2_fun_drv().bits()), - ) - .field( - "gpio2_mcu_sel", - &format_args!("{}", self.gpio2_mcu_sel().bits()), - ) - .field( - "gpio2_filter_en", - &format_args!("{}", self.gpio2_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio2_mcu_oe(&mut self) -> GPIO2_MCU_OE_W { - GPIO2_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio2_slp_sel(&mut self) -> GPIO2_SLP_SEL_W { - GPIO2_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio2_mcu_wpd(&mut self) -> GPIO2_MCU_WPD_W { - GPIO2_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio2_mcu_wpu(&mut self) -> GPIO2_MCU_WPU_W { - GPIO2_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio2_mcu_ie(&mut self) -> GPIO2_MCU_IE_W { - GPIO2_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio2_mcu_drv(&mut self) -> GPIO2_MCU_DRV_W { - GPIO2_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio2_fun_wpd(&mut self) -> GPIO2_FUN_WPD_W { - GPIO2_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio2_fun_wpu(&mut self) -> GPIO2_FUN_WPU_W { - GPIO2_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio2_fun_ie(&mut self) -> GPIO2_FUN_IE_W { - GPIO2_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio2_fun_drv(&mut self) -> GPIO2_FUN_DRV_W { - GPIO2_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio2_mcu_sel(&mut self) -> GPIO2_MCU_SEL_W { - GPIO2_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio2_filter_en(&mut self) -> GPIO2_FILTER_EN_W { - GPIO2_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO2_SPEC; -impl crate::RegisterSpec for GPIO2_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio2::R`](R) reader structure"] -impl crate::Readable for GPIO2_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio2::W`](W) writer structure"] -impl crate::Writable for GPIO2_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio2 to value 0x0800"] -impl crate::Resettable for GPIO2_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio20.rs b/esp32p4/src/io_mux/gpio20.rs deleted file mode 100644 index 9cb8ebd115..0000000000 --- a/esp32p4/src/io_mux/gpio20.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio20` reader"] -pub type R = crate::R; -#[doc = "Register `gpio20` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO20_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO20_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO20_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO20_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO20_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO20_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO20_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO20_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO20_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO20_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO20_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO20_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO20_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO20_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO20_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO20_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO20_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO20_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO20_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO20_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO20_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO20_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO20_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO20_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO20_FUN_WPD` reader - pull-down enable"] -pub type GPIO20_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO20_FUN_WPD` writer - pull-down enable"] -pub type GPIO20_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO20_FUN_WPU` reader - pull-up enable"] -pub type GPIO20_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO20_FUN_WPU` writer - pull-up enable"] -pub type GPIO20_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO20_FUN_IE` reader - input enable"] -pub type GPIO20_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO20_FUN_IE` writer - input enable"] -pub type GPIO20_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO20_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO20_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO20_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO20_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO20_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO20_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO20_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO20_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO20_FILTER_EN` reader - input filter enable"] -pub type GPIO20_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO20_FILTER_EN` writer - input filter enable"] -pub type GPIO20_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio20_mcu_oe(&self) -> GPIO20_MCU_OE_R { - GPIO20_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio20_slp_sel(&self) -> GPIO20_SLP_SEL_R { - GPIO20_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio20_mcu_wpd(&self) -> GPIO20_MCU_WPD_R { - GPIO20_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio20_mcu_wpu(&self) -> GPIO20_MCU_WPU_R { - GPIO20_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio20_mcu_ie(&self) -> GPIO20_MCU_IE_R { - GPIO20_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio20_mcu_drv(&self) -> GPIO20_MCU_DRV_R { - GPIO20_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio20_fun_wpd(&self) -> GPIO20_FUN_WPD_R { - GPIO20_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio20_fun_wpu(&self) -> GPIO20_FUN_WPU_R { - GPIO20_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio20_fun_ie(&self) -> GPIO20_FUN_IE_R { - GPIO20_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio20_fun_drv(&self) -> GPIO20_FUN_DRV_R { - GPIO20_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio20_mcu_sel(&self) -> GPIO20_MCU_SEL_R { - GPIO20_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio20_filter_en(&self) -> GPIO20_FILTER_EN_R { - GPIO20_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio20") - .field( - "gpio20_mcu_oe", - &format_args!("{}", self.gpio20_mcu_oe().bit()), - ) - .field( - "gpio20_slp_sel", - &format_args!("{}", self.gpio20_slp_sel().bit()), - ) - .field( - "gpio20_mcu_wpd", - &format_args!("{}", self.gpio20_mcu_wpd().bit()), - ) - .field( - "gpio20_mcu_wpu", - &format_args!("{}", self.gpio20_mcu_wpu().bit()), - ) - .field( - "gpio20_mcu_ie", - &format_args!("{}", self.gpio20_mcu_ie().bit()), - ) - .field( - "gpio20_mcu_drv", - &format_args!("{}", self.gpio20_mcu_drv().bits()), - ) - .field( - "gpio20_fun_wpd", - &format_args!("{}", self.gpio20_fun_wpd().bit()), - ) - .field( - "gpio20_fun_wpu", - &format_args!("{}", self.gpio20_fun_wpu().bit()), - ) - .field( - "gpio20_fun_ie", - &format_args!("{}", self.gpio20_fun_ie().bit()), - ) - .field( - "gpio20_fun_drv", - &format_args!("{}", self.gpio20_fun_drv().bits()), - ) - .field( - "gpio20_mcu_sel", - &format_args!("{}", self.gpio20_mcu_sel().bits()), - ) - .field( - "gpio20_filter_en", - &format_args!("{}", self.gpio20_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio20_mcu_oe(&mut self) -> GPIO20_MCU_OE_W { - GPIO20_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio20_slp_sel(&mut self) -> GPIO20_SLP_SEL_W { - GPIO20_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio20_mcu_wpd(&mut self) -> GPIO20_MCU_WPD_W { - GPIO20_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio20_mcu_wpu(&mut self) -> GPIO20_MCU_WPU_W { - GPIO20_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio20_mcu_ie(&mut self) -> GPIO20_MCU_IE_W { - GPIO20_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio20_mcu_drv(&mut self) -> GPIO20_MCU_DRV_W { - GPIO20_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio20_fun_wpd(&mut self) -> GPIO20_FUN_WPD_W { - GPIO20_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio20_fun_wpu(&mut self) -> GPIO20_FUN_WPU_W { - GPIO20_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio20_fun_ie(&mut self) -> GPIO20_FUN_IE_W { - GPIO20_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio20_fun_drv(&mut self) -> GPIO20_FUN_DRV_W { - GPIO20_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio20_mcu_sel(&mut self) -> GPIO20_MCU_SEL_W { - GPIO20_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio20_filter_en(&mut self) -> GPIO20_FILTER_EN_W { - GPIO20_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio20\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio20::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio20::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO20_SPEC; -impl crate::RegisterSpec for GPIO20_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio20::R`](R) reader structure"] -impl crate::Readable for GPIO20_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio20::W`](W) writer structure"] -impl crate::Writable for GPIO20_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio20 to value 0x0800"] -impl crate::Resettable for GPIO20_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio21.rs b/esp32p4/src/io_mux/gpio21.rs deleted file mode 100644 index 71f930fbab..0000000000 --- a/esp32p4/src/io_mux/gpio21.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio21` reader"] -pub type R = crate::R; -#[doc = "Register `gpio21` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO21_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO21_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO21_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO21_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO21_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO21_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO21_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO21_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO21_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO21_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO21_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO21_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO21_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO21_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO21_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO21_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO21_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO21_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO21_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO21_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO21_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO21_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO21_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO21_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO21_FUN_WPD` reader - pull-down enable"] -pub type GPIO21_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO21_FUN_WPD` writer - pull-down enable"] -pub type GPIO21_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO21_FUN_WPU` reader - pull-up enable"] -pub type GPIO21_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO21_FUN_WPU` writer - pull-up enable"] -pub type GPIO21_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO21_FUN_IE` reader - input enable"] -pub type GPIO21_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO21_FUN_IE` writer - input enable"] -pub type GPIO21_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO21_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO21_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO21_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO21_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO21_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO21_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO21_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO21_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO21_FILTER_EN` reader - input filter enable"] -pub type GPIO21_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO21_FILTER_EN` writer - input filter enable"] -pub type GPIO21_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio21_mcu_oe(&self) -> GPIO21_MCU_OE_R { - GPIO21_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio21_slp_sel(&self) -> GPIO21_SLP_SEL_R { - GPIO21_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio21_mcu_wpd(&self) -> GPIO21_MCU_WPD_R { - GPIO21_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio21_mcu_wpu(&self) -> GPIO21_MCU_WPU_R { - GPIO21_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio21_mcu_ie(&self) -> GPIO21_MCU_IE_R { - GPIO21_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio21_mcu_drv(&self) -> GPIO21_MCU_DRV_R { - GPIO21_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio21_fun_wpd(&self) -> GPIO21_FUN_WPD_R { - GPIO21_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio21_fun_wpu(&self) -> GPIO21_FUN_WPU_R { - GPIO21_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio21_fun_ie(&self) -> GPIO21_FUN_IE_R { - GPIO21_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio21_fun_drv(&self) -> GPIO21_FUN_DRV_R { - GPIO21_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio21_mcu_sel(&self) -> GPIO21_MCU_SEL_R { - GPIO21_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio21_filter_en(&self) -> GPIO21_FILTER_EN_R { - GPIO21_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio21") - .field( - "gpio21_mcu_oe", - &format_args!("{}", self.gpio21_mcu_oe().bit()), - ) - .field( - "gpio21_slp_sel", - &format_args!("{}", self.gpio21_slp_sel().bit()), - ) - .field( - "gpio21_mcu_wpd", - &format_args!("{}", self.gpio21_mcu_wpd().bit()), - ) - .field( - "gpio21_mcu_wpu", - &format_args!("{}", self.gpio21_mcu_wpu().bit()), - ) - .field( - "gpio21_mcu_ie", - &format_args!("{}", self.gpio21_mcu_ie().bit()), - ) - .field( - "gpio21_mcu_drv", - &format_args!("{}", self.gpio21_mcu_drv().bits()), - ) - .field( - "gpio21_fun_wpd", - &format_args!("{}", self.gpio21_fun_wpd().bit()), - ) - .field( - "gpio21_fun_wpu", - &format_args!("{}", self.gpio21_fun_wpu().bit()), - ) - .field( - "gpio21_fun_ie", - &format_args!("{}", self.gpio21_fun_ie().bit()), - ) - .field( - "gpio21_fun_drv", - &format_args!("{}", self.gpio21_fun_drv().bits()), - ) - .field( - "gpio21_mcu_sel", - &format_args!("{}", self.gpio21_mcu_sel().bits()), - ) - .field( - "gpio21_filter_en", - &format_args!("{}", self.gpio21_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio21_mcu_oe(&mut self) -> GPIO21_MCU_OE_W { - GPIO21_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio21_slp_sel(&mut self) -> GPIO21_SLP_SEL_W { - GPIO21_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio21_mcu_wpd(&mut self) -> GPIO21_MCU_WPD_W { - GPIO21_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio21_mcu_wpu(&mut self) -> GPIO21_MCU_WPU_W { - GPIO21_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio21_mcu_ie(&mut self) -> GPIO21_MCU_IE_W { - GPIO21_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio21_mcu_drv(&mut self) -> GPIO21_MCU_DRV_W { - GPIO21_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio21_fun_wpd(&mut self) -> GPIO21_FUN_WPD_W { - GPIO21_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio21_fun_wpu(&mut self) -> GPIO21_FUN_WPU_W { - GPIO21_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio21_fun_ie(&mut self) -> GPIO21_FUN_IE_W { - GPIO21_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio21_fun_drv(&mut self) -> GPIO21_FUN_DRV_W { - GPIO21_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio21_mcu_sel(&mut self) -> GPIO21_MCU_SEL_W { - GPIO21_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio21_filter_en(&mut self) -> GPIO21_FILTER_EN_W { - GPIO21_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio21\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio21::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio21::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO21_SPEC; -impl crate::RegisterSpec for GPIO21_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio21::R`](R) reader structure"] -impl crate::Readable for GPIO21_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio21::W`](W) writer structure"] -impl crate::Writable for GPIO21_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio21 to value 0x0800"] -impl crate::Resettable for GPIO21_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio22.rs b/esp32p4/src/io_mux/gpio22.rs deleted file mode 100644 index dc2865ade2..0000000000 --- a/esp32p4/src/io_mux/gpio22.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio22` reader"] -pub type R = crate::R; -#[doc = "Register `gpio22` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO22_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO22_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO22_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO22_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO22_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO22_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO22_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO22_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO22_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO22_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO22_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO22_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO22_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO22_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO22_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO22_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO22_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO22_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO22_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO22_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO22_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO22_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO22_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO22_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO22_FUN_WPD` reader - pull-down enable"] -pub type GPIO22_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO22_FUN_WPD` writer - pull-down enable"] -pub type GPIO22_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO22_FUN_WPU` reader - pull-up enable"] -pub type GPIO22_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO22_FUN_WPU` writer - pull-up enable"] -pub type GPIO22_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO22_FUN_IE` reader - input enable"] -pub type GPIO22_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO22_FUN_IE` writer - input enable"] -pub type GPIO22_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO22_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO22_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO22_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO22_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO22_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO22_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO22_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO22_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO22_FILTER_EN` reader - input filter enable"] -pub type GPIO22_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO22_FILTER_EN` writer - input filter enable"] -pub type GPIO22_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio22_mcu_oe(&self) -> GPIO22_MCU_OE_R { - GPIO22_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio22_slp_sel(&self) -> GPIO22_SLP_SEL_R { - GPIO22_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio22_mcu_wpd(&self) -> GPIO22_MCU_WPD_R { - GPIO22_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio22_mcu_wpu(&self) -> GPIO22_MCU_WPU_R { - GPIO22_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio22_mcu_ie(&self) -> GPIO22_MCU_IE_R { - GPIO22_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio22_mcu_drv(&self) -> GPIO22_MCU_DRV_R { - GPIO22_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio22_fun_wpd(&self) -> GPIO22_FUN_WPD_R { - GPIO22_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio22_fun_wpu(&self) -> GPIO22_FUN_WPU_R { - GPIO22_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio22_fun_ie(&self) -> GPIO22_FUN_IE_R { - GPIO22_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio22_fun_drv(&self) -> GPIO22_FUN_DRV_R { - GPIO22_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio22_mcu_sel(&self) -> GPIO22_MCU_SEL_R { - GPIO22_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio22_filter_en(&self) -> GPIO22_FILTER_EN_R { - GPIO22_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio22") - .field( - "gpio22_mcu_oe", - &format_args!("{}", self.gpio22_mcu_oe().bit()), - ) - .field( - "gpio22_slp_sel", - &format_args!("{}", self.gpio22_slp_sel().bit()), - ) - .field( - "gpio22_mcu_wpd", - &format_args!("{}", self.gpio22_mcu_wpd().bit()), - ) - .field( - "gpio22_mcu_wpu", - &format_args!("{}", self.gpio22_mcu_wpu().bit()), - ) - .field( - "gpio22_mcu_ie", - &format_args!("{}", self.gpio22_mcu_ie().bit()), - ) - .field( - "gpio22_mcu_drv", - &format_args!("{}", self.gpio22_mcu_drv().bits()), - ) - .field( - "gpio22_fun_wpd", - &format_args!("{}", self.gpio22_fun_wpd().bit()), - ) - .field( - "gpio22_fun_wpu", - &format_args!("{}", self.gpio22_fun_wpu().bit()), - ) - .field( - "gpio22_fun_ie", - &format_args!("{}", self.gpio22_fun_ie().bit()), - ) - .field( - "gpio22_fun_drv", - &format_args!("{}", self.gpio22_fun_drv().bits()), - ) - .field( - "gpio22_mcu_sel", - &format_args!("{}", self.gpio22_mcu_sel().bits()), - ) - .field( - "gpio22_filter_en", - &format_args!("{}", self.gpio22_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio22_mcu_oe(&mut self) -> GPIO22_MCU_OE_W { - GPIO22_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio22_slp_sel(&mut self) -> GPIO22_SLP_SEL_W { - GPIO22_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio22_mcu_wpd(&mut self) -> GPIO22_MCU_WPD_W { - GPIO22_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio22_mcu_wpu(&mut self) -> GPIO22_MCU_WPU_W { - GPIO22_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio22_mcu_ie(&mut self) -> GPIO22_MCU_IE_W { - GPIO22_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio22_mcu_drv(&mut self) -> GPIO22_MCU_DRV_W { - GPIO22_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio22_fun_wpd(&mut self) -> GPIO22_FUN_WPD_W { - GPIO22_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio22_fun_wpu(&mut self) -> GPIO22_FUN_WPU_W { - GPIO22_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio22_fun_ie(&mut self) -> GPIO22_FUN_IE_W { - GPIO22_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio22_fun_drv(&mut self) -> GPIO22_FUN_DRV_W { - GPIO22_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio22_mcu_sel(&mut self) -> GPIO22_MCU_SEL_W { - GPIO22_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio22_filter_en(&mut self) -> GPIO22_FILTER_EN_W { - GPIO22_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio22\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio22::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio22::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO22_SPEC; -impl crate::RegisterSpec for GPIO22_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio22::R`](R) reader structure"] -impl crate::Readable for GPIO22_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio22::W`](W) writer structure"] -impl crate::Writable for GPIO22_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio22 to value 0x0800"] -impl crate::Resettable for GPIO22_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio23.rs b/esp32p4/src/io_mux/gpio23.rs deleted file mode 100644 index 1e13c23d07..0000000000 --- a/esp32p4/src/io_mux/gpio23.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio23` reader"] -pub type R = crate::R; -#[doc = "Register `gpio23` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO23_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO23_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO23_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO23_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO23_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO23_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO23_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO23_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO23_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO23_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO23_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO23_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO23_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO23_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO23_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO23_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO23_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO23_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO23_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO23_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO23_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO23_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO23_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO23_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO23_FUN_WPD` reader - pull-down enable"] -pub type GPIO23_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO23_FUN_WPD` writer - pull-down enable"] -pub type GPIO23_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO23_FUN_WPU` reader - pull-up enable"] -pub type GPIO23_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO23_FUN_WPU` writer - pull-up enable"] -pub type GPIO23_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO23_FUN_IE` reader - input enable"] -pub type GPIO23_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO23_FUN_IE` writer - input enable"] -pub type GPIO23_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO23_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO23_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO23_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO23_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO23_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO23_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO23_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO23_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO23_FILTER_EN` reader - input filter enable"] -pub type GPIO23_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO23_FILTER_EN` writer - input filter enable"] -pub type GPIO23_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio23_mcu_oe(&self) -> GPIO23_MCU_OE_R { - GPIO23_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio23_slp_sel(&self) -> GPIO23_SLP_SEL_R { - GPIO23_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio23_mcu_wpd(&self) -> GPIO23_MCU_WPD_R { - GPIO23_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio23_mcu_wpu(&self) -> GPIO23_MCU_WPU_R { - GPIO23_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio23_mcu_ie(&self) -> GPIO23_MCU_IE_R { - GPIO23_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio23_mcu_drv(&self) -> GPIO23_MCU_DRV_R { - GPIO23_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio23_fun_wpd(&self) -> GPIO23_FUN_WPD_R { - GPIO23_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio23_fun_wpu(&self) -> GPIO23_FUN_WPU_R { - GPIO23_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio23_fun_ie(&self) -> GPIO23_FUN_IE_R { - GPIO23_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio23_fun_drv(&self) -> GPIO23_FUN_DRV_R { - GPIO23_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio23_mcu_sel(&self) -> GPIO23_MCU_SEL_R { - GPIO23_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio23_filter_en(&self) -> GPIO23_FILTER_EN_R { - GPIO23_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio23") - .field( - "gpio23_mcu_oe", - &format_args!("{}", self.gpio23_mcu_oe().bit()), - ) - .field( - "gpio23_slp_sel", - &format_args!("{}", self.gpio23_slp_sel().bit()), - ) - .field( - "gpio23_mcu_wpd", - &format_args!("{}", self.gpio23_mcu_wpd().bit()), - ) - .field( - "gpio23_mcu_wpu", - &format_args!("{}", self.gpio23_mcu_wpu().bit()), - ) - .field( - "gpio23_mcu_ie", - &format_args!("{}", self.gpio23_mcu_ie().bit()), - ) - .field( - "gpio23_mcu_drv", - &format_args!("{}", self.gpio23_mcu_drv().bits()), - ) - .field( - "gpio23_fun_wpd", - &format_args!("{}", self.gpio23_fun_wpd().bit()), - ) - .field( - "gpio23_fun_wpu", - &format_args!("{}", self.gpio23_fun_wpu().bit()), - ) - .field( - "gpio23_fun_ie", - &format_args!("{}", self.gpio23_fun_ie().bit()), - ) - .field( - "gpio23_fun_drv", - &format_args!("{}", self.gpio23_fun_drv().bits()), - ) - .field( - "gpio23_mcu_sel", - &format_args!("{}", self.gpio23_mcu_sel().bits()), - ) - .field( - "gpio23_filter_en", - &format_args!("{}", self.gpio23_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio23_mcu_oe(&mut self) -> GPIO23_MCU_OE_W { - GPIO23_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio23_slp_sel(&mut self) -> GPIO23_SLP_SEL_W { - GPIO23_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio23_mcu_wpd(&mut self) -> GPIO23_MCU_WPD_W { - GPIO23_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio23_mcu_wpu(&mut self) -> GPIO23_MCU_WPU_W { - GPIO23_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio23_mcu_ie(&mut self) -> GPIO23_MCU_IE_W { - GPIO23_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio23_mcu_drv(&mut self) -> GPIO23_MCU_DRV_W { - GPIO23_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio23_fun_wpd(&mut self) -> GPIO23_FUN_WPD_W { - GPIO23_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio23_fun_wpu(&mut self) -> GPIO23_FUN_WPU_W { - GPIO23_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio23_fun_ie(&mut self) -> GPIO23_FUN_IE_W { - GPIO23_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio23_fun_drv(&mut self) -> GPIO23_FUN_DRV_W { - GPIO23_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio23_mcu_sel(&mut self) -> GPIO23_MCU_SEL_W { - GPIO23_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio23_filter_en(&mut self) -> GPIO23_FILTER_EN_W { - GPIO23_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio23\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio23::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio23::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO23_SPEC; -impl crate::RegisterSpec for GPIO23_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio23::R`](R) reader structure"] -impl crate::Readable for GPIO23_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio23::W`](W) writer structure"] -impl crate::Writable for GPIO23_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio23 to value 0x0800"] -impl crate::Resettable for GPIO23_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio24.rs b/esp32p4/src/io_mux/gpio24.rs deleted file mode 100644 index b6c0b7b420..0000000000 --- a/esp32p4/src/io_mux/gpio24.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio24` reader"] -pub type R = crate::R; -#[doc = "Register `gpio24` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO24_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO24_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO24_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO24_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO24_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO24_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO24_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO24_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO24_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO24_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO24_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO24_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO24_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO24_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO24_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO24_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO24_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO24_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO24_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO24_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO24_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO24_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO24_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO24_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO24_FUN_WPD` reader - pull-down enable"] -pub type GPIO24_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO24_FUN_WPD` writer - pull-down enable"] -pub type GPIO24_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO24_FUN_WPU` reader - pull-up enable"] -pub type GPIO24_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO24_FUN_WPU` writer - pull-up enable"] -pub type GPIO24_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO24_FUN_IE` reader - input enable"] -pub type GPIO24_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO24_FUN_IE` writer - input enable"] -pub type GPIO24_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO24_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO24_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO24_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO24_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO24_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO24_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO24_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO24_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO24_FILTER_EN` reader - input filter enable"] -pub type GPIO24_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO24_FILTER_EN` writer - input filter enable"] -pub type GPIO24_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio24_mcu_oe(&self) -> GPIO24_MCU_OE_R { - GPIO24_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio24_slp_sel(&self) -> GPIO24_SLP_SEL_R { - GPIO24_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio24_mcu_wpd(&self) -> GPIO24_MCU_WPD_R { - GPIO24_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio24_mcu_wpu(&self) -> GPIO24_MCU_WPU_R { - GPIO24_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio24_mcu_ie(&self) -> GPIO24_MCU_IE_R { - GPIO24_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio24_mcu_drv(&self) -> GPIO24_MCU_DRV_R { - GPIO24_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio24_fun_wpd(&self) -> GPIO24_FUN_WPD_R { - GPIO24_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio24_fun_wpu(&self) -> GPIO24_FUN_WPU_R { - GPIO24_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio24_fun_ie(&self) -> GPIO24_FUN_IE_R { - GPIO24_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio24_fun_drv(&self) -> GPIO24_FUN_DRV_R { - GPIO24_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio24_mcu_sel(&self) -> GPIO24_MCU_SEL_R { - GPIO24_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio24_filter_en(&self) -> GPIO24_FILTER_EN_R { - GPIO24_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio24") - .field( - "gpio24_mcu_oe", - &format_args!("{}", self.gpio24_mcu_oe().bit()), - ) - .field( - "gpio24_slp_sel", - &format_args!("{}", self.gpio24_slp_sel().bit()), - ) - .field( - "gpio24_mcu_wpd", - &format_args!("{}", self.gpio24_mcu_wpd().bit()), - ) - .field( - "gpio24_mcu_wpu", - &format_args!("{}", self.gpio24_mcu_wpu().bit()), - ) - .field( - "gpio24_mcu_ie", - &format_args!("{}", self.gpio24_mcu_ie().bit()), - ) - .field( - "gpio24_mcu_drv", - &format_args!("{}", self.gpio24_mcu_drv().bits()), - ) - .field( - "gpio24_fun_wpd", - &format_args!("{}", self.gpio24_fun_wpd().bit()), - ) - .field( - "gpio24_fun_wpu", - &format_args!("{}", self.gpio24_fun_wpu().bit()), - ) - .field( - "gpio24_fun_ie", - &format_args!("{}", self.gpio24_fun_ie().bit()), - ) - .field( - "gpio24_fun_drv", - &format_args!("{}", self.gpio24_fun_drv().bits()), - ) - .field( - "gpio24_mcu_sel", - &format_args!("{}", self.gpio24_mcu_sel().bits()), - ) - .field( - "gpio24_filter_en", - &format_args!("{}", self.gpio24_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio24_mcu_oe(&mut self) -> GPIO24_MCU_OE_W { - GPIO24_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio24_slp_sel(&mut self) -> GPIO24_SLP_SEL_W { - GPIO24_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio24_mcu_wpd(&mut self) -> GPIO24_MCU_WPD_W { - GPIO24_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio24_mcu_wpu(&mut self) -> GPIO24_MCU_WPU_W { - GPIO24_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio24_mcu_ie(&mut self) -> GPIO24_MCU_IE_W { - GPIO24_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio24_mcu_drv(&mut self) -> GPIO24_MCU_DRV_W { - GPIO24_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio24_fun_wpd(&mut self) -> GPIO24_FUN_WPD_W { - GPIO24_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio24_fun_wpu(&mut self) -> GPIO24_FUN_WPU_W { - GPIO24_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio24_fun_ie(&mut self) -> GPIO24_FUN_IE_W { - GPIO24_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio24_fun_drv(&mut self) -> GPIO24_FUN_DRV_W { - GPIO24_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio24_mcu_sel(&mut self) -> GPIO24_MCU_SEL_W { - GPIO24_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio24_filter_en(&mut self) -> GPIO24_FILTER_EN_W { - GPIO24_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio24\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio24::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio24::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO24_SPEC; -impl crate::RegisterSpec for GPIO24_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio24::R`](R) reader structure"] -impl crate::Readable for GPIO24_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio24::W`](W) writer structure"] -impl crate::Writable for GPIO24_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio24 to value 0x0800"] -impl crate::Resettable for GPIO24_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio25.rs b/esp32p4/src/io_mux/gpio25.rs deleted file mode 100644 index 37463bb371..0000000000 --- a/esp32p4/src/io_mux/gpio25.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio25` reader"] -pub type R = crate::R; -#[doc = "Register `gpio25` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO25_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO25_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO25_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO25_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO25_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO25_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO25_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO25_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO25_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO25_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO25_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO25_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO25_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO25_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO25_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO25_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO25_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO25_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO25_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO25_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO25_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO25_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO25_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO25_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO25_FUN_WPD` reader - pull-down enable"] -pub type GPIO25_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO25_FUN_WPD` writer - pull-down enable"] -pub type GPIO25_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO25_FUN_WPU` reader - pull-up enable"] -pub type GPIO25_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO25_FUN_WPU` writer - pull-up enable"] -pub type GPIO25_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO25_FUN_IE` reader - input enable"] -pub type GPIO25_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO25_FUN_IE` writer - input enable"] -pub type GPIO25_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO25_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO25_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO25_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO25_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO25_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO25_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO25_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO25_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO25_FILTER_EN` reader - input filter enable"] -pub type GPIO25_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO25_FILTER_EN` writer - input filter enable"] -pub type GPIO25_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio25_mcu_oe(&self) -> GPIO25_MCU_OE_R { - GPIO25_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio25_slp_sel(&self) -> GPIO25_SLP_SEL_R { - GPIO25_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio25_mcu_wpd(&self) -> GPIO25_MCU_WPD_R { - GPIO25_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio25_mcu_wpu(&self) -> GPIO25_MCU_WPU_R { - GPIO25_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio25_mcu_ie(&self) -> GPIO25_MCU_IE_R { - GPIO25_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio25_mcu_drv(&self) -> GPIO25_MCU_DRV_R { - GPIO25_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio25_fun_wpd(&self) -> GPIO25_FUN_WPD_R { - GPIO25_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio25_fun_wpu(&self) -> GPIO25_FUN_WPU_R { - GPIO25_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio25_fun_ie(&self) -> GPIO25_FUN_IE_R { - GPIO25_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio25_fun_drv(&self) -> GPIO25_FUN_DRV_R { - GPIO25_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio25_mcu_sel(&self) -> GPIO25_MCU_SEL_R { - GPIO25_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio25_filter_en(&self) -> GPIO25_FILTER_EN_R { - GPIO25_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio25") - .field( - "gpio25_mcu_oe", - &format_args!("{}", self.gpio25_mcu_oe().bit()), - ) - .field( - "gpio25_slp_sel", - &format_args!("{}", self.gpio25_slp_sel().bit()), - ) - .field( - "gpio25_mcu_wpd", - &format_args!("{}", self.gpio25_mcu_wpd().bit()), - ) - .field( - "gpio25_mcu_wpu", - &format_args!("{}", self.gpio25_mcu_wpu().bit()), - ) - .field( - "gpio25_mcu_ie", - &format_args!("{}", self.gpio25_mcu_ie().bit()), - ) - .field( - "gpio25_mcu_drv", - &format_args!("{}", self.gpio25_mcu_drv().bits()), - ) - .field( - "gpio25_fun_wpd", - &format_args!("{}", self.gpio25_fun_wpd().bit()), - ) - .field( - "gpio25_fun_wpu", - &format_args!("{}", self.gpio25_fun_wpu().bit()), - ) - .field( - "gpio25_fun_ie", - &format_args!("{}", self.gpio25_fun_ie().bit()), - ) - .field( - "gpio25_fun_drv", - &format_args!("{}", self.gpio25_fun_drv().bits()), - ) - .field( - "gpio25_mcu_sel", - &format_args!("{}", self.gpio25_mcu_sel().bits()), - ) - .field( - "gpio25_filter_en", - &format_args!("{}", self.gpio25_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio25_mcu_oe(&mut self) -> GPIO25_MCU_OE_W { - GPIO25_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio25_slp_sel(&mut self) -> GPIO25_SLP_SEL_W { - GPIO25_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio25_mcu_wpd(&mut self) -> GPIO25_MCU_WPD_W { - GPIO25_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio25_mcu_wpu(&mut self) -> GPIO25_MCU_WPU_W { - GPIO25_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio25_mcu_ie(&mut self) -> GPIO25_MCU_IE_W { - GPIO25_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio25_mcu_drv(&mut self) -> GPIO25_MCU_DRV_W { - GPIO25_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio25_fun_wpd(&mut self) -> GPIO25_FUN_WPD_W { - GPIO25_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio25_fun_wpu(&mut self) -> GPIO25_FUN_WPU_W { - GPIO25_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio25_fun_ie(&mut self) -> GPIO25_FUN_IE_W { - GPIO25_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio25_fun_drv(&mut self) -> GPIO25_FUN_DRV_W { - GPIO25_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio25_mcu_sel(&mut self) -> GPIO25_MCU_SEL_W { - GPIO25_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio25_filter_en(&mut self) -> GPIO25_FILTER_EN_W { - GPIO25_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio25\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio25::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio25::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO25_SPEC; -impl crate::RegisterSpec for GPIO25_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio25::R`](R) reader structure"] -impl crate::Readable for GPIO25_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio25::W`](W) writer structure"] -impl crate::Writable for GPIO25_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio25 to value 0x0800"] -impl crate::Resettable for GPIO25_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio26.rs b/esp32p4/src/io_mux/gpio26.rs deleted file mode 100644 index 9babcb573d..0000000000 --- a/esp32p4/src/io_mux/gpio26.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio26` reader"] -pub type R = crate::R; -#[doc = "Register `gpio26` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO26_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO26_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO26_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO26_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO26_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO26_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO26_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO26_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO26_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO26_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO26_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO26_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO26_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO26_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO26_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO26_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO26_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO26_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO26_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO26_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO26_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO26_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO26_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO26_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO26_FUN_WPD` reader - pull-down enable"] -pub type GPIO26_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO26_FUN_WPD` writer - pull-down enable"] -pub type GPIO26_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO26_FUN_WPU` reader - pull-up enable"] -pub type GPIO26_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO26_FUN_WPU` writer - pull-up enable"] -pub type GPIO26_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO26_FUN_IE` reader - input enable"] -pub type GPIO26_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO26_FUN_IE` writer - input enable"] -pub type GPIO26_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO26_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO26_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO26_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO26_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO26_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO26_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO26_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO26_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO26_FILTER_EN` reader - input filter enable"] -pub type GPIO26_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO26_FILTER_EN` writer - input filter enable"] -pub type GPIO26_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio26_mcu_oe(&self) -> GPIO26_MCU_OE_R { - GPIO26_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio26_slp_sel(&self) -> GPIO26_SLP_SEL_R { - GPIO26_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio26_mcu_wpd(&self) -> GPIO26_MCU_WPD_R { - GPIO26_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio26_mcu_wpu(&self) -> GPIO26_MCU_WPU_R { - GPIO26_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio26_mcu_ie(&self) -> GPIO26_MCU_IE_R { - GPIO26_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio26_mcu_drv(&self) -> GPIO26_MCU_DRV_R { - GPIO26_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio26_fun_wpd(&self) -> GPIO26_FUN_WPD_R { - GPIO26_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio26_fun_wpu(&self) -> GPIO26_FUN_WPU_R { - GPIO26_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio26_fun_ie(&self) -> GPIO26_FUN_IE_R { - GPIO26_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio26_fun_drv(&self) -> GPIO26_FUN_DRV_R { - GPIO26_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio26_mcu_sel(&self) -> GPIO26_MCU_SEL_R { - GPIO26_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio26_filter_en(&self) -> GPIO26_FILTER_EN_R { - GPIO26_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio26") - .field( - "gpio26_mcu_oe", - &format_args!("{}", self.gpio26_mcu_oe().bit()), - ) - .field( - "gpio26_slp_sel", - &format_args!("{}", self.gpio26_slp_sel().bit()), - ) - .field( - "gpio26_mcu_wpd", - &format_args!("{}", self.gpio26_mcu_wpd().bit()), - ) - .field( - "gpio26_mcu_wpu", - &format_args!("{}", self.gpio26_mcu_wpu().bit()), - ) - .field( - "gpio26_mcu_ie", - &format_args!("{}", self.gpio26_mcu_ie().bit()), - ) - .field( - "gpio26_mcu_drv", - &format_args!("{}", self.gpio26_mcu_drv().bits()), - ) - .field( - "gpio26_fun_wpd", - &format_args!("{}", self.gpio26_fun_wpd().bit()), - ) - .field( - "gpio26_fun_wpu", - &format_args!("{}", self.gpio26_fun_wpu().bit()), - ) - .field( - "gpio26_fun_ie", - &format_args!("{}", self.gpio26_fun_ie().bit()), - ) - .field( - "gpio26_fun_drv", - &format_args!("{}", self.gpio26_fun_drv().bits()), - ) - .field( - "gpio26_mcu_sel", - &format_args!("{}", self.gpio26_mcu_sel().bits()), - ) - .field( - "gpio26_filter_en", - &format_args!("{}", self.gpio26_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio26_mcu_oe(&mut self) -> GPIO26_MCU_OE_W { - GPIO26_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio26_slp_sel(&mut self) -> GPIO26_SLP_SEL_W { - GPIO26_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio26_mcu_wpd(&mut self) -> GPIO26_MCU_WPD_W { - GPIO26_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio26_mcu_wpu(&mut self) -> GPIO26_MCU_WPU_W { - GPIO26_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio26_mcu_ie(&mut self) -> GPIO26_MCU_IE_W { - GPIO26_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio26_mcu_drv(&mut self) -> GPIO26_MCU_DRV_W { - GPIO26_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio26_fun_wpd(&mut self) -> GPIO26_FUN_WPD_W { - GPIO26_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio26_fun_wpu(&mut self) -> GPIO26_FUN_WPU_W { - GPIO26_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio26_fun_ie(&mut self) -> GPIO26_FUN_IE_W { - GPIO26_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio26_fun_drv(&mut self) -> GPIO26_FUN_DRV_W { - GPIO26_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio26_mcu_sel(&mut self) -> GPIO26_MCU_SEL_W { - GPIO26_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio26_filter_en(&mut self) -> GPIO26_FILTER_EN_W { - GPIO26_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio26\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio26::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio26::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO26_SPEC; -impl crate::RegisterSpec for GPIO26_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio26::R`](R) reader structure"] -impl crate::Readable for GPIO26_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio26::W`](W) writer structure"] -impl crate::Writable for GPIO26_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio26 to value 0x0800"] -impl crate::Resettable for GPIO26_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio27.rs b/esp32p4/src/io_mux/gpio27.rs deleted file mode 100644 index e4151cc214..0000000000 --- a/esp32p4/src/io_mux/gpio27.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio27` reader"] -pub type R = crate::R; -#[doc = "Register `gpio27` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO27_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO27_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO27_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO27_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO27_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO27_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO27_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO27_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO27_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO27_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO27_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO27_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO27_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO27_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO27_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO27_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO27_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO27_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO27_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO27_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO27_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO27_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO27_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO27_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO27_FUN_WPD` reader - pull-down enable"] -pub type GPIO27_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO27_FUN_WPD` writer - pull-down enable"] -pub type GPIO27_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO27_FUN_WPU` reader - pull-up enable"] -pub type GPIO27_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO27_FUN_WPU` writer - pull-up enable"] -pub type GPIO27_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO27_FUN_IE` reader - input enable"] -pub type GPIO27_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO27_FUN_IE` writer - input enable"] -pub type GPIO27_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO27_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO27_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO27_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO27_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO27_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO27_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO27_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO27_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO27_FILTER_EN` reader - input filter enable"] -pub type GPIO27_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO27_FILTER_EN` writer - input filter enable"] -pub type GPIO27_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio27_mcu_oe(&self) -> GPIO27_MCU_OE_R { - GPIO27_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio27_slp_sel(&self) -> GPIO27_SLP_SEL_R { - GPIO27_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio27_mcu_wpd(&self) -> GPIO27_MCU_WPD_R { - GPIO27_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio27_mcu_wpu(&self) -> GPIO27_MCU_WPU_R { - GPIO27_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio27_mcu_ie(&self) -> GPIO27_MCU_IE_R { - GPIO27_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio27_mcu_drv(&self) -> GPIO27_MCU_DRV_R { - GPIO27_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio27_fun_wpd(&self) -> GPIO27_FUN_WPD_R { - GPIO27_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio27_fun_wpu(&self) -> GPIO27_FUN_WPU_R { - GPIO27_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio27_fun_ie(&self) -> GPIO27_FUN_IE_R { - GPIO27_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio27_fun_drv(&self) -> GPIO27_FUN_DRV_R { - GPIO27_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio27_mcu_sel(&self) -> GPIO27_MCU_SEL_R { - GPIO27_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio27_filter_en(&self) -> GPIO27_FILTER_EN_R { - GPIO27_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio27") - .field( - "gpio27_mcu_oe", - &format_args!("{}", self.gpio27_mcu_oe().bit()), - ) - .field( - "gpio27_slp_sel", - &format_args!("{}", self.gpio27_slp_sel().bit()), - ) - .field( - "gpio27_mcu_wpd", - &format_args!("{}", self.gpio27_mcu_wpd().bit()), - ) - .field( - "gpio27_mcu_wpu", - &format_args!("{}", self.gpio27_mcu_wpu().bit()), - ) - .field( - "gpio27_mcu_ie", - &format_args!("{}", self.gpio27_mcu_ie().bit()), - ) - .field( - "gpio27_mcu_drv", - &format_args!("{}", self.gpio27_mcu_drv().bits()), - ) - .field( - "gpio27_fun_wpd", - &format_args!("{}", self.gpio27_fun_wpd().bit()), - ) - .field( - "gpio27_fun_wpu", - &format_args!("{}", self.gpio27_fun_wpu().bit()), - ) - .field( - "gpio27_fun_ie", - &format_args!("{}", self.gpio27_fun_ie().bit()), - ) - .field( - "gpio27_fun_drv", - &format_args!("{}", self.gpio27_fun_drv().bits()), - ) - .field( - "gpio27_mcu_sel", - &format_args!("{}", self.gpio27_mcu_sel().bits()), - ) - .field( - "gpio27_filter_en", - &format_args!("{}", self.gpio27_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio27_mcu_oe(&mut self) -> GPIO27_MCU_OE_W { - GPIO27_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio27_slp_sel(&mut self) -> GPIO27_SLP_SEL_W { - GPIO27_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio27_mcu_wpd(&mut self) -> GPIO27_MCU_WPD_W { - GPIO27_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio27_mcu_wpu(&mut self) -> GPIO27_MCU_WPU_W { - GPIO27_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio27_mcu_ie(&mut self) -> GPIO27_MCU_IE_W { - GPIO27_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio27_mcu_drv(&mut self) -> GPIO27_MCU_DRV_W { - GPIO27_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio27_fun_wpd(&mut self) -> GPIO27_FUN_WPD_W { - GPIO27_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio27_fun_wpu(&mut self) -> GPIO27_FUN_WPU_W { - GPIO27_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio27_fun_ie(&mut self) -> GPIO27_FUN_IE_W { - GPIO27_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio27_fun_drv(&mut self) -> GPIO27_FUN_DRV_W { - GPIO27_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio27_mcu_sel(&mut self) -> GPIO27_MCU_SEL_W { - GPIO27_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio27_filter_en(&mut self) -> GPIO27_FILTER_EN_W { - GPIO27_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio27\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio27::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio27::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO27_SPEC; -impl crate::RegisterSpec for GPIO27_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio27::R`](R) reader structure"] -impl crate::Readable for GPIO27_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio27::W`](W) writer structure"] -impl crate::Writable for GPIO27_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio27 to value 0x0800"] -impl crate::Resettable for GPIO27_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio28.rs b/esp32p4/src/io_mux/gpio28.rs deleted file mode 100644 index 78c02a446a..0000000000 --- a/esp32p4/src/io_mux/gpio28.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio28` reader"] -pub type R = crate::R; -#[doc = "Register `gpio28` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO28_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO28_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO28_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO28_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO28_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO28_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO28_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO28_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO28_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO28_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO28_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO28_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO28_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO28_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO28_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO28_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO28_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO28_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO28_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO28_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO28_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO28_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO28_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO28_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO28_FUN_WPD` reader - pull-down enable"] -pub type GPIO28_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO28_FUN_WPD` writer - pull-down enable"] -pub type GPIO28_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO28_FUN_WPU` reader - pull-up enable"] -pub type GPIO28_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO28_FUN_WPU` writer - pull-up enable"] -pub type GPIO28_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO28_FUN_IE` reader - input enable"] -pub type GPIO28_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO28_FUN_IE` writer - input enable"] -pub type GPIO28_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO28_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO28_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO28_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO28_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO28_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO28_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO28_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO28_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO28_FILTER_EN` reader - input filter enable"] -pub type GPIO28_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO28_FILTER_EN` writer - input filter enable"] -pub type GPIO28_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio28_mcu_oe(&self) -> GPIO28_MCU_OE_R { - GPIO28_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio28_slp_sel(&self) -> GPIO28_SLP_SEL_R { - GPIO28_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio28_mcu_wpd(&self) -> GPIO28_MCU_WPD_R { - GPIO28_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio28_mcu_wpu(&self) -> GPIO28_MCU_WPU_R { - GPIO28_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio28_mcu_ie(&self) -> GPIO28_MCU_IE_R { - GPIO28_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio28_mcu_drv(&self) -> GPIO28_MCU_DRV_R { - GPIO28_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio28_fun_wpd(&self) -> GPIO28_FUN_WPD_R { - GPIO28_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio28_fun_wpu(&self) -> GPIO28_FUN_WPU_R { - GPIO28_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio28_fun_ie(&self) -> GPIO28_FUN_IE_R { - GPIO28_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio28_fun_drv(&self) -> GPIO28_FUN_DRV_R { - GPIO28_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio28_mcu_sel(&self) -> GPIO28_MCU_SEL_R { - GPIO28_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio28_filter_en(&self) -> GPIO28_FILTER_EN_R { - GPIO28_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio28") - .field( - "gpio28_mcu_oe", - &format_args!("{}", self.gpio28_mcu_oe().bit()), - ) - .field( - "gpio28_slp_sel", - &format_args!("{}", self.gpio28_slp_sel().bit()), - ) - .field( - "gpio28_mcu_wpd", - &format_args!("{}", self.gpio28_mcu_wpd().bit()), - ) - .field( - "gpio28_mcu_wpu", - &format_args!("{}", self.gpio28_mcu_wpu().bit()), - ) - .field( - "gpio28_mcu_ie", - &format_args!("{}", self.gpio28_mcu_ie().bit()), - ) - .field( - "gpio28_mcu_drv", - &format_args!("{}", self.gpio28_mcu_drv().bits()), - ) - .field( - "gpio28_fun_wpd", - &format_args!("{}", self.gpio28_fun_wpd().bit()), - ) - .field( - "gpio28_fun_wpu", - &format_args!("{}", self.gpio28_fun_wpu().bit()), - ) - .field( - "gpio28_fun_ie", - &format_args!("{}", self.gpio28_fun_ie().bit()), - ) - .field( - "gpio28_fun_drv", - &format_args!("{}", self.gpio28_fun_drv().bits()), - ) - .field( - "gpio28_mcu_sel", - &format_args!("{}", self.gpio28_mcu_sel().bits()), - ) - .field( - "gpio28_filter_en", - &format_args!("{}", self.gpio28_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio28_mcu_oe(&mut self) -> GPIO28_MCU_OE_W { - GPIO28_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio28_slp_sel(&mut self) -> GPIO28_SLP_SEL_W { - GPIO28_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio28_mcu_wpd(&mut self) -> GPIO28_MCU_WPD_W { - GPIO28_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio28_mcu_wpu(&mut self) -> GPIO28_MCU_WPU_W { - GPIO28_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio28_mcu_ie(&mut self) -> GPIO28_MCU_IE_W { - GPIO28_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio28_mcu_drv(&mut self) -> GPIO28_MCU_DRV_W { - GPIO28_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio28_fun_wpd(&mut self) -> GPIO28_FUN_WPD_W { - GPIO28_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio28_fun_wpu(&mut self) -> GPIO28_FUN_WPU_W { - GPIO28_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio28_fun_ie(&mut self) -> GPIO28_FUN_IE_W { - GPIO28_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio28_fun_drv(&mut self) -> GPIO28_FUN_DRV_W { - GPIO28_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio28_mcu_sel(&mut self) -> GPIO28_MCU_SEL_W { - GPIO28_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio28_filter_en(&mut self) -> GPIO28_FILTER_EN_W { - GPIO28_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio28\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio28::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio28::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO28_SPEC; -impl crate::RegisterSpec for GPIO28_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio28::R`](R) reader structure"] -impl crate::Readable for GPIO28_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio28::W`](W) writer structure"] -impl crate::Writable for GPIO28_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio28 to value 0x0800"] -impl crate::Resettable for GPIO28_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio29.rs b/esp32p4/src/io_mux/gpio29.rs deleted file mode 100644 index c07282b436..0000000000 --- a/esp32p4/src/io_mux/gpio29.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio29` reader"] -pub type R = crate::R; -#[doc = "Register `gpio29` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO29_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO29_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO29_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO29_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO29_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO29_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO29_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO29_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO29_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO29_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO29_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO29_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO29_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO29_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO29_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO29_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO29_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO29_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO29_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO29_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO29_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO29_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO29_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO29_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO29_FUN_WPD` reader - pull-down enable"] -pub type GPIO29_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO29_FUN_WPD` writer - pull-down enable"] -pub type GPIO29_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO29_FUN_WPU` reader - pull-up enable"] -pub type GPIO29_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO29_FUN_WPU` writer - pull-up enable"] -pub type GPIO29_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO29_FUN_IE` reader - input enable"] -pub type GPIO29_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO29_FUN_IE` writer - input enable"] -pub type GPIO29_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO29_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO29_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO29_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO29_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO29_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO29_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO29_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO29_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO29_FILTER_EN` reader - input filter enable"] -pub type GPIO29_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO29_FILTER_EN` writer - input filter enable"] -pub type GPIO29_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio29_mcu_oe(&self) -> GPIO29_MCU_OE_R { - GPIO29_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio29_slp_sel(&self) -> GPIO29_SLP_SEL_R { - GPIO29_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio29_mcu_wpd(&self) -> GPIO29_MCU_WPD_R { - GPIO29_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio29_mcu_wpu(&self) -> GPIO29_MCU_WPU_R { - GPIO29_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio29_mcu_ie(&self) -> GPIO29_MCU_IE_R { - GPIO29_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio29_mcu_drv(&self) -> GPIO29_MCU_DRV_R { - GPIO29_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio29_fun_wpd(&self) -> GPIO29_FUN_WPD_R { - GPIO29_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio29_fun_wpu(&self) -> GPIO29_FUN_WPU_R { - GPIO29_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio29_fun_ie(&self) -> GPIO29_FUN_IE_R { - GPIO29_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio29_fun_drv(&self) -> GPIO29_FUN_DRV_R { - GPIO29_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio29_mcu_sel(&self) -> GPIO29_MCU_SEL_R { - GPIO29_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio29_filter_en(&self) -> GPIO29_FILTER_EN_R { - GPIO29_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio29") - .field( - "gpio29_mcu_oe", - &format_args!("{}", self.gpio29_mcu_oe().bit()), - ) - .field( - "gpio29_slp_sel", - &format_args!("{}", self.gpio29_slp_sel().bit()), - ) - .field( - "gpio29_mcu_wpd", - &format_args!("{}", self.gpio29_mcu_wpd().bit()), - ) - .field( - "gpio29_mcu_wpu", - &format_args!("{}", self.gpio29_mcu_wpu().bit()), - ) - .field( - "gpio29_mcu_ie", - &format_args!("{}", self.gpio29_mcu_ie().bit()), - ) - .field( - "gpio29_mcu_drv", - &format_args!("{}", self.gpio29_mcu_drv().bits()), - ) - .field( - "gpio29_fun_wpd", - &format_args!("{}", self.gpio29_fun_wpd().bit()), - ) - .field( - "gpio29_fun_wpu", - &format_args!("{}", self.gpio29_fun_wpu().bit()), - ) - .field( - "gpio29_fun_ie", - &format_args!("{}", self.gpio29_fun_ie().bit()), - ) - .field( - "gpio29_fun_drv", - &format_args!("{}", self.gpio29_fun_drv().bits()), - ) - .field( - "gpio29_mcu_sel", - &format_args!("{}", self.gpio29_mcu_sel().bits()), - ) - .field( - "gpio29_filter_en", - &format_args!("{}", self.gpio29_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio29_mcu_oe(&mut self) -> GPIO29_MCU_OE_W { - GPIO29_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio29_slp_sel(&mut self) -> GPIO29_SLP_SEL_W { - GPIO29_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio29_mcu_wpd(&mut self) -> GPIO29_MCU_WPD_W { - GPIO29_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio29_mcu_wpu(&mut self) -> GPIO29_MCU_WPU_W { - GPIO29_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio29_mcu_ie(&mut self) -> GPIO29_MCU_IE_W { - GPIO29_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio29_mcu_drv(&mut self) -> GPIO29_MCU_DRV_W { - GPIO29_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio29_fun_wpd(&mut self) -> GPIO29_FUN_WPD_W { - GPIO29_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio29_fun_wpu(&mut self) -> GPIO29_FUN_WPU_W { - GPIO29_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio29_fun_ie(&mut self) -> GPIO29_FUN_IE_W { - GPIO29_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio29_fun_drv(&mut self) -> GPIO29_FUN_DRV_W { - GPIO29_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio29_mcu_sel(&mut self) -> GPIO29_MCU_SEL_W { - GPIO29_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio29_filter_en(&mut self) -> GPIO29_FILTER_EN_W { - GPIO29_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio29\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio29::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio29::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO29_SPEC; -impl crate::RegisterSpec for GPIO29_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio29::R`](R) reader structure"] -impl crate::Readable for GPIO29_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio29::W`](W) writer structure"] -impl crate::Writable for GPIO29_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio29 to value 0x0800"] -impl crate::Resettable for GPIO29_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio3.rs b/esp32p4/src/io_mux/gpio3.rs deleted file mode 100644 index f41b9e6de7..0000000000 --- a/esp32p4/src/io_mux/gpio3.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio3` reader"] -pub type R = crate::R; -#[doc = "Register `gpio3` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO3_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO3_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO3_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO3_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO3_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO3_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO3_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO3_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO3_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO3_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO3_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO3_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO3_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO3_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO3_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO3_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO3_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO3_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO3_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO3_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO3_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO3_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO3_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO3_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO3_FUN_WPD` reader - pull-down enable"] -pub type GPIO3_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO3_FUN_WPD` writer - pull-down enable"] -pub type GPIO3_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO3_FUN_WPU` reader - pull-up enable"] -pub type GPIO3_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO3_FUN_WPU` writer - pull-up enable"] -pub type GPIO3_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO3_FUN_IE` reader - input enable"] -pub type GPIO3_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO3_FUN_IE` writer - input enable"] -pub type GPIO3_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO3_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO3_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO3_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO3_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO3_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO3_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO3_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO3_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO3_FILTER_EN` reader - input filter enable"] -pub type GPIO3_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO3_FILTER_EN` writer - input filter enable"] -pub type GPIO3_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio3_mcu_oe(&self) -> GPIO3_MCU_OE_R { - GPIO3_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio3_slp_sel(&self) -> GPIO3_SLP_SEL_R { - GPIO3_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio3_mcu_wpd(&self) -> GPIO3_MCU_WPD_R { - GPIO3_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio3_mcu_wpu(&self) -> GPIO3_MCU_WPU_R { - GPIO3_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio3_mcu_ie(&self) -> GPIO3_MCU_IE_R { - GPIO3_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio3_mcu_drv(&self) -> GPIO3_MCU_DRV_R { - GPIO3_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio3_fun_wpd(&self) -> GPIO3_FUN_WPD_R { - GPIO3_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio3_fun_wpu(&self) -> GPIO3_FUN_WPU_R { - GPIO3_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio3_fun_ie(&self) -> GPIO3_FUN_IE_R { - GPIO3_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio3_fun_drv(&self) -> GPIO3_FUN_DRV_R { - GPIO3_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio3_mcu_sel(&self) -> GPIO3_MCU_SEL_R { - GPIO3_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio3_filter_en(&self) -> GPIO3_FILTER_EN_R { - GPIO3_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio3") - .field( - "gpio3_mcu_oe", - &format_args!("{}", self.gpio3_mcu_oe().bit()), - ) - .field( - "gpio3_slp_sel", - &format_args!("{}", self.gpio3_slp_sel().bit()), - ) - .field( - "gpio3_mcu_wpd", - &format_args!("{}", self.gpio3_mcu_wpd().bit()), - ) - .field( - "gpio3_mcu_wpu", - &format_args!("{}", self.gpio3_mcu_wpu().bit()), - ) - .field( - "gpio3_mcu_ie", - &format_args!("{}", self.gpio3_mcu_ie().bit()), - ) - .field( - "gpio3_mcu_drv", - &format_args!("{}", self.gpio3_mcu_drv().bits()), - ) - .field( - "gpio3_fun_wpd", - &format_args!("{}", self.gpio3_fun_wpd().bit()), - ) - .field( - "gpio3_fun_wpu", - &format_args!("{}", self.gpio3_fun_wpu().bit()), - ) - .field( - "gpio3_fun_ie", - &format_args!("{}", self.gpio3_fun_ie().bit()), - ) - .field( - "gpio3_fun_drv", - &format_args!("{}", self.gpio3_fun_drv().bits()), - ) - .field( - "gpio3_mcu_sel", - &format_args!("{}", self.gpio3_mcu_sel().bits()), - ) - .field( - "gpio3_filter_en", - &format_args!("{}", self.gpio3_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio3_mcu_oe(&mut self) -> GPIO3_MCU_OE_W { - GPIO3_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio3_slp_sel(&mut self) -> GPIO3_SLP_SEL_W { - GPIO3_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio3_mcu_wpd(&mut self) -> GPIO3_MCU_WPD_W { - GPIO3_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio3_mcu_wpu(&mut self) -> GPIO3_MCU_WPU_W { - GPIO3_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio3_mcu_ie(&mut self) -> GPIO3_MCU_IE_W { - GPIO3_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio3_mcu_drv(&mut self) -> GPIO3_MCU_DRV_W { - GPIO3_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio3_fun_wpd(&mut self) -> GPIO3_FUN_WPD_W { - GPIO3_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio3_fun_wpu(&mut self) -> GPIO3_FUN_WPU_W { - GPIO3_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio3_fun_ie(&mut self) -> GPIO3_FUN_IE_W { - GPIO3_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio3_fun_drv(&mut self) -> GPIO3_FUN_DRV_W { - GPIO3_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio3_mcu_sel(&mut self) -> GPIO3_MCU_SEL_W { - GPIO3_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio3_filter_en(&mut self) -> GPIO3_FILTER_EN_W { - GPIO3_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO3_SPEC; -impl crate::RegisterSpec for GPIO3_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio3::R`](R) reader structure"] -impl crate::Readable for GPIO3_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio3::W`](W) writer structure"] -impl crate::Writable for GPIO3_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio3 to value 0x0800"] -impl crate::Resettable for GPIO3_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio30.rs b/esp32p4/src/io_mux/gpio30.rs deleted file mode 100644 index 51b993e7d8..0000000000 --- a/esp32p4/src/io_mux/gpio30.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio30` reader"] -pub type R = crate::R; -#[doc = "Register `gpio30` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO30_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO30_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO30_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO30_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO30_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO30_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO30_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO30_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO30_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO30_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO30_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO30_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO30_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO30_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO30_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO30_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO30_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO30_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO30_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO30_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO30_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO30_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO30_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO30_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO30_FUN_WPD` reader - pull-down enable"] -pub type GPIO30_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO30_FUN_WPD` writer - pull-down enable"] -pub type GPIO30_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO30_FUN_WPU` reader - pull-up enable"] -pub type GPIO30_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO30_FUN_WPU` writer - pull-up enable"] -pub type GPIO30_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO30_FUN_IE` reader - input enable"] -pub type GPIO30_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO30_FUN_IE` writer - input enable"] -pub type GPIO30_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO30_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO30_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO30_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO30_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO30_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO30_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO30_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO30_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO30_FILTER_EN` reader - input filter enable"] -pub type GPIO30_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO30_FILTER_EN` writer - input filter enable"] -pub type GPIO30_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio30_mcu_oe(&self) -> GPIO30_MCU_OE_R { - GPIO30_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio30_slp_sel(&self) -> GPIO30_SLP_SEL_R { - GPIO30_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio30_mcu_wpd(&self) -> GPIO30_MCU_WPD_R { - GPIO30_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio30_mcu_wpu(&self) -> GPIO30_MCU_WPU_R { - GPIO30_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio30_mcu_ie(&self) -> GPIO30_MCU_IE_R { - GPIO30_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio30_mcu_drv(&self) -> GPIO30_MCU_DRV_R { - GPIO30_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio30_fun_wpd(&self) -> GPIO30_FUN_WPD_R { - GPIO30_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio30_fun_wpu(&self) -> GPIO30_FUN_WPU_R { - GPIO30_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio30_fun_ie(&self) -> GPIO30_FUN_IE_R { - GPIO30_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio30_fun_drv(&self) -> GPIO30_FUN_DRV_R { - GPIO30_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio30_mcu_sel(&self) -> GPIO30_MCU_SEL_R { - GPIO30_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio30_filter_en(&self) -> GPIO30_FILTER_EN_R { - GPIO30_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio30") - .field( - "gpio30_mcu_oe", - &format_args!("{}", self.gpio30_mcu_oe().bit()), - ) - .field( - "gpio30_slp_sel", - &format_args!("{}", self.gpio30_slp_sel().bit()), - ) - .field( - "gpio30_mcu_wpd", - &format_args!("{}", self.gpio30_mcu_wpd().bit()), - ) - .field( - "gpio30_mcu_wpu", - &format_args!("{}", self.gpio30_mcu_wpu().bit()), - ) - .field( - "gpio30_mcu_ie", - &format_args!("{}", self.gpio30_mcu_ie().bit()), - ) - .field( - "gpio30_mcu_drv", - &format_args!("{}", self.gpio30_mcu_drv().bits()), - ) - .field( - "gpio30_fun_wpd", - &format_args!("{}", self.gpio30_fun_wpd().bit()), - ) - .field( - "gpio30_fun_wpu", - &format_args!("{}", self.gpio30_fun_wpu().bit()), - ) - .field( - "gpio30_fun_ie", - &format_args!("{}", self.gpio30_fun_ie().bit()), - ) - .field( - "gpio30_fun_drv", - &format_args!("{}", self.gpio30_fun_drv().bits()), - ) - .field( - "gpio30_mcu_sel", - &format_args!("{}", self.gpio30_mcu_sel().bits()), - ) - .field( - "gpio30_filter_en", - &format_args!("{}", self.gpio30_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio30_mcu_oe(&mut self) -> GPIO30_MCU_OE_W { - GPIO30_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio30_slp_sel(&mut self) -> GPIO30_SLP_SEL_W { - GPIO30_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio30_mcu_wpd(&mut self) -> GPIO30_MCU_WPD_W { - GPIO30_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio30_mcu_wpu(&mut self) -> GPIO30_MCU_WPU_W { - GPIO30_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio30_mcu_ie(&mut self) -> GPIO30_MCU_IE_W { - GPIO30_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio30_mcu_drv(&mut self) -> GPIO30_MCU_DRV_W { - GPIO30_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio30_fun_wpd(&mut self) -> GPIO30_FUN_WPD_W { - GPIO30_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio30_fun_wpu(&mut self) -> GPIO30_FUN_WPU_W { - GPIO30_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio30_fun_ie(&mut self) -> GPIO30_FUN_IE_W { - GPIO30_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio30_fun_drv(&mut self) -> GPIO30_FUN_DRV_W { - GPIO30_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio30_mcu_sel(&mut self) -> GPIO30_MCU_SEL_W { - GPIO30_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio30_filter_en(&mut self) -> GPIO30_FILTER_EN_W { - GPIO30_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio30\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio30::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio30::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO30_SPEC; -impl crate::RegisterSpec for GPIO30_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio30::R`](R) reader structure"] -impl crate::Readable for GPIO30_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio30::W`](W) writer structure"] -impl crate::Writable for GPIO30_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio30 to value 0x0800"] -impl crate::Resettable for GPIO30_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio31.rs b/esp32p4/src/io_mux/gpio31.rs deleted file mode 100644 index 38a18ee376..0000000000 --- a/esp32p4/src/io_mux/gpio31.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio31` reader"] -pub type R = crate::R; -#[doc = "Register `gpio31` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO31_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO31_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO31_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO31_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO31_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO31_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO31_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO31_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO31_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO31_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO31_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO31_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO31_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO31_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO31_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO31_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO31_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO31_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO31_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO31_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO31_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO31_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO31_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO31_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO31_FUN_WPD` reader - pull-down enable"] -pub type GPIO31_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO31_FUN_WPD` writer - pull-down enable"] -pub type GPIO31_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO31_FUN_WPU` reader - pull-up enable"] -pub type GPIO31_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO31_FUN_WPU` writer - pull-up enable"] -pub type GPIO31_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO31_FUN_IE` reader - input enable"] -pub type GPIO31_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO31_FUN_IE` writer - input enable"] -pub type GPIO31_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO31_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO31_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO31_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO31_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO31_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO31_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO31_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO31_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO31_FILTER_EN` reader - input filter enable"] -pub type GPIO31_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO31_FILTER_EN` writer - input filter enable"] -pub type GPIO31_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio31_mcu_oe(&self) -> GPIO31_MCU_OE_R { - GPIO31_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio31_slp_sel(&self) -> GPIO31_SLP_SEL_R { - GPIO31_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio31_mcu_wpd(&self) -> GPIO31_MCU_WPD_R { - GPIO31_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio31_mcu_wpu(&self) -> GPIO31_MCU_WPU_R { - GPIO31_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio31_mcu_ie(&self) -> GPIO31_MCU_IE_R { - GPIO31_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio31_mcu_drv(&self) -> GPIO31_MCU_DRV_R { - GPIO31_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio31_fun_wpd(&self) -> GPIO31_FUN_WPD_R { - GPIO31_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio31_fun_wpu(&self) -> GPIO31_FUN_WPU_R { - GPIO31_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio31_fun_ie(&self) -> GPIO31_FUN_IE_R { - GPIO31_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio31_fun_drv(&self) -> GPIO31_FUN_DRV_R { - GPIO31_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio31_mcu_sel(&self) -> GPIO31_MCU_SEL_R { - GPIO31_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio31_filter_en(&self) -> GPIO31_FILTER_EN_R { - GPIO31_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio31") - .field( - "gpio31_mcu_oe", - &format_args!("{}", self.gpio31_mcu_oe().bit()), - ) - .field( - "gpio31_slp_sel", - &format_args!("{}", self.gpio31_slp_sel().bit()), - ) - .field( - "gpio31_mcu_wpd", - &format_args!("{}", self.gpio31_mcu_wpd().bit()), - ) - .field( - "gpio31_mcu_wpu", - &format_args!("{}", self.gpio31_mcu_wpu().bit()), - ) - .field( - "gpio31_mcu_ie", - &format_args!("{}", self.gpio31_mcu_ie().bit()), - ) - .field( - "gpio31_mcu_drv", - &format_args!("{}", self.gpio31_mcu_drv().bits()), - ) - .field( - "gpio31_fun_wpd", - &format_args!("{}", self.gpio31_fun_wpd().bit()), - ) - .field( - "gpio31_fun_wpu", - &format_args!("{}", self.gpio31_fun_wpu().bit()), - ) - .field( - "gpio31_fun_ie", - &format_args!("{}", self.gpio31_fun_ie().bit()), - ) - .field( - "gpio31_fun_drv", - &format_args!("{}", self.gpio31_fun_drv().bits()), - ) - .field( - "gpio31_mcu_sel", - &format_args!("{}", self.gpio31_mcu_sel().bits()), - ) - .field( - "gpio31_filter_en", - &format_args!("{}", self.gpio31_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio31_mcu_oe(&mut self) -> GPIO31_MCU_OE_W { - GPIO31_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio31_slp_sel(&mut self) -> GPIO31_SLP_SEL_W { - GPIO31_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio31_mcu_wpd(&mut self) -> GPIO31_MCU_WPD_W { - GPIO31_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio31_mcu_wpu(&mut self) -> GPIO31_MCU_WPU_W { - GPIO31_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio31_mcu_ie(&mut self) -> GPIO31_MCU_IE_W { - GPIO31_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio31_mcu_drv(&mut self) -> GPIO31_MCU_DRV_W { - GPIO31_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio31_fun_wpd(&mut self) -> GPIO31_FUN_WPD_W { - GPIO31_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio31_fun_wpu(&mut self) -> GPIO31_FUN_WPU_W { - GPIO31_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio31_fun_ie(&mut self) -> GPIO31_FUN_IE_W { - GPIO31_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio31_fun_drv(&mut self) -> GPIO31_FUN_DRV_W { - GPIO31_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio31_mcu_sel(&mut self) -> GPIO31_MCU_SEL_W { - GPIO31_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio31_filter_en(&mut self) -> GPIO31_FILTER_EN_W { - GPIO31_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio31\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio31::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio31::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO31_SPEC; -impl crate::RegisterSpec for GPIO31_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio31::R`](R) reader structure"] -impl crate::Readable for GPIO31_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio31::W`](W) writer structure"] -impl crate::Writable for GPIO31_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio31 to value 0x0800"] -impl crate::Resettable for GPIO31_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio32.rs b/esp32p4/src/io_mux/gpio32.rs deleted file mode 100644 index e713e7f2fe..0000000000 --- a/esp32p4/src/io_mux/gpio32.rs +++ /dev/null @@ -1,332 +0,0 @@ -#[doc = "Register `gpio32` reader"] -pub type R = crate::R; -#[doc = "Register `gpio32` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO32_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO32_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO32_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO32_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO32_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO32_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO32_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO32_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO32_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO32_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO32_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO32_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO32_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO32_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO32_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO32_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO32_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO32_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO32_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO32_FUN_WPD` reader - pull-down enable"] -pub type GPIO32_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO32_FUN_WPD` writer - pull-down enable"] -pub type GPIO32_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_FUN_WPU` reader - pull-up enable"] -pub type GPIO32_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO32_FUN_WPU` writer - pull-up enable"] -pub type GPIO32_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_FUN_IE` reader - input enable"] -pub type GPIO32_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO32_FUN_IE` writer - input enable"] -pub type GPIO32_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO32_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO32_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO32_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO32_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO32_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO32_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO32_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO32_FILTER_EN` reader - input filter enable"] -pub type GPIO32_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO32_FILTER_EN` writer - input filter enable"] -pub type GPIO32_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_RUE_I3C` reader - NA"] -pub type GPIO32_RUE_I3C_R = crate::BitReader; -#[doc = "Field `GPIO32_RUE_I3C` writer - NA"] -pub type GPIO32_RUE_I3C_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO32_RU_I3C` reader - NA"] -pub type GPIO32_RU_I3C_R = crate::FieldReader; -#[doc = "Field `GPIO32_RU_I3C` writer - NA"] -pub type GPIO32_RU_I3C_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO32_RUE_SEL_I3C` reader - NA"] -pub type GPIO32_RUE_SEL_I3C_R = crate::BitReader; -#[doc = "Field `GPIO32_RUE_SEL_I3C` writer - NA"] -pub type GPIO32_RUE_SEL_I3C_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio32_mcu_oe(&self) -> GPIO32_MCU_OE_R { - GPIO32_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio32_slp_sel(&self) -> GPIO32_SLP_SEL_R { - GPIO32_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio32_mcu_wpd(&self) -> GPIO32_MCU_WPD_R { - GPIO32_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio32_mcu_wpu(&self) -> GPIO32_MCU_WPU_R { - GPIO32_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio32_mcu_ie(&self) -> GPIO32_MCU_IE_R { - GPIO32_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio32_mcu_drv(&self) -> GPIO32_MCU_DRV_R { - GPIO32_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio32_fun_wpd(&self) -> GPIO32_FUN_WPD_R { - GPIO32_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio32_fun_wpu(&self) -> GPIO32_FUN_WPU_R { - GPIO32_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio32_fun_ie(&self) -> GPIO32_FUN_IE_R { - GPIO32_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio32_fun_drv(&self) -> GPIO32_FUN_DRV_R { - GPIO32_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio32_mcu_sel(&self) -> GPIO32_MCU_SEL_R { - GPIO32_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio32_filter_en(&self) -> GPIO32_FILTER_EN_R { - GPIO32_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } - #[doc = "Bit 16 - NA"] - #[inline(always)] - pub fn gpio32_rue_i3c(&self) -> GPIO32_RUE_I3C_R { - GPIO32_RUE_I3C_R::new(((self.bits >> 16) & 1) != 0) - } - #[doc = "Bits 17:18 - NA"] - #[inline(always)] - pub fn gpio32_ru_i3c(&self) -> GPIO32_RU_I3C_R { - GPIO32_RU_I3C_R::new(((self.bits >> 17) & 3) as u8) - } - #[doc = "Bit 19 - NA"] - #[inline(always)] - pub fn gpio32_rue_sel_i3c(&self) -> GPIO32_RUE_SEL_I3C_R { - GPIO32_RUE_SEL_I3C_R::new(((self.bits >> 19) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio32") - .field( - "gpio32_mcu_oe", - &format_args!("{}", self.gpio32_mcu_oe().bit()), - ) - .field( - "gpio32_slp_sel", - &format_args!("{}", self.gpio32_slp_sel().bit()), - ) - .field( - "gpio32_mcu_wpd", - &format_args!("{}", self.gpio32_mcu_wpd().bit()), - ) - .field( - "gpio32_mcu_wpu", - &format_args!("{}", self.gpio32_mcu_wpu().bit()), - ) - .field( - "gpio32_mcu_ie", - &format_args!("{}", self.gpio32_mcu_ie().bit()), - ) - .field( - "gpio32_mcu_drv", - &format_args!("{}", self.gpio32_mcu_drv().bits()), - ) - .field( - "gpio32_fun_wpd", - &format_args!("{}", self.gpio32_fun_wpd().bit()), - ) - .field( - "gpio32_fun_wpu", - &format_args!("{}", self.gpio32_fun_wpu().bit()), - ) - .field( - "gpio32_fun_ie", - &format_args!("{}", self.gpio32_fun_ie().bit()), - ) - .field( - "gpio32_fun_drv", - &format_args!("{}", self.gpio32_fun_drv().bits()), - ) - .field( - "gpio32_mcu_sel", - &format_args!("{}", self.gpio32_mcu_sel().bits()), - ) - .field( - "gpio32_filter_en", - &format_args!("{}", self.gpio32_filter_en().bit()), - ) - .field( - "gpio32_rue_i3c", - &format_args!("{}", self.gpio32_rue_i3c().bit()), - ) - .field( - "gpio32_ru_i3c", - &format_args!("{}", self.gpio32_ru_i3c().bits()), - ) - .field( - "gpio32_rue_sel_i3c", - &format_args!("{}", self.gpio32_rue_sel_i3c().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio32_mcu_oe(&mut self) -> GPIO32_MCU_OE_W { - GPIO32_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio32_slp_sel(&mut self) -> GPIO32_SLP_SEL_W { - GPIO32_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio32_mcu_wpd(&mut self) -> GPIO32_MCU_WPD_W { - GPIO32_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio32_mcu_wpu(&mut self) -> GPIO32_MCU_WPU_W { - GPIO32_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio32_mcu_ie(&mut self) -> GPIO32_MCU_IE_W { - GPIO32_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio32_mcu_drv(&mut self) -> GPIO32_MCU_DRV_W { - GPIO32_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio32_fun_wpd(&mut self) -> GPIO32_FUN_WPD_W { - GPIO32_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio32_fun_wpu(&mut self) -> GPIO32_FUN_WPU_W { - GPIO32_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio32_fun_ie(&mut self) -> GPIO32_FUN_IE_W { - GPIO32_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio32_fun_drv(&mut self) -> GPIO32_FUN_DRV_W { - GPIO32_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio32_mcu_sel(&mut self) -> GPIO32_MCU_SEL_W { - GPIO32_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio32_filter_en(&mut self) -> GPIO32_FILTER_EN_W { - GPIO32_FILTER_EN_W::new(self, 15) - } - #[doc = "Bit 16 - NA"] - #[inline(always)] - #[must_use] - pub fn gpio32_rue_i3c(&mut self) -> GPIO32_RUE_I3C_W { - GPIO32_RUE_I3C_W::new(self, 16) - } - #[doc = "Bits 17:18 - NA"] - #[inline(always)] - #[must_use] - pub fn gpio32_ru_i3c(&mut self) -> GPIO32_RU_I3C_W { - GPIO32_RU_I3C_W::new(self, 17) - } - #[doc = "Bit 19 - NA"] - #[inline(always)] - #[must_use] - pub fn gpio32_rue_sel_i3c(&mut self) -> GPIO32_RUE_SEL_I3C_W { - GPIO32_RUE_SEL_I3C_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio32\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio32::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio32::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO32_SPEC; -impl crate::RegisterSpec for GPIO32_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio32::R`](R) reader structure"] -impl crate::Readable for GPIO32_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio32::W`](W) writer structure"] -impl crate::Writable for GPIO32_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio32 to value 0x0800"] -impl crate::Resettable for GPIO32_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio33.rs b/esp32p4/src/io_mux/gpio33.rs deleted file mode 100644 index b9f970f694..0000000000 --- a/esp32p4/src/io_mux/gpio33.rs +++ /dev/null @@ -1,332 +0,0 @@ -#[doc = "Register `gpio33` reader"] -pub type R = crate::R; -#[doc = "Register `gpio33` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO33_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO33_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO33_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO33_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO33_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO33_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO33_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO33_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO33_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO33_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO33_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO33_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO33_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO33_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO33_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO33_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO33_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO33_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO33_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO33_FUN_WPD` reader - pull-down enable"] -pub type GPIO33_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO33_FUN_WPD` writer - pull-down enable"] -pub type GPIO33_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_FUN_WPU` reader - pull-up enable"] -pub type GPIO33_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO33_FUN_WPU` writer - pull-up enable"] -pub type GPIO33_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_FUN_IE` reader - input enable"] -pub type GPIO33_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO33_FUN_IE` writer - input enable"] -pub type GPIO33_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO33_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO33_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO33_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO33_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO33_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO33_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO33_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO33_FILTER_EN` reader - input filter enable"] -pub type GPIO33_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO33_FILTER_EN` writer - input filter enable"] -pub type GPIO33_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_RUE_I3C` reader - NA"] -pub type GPIO33_RUE_I3C_R = crate::BitReader; -#[doc = "Field `GPIO33_RUE_I3C` writer - NA"] -pub type GPIO33_RUE_I3C_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO33_RU_I3C` reader - NA"] -pub type GPIO33_RU_I3C_R = crate::FieldReader; -#[doc = "Field `GPIO33_RU_I3C` writer - NA"] -pub type GPIO33_RU_I3C_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO33_RUE_SEL_I3C` reader - NA"] -pub type GPIO33_RUE_SEL_I3C_R = crate::BitReader; -#[doc = "Field `GPIO33_RUE_SEL_I3C` writer - NA"] -pub type GPIO33_RUE_SEL_I3C_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio33_mcu_oe(&self) -> GPIO33_MCU_OE_R { - GPIO33_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio33_slp_sel(&self) -> GPIO33_SLP_SEL_R { - GPIO33_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio33_mcu_wpd(&self) -> GPIO33_MCU_WPD_R { - GPIO33_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio33_mcu_wpu(&self) -> GPIO33_MCU_WPU_R { - GPIO33_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio33_mcu_ie(&self) -> GPIO33_MCU_IE_R { - GPIO33_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio33_mcu_drv(&self) -> GPIO33_MCU_DRV_R { - GPIO33_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio33_fun_wpd(&self) -> GPIO33_FUN_WPD_R { - GPIO33_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio33_fun_wpu(&self) -> GPIO33_FUN_WPU_R { - GPIO33_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio33_fun_ie(&self) -> GPIO33_FUN_IE_R { - GPIO33_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio33_fun_drv(&self) -> GPIO33_FUN_DRV_R { - GPIO33_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio33_mcu_sel(&self) -> GPIO33_MCU_SEL_R { - GPIO33_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio33_filter_en(&self) -> GPIO33_FILTER_EN_R { - GPIO33_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } - #[doc = "Bit 16 - NA"] - #[inline(always)] - pub fn gpio33_rue_i3c(&self) -> GPIO33_RUE_I3C_R { - GPIO33_RUE_I3C_R::new(((self.bits >> 16) & 1) != 0) - } - #[doc = "Bits 17:18 - NA"] - #[inline(always)] - pub fn gpio33_ru_i3c(&self) -> GPIO33_RU_I3C_R { - GPIO33_RU_I3C_R::new(((self.bits >> 17) & 3) as u8) - } - #[doc = "Bit 19 - NA"] - #[inline(always)] - pub fn gpio33_rue_sel_i3c(&self) -> GPIO33_RUE_SEL_I3C_R { - GPIO33_RUE_SEL_I3C_R::new(((self.bits >> 19) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio33") - .field( - "gpio33_mcu_oe", - &format_args!("{}", self.gpio33_mcu_oe().bit()), - ) - .field( - "gpio33_slp_sel", - &format_args!("{}", self.gpio33_slp_sel().bit()), - ) - .field( - "gpio33_mcu_wpd", - &format_args!("{}", self.gpio33_mcu_wpd().bit()), - ) - .field( - "gpio33_mcu_wpu", - &format_args!("{}", self.gpio33_mcu_wpu().bit()), - ) - .field( - "gpio33_mcu_ie", - &format_args!("{}", self.gpio33_mcu_ie().bit()), - ) - .field( - "gpio33_mcu_drv", - &format_args!("{}", self.gpio33_mcu_drv().bits()), - ) - .field( - "gpio33_fun_wpd", - &format_args!("{}", self.gpio33_fun_wpd().bit()), - ) - .field( - "gpio33_fun_wpu", - &format_args!("{}", self.gpio33_fun_wpu().bit()), - ) - .field( - "gpio33_fun_ie", - &format_args!("{}", self.gpio33_fun_ie().bit()), - ) - .field( - "gpio33_fun_drv", - &format_args!("{}", self.gpio33_fun_drv().bits()), - ) - .field( - "gpio33_mcu_sel", - &format_args!("{}", self.gpio33_mcu_sel().bits()), - ) - .field( - "gpio33_filter_en", - &format_args!("{}", self.gpio33_filter_en().bit()), - ) - .field( - "gpio33_rue_i3c", - &format_args!("{}", self.gpio33_rue_i3c().bit()), - ) - .field( - "gpio33_ru_i3c", - &format_args!("{}", self.gpio33_ru_i3c().bits()), - ) - .field( - "gpio33_rue_sel_i3c", - &format_args!("{}", self.gpio33_rue_sel_i3c().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio33_mcu_oe(&mut self) -> GPIO33_MCU_OE_W { - GPIO33_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio33_slp_sel(&mut self) -> GPIO33_SLP_SEL_W { - GPIO33_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio33_mcu_wpd(&mut self) -> GPIO33_MCU_WPD_W { - GPIO33_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio33_mcu_wpu(&mut self) -> GPIO33_MCU_WPU_W { - GPIO33_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio33_mcu_ie(&mut self) -> GPIO33_MCU_IE_W { - GPIO33_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio33_mcu_drv(&mut self) -> GPIO33_MCU_DRV_W { - GPIO33_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio33_fun_wpd(&mut self) -> GPIO33_FUN_WPD_W { - GPIO33_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio33_fun_wpu(&mut self) -> GPIO33_FUN_WPU_W { - GPIO33_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio33_fun_ie(&mut self) -> GPIO33_FUN_IE_W { - GPIO33_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio33_fun_drv(&mut self) -> GPIO33_FUN_DRV_W { - GPIO33_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio33_mcu_sel(&mut self) -> GPIO33_MCU_SEL_W { - GPIO33_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio33_filter_en(&mut self) -> GPIO33_FILTER_EN_W { - GPIO33_FILTER_EN_W::new(self, 15) - } - #[doc = "Bit 16 - NA"] - #[inline(always)] - #[must_use] - pub fn gpio33_rue_i3c(&mut self) -> GPIO33_RUE_I3C_W { - GPIO33_RUE_I3C_W::new(self, 16) - } - #[doc = "Bits 17:18 - NA"] - #[inline(always)] - #[must_use] - pub fn gpio33_ru_i3c(&mut self) -> GPIO33_RU_I3C_W { - GPIO33_RU_I3C_W::new(self, 17) - } - #[doc = "Bit 19 - NA"] - #[inline(always)] - #[must_use] - pub fn gpio33_rue_sel_i3c(&mut self) -> GPIO33_RUE_SEL_I3C_W { - GPIO33_RUE_SEL_I3C_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio33\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio33::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio33::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO33_SPEC; -impl crate::RegisterSpec for GPIO33_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio33::R`](R) reader structure"] -impl crate::Readable for GPIO33_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio33::W`](W) writer structure"] -impl crate::Writable for GPIO33_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio33 to value 0x0800"] -impl crate::Resettable for GPIO33_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio34.rs b/esp32p4/src/io_mux/gpio34.rs deleted file mode 100644 index 628d215124..0000000000 --- a/esp32p4/src/io_mux/gpio34.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio34` reader"] -pub type R = crate::R; -#[doc = "Register `gpio34` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO34_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO34_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO34_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO34_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO34_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO34_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO34_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO34_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO34_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO34_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO34_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO34_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO34_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO34_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO34_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO34_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO34_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO34_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO34_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO34_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO34_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO34_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO34_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO34_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO34_FUN_WPD` reader - pull-down enable"] -pub type GPIO34_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO34_FUN_WPD` writer - pull-down enable"] -pub type GPIO34_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO34_FUN_WPU` reader - pull-up enable"] -pub type GPIO34_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO34_FUN_WPU` writer - pull-up enable"] -pub type GPIO34_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO34_FUN_IE` reader - input enable"] -pub type GPIO34_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO34_FUN_IE` writer - input enable"] -pub type GPIO34_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO34_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO34_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO34_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO34_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO34_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO34_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO34_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO34_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO34_FILTER_EN` reader - input filter enable"] -pub type GPIO34_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO34_FILTER_EN` writer - input filter enable"] -pub type GPIO34_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio34_mcu_oe(&self) -> GPIO34_MCU_OE_R { - GPIO34_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio34_slp_sel(&self) -> GPIO34_SLP_SEL_R { - GPIO34_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio34_mcu_wpd(&self) -> GPIO34_MCU_WPD_R { - GPIO34_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio34_mcu_wpu(&self) -> GPIO34_MCU_WPU_R { - GPIO34_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio34_mcu_ie(&self) -> GPIO34_MCU_IE_R { - GPIO34_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio34_mcu_drv(&self) -> GPIO34_MCU_DRV_R { - GPIO34_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio34_fun_wpd(&self) -> GPIO34_FUN_WPD_R { - GPIO34_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio34_fun_wpu(&self) -> GPIO34_FUN_WPU_R { - GPIO34_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio34_fun_ie(&self) -> GPIO34_FUN_IE_R { - GPIO34_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio34_fun_drv(&self) -> GPIO34_FUN_DRV_R { - GPIO34_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio34_mcu_sel(&self) -> GPIO34_MCU_SEL_R { - GPIO34_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio34_filter_en(&self) -> GPIO34_FILTER_EN_R { - GPIO34_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio34") - .field( - "gpio34_mcu_oe", - &format_args!("{}", self.gpio34_mcu_oe().bit()), - ) - .field( - "gpio34_slp_sel", - &format_args!("{}", self.gpio34_slp_sel().bit()), - ) - .field( - "gpio34_mcu_wpd", - &format_args!("{}", self.gpio34_mcu_wpd().bit()), - ) - .field( - "gpio34_mcu_wpu", - &format_args!("{}", self.gpio34_mcu_wpu().bit()), - ) - .field( - "gpio34_mcu_ie", - &format_args!("{}", self.gpio34_mcu_ie().bit()), - ) - .field( - "gpio34_mcu_drv", - &format_args!("{}", self.gpio34_mcu_drv().bits()), - ) - .field( - "gpio34_fun_wpd", - &format_args!("{}", self.gpio34_fun_wpd().bit()), - ) - .field( - "gpio34_fun_wpu", - &format_args!("{}", self.gpio34_fun_wpu().bit()), - ) - .field( - "gpio34_fun_ie", - &format_args!("{}", self.gpio34_fun_ie().bit()), - ) - .field( - "gpio34_fun_drv", - &format_args!("{}", self.gpio34_fun_drv().bits()), - ) - .field( - "gpio34_mcu_sel", - &format_args!("{}", self.gpio34_mcu_sel().bits()), - ) - .field( - "gpio34_filter_en", - &format_args!("{}", self.gpio34_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio34_mcu_oe(&mut self) -> GPIO34_MCU_OE_W { - GPIO34_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio34_slp_sel(&mut self) -> GPIO34_SLP_SEL_W { - GPIO34_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio34_mcu_wpd(&mut self) -> GPIO34_MCU_WPD_W { - GPIO34_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio34_mcu_wpu(&mut self) -> GPIO34_MCU_WPU_W { - GPIO34_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio34_mcu_ie(&mut self) -> GPIO34_MCU_IE_W { - GPIO34_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio34_mcu_drv(&mut self) -> GPIO34_MCU_DRV_W { - GPIO34_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio34_fun_wpd(&mut self) -> GPIO34_FUN_WPD_W { - GPIO34_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio34_fun_wpu(&mut self) -> GPIO34_FUN_WPU_W { - GPIO34_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio34_fun_ie(&mut self) -> GPIO34_FUN_IE_W { - GPIO34_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio34_fun_drv(&mut self) -> GPIO34_FUN_DRV_W { - GPIO34_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio34_mcu_sel(&mut self) -> GPIO34_MCU_SEL_W { - GPIO34_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio34_filter_en(&mut self) -> GPIO34_FILTER_EN_W { - GPIO34_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio34\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio34::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio34::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO34_SPEC; -impl crate::RegisterSpec for GPIO34_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio34::R`](R) reader structure"] -impl crate::Readable for GPIO34_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio34::W`](W) writer structure"] -impl crate::Writable for GPIO34_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio34 to value 0x0800"] -impl crate::Resettable for GPIO34_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio35.rs b/esp32p4/src/io_mux/gpio35.rs deleted file mode 100644 index 3bed67f48c..0000000000 --- a/esp32p4/src/io_mux/gpio35.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio35` reader"] -pub type R = crate::R; -#[doc = "Register `gpio35` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO35_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO35_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO35_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO35_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO35_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO35_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO35_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO35_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO35_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO35_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO35_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO35_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO35_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO35_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO35_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO35_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO35_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO35_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO35_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO35_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO35_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO35_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO35_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO35_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO35_FUN_WPD` reader - pull-down enable"] -pub type GPIO35_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO35_FUN_WPD` writer - pull-down enable"] -pub type GPIO35_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO35_FUN_WPU` reader - pull-up enable"] -pub type GPIO35_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO35_FUN_WPU` writer - pull-up enable"] -pub type GPIO35_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO35_FUN_IE` reader - input enable"] -pub type GPIO35_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO35_FUN_IE` writer - input enable"] -pub type GPIO35_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO35_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO35_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO35_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO35_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO35_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO35_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO35_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO35_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO35_FILTER_EN` reader - input filter enable"] -pub type GPIO35_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO35_FILTER_EN` writer - input filter enable"] -pub type GPIO35_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio35_mcu_oe(&self) -> GPIO35_MCU_OE_R { - GPIO35_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio35_slp_sel(&self) -> GPIO35_SLP_SEL_R { - GPIO35_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio35_mcu_wpd(&self) -> GPIO35_MCU_WPD_R { - GPIO35_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio35_mcu_wpu(&self) -> GPIO35_MCU_WPU_R { - GPIO35_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio35_mcu_ie(&self) -> GPIO35_MCU_IE_R { - GPIO35_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio35_mcu_drv(&self) -> GPIO35_MCU_DRV_R { - GPIO35_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio35_fun_wpd(&self) -> GPIO35_FUN_WPD_R { - GPIO35_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio35_fun_wpu(&self) -> GPIO35_FUN_WPU_R { - GPIO35_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio35_fun_ie(&self) -> GPIO35_FUN_IE_R { - GPIO35_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio35_fun_drv(&self) -> GPIO35_FUN_DRV_R { - GPIO35_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio35_mcu_sel(&self) -> GPIO35_MCU_SEL_R { - GPIO35_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio35_filter_en(&self) -> GPIO35_FILTER_EN_R { - GPIO35_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio35") - .field( - "gpio35_mcu_oe", - &format_args!("{}", self.gpio35_mcu_oe().bit()), - ) - .field( - "gpio35_slp_sel", - &format_args!("{}", self.gpio35_slp_sel().bit()), - ) - .field( - "gpio35_mcu_wpd", - &format_args!("{}", self.gpio35_mcu_wpd().bit()), - ) - .field( - "gpio35_mcu_wpu", - &format_args!("{}", self.gpio35_mcu_wpu().bit()), - ) - .field( - "gpio35_mcu_ie", - &format_args!("{}", self.gpio35_mcu_ie().bit()), - ) - .field( - "gpio35_mcu_drv", - &format_args!("{}", self.gpio35_mcu_drv().bits()), - ) - .field( - "gpio35_fun_wpd", - &format_args!("{}", self.gpio35_fun_wpd().bit()), - ) - .field( - "gpio35_fun_wpu", - &format_args!("{}", self.gpio35_fun_wpu().bit()), - ) - .field( - "gpio35_fun_ie", - &format_args!("{}", self.gpio35_fun_ie().bit()), - ) - .field( - "gpio35_fun_drv", - &format_args!("{}", self.gpio35_fun_drv().bits()), - ) - .field( - "gpio35_mcu_sel", - &format_args!("{}", self.gpio35_mcu_sel().bits()), - ) - .field( - "gpio35_filter_en", - &format_args!("{}", self.gpio35_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio35_mcu_oe(&mut self) -> GPIO35_MCU_OE_W { - GPIO35_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio35_slp_sel(&mut self) -> GPIO35_SLP_SEL_W { - GPIO35_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio35_mcu_wpd(&mut self) -> GPIO35_MCU_WPD_W { - GPIO35_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio35_mcu_wpu(&mut self) -> GPIO35_MCU_WPU_W { - GPIO35_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio35_mcu_ie(&mut self) -> GPIO35_MCU_IE_W { - GPIO35_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio35_mcu_drv(&mut self) -> GPIO35_MCU_DRV_W { - GPIO35_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio35_fun_wpd(&mut self) -> GPIO35_FUN_WPD_W { - GPIO35_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio35_fun_wpu(&mut self) -> GPIO35_FUN_WPU_W { - GPIO35_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio35_fun_ie(&mut self) -> GPIO35_FUN_IE_W { - GPIO35_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio35_fun_drv(&mut self) -> GPIO35_FUN_DRV_W { - GPIO35_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio35_mcu_sel(&mut self) -> GPIO35_MCU_SEL_W { - GPIO35_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio35_filter_en(&mut self) -> GPIO35_FILTER_EN_W { - GPIO35_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio35\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio35::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio35::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO35_SPEC; -impl crate::RegisterSpec for GPIO35_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio35::R`](R) reader structure"] -impl crate::Readable for GPIO35_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio35::W`](W) writer structure"] -impl crate::Writable for GPIO35_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio35 to value 0x0800"] -impl crate::Resettable for GPIO35_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio36.rs b/esp32p4/src/io_mux/gpio36.rs deleted file mode 100644 index bd0d244371..0000000000 --- a/esp32p4/src/io_mux/gpio36.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio36` reader"] -pub type R = crate::R; -#[doc = "Register `gpio36` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO36_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO36_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO36_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO36_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO36_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO36_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO36_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO36_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO36_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO36_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO36_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO36_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO36_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO36_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO36_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO36_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO36_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO36_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO36_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO36_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO36_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO36_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO36_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO36_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO36_FUN_WPD` reader - pull-down enable"] -pub type GPIO36_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO36_FUN_WPD` writer - pull-down enable"] -pub type GPIO36_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO36_FUN_WPU` reader - pull-up enable"] -pub type GPIO36_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO36_FUN_WPU` writer - pull-up enable"] -pub type GPIO36_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO36_FUN_IE` reader - input enable"] -pub type GPIO36_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO36_FUN_IE` writer - input enable"] -pub type GPIO36_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO36_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO36_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO36_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO36_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO36_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO36_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO36_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO36_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO36_FILTER_EN` reader - input filter enable"] -pub type GPIO36_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO36_FILTER_EN` writer - input filter enable"] -pub type GPIO36_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio36_mcu_oe(&self) -> GPIO36_MCU_OE_R { - GPIO36_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio36_slp_sel(&self) -> GPIO36_SLP_SEL_R { - GPIO36_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio36_mcu_wpd(&self) -> GPIO36_MCU_WPD_R { - GPIO36_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio36_mcu_wpu(&self) -> GPIO36_MCU_WPU_R { - GPIO36_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio36_mcu_ie(&self) -> GPIO36_MCU_IE_R { - GPIO36_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio36_mcu_drv(&self) -> GPIO36_MCU_DRV_R { - GPIO36_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio36_fun_wpd(&self) -> GPIO36_FUN_WPD_R { - GPIO36_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio36_fun_wpu(&self) -> GPIO36_FUN_WPU_R { - GPIO36_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio36_fun_ie(&self) -> GPIO36_FUN_IE_R { - GPIO36_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio36_fun_drv(&self) -> GPIO36_FUN_DRV_R { - GPIO36_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio36_mcu_sel(&self) -> GPIO36_MCU_SEL_R { - GPIO36_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio36_filter_en(&self) -> GPIO36_FILTER_EN_R { - GPIO36_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio36") - .field( - "gpio36_mcu_oe", - &format_args!("{}", self.gpio36_mcu_oe().bit()), - ) - .field( - "gpio36_slp_sel", - &format_args!("{}", self.gpio36_slp_sel().bit()), - ) - .field( - "gpio36_mcu_wpd", - &format_args!("{}", self.gpio36_mcu_wpd().bit()), - ) - .field( - "gpio36_mcu_wpu", - &format_args!("{}", self.gpio36_mcu_wpu().bit()), - ) - .field( - "gpio36_mcu_ie", - &format_args!("{}", self.gpio36_mcu_ie().bit()), - ) - .field( - "gpio36_mcu_drv", - &format_args!("{}", self.gpio36_mcu_drv().bits()), - ) - .field( - "gpio36_fun_wpd", - &format_args!("{}", self.gpio36_fun_wpd().bit()), - ) - .field( - "gpio36_fun_wpu", - &format_args!("{}", self.gpio36_fun_wpu().bit()), - ) - .field( - "gpio36_fun_ie", - &format_args!("{}", self.gpio36_fun_ie().bit()), - ) - .field( - "gpio36_fun_drv", - &format_args!("{}", self.gpio36_fun_drv().bits()), - ) - .field( - "gpio36_mcu_sel", - &format_args!("{}", self.gpio36_mcu_sel().bits()), - ) - .field( - "gpio36_filter_en", - &format_args!("{}", self.gpio36_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio36_mcu_oe(&mut self) -> GPIO36_MCU_OE_W { - GPIO36_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio36_slp_sel(&mut self) -> GPIO36_SLP_SEL_W { - GPIO36_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio36_mcu_wpd(&mut self) -> GPIO36_MCU_WPD_W { - GPIO36_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio36_mcu_wpu(&mut self) -> GPIO36_MCU_WPU_W { - GPIO36_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio36_mcu_ie(&mut self) -> GPIO36_MCU_IE_W { - GPIO36_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio36_mcu_drv(&mut self) -> GPIO36_MCU_DRV_W { - GPIO36_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio36_fun_wpd(&mut self) -> GPIO36_FUN_WPD_W { - GPIO36_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio36_fun_wpu(&mut self) -> GPIO36_FUN_WPU_W { - GPIO36_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio36_fun_ie(&mut self) -> GPIO36_FUN_IE_W { - GPIO36_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio36_fun_drv(&mut self) -> GPIO36_FUN_DRV_W { - GPIO36_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio36_mcu_sel(&mut self) -> GPIO36_MCU_SEL_W { - GPIO36_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio36_filter_en(&mut self) -> GPIO36_FILTER_EN_W { - GPIO36_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio36\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio36::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio36::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO36_SPEC; -impl crate::RegisterSpec for GPIO36_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio36::R`](R) reader structure"] -impl crate::Readable for GPIO36_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio36::W`](W) writer structure"] -impl crate::Writable for GPIO36_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio36 to value 0x0800"] -impl crate::Resettable for GPIO36_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio37.rs b/esp32p4/src/io_mux/gpio37.rs deleted file mode 100644 index 7e43d979c4..0000000000 --- a/esp32p4/src/io_mux/gpio37.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio37` reader"] -pub type R = crate::R; -#[doc = "Register `gpio37` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO37_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO37_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO37_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO37_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO37_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO37_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO37_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO37_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO37_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO37_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO37_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO37_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO37_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO37_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO37_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO37_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO37_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO37_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO37_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO37_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO37_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO37_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO37_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO37_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO37_FUN_WPD` reader - pull-down enable"] -pub type GPIO37_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO37_FUN_WPD` writer - pull-down enable"] -pub type GPIO37_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO37_FUN_WPU` reader - pull-up enable"] -pub type GPIO37_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO37_FUN_WPU` writer - pull-up enable"] -pub type GPIO37_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO37_FUN_IE` reader - input enable"] -pub type GPIO37_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO37_FUN_IE` writer - input enable"] -pub type GPIO37_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO37_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO37_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO37_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO37_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO37_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO37_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO37_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO37_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO37_FILTER_EN` reader - input filter enable"] -pub type GPIO37_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO37_FILTER_EN` writer - input filter enable"] -pub type GPIO37_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio37_mcu_oe(&self) -> GPIO37_MCU_OE_R { - GPIO37_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio37_slp_sel(&self) -> GPIO37_SLP_SEL_R { - GPIO37_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio37_mcu_wpd(&self) -> GPIO37_MCU_WPD_R { - GPIO37_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio37_mcu_wpu(&self) -> GPIO37_MCU_WPU_R { - GPIO37_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio37_mcu_ie(&self) -> GPIO37_MCU_IE_R { - GPIO37_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio37_mcu_drv(&self) -> GPIO37_MCU_DRV_R { - GPIO37_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio37_fun_wpd(&self) -> GPIO37_FUN_WPD_R { - GPIO37_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio37_fun_wpu(&self) -> GPIO37_FUN_WPU_R { - GPIO37_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio37_fun_ie(&self) -> GPIO37_FUN_IE_R { - GPIO37_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio37_fun_drv(&self) -> GPIO37_FUN_DRV_R { - GPIO37_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio37_mcu_sel(&self) -> GPIO37_MCU_SEL_R { - GPIO37_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio37_filter_en(&self) -> GPIO37_FILTER_EN_R { - GPIO37_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio37") - .field( - "gpio37_mcu_oe", - &format_args!("{}", self.gpio37_mcu_oe().bit()), - ) - .field( - "gpio37_slp_sel", - &format_args!("{}", self.gpio37_slp_sel().bit()), - ) - .field( - "gpio37_mcu_wpd", - &format_args!("{}", self.gpio37_mcu_wpd().bit()), - ) - .field( - "gpio37_mcu_wpu", - &format_args!("{}", self.gpio37_mcu_wpu().bit()), - ) - .field( - "gpio37_mcu_ie", - &format_args!("{}", self.gpio37_mcu_ie().bit()), - ) - .field( - "gpio37_mcu_drv", - &format_args!("{}", self.gpio37_mcu_drv().bits()), - ) - .field( - "gpio37_fun_wpd", - &format_args!("{}", self.gpio37_fun_wpd().bit()), - ) - .field( - "gpio37_fun_wpu", - &format_args!("{}", self.gpio37_fun_wpu().bit()), - ) - .field( - "gpio37_fun_ie", - &format_args!("{}", self.gpio37_fun_ie().bit()), - ) - .field( - "gpio37_fun_drv", - &format_args!("{}", self.gpio37_fun_drv().bits()), - ) - .field( - "gpio37_mcu_sel", - &format_args!("{}", self.gpio37_mcu_sel().bits()), - ) - .field( - "gpio37_filter_en", - &format_args!("{}", self.gpio37_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio37_mcu_oe(&mut self) -> GPIO37_MCU_OE_W { - GPIO37_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio37_slp_sel(&mut self) -> GPIO37_SLP_SEL_W { - GPIO37_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio37_mcu_wpd(&mut self) -> GPIO37_MCU_WPD_W { - GPIO37_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio37_mcu_wpu(&mut self) -> GPIO37_MCU_WPU_W { - GPIO37_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio37_mcu_ie(&mut self) -> GPIO37_MCU_IE_W { - GPIO37_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio37_mcu_drv(&mut self) -> GPIO37_MCU_DRV_W { - GPIO37_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio37_fun_wpd(&mut self) -> GPIO37_FUN_WPD_W { - GPIO37_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio37_fun_wpu(&mut self) -> GPIO37_FUN_WPU_W { - GPIO37_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio37_fun_ie(&mut self) -> GPIO37_FUN_IE_W { - GPIO37_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio37_fun_drv(&mut self) -> GPIO37_FUN_DRV_W { - GPIO37_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio37_mcu_sel(&mut self) -> GPIO37_MCU_SEL_W { - GPIO37_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio37_filter_en(&mut self) -> GPIO37_FILTER_EN_W { - GPIO37_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio37\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio37::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio37::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO37_SPEC; -impl crate::RegisterSpec for GPIO37_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio37::R`](R) reader structure"] -impl crate::Readable for GPIO37_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio37::W`](W) writer structure"] -impl crate::Writable for GPIO37_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio37 to value 0x0800"] -impl crate::Resettable for GPIO37_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio38.rs b/esp32p4/src/io_mux/gpio38.rs deleted file mode 100644 index 837dcfc208..0000000000 --- a/esp32p4/src/io_mux/gpio38.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio38` reader"] -pub type R = crate::R; -#[doc = "Register `gpio38` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO38_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO38_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO38_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO38_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO38_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO38_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO38_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO38_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO38_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO38_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO38_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO38_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO38_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO38_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO38_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO38_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO38_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO38_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO38_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO38_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO38_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO38_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO38_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO38_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO38_FUN_WPD` reader - pull-down enable"] -pub type GPIO38_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO38_FUN_WPD` writer - pull-down enable"] -pub type GPIO38_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO38_FUN_WPU` reader - pull-up enable"] -pub type GPIO38_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO38_FUN_WPU` writer - pull-up enable"] -pub type GPIO38_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO38_FUN_IE` reader - input enable"] -pub type GPIO38_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO38_FUN_IE` writer - input enable"] -pub type GPIO38_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO38_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO38_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO38_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO38_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO38_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO38_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO38_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO38_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO38_FILTER_EN` reader - input filter enable"] -pub type GPIO38_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO38_FILTER_EN` writer - input filter enable"] -pub type GPIO38_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio38_mcu_oe(&self) -> GPIO38_MCU_OE_R { - GPIO38_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio38_slp_sel(&self) -> GPIO38_SLP_SEL_R { - GPIO38_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio38_mcu_wpd(&self) -> GPIO38_MCU_WPD_R { - GPIO38_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio38_mcu_wpu(&self) -> GPIO38_MCU_WPU_R { - GPIO38_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio38_mcu_ie(&self) -> GPIO38_MCU_IE_R { - GPIO38_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio38_mcu_drv(&self) -> GPIO38_MCU_DRV_R { - GPIO38_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio38_fun_wpd(&self) -> GPIO38_FUN_WPD_R { - GPIO38_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio38_fun_wpu(&self) -> GPIO38_FUN_WPU_R { - GPIO38_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio38_fun_ie(&self) -> GPIO38_FUN_IE_R { - GPIO38_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio38_fun_drv(&self) -> GPIO38_FUN_DRV_R { - GPIO38_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio38_mcu_sel(&self) -> GPIO38_MCU_SEL_R { - GPIO38_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio38_filter_en(&self) -> GPIO38_FILTER_EN_R { - GPIO38_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio38") - .field( - "gpio38_mcu_oe", - &format_args!("{}", self.gpio38_mcu_oe().bit()), - ) - .field( - "gpio38_slp_sel", - &format_args!("{}", self.gpio38_slp_sel().bit()), - ) - .field( - "gpio38_mcu_wpd", - &format_args!("{}", self.gpio38_mcu_wpd().bit()), - ) - .field( - "gpio38_mcu_wpu", - &format_args!("{}", self.gpio38_mcu_wpu().bit()), - ) - .field( - "gpio38_mcu_ie", - &format_args!("{}", self.gpio38_mcu_ie().bit()), - ) - .field( - "gpio38_mcu_drv", - &format_args!("{}", self.gpio38_mcu_drv().bits()), - ) - .field( - "gpio38_fun_wpd", - &format_args!("{}", self.gpio38_fun_wpd().bit()), - ) - .field( - "gpio38_fun_wpu", - &format_args!("{}", self.gpio38_fun_wpu().bit()), - ) - .field( - "gpio38_fun_ie", - &format_args!("{}", self.gpio38_fun_ie().bit()), - ) - .field( - "gpio38_fun_drv", - &format_args!("{}", self.gpio38_fun_drv().bits()), - ) - .field( - "gpio38_mcu_sel", - &format_args!("{}", self.gpio38_mcu_sel().bits()), - ) - .field( - "gpio38_filter_en", - &format_args!("{}", self.gpio38_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio38_mcu_oe(&mut self) -> GPIO38_MCU_OE_W { - GPIO38_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio38_slp_sel(&mut self) -> GPIO38_SLP_SEL_W { - GPIO38_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio38_mcu_wpd(&mut self) -> GPIO38_MCU_WPD_W { - GPIO38_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio38_mcu_wpu(&mut self) -> GPIO38_MCU_WPU_W { - GPIO38_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio38_mcu_ie(&mut self) -> GPIO38_MCU_IE_W { - GPIO38_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio38_mcu_drv(&mut self) -> GPIO38_MCU_DRV_W { - GPIO38_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio38_fun_wpd(&mut self) -> GPIO38_FUN_WPD_W { - GPIO38_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio38_fun_wpu(&mut self) -> GPIO38_FUN_WPU_W { - GPIO38_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio38_fun_ie(&mut self) -> GPIO38_FUN_IE_W { - GPIO38_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio38_fun_drv(&mut self) -> GPIO38_FUN_DRV_W { - GPIO38_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio38_mcu_sel(&mut self) -> GPIO38_MCU_SEL_W { - GPIO38_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio38_filter_en(&mut self) -> GPIO38_FILTER_EN_W { - GPIO38_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio38\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio38::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio38::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO38_SPEC; -impl crate::RegisterSpec for GPIO38_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio38::R`](R) reader structure"] -impl crate::Readable for GPIO38_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio38::W`](W) writer structure"] -impl crate::Writable for GPIO38_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio38 to value 0x0800"] -impl crate::Resettable for GPIO38_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio39.rs b/esp32p4/src/io_mux/gpio39.rs deleted file mode 100644 index 9c481b4dc9..0000000000 --- a/esp32p4/src/io_mux/gpio39.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio39` reader"] -pub type R = crate::R; -#[doc = "Register `gpio39` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO39_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO39_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO39_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO39_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO39_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO39_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO39_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO39_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO39_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO39_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO39_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO39_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO39_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO39_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO39_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO39_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO39_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO39_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO39_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO39_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO39_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO39_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO39_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO39_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO39_FUN_WPD` reader - pull-down enable"] -pub type GPIO39_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO39_FUN_WPD` writer - pull-down enable"] -pub type GPIO39_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO39_FUN_WPU` reader - pull-up enable"] -pub type GPIO39_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO39_FUN_WPU` writer - pull-up enable"] -pub type GPIO39_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO39_FUN_IE` reader - input enable"] -pub type GPIO39_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO39_FUN_IE` writer - input enable"] -pub type GPIO39_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO39_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO39_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO39_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO39_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO39_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO39_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO39_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO39_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO39_FILTER_EN` reader - input filter enable"] -pub type GPIO39_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO39_FILTER_EN` writer - input filter enable"] -pub type GPIO39_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio39_mcu_oe(&self) -> GPIO39_MCU_OE_R { - GPIO39_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio39_slp_sel(&self) -> GPIO39_SLP_SEL_R { - GPIO39_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio39_mcu_wpd(&self) -> GPIO39_MCU_WPD_R { - GPIO39_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio39_mcu_wpu(&self) -> GPIO39_MCU_WPU_R { - GPIO39_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio39_mcu_ie(&self) -> GPIO39_MCU_IE_R { - GPIO39_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio39_mcu_drv(&self) -> GPIO39_MCU_DRV_R { - GPIO39_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio39_fun_wpd(&self) -> GPIO39_FUN_WPD_R { - GPIO39_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio39_fun_wpu(&self) -> GPIO39_FUN_WPU_R { - GPIO39_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio39_fun_ie(&self) -> GPIO39_FUN_IE_R { - GPIO39_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio39_fun_drv(&self) -> GPIO39_FUN_DRV_R { - GPIO39_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio39_mcu_sel(&self) -> GPIO39_MCU_SEL_R { - GPIO39_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio39_filter_en(&self) -> GPIO39_FILTER_EN_R { - GPIO39_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio39") - .field( - "gpio39_mcu_oe", - &format_args!("{}", self.gpio39_mcu_oe().bit()), - ) - .field( - "gpio39_slp_sel", - &format_args!("{}", self.gpio39_slp_sel().bit()), - ) - .field( - "gpio39_mcu_wpd", - &format_args!("{}", self.gpio39_mcu_wpd().bit()), - ) - .field( - "gpio39_mcu_wpu", - &format_args!("{}", self.gpio39_mcu_wpu().bit()), - ) - .field( - "gpio39_mcu_ie", - &format_args!("{}", self.gpio39_mcu_ie().bit()), - ) - .field( - "gpio39_mcu_drv", - &format_args!("{}", self.gpio39_mcu_drv().bits()), - ) - .field( - "gpio39_fun_wpd", - &format_args!("{}", self.gpio39_fun_wpd().bit()), - ) - .field( - "gpio39_fun_wpu", - &format_args!("{}", self.gpio39_fun_wpu().bit()), - ) - .field( - "gpio39_fun_ie", - &format_args!("{}", self.gpio39_fun_ie().bit()), - ) - .field( - "gpio39_fun_drv", - &format_args!("{}", self.gpio39_fun_drv().bits()), - ) - .field( - "gpio39_mcu_sel", - &format_args!("{}", self.gpio39_mcu_sel().bits()), - ) - .field( - "gpio39_filter_en", - &format_args!("{}", self.gpio39_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio39_mcu_oe(&mut self) -> GPIO39_MCU_OE_W { - GPIO39_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio39_slp_sel(&mut self) -> GPIO39_SLP_SEL_W { - GPIO39_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio39_mcu_wpd(&mut self) -> GPIO39_MCU_WPD_W { - GPIO39_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio39_mcu_wpu(&mut self) -> GPIO39_MCU_WPU_W { - GPIO39_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio39_mcu_ie(&mut self) -> GPIO39_MCU_IE_W { - GPIO39_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio39_mcu_drv(&mut self) -> GPIO39_MCU_DRV_W { - GPIO39_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio39_fun_wpd(&mut self) -> GPIO39_FUN_WPD_W { - GPIO39_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio39_fun_wpu(&mut self) -> GPIO39_FUN_WPU_W { - GPIO39_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio39_fun_ie(&mut self) -> GPIO39_FUN_IE_W { - GPIO39_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio39_fun_drv(&mut self) -> GPIO39_FUN_DRV_W { - GPIO39_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio39_mcu_sel(&mut self) -> GPIO39_MCU_SEL_W { - GPIO39_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio39_filter_en(&mut self) -> GPIO39_FILTER_EN_W { - GPIO39_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio39\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio39::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio39::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO39_SPEC; -impl crate::RegisterSpec for GPIO39_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio39::R`](R) reader structure"] -impl crate::Readable for GPIO39_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio39::W`](W) writer structure"] -impl crate::Writable for GPIO39_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio39 to value 0x0800"] -impl crate::Resettable for GPIO39_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio4.rs b/esp32p4/src/io_mux/gpio4.rs deleted file mode 100644 index 91b28eb1aa..0000000000 --- a/esp32p4/src/io_mux/gpio4.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio4` reader"] -pub type R = crate::R; -#[doc = "Register `gpio4` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO4_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO4_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO4_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO4_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO4_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO4_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO4_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO4_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO4_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO4_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO4_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO4_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO4_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO4_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO4_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO4_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO4_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO4_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO4_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO4_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO4_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO4_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO4_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO4_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO4_FUN_WPD` reader - pull-down enable"] -pub type GPIO4_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO4_FUN_WPD` writer - pull-down enable"] -pub type GPIO4_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO4_FUN_WPU` reader - pull-up enable"] -pub type GPIO4_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO4_FUN_WPU` writer - pull-up enable"] -pub type GPIO4_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO4_FUN_IE` reader - input enable"] -pub type GPIO4_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO4_FUN_IE` writer - input enable"] -pub type GPIO4_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO4_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO4_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO4_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO4_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO4_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO4_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO4_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO4_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO4_FILTER_EN` reader - input filter enable"] -pub type GPIO4_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO4_FILTER_EN` writer - input filter enable"] -pub type GPIO4_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio4_mcu_oe(&self) -> GPIO4_MCU_OE_R { - GPIO4_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio4_slp_sel(&self) -> GPIO4_SLP_SEL_R { - GPIO4_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio4_mcu_wpd(&self) -> GPIO4_MCU_WPD_R { - GPIO4_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio4_mcu_wpu(&self) -> GPIO4_MCU_WPU_R { - GPIO4_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio4_mcu_ie(&self) -> GPIO4_MCU_IE_R { - GPIO4_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio4_mcu_drv(&self) -> GPIO4_MCU_DRV_R { - GPIO4_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio4_fun_wpd(&self) -> GPIO4_FUN_WPD_R { - GPIO4_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio4_fun_wpu(&self) -> GPIO4_FUN_WPU_R { - GPIO4_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio4_fun_ie(&self) -> GPIO4_FUN_IE_R { - GPIO4_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio4_fun_drv(&self) -> GPIO4_FUN_DRV_R { - GPIO4_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio4_mcu_sel(&self) -> GPIO4_MCU_SEL_R { - GPIO4_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio4_filter_en(&self) -> GPIO4_FILTER_EN_R { - GPIO4_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio4") - .field( - "gpio4_mcu_oe", - &format_args!("{}", self.gpio4_mcu_oe().bit()), - ) - .field( - "gpio4_slp_sel", - &format_args!("{}", self.gpio4_slp_sel().bit()), - ) - .field( - "gpio4_mcu_wpd", - &format_args!("{}", self.gpio4_mcu_wpd().bit()), - ) - .field( - "gpio4_mcu_wpu", - &format_args!("{}", self.gpio4_mcu_wpu().bit()), - ) - .field( - "gpio4_mcu_ie", - &format_args!("{}", self.gpio4_mcu_ie().bit()), - ) - .field( - "gpio4_mcu_drv", - &format_args!("{}", self.gpio4_mcu_drv().bits()), - ) - .field( - "gpio4_fun_wpd", - &format_args!("{}", self.gpio4_fun_wpd().bit()), - ) - .field( - "gpio4_fun_wpu", - &format_args!("{}", self.gpio4_fun_wpu().bit()), - ) - .field( - "gpio4_fun_ie", - &format_args!("{}", self.gpio4_fun_ie().bit()), - ) - .field( - "gpio4_fun_drv", - &format_args!("{}", self.gpio4_fun_drv().bits()), - ) - .field( - "gpio4_mcu_sel", - &format_args!("{}", self.gpio4_mcu_sel().bits()), - ) - .field( - "gpio4_filter_en", - &format_args!("{}", self.gpio4_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio4_mcu_oe(&mut self) -> GPIO4_MCU_OE_W { - GPIO4_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio4_slp_sel(&mut self) -> GPIO4_SLP_SEL_W { - GPIO4_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio4_mcu_wpd(&mut self) -> GPIO4_MCU_WPD_W { - GPIO4_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio4_mcu_wpu(&mut self) -> GPIO4_MCU_WPU_W { - GPIO4_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio4_mcu_ie(&mut self) -> GPIO4_MCU_IE_W { - GPIO4_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio4_mcu_drv(&mut self) -> GPIO4_MCU_DRV_W { - GPIO4_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio4_fun_wpd(&mut self) -> GPIO4_FUN_WPD_W { - GPIO4_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio4_fun_wpu(&mut self) -> GPIO4_FUN_WPU_W { - GPIO4_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio4_fun_ie(&mut self) -> GPIO4_FUN_IE_W { - GPIO4_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio4_fun_drv(&mut self) -> GPIO4_FUN_DRV_W { - GPIO4_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio4_mcu_sel(&mut self) -> GPIO4_MCU_SEL_W { - GPIO4_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio4_filter_en(&mut self) -> GPIO4_FILTER_EN_W { - GPIO4_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO4_SPEC; -impl crate::RegisterSpec for GPIO4_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio4::R`](R) reader structure"] -impl crate::Readable for GPIO4_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio4::W`](W) writer structure"] -impl crate::Writable for GPIO4_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio4 to value 0x0800"] -impl crate::Resettable for GPIO4_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio40.rs b/esp32p4/src/io_mux/gpio40.rs deleted file mode 100644 index f0e4fb11f9..0000000000 --- a/esp32p4/src/io_mux/gpio40.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio40` reader"] -pub type R = crate::R; -#[doc = "Register `gpio40` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO40_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO40_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO40_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO40_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO40_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO40_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO40_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO40_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO40_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO40_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO40_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO40_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO40_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO40_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO40_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO40_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO40_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO40_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO40_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO40_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO40_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO40_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO40_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO40_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO40_FUN_WPD` reader - pull-down enable"] -pub type GPIO40_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO40_FUN_WPD` writer - pull-down enable"] -pub type GPIO40_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO40_FUN_WPU` reader - pull-up enable"] -pub type GPIO40_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO40_FUN_WPU` writer - pull-up enable"] -pub type GPIO40_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO40_FUN_IE` reader - input enable"] -pub type GPIO40_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO40_FUN_IE` writer - input enable"] -pub type GPIO40_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO40_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO40_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO40_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO40_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO40_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO40_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO40_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO40_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO40_FILTER_EN` reader - input filter enable"] -pub type GPIO40_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO40_FILTER_EN` writer - input filter enable"] -pub type GPIO40_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio40_mcu_oe(&self) -> GPIO40_MCU_OE_R { - GPIO40_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio40_slp_sel(&self) -> GPIO40_SLP_SEL_R { - GPIO40_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio40_mcu_wpd(&self) -> GPIO40_MCU_WPD_R { - GPIO40_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio40_mcu_wpu(&self) -> GPIO40_MCU_WPU_R { - GPIO40_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio40_mcu_ie(&self) -> GPIO40_MCU_IE_R { - GPIO40_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio40_mcu_drv(&self) -> GPIO40_MCU_DRV_R { - GPIO40_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio40_fun_wpd(&self) -> GPIO40_FUN_WPD_R { - GPIO40_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio40_fun_wpu(&self) -> GPIO40_FUN_WPU_R { - GPIO40_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio40_fun_ie(&self) -> GPIO40_FUN_IE_R { - GPIO40_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio40_fun_drv(&self) -> GPIO40_FUN_DRV_R { - GPIO40_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio40_mcu_sel(&self) -> GPIO40_MCU_SEL_R { - GPIO40_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio40_filter_en(&self) -> GPIO40_FILTER_EN_R { - GPIO40_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio40") - .field( - "gpio40_mcu_oe", - &format_args!("{}", self.gpio40_mcu_oe().bit()), - ) - .field( - "gpio40_slp_sel", - &format_args!("{}", self.gpio40_slp_sel().bit()), - ) - .field( - "gpio40_mcu_wpd", - &format_args!("{}", self.gpio40_mcu_wpd().bit()), - ) - .field( - "gpio40_mcu_wpu", - &format_args!("{}", self.gpio40_mcu_wpu().bit()), - ) - .field( - "gpio40_mcu_ie", - &format_args!("{}", self.gpio40_mcu_ie().bit()), - ) - .field( - "gpio40_mcu_drv", - &format_args!("{}", self.gpio40_mcu_drv().bits()), - ) - .field( - "gpio40_fun_wpd", - &format_args!("{}", self.gpio40_fun_wpd().bit()), - ) - .field( - "gpio40_fun_wpu", - &format_args!("{}", self.gpio40_fun_wpu().bit()), - ) - .field( - "gpio40_fun_ie", - &format_args!("{}", self.gpio40_fun_ie().bit()), - ) - .field( - "gpio40_fun_drv", - &format_args!("{}", self.gpio40_fun_drv().bits()), - ) - .field( - "gpio40_mcu_sel", - &format_args!("{}", self.gpio40_mcu_sel().bits()), - ) - .field( - "gpio40_filter_en", - &format_args!("{}", self.gpio40_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio40_mcu_oe(&mut self) -> GPIO40_MCU_OE_W { - GPIO40_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio40_slp_sel(&mut self) -> GPIO40_SLP_SEL_W { - GPIO40_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio40_mcu_wpd(&mut self) -> GPIO40_MCU_WPD_W { - GPIO40_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio40_mcu_wpu(&mut self) -> GPIO40_MCU_WPU_W { - GPIO40_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio40_mcu_ie(&mut self) -> GPIO40_MCU_IE_W { - GPIO40_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio40_mcu_drv(&mut self) -> GPIO40_MCU_DRV_W { - GPIO40_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio40_fun_wpd(&mut self) -> GPIO40_FUN_WPD_W { - GPIO40_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio40_fun_wpu(&mut self) -> GPIO40_FUN_WPU_W { - GPIO40_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio40_fun_ie(&mut self) -> GPIO40_FUN_IE_W { - GPIO40_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio40_fun_drv(&mut self) -> GPIO40_FUN_DRV_W { - GPIO40_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio40_mcu_sel(&mut self) -> GPIO40_MCU_SEL_W { - GPIO40_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio40_filter_en(&mut self) -> GPIO40_FILTER_EN_W { - GPIO40_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio40\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio40::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio40::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO40_SPEC; -impl crate::RegisterSpec for GPIO40_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio40::R`](R) reader structure"] -impl crate::Readable for GPIO40_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio40::W`](W) writer structure"] -impl crate::Writable for GPIO40_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio40 to value 0x0800"] -impl crate::Resettable for GPIO40_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio41.rs b/esp32p4/src/io_mux/gpio41.rs deleted file mode 100644 index d6fda54684..0000000000 --- a/esp32p4/src/io_mux/gpio41.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio41` reader"] -pub type R = crate::R; -#[doc = "Register `gpio41` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO41_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO41_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO41_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO41_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO41_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO41_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO41_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO41_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO41_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO41_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO41_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO41_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO41_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO41_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO41_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO41_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO41_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO41_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO41_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO41_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO41_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO41_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO41_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO41_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO41_FUN_WPD` reader - pull-down enable"] -pub type GPIO41_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO41_FUN_WPD` writer - pull-down enable"] -pub type GPIO41_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO41_FUN_WPU` reader - pull-up enable"] -pub type GPIO41_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO41_FUN_WPU` writer - pull-up enable"] -pub type GPIO41_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO41_FUN_IE` reader - input enable"] -pub type GPIO41_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO41_FUN_IE` writer - input enable"] -pub type GPIO41_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO41_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO41_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO41_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO41_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO41_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO41_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO41_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO41_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO41_FILTER_EN` reader - input filter enable"] -pub type GPIO41_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO41_FILTER_EN` writer - input filter enable"] -pub type GPIO41_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio41_mcu_oe(&self) -> GPIO41_MCU_OE_R { - GPIO41_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio41_slp_sel(&self) -> GPIO41_SLP_SEL_R { - GPIO41_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio41_mcu_wpd(&self) -> GPIO41_MCU_WPD_R { - GPIO41_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio41_mcu_wpu(&self) -> GPIO41_MCU_WPU_R { - GPIO41_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio41_mcu_ie(&self) -> GPIO41_MCU_IE_R { - GPIO41_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio41_mcu_drv(&self) -> GPIO41_MCU_DRV_R { - GPIO41_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio41_fun_wpd(&self) -> GPIO41_FUN_WPD_R { - GPIO41_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio41_fun_wpu(&self) -> GPIO41_FUN_WPU_R { - GPIO41_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio41_fun_ie(&self) -> GPIO41_FUN_IE_R { - GPIO41_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio41_fun_drv(&self) -> GPIO41_FUN_DRV_R { - GPIO41_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio41_mcu_sel(&self) -> GPIO41_MCU_SEL_R { - GPIO41_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio41_filter_en(&self) -> GPIO41_FILTER_EN_R { - GPIO41_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio41") - .field( - "gpio41_mcu_oe", - &format_args!("{}", self.gpio41_mcu_oe().bit()), - ) - .field( - "gpio41_slp_sel", - &format_args!("{}", self.gpio41_slp_sel().bit()), - ) - .field( - "gpio41_mcu_wpd", - &format_args!("{}", self.gpio41_mcu_wpd().bit()), - ) - .field( - "gpio41_mcu_wpu", - &format_args!("{}", self.gpio41_mcu_wpu().bit()), - ) - .field( - "gpio41_mcu_ie", - &format_args!("{}", self.gpio41_mcu_ie().bit()), - ) - .field( - "gpio41_mcu_drv", - &format_args!("{}", self.gpio41_mcu_drv().bits()), - ) - .field( - "gpio41_fun_wpd", - &format_args!("{}", self.gpio41_fun_wpd().bit()), - ) - .field( - "gpio41_fun_wpu", - &format_args!("{}", self.gpio41_fun_wpu().bit()), - ) - .field( - "gpio41_fun_ie", - &format_args!("{}", self.gpio41_fun_ie().bit()), - ) - .field( - "gpio41_fun_drv", - &format_args!("{}", self.gpio41_fun_drv().bits()), - ) - .field( - "gpio41_mcu_sel", - &format_args!("{}", self.gpio41_mcu_sel().bits()), - ) - .field( - "gpio41_filter_en", - &format_args!("{}", self.gpio41_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio41_mcu_oe(&mut self) -> GPIO41_MCU_OE_W { - GPIO41_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio41_slp_sel(&mut self) -> GPIO41_SLP_SEL_W { - GPIO41_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio41_mcu_wpd(&mut self) -> GPIO41_MCU_WPD_W { - GPIO41_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio41_mcu_wpu(&mut self) -> GPIO41_MCU_WPU_W { - GPIO41_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio41_mcu_ie(&mut self) -> GPIO41_MCU_IE_W { - GPIO41_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio41_mcu_drv(&mut self) -> GPIO41_MCU_DRV_W { - GPIO41_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio41_fun_wpd(&mut self) -> GPIO41_FUN_WPD_W { - GPIO41_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio41_fun_wpu(&mut self) -> GPIO41_FUN_WPU_W { - GPIO41_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio41_fun_ie(&mut self) -> GPIO41_FUN_IE_W { - GPIO41_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio41_fun_drv(&mut self) -> GPIO41_FUN_DRV_W { - GPIO41_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio41_mcu_sel(&mut self) -> GPIO41_MCU_SEL_W { - GPIO41_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio41_filter_en(&mut self) -> GPIO41_FILTER_EN_W { - GPIO41_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio41\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio41::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio41::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO41_SPEC; -impl crate::RegisterSpec for GPIO41_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio41::R`](R) reader structure"] -impl crate::Readable for GPIO41_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio41::W`](W) writer structure"] -impl crate::Writable for GPIO41_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio41 to value 0x0800"] -impl crate::Resettable for GPIO41_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio42.rs b/esp32p4/src/io_mux/gpio42.rs deleted file mode 100644 index 1a5d1d7a52..0000000000 --- a/esp32p4/src/io_mux/gpio42.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio42` reader"] -pub type R = crate::R; -#[doc = "Register `gpio42` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO42_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO42_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO42_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO42_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO42_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO42_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO42_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO42_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO42_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO42_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO42_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO42_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO42_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO42_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO42_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO42_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO42_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO42_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO42_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO42_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO42_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO42_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO42_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO42_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO42_FUN_WPD` reader - pull-down enable"] -pub type GPIO42_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO42_FUN_WPD` writer - pull-down enable"] -pub type GPIO42_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO42_FUN_WPU` reader - pull-up enable"] -pub type GPIO42_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO42_FUN_WPU` writer - pull-up enable"] -pub type GPIO42_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO42_FUN_IE` reader - input enable"] -pub type GPIO42_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO42_FUN_IE` writer - input enable"] -pub type GPIO42_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO42_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO42_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO42_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO42_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO42_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO42_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO42_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO42_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO42_FILTER_EN` reader - input filter enable"] -pub type GPIO42_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO42_FILTER_EN` writer - input filter enable"] -pub type GPIO42_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio42_mcu_oe(&self) -> GPIO42_MCU_OE_R { - GPIO42_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio42_slp_sel(&self) -> GPIO42_SLP_SEL_R { - GPIO42_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio42_mcu_wpd(&self) -> GPIO42_MCU_WPD_R { - GPIO42_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio42_mcu_wpu(&self) -> GPIO42_MCU_WPU_R { - GPIO42_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio42_mcu_ie(&self) -> GPIO42_MCU_IE_R { - GPIO42_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio42_mcu_drv(&self) -> GPIO42_MCU_DRV_R { - GPIO42_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio42_fun_wpd(&self) -> GPIO42_FUN_WPD_R { - GPIO42_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio42_fun_wpu(&self) -> GPIO42_FUN_WPU_R { - GPIO42_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio42_fun_ie(&self) -> GPIO42_FUN_IE_R { - GPIO42_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio42_fun_drv(&self) -> GPIO42_FUN_DRV_R { - GPIO42_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio42_mcu_sel(&self) -> GPIO42_MCU_SEL_R { - GPIO42_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio42_filter_en(&self) -> GPIO42_FILTER_EN_R { - GPIO42_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio42") - .field( - "gpio42_mcu_oe", - &format_args!("{}", self.gpio42_mcu_oe().bit()), - ) - .field( - "gpio42_slp_sel", - &format_args!("{}", self.gpio42_slp_sel().bit()), - ) - .field( - "gpio42_mcu_wpd", - &format_args!("{}", self.gpio42_mcu_wpd().bit()), - ) - .field( - "gpio42_mcu_wpu", - &format_args!("{}", self.gpio42_mcu_wpu().bit()), - ) - .field( - "gpio42_mcu_ie", - &format_args!("{}", self.gpio42_mcu_ie().bit()), - ) - .field( - "gpio42_mcu_drv", - &format_args!("{}", self.gpio42_mcu_drv().bits()), - ) - .field( - "gpio42_fun_wpd", - &format_args!("{}", self.gpio42_fun_wpd().bit()), - ) - .field( - "gpio42_fun_wpu", - &format_args!("{}", self.gpio42_fun_wpu().bit()), - ) - .field( - "gpio42_fun_ie", - &format_args!("{}", self.gpio42_fun_ie().bit()), - ) - .field( - "gpio42_fun_drv", - &format_args!("{}", self.gpio42_fun_drv().bits()), - ) - .field( - "gpio42_mcu_sel", - &format_args!("{}", self.gpio42_mcu_sel().bits()), - ) - .field( - "gpio42_filter_en", - &format_args!("{}", self.gpio42_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio42_mcu_oe(&mut self) -> GPIO42_MCU_OE_W { - GPIO42_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio42_slp_sel(&mut self) -> GPIO42_SLP_SEL_W { - GPIO42_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio42_mcu_wpd(&mut self) -> GPIO42_MCU_WPD_W { - GPIO42_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio42_mcu_wpu(&mut self) -> GPIO42_MCU_WPU_W { - GPIO42_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio42_mcu_ie(&mut self) -> GPIO42_MCU_IE_W { - GPIO42_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio42_mcu_drv(&mut self) -> GPIO42_MCU_DRV_W { - GPIO42_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio42_fun_wpd(&mut self) -> GPIO42_FUN_WPD_W { - GPIO42_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio42_fun_wpu(&mut self) -> GPIO42_FUN_WPU_W { - GPIO42_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio42_fun_ie(&mut self) -> GPIO42_FUN_IE_W { - GPIO42_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio42_fun_drv(&mut self) -> GPIO42_FUN_DRV_W { - GPIO42_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio42_mcu_sel(&mut self) -> GPIO42_MCU_SEL_W { - GPIO42_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio42_filter_en(&mut self) -> GPIO42_FILTER_EN_W { - GPIO42_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio42\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio42::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio42::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO42_SPEC; -impl crate::RegisterSpec for GPIO42_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio42::R`](R) reader structure"] -impl crate::Readable for GPIO42_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio42::W`](W) writer structure"] -impl crate::Writable for GPIO42_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio42 to value 0x0800"] -impl crate::Resettable for GPIO42_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio43.rs b/esp32p4/src/io_mux/gpio43.rs deleted file mode 100644 index 1ea2bad2ec..0000000000 --- a/esp32p4/src/io_mux/gpio43.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio43` reader"] -pub type R = crate::R; -#[doc = "Register `gpio43` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO43_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO43_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO43_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO43_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO43_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO43_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO43_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO43_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO43_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO43_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO43_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO43_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO43_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO43_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO43_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO43_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO43_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO43_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO43_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO43_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO43_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO43_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO43_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO43_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO43_FUN_WPD` reader - pull-down enable"] -pub type GPIO43_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO43_FUN_WPD` writer - pull-down enable"] -pub type GPIO43_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO43_FUN_WPU` reader - pull-up enable"] -pub type GPIO43_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO43_FUN_WPU` writer - pull-up enable"] -pub type GPIO43_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO43_FUN_IE` reader - input enable"] -pub type GPIO43_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO43_FUN_IE` writer - input enable"] -pub type GPIO43_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO43_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO43_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO43_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO43_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO43_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO43_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO43_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO43_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO43_FILTER_EN` reader - input filter enable"] -pub type GPIO43_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO43_FILTER_EN` writer - input filter enable"] -pub type GPIO43_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio43_mcu_oe(&self) -> GPIO43_MCU_OE_R { - GPIO43_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio43_slp_sel(&self) -> GPIO43_SLP_SEL_R { - GPIO43_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio43_mcu_wpd(&self) -> GPIO43_MCU_WPD_R { - GPIO43_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio43_mcu_wpu(&self) -> GPIO43_MCU_WPU_R { - GPIO43_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio43_mcu_ie(&self) -> GPIO43_MCU_IE_R { - GPIO43_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio43_mcu_drv(&self) -> GPIO43_MCU_DRV_R { - GPIO43_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio43_fun_wpd(&self) -> GPIO43_FUN_WPD_R { - GPIO43_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio43_fun_wpu(&self) -> GPIO43_FUN_WPU_R { - GPIO43_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio43_fun_ie(&self) -> GPIO43_FUN_IE_R { - GPIO43_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio43_fun_drv(&self) -> GPIO43_FUN_DRV_R { - GPIO43_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio43_mcu_sel(&self) -> GPIO43_MCU_SEL_R { - GPIO43_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio43_filter_en(&self) -> GPIO43_FILTER_EN_R { - GPIO43_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio43") - .field( - "gpio43_mcu_oe", - &format_args!("{}", self.gpio43_mcu_oe().bit()), - ) - .field( - "gpio43_slp_sel", - &format_args!("{}", self.gpio43_slp_sel().bit()), - ) - .field( - "gpio43_mcu_wpd", - &format_args!("{}", self.gpio43_mcu_wpd().bit()), - ) - .field( - "gpio43_mcu_wpu", - &format_args!("{}", self.gpio43_mcu_wpu().bit()), - ) - .field( - "gpio43_mcu_ie", - &format_args!("{}", self.gpio43_mcu_ie().bit()), - ) - .field( - "gpio43_mcu_drv", - &format_args!("{}", self.gpio43_mcu_drv().bits()), - ) - .field( - "gpio43_fun_wpd", - &format_args!("{}", self.gpio43_fun_wpd().bit()), - ) - .field( - "gpio43_fun_wpu", - &format_args!("{}", self.gpio43_fun_wpu().bit()), - ) - .field( - "gpio43_fun_ie", - &format_args!("{}", self.gpio43_fun_ie().bit()), - ) - .field( - "gpio43_fun_drv", - &format_args!("{}", self.gpio43_fun_drv().bits()), - ) - .field( - "gpio43_mcu_sel", - &format_args!("{}", self.gpio43_mcu_sel().bits()), - ) - .field( - "gpio43_filter_en", - &format_args!("{}", self.gpio43_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio43_mcu_oe(&mut self) -> GPIO43_MCU_OE_W { - GPIO43_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio43_slp_sel(&mut self) -> GPIO43_SLP_SEL_W { - GPIO43_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio43_mcu_wpd(&mut self) -> GPIO43_MCU_WPD_W { - GPIO43_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio43_mcu_wpu(&mut self) -> GPIO43_MCU_WPU_W { - GPIO43_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio43_mcu_ie(&mut self) -> GPIO43_MCU_IE_W { - GPIO43_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio43_mcu_drv(&mut self) -> GPIO43_MCU_DRV_W { - GPIO43_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio43_fun_wpd(&mut self) -> GPIO43_FUN_WPD_W { - GPIO43_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio43_fun_wpu(&mut self) -> GPIO43_FUN_WPU_W { - GPIO43_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio43_fun_ie(&mut self) -> GPIO43_FUN_IE_W { - GPIO43_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio43_fun_drv(&mut self) -> GPIO43_FUN_DRV_W { - GPIO43_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio43_mcu_sel(&mut self) -> GPIO43_MCU_SEL_W { - GPIO43_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio43_filter_en(&mut self) -> GPIO43_FILTER_EN_W { - GPIO43_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio43\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio43::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio43::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO43_SPEC; -impl crate::RegisterSpec for GPIO43_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio43::R`](R) reader structure"] -impl crate::Readable for GPIO43_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio43::W`](W) writer structure"] -impl crate::Writable for GPIO43_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio43 to value 0x0800"] -impl crate::Resettable for GPIO43_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio44.rs b/esp32p4/src/io_mux/gpio44.rs deleted file mode 100644 index 2d09ddeef6..0000000000 --- a/esp32p4/src/io_mux/gpio44.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio44` reader"] -pub type R = crate::R; -#[doc = "Register `gpio44` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO44_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO44_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO44_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO44_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO44_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO44_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO44_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO44_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO44_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO44_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO44_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO44_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO44_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO44_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO44_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO44_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO44_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO44_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO44_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO44_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO44_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO44_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO44_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO44_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO44_FUN_WPD` reader - pull-down enable"] -pub type GPIO44_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO44_FUN_WPD` writer - pull-down enable"] -pub type GPIO44_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO44_FUN_WPU` reader - pull-up enable"] -pub type GPIO44_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO44_FUN_WPU` writer - pull-up enable"] -pub type GPIO44_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO44_FUN_IE` reader - input enable"] -pub type GPIO44_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO44_FUN_IE` writer - input enable"] -pub type GPIO44_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO44_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO44_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO44_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO44_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO44_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO44_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO44_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO44_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO44_FILTER_EN` reader - input filter enable"] -pub type GPIO44_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO44_FILTER_EN` writer - input filter enable"] -pub type GPIO44_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio44_mcu_oe(&self) -> GPIO44_MCU_OE_R { - GPIO44_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio44_slp_sel(&self) -> GPIO44_SLP_SEL_R { - GPIO44_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio44_mcu_wpd(&self) -> GPIO44_MCU_WPD_R { - GPIO44_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio44_mcu_wpu(&self) -> GPIO44_MCU_WPU_R { - GPIO44_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio44_mcu_ie(&self) -> GPIO44_MCU_IE_R { - GPIO44_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio44_mcu_drv(&self) -> GPIO44_MCU_DRV_R { - GPIO44_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio44_fun_wpd(&self) -> GPIO44_FUN_WPD_R { - GPIO44_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio44_fun_wpu(&self) -> GPIO44_FUN_WPU_R { - GPIO44_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio44_fun_ie(&self) -> GPIO44_FUN_IE_R { - GPIO44_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio44_fun_drv(&self) -> GPIO44_FUN_DRV_R { - GPIO44_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio44_mcu_sel(&self) -> GPIO44_MCU_SEL_R { - GPIO44_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio44_filter_en(&self) -> GPIO44_FILTER_EN_R { - GPIO44_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio44") - .field( - "gpio44_mcu_oe", - &format_args!("{}", self.gpio44_mcu_oe().bit()), - ) - .field( - "gpio44_slp_sel", - &format_args!("{}", self.gpio44_slp_sel().bit()), - ) - .field( - "gpio44_mcu_wpd", - &format_args!("{}", self.gpio44_mcu_wpd().bit()), - ) - .field( - "gpio44_mcu_wpu", - &format_args!("{}", self.gpio44_mcu_wpu().bit()), - ) - .field( - "gpio44_mcu_ie", - &format_args!("{}", self.gpio44_mcu_ie().bit()), - ) - .field( - "gpio44_mcu_drv", - &format_args!("{}", self.gpio44_mcu_drv().bits()), - ) - .field( - "gpio44_fun_wpd", - &format_args!("{}", self.gpio44_fun_wpd().bit()), - ) - .field( - "gpio44_fun_wpu", - &format_args!("{}", self.gpio44_fun_wpu().bit()), - ) - .field( - "gpio44_fun_ie", - &format_args!("{}", self.gpio44_fun_ie().bit()), - ) - .field( - "gpio44_fun_drv", - &format_args!("{}", self.gpio44_fun_drv().bits()), - ) - .field( - "gpio44_mcu_sel", - &format_args!("{}", self.gpio44_mcu_sel().bits()), - ) - .field( - "gpio44_filter_en", - &format_args!("{}", self.gpio44_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio44_mcu_oe(&mut self) -> GPIO44_MCU_OE_W { - GPIO44_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio44_slp_sel(&mut self) -> GPIO44_SLP_SEL_W { - GPIO44_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio44_mcu_wpd(&mut self) -> GPIO44_MCU_WPD_W { - GPIO44_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio44_mcu_wpu(&mut self) -> GPIO44_MCU_WPU_W { - GPIO44_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio44_mcu_ie(&mut self) -> GPIO44_MCU_IE_W { - GPIO44_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio44_mcu_drv(&mut self) -> GPIO44_MCU_DRV_W { - GPIO44_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio44_fun_wpd(&mut self) -> GPIO44_FUN_WPD_W { - GPIO44_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio44_fun_wpu(&mut self) -> GPIO44_FUN_WPU_W { - GPIO44_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio44_fun_ie(&mut self) -> GPIO44_FUN_IE_W { - GPIO44_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio44_fun_drv(&mut self) -> GPIO44_FUN_DRV_W { - GPIO44_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio44_mcu_sel(&mut self) -> GPIO44_MCU_SEL_W { - GPIO44_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio44_filter_en(&mut self) -> GPIO44_FILTER_EN_W { - GPIO44_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio44\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio44::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio44::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO44_SPEC; -impl crate::RegisterSpec for GPIO44_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio44::R`](R) reader structure"] -impl crate::Readable for GPIO44_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio44::W`](W) writer structure"] -impl crate::Writable for GPIO44_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio44 to value 0x0800"] -impl crate::Resettable for GPIO44_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio45.rs b/esp32p4/src/io_mux/gpio45.rs deleted file mode 100644 index 12db222485..0000000000 --- a/esp32p4/src/io_mux/gpio45.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio45` reader"] -pub type R = crate::R; -#[doc = "Register `gpio45` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO45_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO45_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO45_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO45_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO45_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO45_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO45_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO45_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO45_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO45_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO45_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO45_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO45_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO45_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO45_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO45_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO45_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO45_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO45_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO45_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO45_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO45_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO45_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO45_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO45_FUN_WPD` reader - pull-down enable"] -pub type GPIO45_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO45_FUN_WPD` writer - pull-down enable"] -pub type GPIO45_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO45_FUN_WPU` reader - pull-up enable"] -pub type GPIO45_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO45_FUN_WPU` writer - pull-up enable"] -pub type GPIO45_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO45_FUN_IE` reader - input enable"] -pub type GPIO45_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO45_FUN_IE` writer - input enable"] -pub type GPIO45_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO45_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO45_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO45_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO45_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO45_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO45_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO45_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO45_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO45_FILTER_EN` reader - input filter enable"] -pub type GPIO45_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO45_FILTER_EN` writer - input filter enable"] -pub type GPIO45_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio45_mcu_oe(&self) -> GPIO45_MCU_OE_R { - GPIO45_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio45_slp_sel(&self) -> GPIO45_SLP_SEL_R { - GPIO45_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio45_mcu_wpd(&self) -> GPIO45_MCU_WPD_R { - GPIO45_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio45_mcu_wpu(&self) -> GPIO45_MCU_WPU_R { - GPIO45_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio45_mcu_ie(&self) -> GPIO45_MCU_IE_R { - GPIO45_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio45_mcu_drv(&self) -> GPIO45_MCU_DRV_R { - GPIO45_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio45_fun_wpd(&self) -> GPIO45_FUN_WPD_R { - GPIO45_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio45_fun_wpu(&self) -> GPIO45_FUN_WPU_R { - GPIO45_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio45_fun_ie(&self) -> GPIO45_FUN_IE_R { - GPIO45_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio45_fun_drv(&self) -> GPIO45_FUN_DRV_R { - GPIO45_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio45_mcu_sel(&self) -> GPIO45_MCU_SEL_R { - GPIO45_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio45_filter_en(&self) -> GPIO45_FILTER_EN_R { - GPIO45_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio45") - .field( - "gpio45_mcu_oe", - &format_args!("{}", self.gpio45_mcu_oe().bit()), - ) - .field( - "gpio45_slp_sel", - &format_args!("{}", self.gpio45_slp_sel().bit()), - ) - .field( - "gpio45_mcu_wpd", - &format_args!("{}", self.gpio45_mcu_wpd().bit()), - ) - .field( - "gpio45_mcu_wpu", - &format_args!("{}", self.gpio45_mcu_wpu().bit()), - ) - .field( - "gpio45_mcu_ie", - &format_args!("{}", self.gpio45_mcu_ie().bit()), - ) - .field( - "gpio45_mcu_drv", - &format_args!("{}", self.gpio45_mcu_drv().bits()), - ) - .field( - "gpio45_fun_wpd", - &format_args!("{}", self.gpio45_fun_wpd().bit()), - ) - .field( - "gpio45_fun_wpu", - &format_args!("{}", self.gpio45_fun_wpu().bit()), - ) - .field( - "gpio45_fun_ie", - &format_args!("{}", self.gpio45_fun_ie().bit()), - ) - .field( - "gpio45_fun_drv", - &format_args!("{}", self.gpio45_fun_drv().bits()), - ) - .field( - "gpio45_mcu_sel", - &format_args!("{}", self.gpio45_mcu_sel().bits()), - ) - .field( - "gpio45_filter_en", - &format_args!("{}", self.gpio45_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio45_mcu_oe(&mut self) -> GPIO45_MCU_OE_W { - GPIO45_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio45_slp_sel(&mut self) -> GPIO45_SLP_SEL_W { - GPIO45_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio45_mcu_wpd(&mut self) -> GPIO45_MCU_WPD_W { - GPIO45_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio45_mcu_wpu(&mut self) -> GPIO45_MCU_WPU_W { - GPIO45_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio45_mcu_ie(&mut self) -> GPIO45_MCU_IE_W { - GPIO45_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio45_mcu_drv(&mut self) -> GPIO45_MCU_DRV_W { - GPIO45_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio45_fun_wpd(&mut self) -> GPIO45_FUN_WPD_W { - GPIO45_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio45_fun_wpu(&mut self) -> GPIO45_FUN_WPU_W { - GPIO45_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio45_fun_ie(&mut self) -> GPIO45_FUN_IE_W { - GPIO45_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio45_fun_drv(&mut self) -> GPIO45_FUN_DRV_W { - GPIO45_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio45_mcu_sel(&mut self) -> GPIO45_MCU_SEL_W { - GPIO45_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio45_filter_en(&mut self) -> GPIO45_FILTER_EN_W { - GPIO45_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio45\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio45::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio45::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO45_SPEC; -impl crate::RegisterSpec for GPIO45_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio45::R`](R) reader structure"] -impl crate::Readable for GPIO45_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio45::W`](W) writer structure"] -impl crate::Writable for GPIO45_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio45 to value 0x0800"] -impl crate::Resettable for GPIO45_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio46.rs b/esp32p4/src/io_mux/gpio46.rs deleted file mode 100644 index 0b62d69b82..0000000000 --- a/esp32p4/src/io_mux/gpio46.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio46` reader"] -pub type R = crate::R; -#[doc = "Register `gpio46` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO46_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO46_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO46_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO46_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO46_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO46_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO46_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO46_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO46_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO46_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO46_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO46_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO46_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO46_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO46_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO46_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO46_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO46_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO46_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO46_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO46_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO46_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO46_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO46_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO46_FUN_WPD` reader - pull-down enable"] -pub type GPIO46_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO46_FUN_WPD` writer - pull-down enable"] -pub type GPIO46_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO46_FUN_WPU` reader - pull-up enable"] -pub type GPIO46_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO46_FUN_WPU` writer - pull-up enable"] -pub type GPIO46_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO46_FUN_IE` reader - input enable"] -pub type GPIO46_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO46_FUN_IE` writer - input enable"] -pub type GPIO46_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO46_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO46_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO46_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO46_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO46_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO46_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO46_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO46_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO46_FILTER_EN` reader - input filter enable"] -pub type GPIO46_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO46_FILTER_EN` writer - input filter enable"] -pub type GPIO46_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio46_mcu_oe(&self) -> GPIO46_MCU_OE_R { - GPIO46_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio46_slp_sel(&self) -> GPIO46_SLP_SEL_R { - GPIO46_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio46_mcu_wpd(&self) -> GPIO46_MCU_WPD_R { - GPIO46_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio46_mcu_wpu(&self) -> GPIO46_MCU_WPU_R { - GPIO46_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio46_mcu_ie(&self) -> GPIO46_MCU_IE_R { - GPIO46_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio46_mcu_drv(&self) -> GPIO46_MCU_DRV_R { - GPIO46_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio46_fun_wpd(&self) -> GPIO46_FUN_WPD_R { - GPIO46_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio46_fun_wpu(&self) -> GPIO46_FUN_WPU_R { - GPIO46_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio46_fun_ie(&self) -> GPIO46_FUN_IE_R { - GPIO46_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio46_fun_drv(&self) -> GPIO46_FUN_DRV_R { - GPIO46_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio46_mcu_sel(&self) -> GPIO46_MCU_SEL_R { - GPIO46_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio46_filter_en(&self) -> GPIO46_FILTER_EN_R { - GPIO46_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio46") - .field( - "gpio46_mcu_oe", - &format_args!("{}", self.gpio46_mcu_oe().bit()), - ) - .field( - "gpio46_slp_sel", - &format_args!("{}", self.gpio46_slp_sel().bit()), - ) - .field( - "gpio46_mcu_wpd", - &format_args!("{}", self.gpio46_mcu_wpd().bit()), - ) - .field( - "gpio46_mcu_wpu", - &format_args!("{}", self.gpio46_mcu_wpu().bit()), - ) - .field( - "gpio46_mcu_ie", - &format_args!("{}", self.gpio46_mcu_ie().bit()), - ) - .field( - "gpio46_mcu_drv", - &format_args!("{}", self.gpio46_mcu_drv().bits()), - ) - .field( - "gpio46_fun_wpd", - &format_args!("{}", self.gpio46_fun_wpd().bit()), - ) - .field( - "gpio46_fun_wpu", - &format_args!("{}", self.gpio46_fun_wpu().bit()), - ) - .field( - "gpio46_fun_ie", - &format_args!("{}", self.gpio46_fun_ie().bit()), - ) - .field( - "gpio46_fun_drv", - &format_args!("{}", self.gpio46_fun_drv().bits()), - ) - .field( - "gpio46_mcu_sel", - &format_args!("{}", self.gpio46_mcu_sel().bits()), - ) - .field( - "gpio46_filter_en", - &format_args!("{}", self.gpio46_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio46_mcu_oe(&mut self) -> GPIO46_MCU_OE_W { - GPIO46_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio46_slp_sel(&mut self) -> GPIO46_SLP_SEL_W { - GPIO46_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio46_mcu_wpd(&mut self) -> GPIO46_MCU_WPD_W { - GPIO46_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio46_mcu_wpu(&mut self) -> GPIO46_MCU_WPU_W { - GPIO46_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio46_mcu_ie(&mut self) -> GPIO46_MCU_IE_W { - GPIO46_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio46_mcu_drv(&mut self) -> GPIO46_MCU_DRV_W { - GPIO46_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio46_fun_wpd(&mut self) -> GPIO46_FUN_WPD_W { - GPIO46_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio46_fun_wpu(&mut self) -> GPIO46_FUN_WPU_W { - GPIO46_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio46_fun_ie(&mut self) -> GPIO46_FUN_IE_W { - GPIO46_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio46_fun_drv(&mut self) -> GPIO46_FUN_DRV_W { - GPIO46_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio46_mcu_sel(&mut self) -> GPIO46_MCU_SEL_W { - GPIO46_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio46_filter_en(&mut self) -> GPIO46_FILTER_EN_W { - GPIO46_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio46\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio46::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio46::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO46_SPEC; -impl crate::RegisterSpec for GPIO46_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio46::R`](R) reader structure"] -impl crate::Readable for GPIO46_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio46::W`](W) writer structure"] -impl crate::Writable for GPIO46_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio46 to value 0x0800"] -impl crate::Resettable for GPIO46_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio47.rs b/esp32p4/src/io_mux/gpio47.rs deleted file mode 100644 index 72876191cf..0000000000 --- a/esp32p4/src/io_mux/gpio47.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio47` reader"] -pub type R = crate::R; -#[doc = "Register `gpio47` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO47_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO47_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO47_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO47_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO47_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO47_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO47_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO47_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO47_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO47_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO47_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO47_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO47_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO47_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO47_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO47_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO47_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO47_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO47_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO47_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO47_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO47_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO47_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO47_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO47_FUN_WPD` reader - pull-down enable"] -pub type GPIO47_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO47_FUN_WPD` writer - pull-down enable"] -pub type GPIO47_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO47_FUN_WPU` reader - pull-up enable"] -pub type GPIO47_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO47_FUN_WPU` writer - pull-up enable"] -pub type GPIO47_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO47_FUN_IE` reader - input enable"] -pub type GPIO47_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO47_FUN_IE` writer - input enable"] -pub type GPIO47_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO47_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO47_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO47_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO47_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO47_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO47_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO47_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO47_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO47_FILTER_EN` reader - input filter enable"] -pub type GPIO47_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO47_FILTER_EN` writer - input filter enable"] -pub type GPIO47_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio47_mcu_oe(&self) -> GPIO47_MCU_OE_R { - GPIO47_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio47_slp_sel(&self) -> GPIO47_SLP_SEL_R { - GPIO47_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio47_mcu_wpd(&self) -> GPIO47_MCU_WPD_R { - GPIO47_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio47_mcu_wpu(&self) -> GPIO47_MCU_WPU_R { - GPIO47_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio47_mcu_ie(&self) -> GPIO47_MCU_IE_R { - GPIO47_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio47_mcu_drv(&self) -> GPIO47_MCU_DRV_R { - GPIO47_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio47_fun_wpd(&self) -> GPIO47_FUN_WPD_R { - GPIO47_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio47_fun_wpu(&self) -> GPIO47_FUN_WPU_R { - GPIO47_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio47_fun_ie(&self) -> GPIO47_FUN_IE_R { - GPIO47_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio47_fun_drv(&self) -> GPIO47_FUN_DRV_R { - GPIO47_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio47_mcu_sel(&self) -> GPIO47_MCU_SEL_R { - GPIO47_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio47_filter_en(&self) -> GPIO47_FILTER_EN_R { - GPIO47_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio47") - .field( - "gpio47_mcu_oe", - &format_args!("{}", self.gpio47_mcu_oe().bit()), - ) - .field( - "gpio47_slp_sel", - &format_args!("{}", self.gpio47_slp_sel().bit()), - ) - .field( - "gpio47_mcu_wpd", - &format_args!("{}", self.gpio47_mcu_wpd().bit()), - ) - .field( - "gpio47_mcu_wpu", - &format_args!("{}", self.gpio47_mcu_wpu().bit()), - ) - .field( - "gpio47_mcu_ie", - &format_args!("{}", self.gpio47_mcu_ie().bit()), - ) - .field( - "gpio47_mcu_drv", - &format_args!("{}", self.gpio47_mcu_drv().bits()), - ) - .field( - "gpio47_fun_wpd", - &format_args!("{}", self.gpio47_fun_wpd().bit()), - ) - .field( - "gpio47_fun_wpu", - &format_args!("{}", self.gpio47_fun_wpu().bit()), - ) - .field( - "gpio47_fun_ie", - &format_args!("{}", self.gpio47_fun_ie().bit()), - ) - .field( - "gpio47_fun_drv", - &format_args!("{}", self.gpio47_fun_drv().bits()), - ) - .field( - "gpio47_mcu_sel", - &format_args!("{}", self.gpio47_mcu_sel().bits()), - ) - .field( - "gpio47_filter_en", - &format_args!("{}", self.gpio47_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio47_mcu_oe(&mut self) -> GPIO47_MCU_OE_W { - GPIO47_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio47_slp_sel(&mut self) -> GPIO47_SLP_SEL_W { - GPIO47_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio47_mcu_wpd(&mut self) -> GPIO47_MCU_WPD_W { - GPIO47_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio47_mcu_wpu(&mut self) -> GPIO47_MCU_WPU_W { - GPIO47_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio47_mcu_ie(&mut self) -> GPIO47_MCU_IE_W { - GPIO47_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio47_mcu_drv(&mut self) -> GPIO47_MCU_DRV_W { - GPIO47_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio47_fun_wpd(&mut self) -> GPIO47_FUN_WPD_W { - GPIO47_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio47_fun_wpu(&mut self) -> GPIO47_FUN_WPU_W { - GPIO47_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio47_fun_ie(&mut self) -> GPIO47_FUN_IE_W { - GPIO47_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio47_fun_drv(&mut self) -> GPIO47_FUN_DRV_W { - GPIO47_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio47_mcu_sel(&mut self) -> GPIO47_MCU_SEL_W { - GPIO47_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio47_filter_en(&mut self) -> GPIO47_FILTER_EN_W { - GPIO47_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio47\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio47::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio47::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO47_SPEC; -impl crate::RegisterSpec for GPIO47_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio47::R`](R) reader structure"] -impl crate::Readable for GPIO47_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio47::W`](W) writer structure"] -impl crate::Writable for GPIO47_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio47 to value 0x0800"] -impl crate::Resettable for GPIO47_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio48.rs b/esp32p4/src/io_mux/gpio48.rs deleted file mode 100644 index b18f791410..0000000000 --- a/esp32p4/src/io_mux/gpio48.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio48` reader"] -pub type R = crate::R; -#[doc = "Register `gpio48` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO48_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO48_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO48_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO48_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO48_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO48_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO48_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO48_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO48_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO48_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO48_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO48_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO48_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO48_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO48_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO48_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO48_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO48_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO48_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO48_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO48_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO48_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO48_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO48_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO48_FUN_WPD` reader - pull-down enable"] -pub type GPIO48_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO48_FUN_WPD` writer - pull-down enable"] -pub type GPIO48_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO48_FUN_WPU` reader - pull-up enable"] -pub type GPIO48_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO48_FUN_WPU` writer - pull-up enable"] -pub type GPIO48_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO48_FUN_IE` reader - input enable"] -pub type GPIO48_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO48_FUN_IE` writer - input enable"] -pub type GPIO48_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO48_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO48_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO48_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO48_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO48_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO48_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO48_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO48_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO48_FILTER_EN` reader - input filter enable"] -pub type GPIO48_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO48_FILTER_EN` writer - input filter enable"] -pub type GPIO48_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio48_mcu_oe(&self) -> GPIO48_MCU_OE_R { - GPIO48_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio48_slp_sel(&self) -> GPIO48_SLP_SEL_R { - GPIO48_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio48_mcu_wpd(&self) -> GPIO48_MCU_WPD_R { - GPIO48_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio48_mcu_wpu(&self) -> GPIO48_MCU_WPU_R { - GPIO48_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio48_mcu_ie(&self) -> GPIO48_MCU_IE_R { - GPIO48_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio48_mcu_drv(&self) -> GPIO48_MCU_DRV_R { - GPIO48_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio48_fun_wpd(&self) -> GPIO48_FUN_WPD_R { - GPIO48_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio48_fun_wpu(&self) -> GPIO48_FUN_WPU_R { - GPIO48_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio48_fun_ie(&self) -> GPIO48_FUN_IE_R { - GPIO48_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio48_fun_drv(&self) -> GPIO48_FUN_DRV_R { - GPIO48_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio48_mcu_sel(&self) -> GPIO48_MCU_SEL_R { - GPIO48_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio48_filter_en(&self) -> GPIO48_FILTER_EN_R { - GPIO48_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio48") - .field( - "gpio48_mcu_oe", - &format_args!("{}", self.gpio48_mcu_oe().bit()), - ) - .field( - "gpio48_slp_sel", - &format_args!("{}", self.gpio48_slp_sel().bit()), - ) - .field( - "gpio48_mcu_wpd", - &format_args!("{}", self.gpio48_mcu_wpd().bit()), - ) - .field( - "gpio48_mcu_wpu", - &format_args!("{}", self.gpio48_mcu_wpu().bit()), - ) - .field( - "gpio48_mcu_ie", - &format_args!("{}", self.gpio48_mcu_ie().bit()), - ) - .field( - "gpio48_mcu_drv", - &format_args!("{}", self.gpio48_mcu_drv().bits()), - ) - .field( - "gpio48_fun_wpd", - &format_args!("{}", self.gpio48_fun_wpd().bit()), - ) - .field( - "gpio48_fun_wpu", - &format_args!("{}", self.gpio48_fun_wpu().bit()), - ) - .field( - "gpio48_fun_ie", - &format_args!("{}", self.gpio48_fun_ie().bit()), - ) - .field( - "gpio48_fun_drv", - &format_args!("{}", self.gpio48_fun_drv().bits()), - ) - .field( - "gpio48_mcu_sel", - &format_args!("{}", self.gpio48_mcu_sel().bits()), - ) - .field( - "gpio48_filter_en", - &format_args!("{}", self.gpio48_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio48_mcu_oe(&mut self) -> GPIO48_MCU_OE_W { - GPIO48_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio48_slp_sel(&mut self) -> GPIO48_SLP_SEL_W { - GPIO48_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio48_mcu_wpd(&mut self) -> GPIO48_MCU_WPD_W { - GPIO48_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio48_mcu_wpu(&mut self) -> GPIO48_MCU_WPU_W { - GPIO48_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio48_mcu_ie(&mut self) -> GPIO48_MCU_IE_W { - GPIO48_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio48_mcu_drv(&mut self) -> GPIO48_MCU_DRV_W { - GPIO48_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio48_fun_wpd(&mut self) -> GPIO48_FUN_WPD_W { - GPIO48_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio48_fun_wpu(&mut self) -> GPIO48_FUN_WPU_W { - GPIO48_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio48_fun_ie(&mut self) -> GPIO48_FUN_IE_W { - GPIO48_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio48_fun_drv(&mut self) -> GPIO48_FUN_DRV_W { - GPIO48_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio48_mcu_sel(&mut self) -> GPIO48_MCU_SEL_W { - GPIO48_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio48_filter_en(&mut self) -> GPIO48_FILTER_EN_W { - GPIO48_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio48\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio48::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio48::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO48_SPEC; -impl crate::RegisterSpec for GPIO48_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio48::R`](R) reader structure"] -impl crate::Readable for GPIO48_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio48::W`](W) writer structure"] -impl crate::Writable for GPIO48_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio48 to value 0x0800"] -impl crate::Resettable for GPIO48_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio49.rs b/esp32p4/src/io_mux/gpio49.rs deleted file mode 100644 index 19fde06c9b..0000000000 --- a/esp32p4/src/io_mux/gpio49.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio49` reader"] -pub type R = crate::R; -#[doc = "Register `gpio49` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO49_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO49_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO49_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO49_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO49_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO49_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO49_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO49_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO49_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO49_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO49_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO49_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO49_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO49_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO49_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO49_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO49_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO49_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO49_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO49_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO49_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO49_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO49_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO49_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO49_FUN_WPD` reader - pull-down enable"] -pub type GPIO49_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO49_FUN_WPD` writer - pull-down enable"] -pub type GPIO49_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO49_FUN_WPU` reader - pull-up enable"] -pub type GPIO49_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO49_FUN_WPU` writer - pull-up enable"] -pub type GPIO49_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO49_FUN_IE` reader - input enable"] -pub type GPIO49_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO49_FUN_IE` writer - input enable"] -pub type GPIO49_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO49_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO49_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO49_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO49_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO49_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO49_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO49_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO49_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO49_FILTER_EN` reader - input filter enable"] -pub type GPIO49_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO49_FILTER_EN` writer - input filter enable"] -pub type GPIO49_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio49_mcu_oe(&self) -> GPIO49_MCU_OE_R { - GPIO49_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio49_slp_sel(&self) -> GPIO49_SLP_SEL_R { - GPIO49_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio49_mcu_wpd(&self) -> GPIO49_MCU_WPD_R { - GPIO49_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio49_mcu_wpu(&self) -> GPIO49_MCU_WPU_R { - GPIO49_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio49_mcu_ie(&self) -> GPIO49_MCU_IE_R { - GPIO49_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio49_mcu_drv(&self) -> GPIO49_MCU_DRV_R { - GPIO49_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio49_fun_wpd(&self) -> GPIO49_FUN_WPD_R { - GPIO49_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio49_fun_wpu(&self) -> GPIO49_FUN_WPU_R { - GPIO49_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio49_fun_ie(&self) -> GPIO49_FUN_IE_R { - GPIO49_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio49_fun_drv(&self) -> GPIO49_FUN_DRV_R { - GPIO49_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio49_mcu_sel(&self) -> GPIO49_MCU_SEL_R { - GPIO49_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio49_filter_en(&self) -> GPIO49_FILTER_EN_R { - GPIO49_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio49") - .field( - "gpio49_mcu_oe", - &format_args!("{}", self.gpio49_mcu_oe().bit()), - ) - .field( - "gpio49_slp_sel", - &format_args!("{}", self.gpio49_slp_sel().bit()), - ) - .field( - "gpio49_mcu_wpd", - &format_args!("{}", self.gpio49_mcu_wpd().bit()), - ) - .field( - "gpio49_mcu_wpu", - &format_args!("{}", self.gpio49_mcu_wpu().bit()), - ) - .field( - "gpio49_mcu_ie", - &format_args!("{}", self.gpio49_mcu_ie().bit()), - ) - .field( - "gpio49_mcu_drv", - &format_args!("{}", self.gpio49_mcu_drv().bits()), - ) - .field( - "gpio49_fun_wpd", - &format_args!("{}", self.gpio49_fun_wpd().bit()), - ) - .field( - "gpio49_fun_wpu", - &format_args!("{}", self.gpio49_fun_wpu().bit()), - ) - .field( - "gpio49_fun_ie", - &format_args!("{}", self.gpio49_fun_ie().bit()), - ) - .field( - "gpio49_fun_drv", - &format_args!("{}", self.gpio49_fun_drv().bits()), - ) - .field( - "gpio49_mcu_sel", - &format_args!("{}", self.gpio49_mcu_sel().bits()), - ) - .field( - "gpio49_filter_en", - &format_args!("{}", self.gpio49_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio49_mcu_oe(&mut self) -> GPIO49_MCU_OE_W { - GPIO49_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio49_slp_sel(&mut self) -> GPIO49_SLP_SEL_W { - GPIO49_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio49_mcu_wpd(&mut self) -> GPIO49_MCU_WPD_W { - GPIO49_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio49_mcu_wpu(&mut self) -> GPIO49_MCU_WPU_W { - GPIO49_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio49_mcu_ie(&mut self) -> GPIO49_MCU_IE_W { - GPIO49_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio49_mcu_drv(&mut self) -> GPIO49_MCU_DRV_W { - GPIO49_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio49_fun_wpd(&mut self) -> GPIO49_FUN_WPD_W { - GPIO49_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio49_fun_wpu(&mut self) -> GPIO49_FUN_WPU_W { - GPIO49_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio49_fun_ie(&mut self) -> GPIO49_FUN_IE_W { - GPIO49_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio49_fun_drv(&mut self) -> GPIO49_FUN_DRV_W { - GPIO49_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio49_mcu_sel(&mut self) -> GPIO49_MCU_SEL_W { - GPIO49_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio49_filter_en(&mut self) -> GPIO49_FILTER_EN_W { - GPIO49_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio49\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio49::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio49::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO49_SPEC; -impl crate::RegisterSpec for GPIO49_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio49::R`](R) reader structure"] -impl crate::Readable for GPIO49_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio49::W`](W) writer structure"] -impl crate::Writable for GPIO49_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio49 to value 0x0800"] -impl crate::Resettable for GPIO49_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio5.rs b/esp32p4/src/io_mux/gpio5.rs deleted file mode 100644 index cceb82b1b3..0000000000 --- a/esp32p4/src/io_mux/gpio5.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio5` reader"] -pub type R = crate::R; -#[doc = "Register `gpio5` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO5_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO5_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO5_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO5_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO5_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO5_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO5_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO5_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO5_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO5_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO5_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO5_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO5_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO5_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO5_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO5_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO5_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO5_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO5_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO5_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO5_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO5_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO5_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO5_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO5_FUN_WPD` reader - pull-down enable"] -pub type GPIO5_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO5_FUN_WPD` writer - pull-down enable"] -pub type GPIO5_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO5_FUN_WPU` reader - pull-up enable"] -pub type GPIO5_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO5_FUN_WPU` writer - pull-up enable"] -pub type GPIO5_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO5_FUN_IE` reader - input enable"] -pub type GPIO5_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO5_FUN_IE` writer - input enable"] -pub type GPIO5_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO5_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO5_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO5_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO5_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO5_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO5_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO5_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO5_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO5_FILTER_EN` reader - input filter enable"] -pub type GPIO5_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO5_FILTER_EN` writer - input filter enable"] -pub type GPIO5_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio5_mcu_oe(&self) -> GPIO5_MCU_OE_R { - GPIO5_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio5_slp_sel(&self) -> GPIO5_SLP_SEL_R { - GPIO5_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio5_mcu_wpd(&self) -> GPIO5_MCU_WPD_R { - GPIO5_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio5_mcu_wpu(&self) -> GPIO5_MCU_WPU_R { - GPIO5_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio5_mcu_ie(&self) -> GPIO5_MCU_IE_R { - GPIO5_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio5_mcu_drv(&self) -> GPIO5_MCU_DRV_R { - GPIO5_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio5_fun_wpd(&self) -> GPIO5_FUN_WPD_R { - GPIO5_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio5_fun_wpu(&self) -> GPIO5_FUN_WPU_R { - GPIO5_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio5_fun_ie(&self) -> GPIO5_FUN_IE_R { - GPIO5_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio5_fun_drv(&self) -> GPIO5_FUN_DRV_R { - GPIO5_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio5_mcu_sel(&self) -> GPIO5_MCU_SEL_R { - GPIO5_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio5_filter_en(&self) -> GPIO5_FILTER_EN_R { - GPIO5_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio5") - .field( - "gpio5_mcu_oe", - &format_args!("{}", self.gpio5_mcu_oe().bit()), - ) - .field( - "gpio5_slp_sel", - &format_args!("{}", self.gpio5_slp_sel().bit()), - ) - .field( - "gpio5_mcu_wpd", - &format_args!("{}", self.gpio5_mcu_wpd().bit()), - ) - .field( - "gpio5_mcu_wpu", - &format_args!("{}", self.gpio5_mcu_wpu().bit()), - ) - .field( - "gpio5_mcu_ie", - &format_args!("{}", self.gpio5_mcu_ie().bit()), - ) - .field( - "gpio5_mcu_drv", - &format_args!("{}", self.gpio5_mcu_drv().bits()), - ) - .field( - "gpio5_fun_wpd", - &format_args!("{}", self.gpio5_fun_wpd().bit()), - ) - .field( - "gpio5_fun_wpu", - &format_args!("{}", self.gpio5_fun_wpu().bit()), - ) - .field( - "gpio5_fun_ie", - &format_args!("{}", self.gpio5_fun_ie().bit()), - ) - .field( - "gpio5_fun_drv", - &format_args!("{}", self.gpio5_fun_drv().bits()), - ) - .field( - "gpio5_mcu_sel", - &format_args!("{}", self.gpio5_mcu_sel().bits()), - ) - .field( - "gpio5_filter_en", - &format_args!("{}", self.gpio5_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio5_mcu_oe(&mut self) -> GPIO5_MCU_OE_W { - GPIO5_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio5_slp_sel(&mut self) -> GPIO5_SLP_SEL_W { - GPIO5_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio5_mcu_wpd(&mut self) -> GPIO5_MCU_WPD_W { - GPIO5_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio5_mcu_wpu(&mut self) -> GPIO5_MCU_WPU_W { - GPIO5_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio5_mcu_ie(&mut self) -> GPIO5_MCU_IE_W { - GPIO5_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio5_mcu_drv(&mut self) -> GPIO5_MCU_DRV_W { - GPIO5_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio5_fun_wpd(&mut self) -> GPIO5_FUN_WPD_W { - GPIO5_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio5_fun_wpu(&mut self) -> GPIO5_FUN_WPU_W { - GPIO5_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio5_fun_ie(&mut self) -> GPIO5_FUN_IE_W { - GPIO5_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio5_fun_drv(&mut self) -> GPIO5_FUN_DRV_W { - GPIO5_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio5_mcu_sel(&mut self) -> GPIO5_MCU_SEL_W { - GPIO5_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio5_filter_en(&mut self) -> GPIO5_FILTER_EN_W { - GPIO5_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO5_SPEC; -impl crate::RegisterSpec for GPIO5_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio5::R`](R) reader structure"] -impl crate::Readable for GPIO5_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio5::W`](W) writer structure"] -impl crate::Writable for GPIO5_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio5 to value 0x0800"] -impl crate::Resettable for GPIO5_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio50.rs b/esp32p4/src/io_mux/gpio50.rs deleted file mode 100644 index a615536b1f..0000000000 --- a/esp32p4/src/io_mux/gpio50.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio50` reader"] -pub type R = crate::R; -#[doc = "Register `gpio50` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO50_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO50_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO50_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO50_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO50_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO50_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO50_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO50_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO50_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO50_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO50_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO50_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO50_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO50_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO50_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO50_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO50_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO50_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO50_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO50_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO50_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO50_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO50_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO50_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO50_FUN_WPD` reader - pull-down enable"] -pub type GPIO50_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO50_FUN_WPD` writer - pull-down enable"] -pub type GPIO50_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO50_FUN_WPU` reader - pull-up enable"] -pub type GPIO50_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO50_FUN_WPU` writer - pull-up enable"] -pub type GPIO50_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO50_FUN_IE` reader - input enable"] -pub type GPIO50_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO50_FUN_IE` writer - input enable"] -pub type GPIO50_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO50_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO50_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO50_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO50_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO50_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO50_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO50_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO50_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO50_FILTER_EN` reader - input filter enable"] -pub type GPIO50_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO50_FILTER_EN` writer - input filter enable"] -pub type GPIO50_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio50_mcu_oe(&self) -> GPIO50_MCU_OE_R { - GPIO50_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio50_slp_sel(&self) -> GPIO50_SLP_SEL_R { - GPIO50_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio50_mcu_wpd(&self) -> GPIO50_MCU_WPD_R { - GPIO50_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio50_mcu_wpu(&self) -> GPIO50_MCU_WPU_R { - GPIO50_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio50_mcu_ie(&self) -> GPIO50_MCU_IE_R { - GPIO50_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio50_mcu_drv(&self) -> GPIO50_MCU_DRV_R { - GPIO50_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio50_fun_wpd(&self) -> GPIO50_FUN_WPD_R { - GPIO50_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio50_fun_wpu(&self) -> GPIO50_FUN_WPU_R { - GPIO50_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio50_fun_ie(&self) -> GPIO50_FUN_IE_R { - GPIO50_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio50_fun_drv(&self) -> GPIO50_FUN_DRV_R { - GPIO50_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio50_mcu_sel(&self) -> GPIO50_MCU_SEL_R { - GPIO50_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio50_filter_en(&self) -> GPIO50_FILTER_EN_R { - GPIO50_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio50") - .field( - "gpio50_mcu_oe", - &format_args!("{}", self.gpio50_mcu_oe().bit()), - ) - .field( - "gpio50_slp_sel", - &format_args!("{}", self.gpio50_slp_sel().bit()), - ) - .field( - "gpio50_mcu_wpd", - &format_args!("{}", self.gpio50_mcu_wpd().bit()), - ) - .field( - "gpio50_mcu_wpu", - &format_args!("{}", self.gpio50_mcu_wpu().bit()), - ) - .field( - "gpio50_mcu_ie", - &format_args!("{}", self.gpio50_mcu_ie().bit()), - ) - .field( - "gpio50_mcu_drv", - &format_args!("{}", self.gpio50_mcu_drv().bits()), - ) - .field( - "gpio50_fun_wpd", - &format_args!("{}", self.gpio50_fun_wpd().bit()), - ) - .field( - "gpio50_fun_wpu", - &format_args!("{}", self.gpio50_fun_wpu().bit()), - ) - .field( - "gpio50_fun_ie", - &format_args!("{}", self.gpio50_fun_ie().bit()), - ) - .field( - "gpio50_fun_drv", - &format_args!("{}", self.gpio50_fun_drv().bits()), - ) - .field( - "gpio50_mcu_sel", - &format_args!("{}", self.gpio50_mcu_sel().bits()), - ) - .field( - "gpio50_filter_en", - &format_args!("{}", self.gpio50_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio50_mcu_oe(&mut self) -> GPIO50_MCU_OE_W { - GPIO50_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio50_slp_sel(&mut self) -> GPIO50_SLP_SEL_W { - GPIO50_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio50_mcu_wpd(&mut self) -> GPIO50_MCU_WPD_W { - GPIO50_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio50_mcu_wpu(&mut self) -> GPIO50_MCU_WPU_W { - GPIO50_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio50_mcu_ie(&mut self) -> GPIO50_MCU_IE_W { - GPIO50_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio50_mcu_drv(&mut self) -> GPIO50_MCU_DRV_W { - GPIO50_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio50_fun_wpd(&mut self) -> GPIO50_FUN_WPD_W { - GPIO50_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio50_fun_wpu(&mut self) -> GPIO50_FUN_WPU_W { - GPIO50_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio50_fun_ie(&mut self) -> GPIO50_FUN_IE_W { - GPIO50_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio50_fun_drv(&mut self) -> GPIO50_FUN_DRV_W { - GPIO50_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio50_mcu_sel(&mut self) -> GPIO50_MCU_SEL_W { - GPIO50_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio50_filter_en(&mut self) -> GPIO50_FILTER_EN_W { - GPIO50_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio50\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio50::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio50::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO50_SPEC; -impl crate::RegisterSpec for GPIO50_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio50::R`](R) reader structure"] -impl crate::Readable for GPIO50_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio50::W`](W) writer structure"] -impl crate::Writable for GPIO50_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio50 to value 0x0800"] -impl crate::Resettable for GPIO50_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio51.rs b/esp32p4/src/io_mux/gpio51.rs deleted file mode 100644 index fb83fb912f..0000000000 --- a/esp32p4/src/io_mux/gpio51.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio51` reader"] -pub type R = crate::R; -#[doc = "Register `gpio51` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO51_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO51_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO51_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO51_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO51_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO51_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO51_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO51_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO51_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO51_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO51_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO51_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO51_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO51_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO51_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO51_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO51_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO51_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO51_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO51_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO51_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO51_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO51_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO51_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO51_FUN_WPD` reader - pull-down enable"] -pub type GPIO51_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO51_FUN_WPD` writer - pull-down enable"] -pub type GPIO51_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO51_FUN_WPU` reader - pull-up enable"] -pub type GPIO51_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO51_FUN_WPU` writer - pull-up enable"] -pub type GPIO51_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO51_FUN_IE` reader - input enable"] -pub type GPIO51_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO51_FUN_IE` writer - input enable"] -pub type GPIO51_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO51_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO51_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO51_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO51_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO51_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO51_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO51_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO51_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO51_FILTER_EN` reader - input filter enable"] -pub type GPIO51_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO51_FILTER_EN` writer - input filter enable"] -pub type GPIO51_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio51_mcu_oe(&self) -> GPIO51_MCU_OE_R { - GPIO51_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio51_slp_sel(&self) -> GPIO51_SLP_SEL_R { - GPIO51_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio51_mcu_wpd(&self) -> GPIO51_MCU_WPD_R { - GPIO51_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio51_mcu_wpu(&self) -> GPIO51_MCU_WPU_R { - GPIO51_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio51_mcu_ie(&self) -> GPIO51_MCU_IE_R { - GPIO51_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio51_mcu_drv(&self) -> GPIO51_MCU_DRV_R { - GPIO51_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio51_fun_wpd(&self) -> GPIO51_FUN_WPD_R { - GPIO51_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio51_fun_wpu(&self) -> GPIO51_FUN_WPU_R { - GPIO51_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio51_fun_ie(&self) -> GPIO51_FUN_IE_R { - GPIO51_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio51_fun_drv(&self) -> GPIO51_FUN_DRV_R { - GPIO51_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio51_mcu_sel(&self) -> GPIO51_MCU_SEL_R { - GPIO51_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio51_filter_en(&self) -> GPIO51_FILTER_EN_R { - GPIO51_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio51") - .field( - "gpio51_mcu_oe", - &format_args!("{}", self.gpio51_mcu_oe().bit()), - ) - .field( - "gpio51_slp_sel", - &format_args!("{}", self.gpio51_slp_sel().bit()), - ) - .field( - "gpio51_mcu_wpd", - &format_args!("{}", self.gpio51_mcu_wpd().bit()), - ) - .field( - "gpio51_mcu_wpu", - &format_args!("{}", self.gpio51_mcu_wpu().bit()), - ) - .field( - "gpio51_mcu_ie", - &format_args!("{}", self.gpio51_mcu_ie().bit()), - ) - .field( - "gpio51_mcu_drv", - &format_args!("{}", self.gpio51_mcu_drv().bits()), - ) - .field( - "gpio51_fun_wpd", - &format_args!("{}", self.gpio51_fun_wpd().bit()), - ) - .field( - "gpio51_fun_wpu", - &format_args!("{}", self.gpio51_fun_wpu().bit()), - ) - .field( - "gpio51_fun_ie", - &format_args!("{}", self.gpio51_fun_ie().bit()), - ) - .field( - "gpio51_fun_drv", - &format_args!("{}", self.gpio51_fun_drv().bits()), - ) - .field( - "gpio51_mcu_sel", - &format_args!("{}", self.gpio51_mcu_sel().bits()), - ) - .field( - "gpio51_filter_en", - &format_args!("{}", self.gpio51_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio51_mcu_oe(&mut self) -> GPIO51_MCU_OE_W { - GPIO51_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio51_slp_sel(&mut self) -> GPIO51_SLP_SEL_W { - GPIO51_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio51_mcu_wpd(&mut self) -> GPIO51_MCU_WPD_W { - GPIO51_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio51_mcu_wpu(&mut self) -> GPIO51_MCU_WPU_W { - GPIO51_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio51_mcu_ie(&mut self) -> GPIO51_MCU_IE_W { - GPIO51_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio51_mcu_drv(&mut self) -> GPIO51_MCU_DRV_W { - GPIO51_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio51_fun_wpd(&mut self) -> GPIO51_FUN_WPD_W { - GPIO51_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio51_fun_wpu(&mut self) -> GPIO51_FUN_WPU_W { - GPIO51_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio51_fun_ie(&mut self) -> GPIO51_FUN_IE_W { - GPIO51_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio51_fun_drv(&mut self) -> GPIO51_FUN_DRV_W { - GPIO51_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio51_mcu_sel(&mut self) -> GPIO51_MCU_SEL_W { - GPIO51_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio51_filter_en(&mut self) -> GPIO51_FILTER_EN_W { - GPIO51_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio51\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio51::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio51::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO51_SPEC; -impl crate::RegisterSpec for GPIO51_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio51::R`](R) reader structure"] -impl crate::Readable for GPIO51_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio51::W`](W) writer structure"] -impl crate::Writable for GPIO51_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio51 to value 0x0800"] -impl crate::Resettable for GPIO51_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio52.rs b/esp32p4/src/io_mux/gpio52.rs deleted file mode 100644 index baee91462c..0000000000 --- a/esp32p4/src/io_mux/gpio52.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio52` reader"] -pub type R = crate::R; -#[doc = "Register `gpio52` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO52_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO52_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO52_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO52_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO52_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO52_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO52_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO52_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO52_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO52_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO52_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO52_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO52_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO52_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO52_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO52_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO52_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO52_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO52_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO52_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO52_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO52_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO52_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO52_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO52_FUN_WPD` reader - pull-down enable"] -pub type GPIO52_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO52_FUN_WPD` writer - pull-down enable"] -pub type GPIO52_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO52_FUN_WPU` reader - pull-up enable"] -pub type GPIO52_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO52_FUN_WPU` writer - pull-up enable"] -pub type GPIO52_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO52_FUN_IE` reader - input enable"] -pub type GPIO52_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO52_FUN_IE` writer - input enable"] -pub type GPIO52_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO52_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO52_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO52_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO52_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO52_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO52_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO52_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO52_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO52_FILTER_EN` reader - input filter enable"] -pub type GPIO52_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO52_FILTER_EN` writer - input filter enable"] -pub type GPIO52_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio52_mcu_oe(&self) -> GPIO52_MCU_OE_R { - GPIO52_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio52_slp_sel(&self) -> GPIO52_SLP_SEL_R { - GPIO52_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio52_mcu_wpd(&self) -> GPIO52_MCU_WPD_R { - GPIO52_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio52_mcu_wpu(&self) -> GPIO52_MCU_WPU_R { - GPIO52_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio52_mcu_ie(&self) -> GPIO52_MCU_IE_R { - GPIO52_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio52_mcu_drv(&self) -> GPIO52_MCU_DRV_R { - GPIO52_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio52_fun_wpd(&self) -> GPIO52_FUN_WPD_R { - GPIO52_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio52_fun_wpu(&self) -> GPIO52_FUN_WPU_R { - GPIO52_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio52_fun_ie(&self) -> GPIO52_FUN_IE_R { - GPIO52_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio52_fun_drv(&self) -> GPIO52_FUN_DRV_R { - GPIO52_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio52_mcu_sel(&self) -> GPIO52_MCU_SEL_R { - GPIO52_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio52_filter_en(&self) -> GPIO52_FILTER_EN_R { - GPIO52_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio52") - .field( - "gpio52_mcu_oe", - &format_args!("{}", self.gpio52_mcu_oe().bit()), - ) - .field( - "gpio52_slp_sel", - &format_args!("{}", self.gpio52_slp_sel().bit()), - ) - .field( - "gpio52_mcu_wpd", - &format_args!("{}", self.gpio52_mcu_wpd().bit()), - ) - .field( - "gpio52_mcu_wpu", - &format_args!("{}", self.gpio52_mcu_wpu().bit()), - ) - .field( - "gpio52_mcu_ie", - &format_args!("{}", self.gpio52_mcu_ie().bit()), - ) - .field( - "gpio52_mcu_drv", - &format_args!("{}", self.gpio52_mcu_drv().bits()), - ) - .field( - "gpio52_fun_wpd", - &format_args!("{}", self.gpio52_fun_wpd().bit()), - ) - .field( - "gpio52_fun_wpu", - &format_args!("{}", self.gpio52_fun_wpu().bit()), - ) - .field( - "gpio52_fun_ie", - &format_args!("{}", self.gpio52_fun_ie().bit()), - ) - .field( - "gpio52_fun_drv", - &format_args!("{}", self.gpio52_fun_drv().bits()), - ) - .field( - "gpio52_mcu_sel", - &format_args!("{}", self.gpio52_mcu_sel().bits()), - ) - .field( - "gpio52_filter_en", - &format_args!("{}", self.gpio52_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio52_mcu_oe(&mut self) -> GPIO52_MCU_OE_W { - GPIO52_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio52_slp_sel(&mut self) -> GPIO52_SLP_SEL_W { - GPIO52_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio52_mcu_wpd(&mut self) -> GPIO52_MCU_WPD_W { - GPIO52_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio52_mcu_wpu(&mut self) -> GPIO52_MCU_WPU_W { - GPIO52_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio52_mcu_ie(&mut self) -> GPIO52_MCU_IE_W { - GPIO52_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio52_mcu_drv(&mut self) -> GPIO52_MCU_DRV_W { - GPIO52_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio52_fun_wpd(&mut self) -> GPIO52_FUN_WPD_W { - GPIO52_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio52_fun_wpu(&mut self) -> GPIO52_FUN_WPU_W { - GPIO52_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio52_fun_ie(&mut self) -> GPIO52_FUN_IE_W { - GPIO52_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio52_fun_drv(&mut self) -> GPIO52_FUN_DRV_W { - GPIO52_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio52_mcu_sel(&mut self) -> GPIO52_MCU_SEL_W { - GPIO52_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio52_filter_en(&mut self) -> GPIO52_FILTER_EN_W { - GPIO52_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio52\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio52::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio52::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO52_SPEC; -impl crate::RegisterSpec for GPIO52_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio52::R`](R) reader structure"] -impl crate::Readable for GPIO52_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio52::W`](W) writer structure"] -impl crate::Writable for GPIO52_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio52 to value 0x0800"] -impl crate::Resettable for GPIO52_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio53.rs b/esp32p4/src/io_mux/gpio53.rs deleted file mode 100644 index a46512f987..0000000000 --- a/esp32p4/src/io_mux/gpio53.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio53` reader"] -pub type R = crate::R; -#[doc = "Register `gpio53` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO53_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO53_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO53_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO53_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO53_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO53_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO53_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO53_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO53_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO53_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO53_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO53_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO53_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO53_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO53_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO53_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO53_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO53_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO53_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO53_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO53_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO53_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO53_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO53_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO53_FUN_WPD` reader - pull-down enable"] -pub type GPIO53_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO53_FUN_WPD` writer - pull-down enable"] -pub type GPIO53_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO53_FUN_WPU` reader - pull-up enable"] -pub type GPIO53_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO53_FUN_WPU` writer - pull-up enable"] -pub type GPIO53_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO53_FUN_IE` reader - input enable"] -pub type GPIO53_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO53_FUN_IE` writer - input enable"] -pub type GPIO53_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO53_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO53_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO53_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO53_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO53_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO53_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO53_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO53_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO53_FILTER_EN` reader - input filter enable"] -pub type GPIO53_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO53_FILTER_EN` writer - input filter enable"] -pub type GPIO53_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio53_mcu_oe(&self) -> GPIO53_MCU_OE_R { - GPIO53_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio53_slp_sel(&self) -> GPIO53_SLP_SEL_R { - GPIO53_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio53_mcu_wpd(&self) -> GPIO53_MCU_WPD_R { - GPIO53_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio53_mcu_wpu(&self) -> GPIO53_MCU_WPU_R { - GPIO53_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio53_mcu_ie(&self) -> GPIO53_MCU_IE_R { - GPIO53_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio53_mcu_drv(&self) -> GPIO53_MCU_DRV_R { - GPIO53_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio53_fun_wpd(&self) -> GPIO53_FUN_WPD_R { - GPIO53_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio53_fun_wpu(&self) -> GPIO53_FUN_WPU_R { - GPIO53_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio53_fun_ie(&self) -> GPIO53_FUN_IE_R { - GPIO53_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio53_fun_drv(&self) -> GPIO53_FUN_DRV_R { - GPIO53_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio53_mcu_sel(&self) -> GPIO53_MCU_SEL_R { - GPIO53_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio53_filter_en(&self) -> GPIO53_FILTER_EN_R { - GPIO53_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio53") - .field( - "gpio53_mcu_oe", - &format_args!("{}", self.gpio53_mcu_oe().bit()), - ) - .field( - "gpio53_slp_sel", - &format_args!("{}", self.gpio53_slp_sel().bit()), - ) - .field( - "gpio53_mcu_wpd", - &format_args!("{}", self.gpio53_mcu_wpd().bit()), - ) - .field( - "gpio53_mcu_wpu", - &format_args!("{}", self.gpio53_mcu_wpu().bit()), - ) - .field( - "gpio53_mcu_ie", - &format_args!("{}", self.gpio53_mcu_ie().bit()), - ) - .field( - "gpio53_mcu_drv", - &format_args!("{}", self.gpio53_mcu_drv().bits()), - ) - .field( - "gpio53_fun_wpd", - &format_args!("{}", self.gpio53_fun_wpd().bit()), - ) - .field( - "gpio53_fun_wpu", - &format_args!("{}", self.gpio53_fun_wpu().bit()), - ) - .field( - "gpio53_fun_ie", - &format_args!("{}", self.gpio53_fun_ie().bit()), - ) - .field( - "gpio53_fun_drv", - &format_args!("{}", self.gpio53_fun_drv().bits()), - ) - .field( - "gpio53_mcu_sel", - &format_args!("{}", self.gpio53_mcu_sel().bits()), - ) - .field( - "gpio53_filter_en", - &format_args!("{}", self.gpio53_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio53_mcu_oe(&mut self) -> GPIO53_MCU_OE_W { - GPIO53_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio53_slp_sel(&mut self) -> GPIO53_SLP_SEL_W { - GPIO53_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio53_mcu_wpd(&mut self) -> GPIO53_MCU_WPD_W { - GPIO53_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio53_mcu_wpu(&mut self) -> GPIO53_MCU_WPU_W { - GPIO53_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio53_mcu_ie(&mut self) -> GPIO53_MCU_IE_W { - GPIO53_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio53_mcu_drv(&mut self) -> GPIO53_MCU_DRV_W { - GPIO53_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio53_fun_wpd(&mut self) -> GPIO53_FUN_WPD_W { - GPIO53_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio53_fun_wpu(&mut self) -> GPIO53_FUN_WPU_W { - GPIO53_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio53_fun_ie(&mut self) -> GPIO53_FUN_IE_W { - GPIO53_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio53_fun_drv(&mut self) -> GPIO53_FUN_DRV_W { - GPIO53_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio53_mcu_sel(&mut self) -> GPIO53_MCU_SEL_W { - GPIO53_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio53_filter_en(&mut self) -> GPIO53_FILTER_EN_W { - GPIO53_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio53\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio53::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio53::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO53_SPEC; -impl crate::RegisterSpec for GPIO53_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio53::R`](R) reader structure"] -impl crate::Readable for GPIO53_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio53::W`](W) writer structure"] -impl crate::Writable for GPIO53_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio53 to value 0x0800"] -impl crate::Resettable for GPIO53_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio54.rs b/esp32p4/src/io_mux/gpio54.rs deleted file mode 100644 index ee6dba0958..0000000000 --- a/esp32p4/src/io_mux/gpio54.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio54` reader"] -pub type R = crate::R; -#[doc = "Register `gpio54` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO54_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO54_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO54_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO54_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO54_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO54_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO54_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO54_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO54_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO54_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO54_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO54_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO54_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO54_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO54_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO54_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO54_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO54_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO54_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO54_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO54_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO54_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO54_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO54_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO54_FUN_WPD` reader - pull-down enable"] -pub type GPIO54_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO54_FUN_WPD` writer - pull-down enable"] -pub type GPIO54_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO54_FUN_WPU` reader - pull-up enable"] -pub type GPIO54_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO54_FUN_WPU` writer - pull-up enable"] -pub type GPIO54_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO54_FUN_IE` reader - input enable"] -pub type GPIO54_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO54_FUN_IE` writer - input enable"] -pub type GPIO54_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO54_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO54_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO54_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO54_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO54_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO54_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO54_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO54_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO54_FILTER_EN` reader - input filter enable"] -pub type GPIO54_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO54_FILTER_EN` writer - input filter enable"] -pub type GPIO54_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio54_mcu_oe(&self) -> GPIO54_MCU_OE_R { - GPIO54_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio54_slp_sel(&self) -> GPIO54_SLP_SEL_R { - GPIO54_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio54_mcu_wpd(&self) -> GPIO54_MCU_WPD_R { - GPIO54_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio54_mcu_wpu(&self) -> GPIO54_MCU_WPU_R { - GPIO54_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio54_mcu_ie(&self) -> GPIO54_MCU_IE_R { - GPIO54_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio54_mcu_drv(&self) -> GPIO54_MCU_DRV_R { - GPIO54_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio54_fun_wpd(&self) -> GPIO54_FUN_WPD_R { - GPIO54_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio54_fun_wpu(&self) -> GPIO54_FUN_WPU_R { - GPIO54_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio54_fun_ie(&self) -> GPIO54_FUN_IE_R { - GPIO54_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio54_fun_drv(&self) -> GPIO54_FUN_DRV_R { - GPIO54_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio54_mcu_sel(&self) -> GPIO54_MCU_SEL_R { - GPIO54_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio54_filter_en(&self) -> GPIO54_FILTER_EN_R { - GPIO54_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio54") - .field( - "gpio54_mcu_oe", - &format_args!("{}", self.gpio54_mcu_oe().bit()), - ) - .field( - "gpio54_slp_sel", - &format_args!("{}", self.gpio54_slp_sel().bit()), - ) - .field( - "gpio54_mcu_wpd", - &format_args!("{}", self.gpio54_mcu_wpd().bit()), - ) - .field( - "gpio54_mcu_wpu", - &format_args!("{}", self.gpio54_mcu_wpu().bit()), - ) - .field( - "gpio54_mcu_ie", - &format_args!("{}", self.gpio54_mcu_ie().bit()), - ) - .field( - "gpio54_mcu_drv", - &format_args!("{}", self.gpio54_mcu_drv().bits()), - ) - .field( - "gpio54_fun_wpd", - &format_args!("{}", self.gpio54_fun_wpd().bit()), - ) - .field( - "gpio54_fun_wpu", - &format_args!("{}", self.gpio54_fun_wpu().bit()), - ) - .field( - "gpio54_fun_ie", - &format_args!("{}", self.gpio54_fun_ie().bit()), - ) - .field( - "gpio54_fun_drv", - &format_args!("{}", self.gpio54_fun_drv().bits()), - ) - .field( - "gpio54_mcu_sel", - &format_args!("{}", self.gpio54_mcu_sel().bits()), - ) - .field( - "gpio54_filter_en", - &format_args!("{}", self.gpio54_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio54_mcu_oe(&mut self) -> GPIO54_MCU_OE_W { - GPIO54_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio54_slp_sel(&mut self) -> GPIO54_SLP_SEL_W { - GPIO54_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio54_mcu_wpd(&mut self) -> GPIO54_MCU_WPD_W { - GPIO54_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio54_mcu_wpu(&mut self) -> GPIO54_MCU_WPU_W { - GPIO54_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio54_mcu_ie(&mut self) -> GPIO54_MCU_IE_W { - GPIO54_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio54_mcu_drv(&mut self) -> GPIO54_MCU_DRV_W { - GPIO54_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio54_fun_wpd(&mut self) -> GPIO54_FUN_WPD_W { - GPIO54_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio54_fun_wpu(&mut self) -> GPIO54_FUN_WPU_W { - GPIO54_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio54_fun_ie(&mut self) -> GPIO54_FUN_IE_W { - GPIO54_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio54_fun_drv(&mut self) -> GPIO54_FUN_DRV_W { - GPIO54_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio54_mcu_sel(&mut self) -> GPIO54_MCU_SEL_W { - GPIO54_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio54_filter_en(&mut self) -> GPIO54_FILTER_EN_W { - GPIO54_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio54\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio54::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio54::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO54_SPEC; -impl crate::RegisterSpec for GPIO54_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio54::R`](R) reader structure"] -impl crate::Readable for GPIO54_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio54::W`](W) writer structure"] -impl crate::Writable for GPIO54_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio54 to value 0x0800"] -impl crate::Resettable for GPIO54_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio55.rs b/esp32p4/src/io_mux/gpio55.rs deleted file mode 100644 index 8021a3a714..0000000000 --- a/esp32p4/src/io_mux/gpio55.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio55` reader"] -pub type R = crate::R; -#[doc = "Register `gpio55` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO55_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO55_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO55_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO55_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO55_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO55_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO55_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO55_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO55_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO55_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO55_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO55_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO55_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO55_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO55_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO55_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO55_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO55_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO55_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO55_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO55_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO55_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO55_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO55_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO55_FUN_WPD` reader - pull-down enable"] -pub type GPIO55_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO55_FUN_WPD` writer - pull-down enable"] -pub type GPIO55_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO55_FUN_WPU` reader - pull-up enable"] -pub type GPIO55_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO55_FUN_WPU` writer - pull-up enable"] -pub type GPIO55_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO55_FUN_IE` reader - input enable"] -pub type GPIO55_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO55_FUN_IE` writer - input enable"] -pub type GPIO55_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO55_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO55_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO55_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO55_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO55_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO55_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO55_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO55_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO55_FILTER_EN` reader - input filter enable"] -pub type GPIO55_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO55_FILTER_EN` writer - input filter enable"] -pub type GPIO55_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio55_mcu_oe(&self) -> GPIO55_MCU_OE_R { - GPIO55_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio55_slp_sel(&self) -> GPIO55_SLP_SEL_R { - GPIO55_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio55_mcu_wpd(&self) -> GPIO55_MCU_WPD_R { - GPIO55_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio55_mcu_wpu(&self) -> GPIO55_MCU_WPU_R { - GPIO55_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio55_mcu_ie(&self) -> GPIO55_MCU_IE_R { - GPIO55_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio55_mcu_drv(&self) -> GPIO55_MCU_DRV_R { - GPIO55_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio55_fun_wpd(&self) -> GPIO55_FUN_WPD_R { - GPIO55_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio55_fun_wpu(&self) -> GPIO55_FUN_WPU_R { - GPIO55_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio55_fun_ie(&self) -> GPIO55_FUN_IE_R { - GPIO55_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio55_fun_drv(&self) -> GPIO55_FUN_DRV_R { - GPIO55_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio55_mcu_sel(&self) -> GPIO55_MCU_SEL_R { - GPIO55_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio55_filter_en(&self) -> GPIO55_FILTER_EN_R { - GPIO55_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio55") - .field( - "gpio55_mcu_oe", - &format_args!("{}", self.gpio55_mcu_oe().bit()), - ) - .field( - "gpio55_slp_sel", - &format_args!("{}", self.gpio55_slp_sel().bit()), - ) - .field( - "gpio55_mcu_wpd", - &format_args!("{}", self.gpio55_mcu_wpd().bit()), - ) - .field( - "gpio55_mcu_wpu", - &format_args!("{}", self.gpio55_mcu_wpu().bit()), - ) - .field( - "gpio55_mcu_ie", - &format_args!("{}", self.gpio55_mcu_ie().bit()), - ) - .field( - "gpio55_mcu_drv", - &format_args!("{}", self.gpio55_mcu_drv().bits()), - ) - .field( - "gpio55_fun_wpd", - &format_args!("{}", self.gpio55_fun_wpd().bit()), - ) - .field( - "gpio55_fun_wpu", - &format_args!("{}", self.gpio55_fun_wpu().bit()), - ) - .field( - "gpio55_fun_ie", - &format_args!("{}", self.gpio55_fun_ie().bit()), - ) - .field( - "gpio55_fun_drv", - &format_args!("{}", self.gpio55_fun_drv().bits()), - ) - .field( - "gpio55_mcu_sel", - &format_args!("{}", self.gpio55_mcu_sel().bits()), - ) - .field( - "gpio55_filter_en", - &format_args!("{}", self.gpio55_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio55_mcu_oe(&mut self) -> GPIO55_MCU_OE_W { - GPIO55_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio55_slp_sel(&mut self) -> GPIO55_SLP_SEL_W { - GPIO55_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio55_mcu_wpd(&mut self) -> GPIO55_MCU_WPD_W { - GPIO55_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio55_mcu_wpu(&mut self) -> GPIO55_MCU_WPU_W { - GPIO55_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio55_mcu_ie(&mut self) -> GPIO55_MCU_IE_W { - GPIO55_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio55_mcu_drv(&mut self) -> GPIO55_MCU_DRV_W { - GPIO55_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio55_fun_wpd(&mut self) -> GPIO55_FUN_WPD_W { - GPIO55_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio55_fun_wpu(&mut self) -> GPIO55_FUN_WPU_W { - GPIO55_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio55_fun_ie(&mut self) -> GPIO55_FUN_IE_W { - GPIO55_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio55_fun_drv(&mut self) -> GPIO55_FUN_DRV_W { - GPIO55_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio55_mcu_sel(&mut self) -> GPIO55_MCU_SEL_W { - GPIO55_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio55_filter_en(&mut self) -> GPIO55_FILTER_EN_W { - GPIO55_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio55\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio55::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio55::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO55_SPEC; -impl crate::RegisterSpec for GPIO55_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio55::R`](R) reader structure"] -impl crate::Readable for GPIO55_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio55::W`](W) writer structure"] -impl crate::Writable for GPIO55_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio55 to value 0x0800"] -impl crate::Resettable for GPIO55_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio56.rs b/esp32p4/src/io_mux/gpio56.rs deleted file mode 100644 index 42317bab97..0000000000 --- a/esp32p4/src/io_mux/gpio56.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio56` reader"] -pub type R = crate::R; -#[doc = "Register `gpio56` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO56_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO56_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO56_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO56_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO56_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO56_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO56_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO56_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO56_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO56_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO56_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO56_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO56_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO56_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO56_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO56_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO56_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO56_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO56_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO56_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO56_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO56_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO56_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO56_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO56_FUN_WPD` reader - pull-down enable"] -pub type GPIO56_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO56_FUN_WPD` writer - pull-down enable"] -pub type GPIO56_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO56_FUN_WPU` reader - pull-up enable"] -pub type GPIO56_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO56_FUN_WPU` writer - pull-up enable"] -pub type GPIO56_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO56_FUN_IE` reader - input enable"] -pub type GPIO56_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO56_FUN_IE` writer - input enable"] -pub type GPIO56_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO56_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO56_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO56_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO56_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO56_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO56_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO56_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO56_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO56_FILTER_EN` reader - input filter enable"] -pub type GPIO56_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO56_FILTER_EN` writer - input filter enable"] -pub type GPIO56_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio56_mcu_oe(&self) -> GPIO56_MCU_OE_R { - GPIO56_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio56_slp_sel(&self) -> GPIO56_SLP_SEL_R { - GPIO56_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio56_mcu_wpd(&self) -> GPIO56_MCU_WPD_R { - GPIO56_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio56_mcu_wpu(&self) -> GPIO56_MCU_WPU_R { - GPIO56_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio56_mcu_ie(&self) -> GPIO56_MCU_IE_R { - GPIO56_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio56_mcu_drv(&self) -> GPIO56_MCU_DRV_R { - GPIO56_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio56_fun_wpd(&self) -> GPIO56_FUN_WPD_R { - GPIO56_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio56_fun_wpu(&self) -> GPIO56_FUN_WPU_R { - GPIO56_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio56_fun_ie(&self) -> GPIO56_FUN_IE_R { - GPIO56_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio56_fun_drv(&self) -> GPIO56_FUN_DRV_R { - GPIO56_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio56_mcu_sel(&self) -> GPIO56_MCU_SEL_R { - GPIO56_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio56_filter_en(&self) -> GPIO56_FILTER_EN_R { - GPIO56_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio56") - .field( - "gpio56_mcu_oe", - &format_args!("{}", self.gpio56_mcu_oe().bit()), - ) - .field( - "gpio56_slp_sel", - &format_args!("{}", self.gpio56_slp_sel().bit()), - ) - .field( - "gpio56_mcu_wpd", - &format_args!("{}", self.gpio56_mcu_wpd().bit()), - ) - .field( - "gpio56_mcu_wpu", - &format_args!("{}", self.gpio56_mcu_wpu().bit()), - ) - .field( - "gpio56_mcu_ie", - &format_args!("{}", self.gpio56_mcu_ie().bit()), - ) - .field( - "gpio56_mcu_drv", - &format_args!("{}", self.gpio56_mcu_drv().bits()), - ) - .field( - "gpio56_fun_wpd", - &format_args!("{}", self.gpio56_fun_wpd().bit()), - ) - .field( - "gpio56_fun_wpu", - &format_args!("{}", self.gpio56_fun_wpu().bit()), - ) - .field( - "gpio56_fun_ie", - &format_args!("{}", self.gpio56_fun_ie().bit()), - ) - .field( - "gpio56_fun_drv", - &format_args!("{}", self.gpio56_fun_drv().bits()), - ) - .field( - "gpio56_mcu_sel", - &format_args!("{}", self.gpio56_mcu_sel().bits()), - ) - .field( - "gpio56_filter_en", - &format_args!("{}", self.gpio56_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio56_mcu_oe(&mut self) -> GPIO56_MCU_OE_W { - GPIO56_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio56_slp_sel(&mut self) -> GPIO56_SLP_SEL_W { - GPIO56_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio56_mcu_wpd(&mut self) -> GPIO56_MCU_WPD_W { - GPIO56_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio56_mcu_wpu(&mut self) -> GPIO56_MCU_WPU_W { - GPIO56_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio56_mcu_ie(&mut self) -> GPIO56_MCU_IE_W { - GPIO56_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio56_mcu_drv(&mut self) -> GPIO56_MCU_DRV_W { - GPIO56_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio56_fun_wpd(&mut self) -> GPIO56_FUN_WPD_W { - GPIO56_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio56_fun_wpu(&mut self) -> GPIO56_FUN_WPU_W { - GPIO56_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio56_fun_ie(&mut self) -> GPIO56_FUN_IE_W { - GPIO56_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio56_fun_drv(&mut self) -> GPIO56_FUN_DRV_W { - GPIO56_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio56_mcu_sel(&mut self) -> GPIO56_MCU_SEL_W { - GPIO56_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio56_filter_en(&mut self) -> GPIO56_FILTER_EN_W { - GPIO56_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio56\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio56::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio56::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO56_SPEC; -impl crate::RegisterSpec for GPIO56_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio56::R`](R) reader structure"] -impl crate::Readable for GPIO56_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio56::W`](W) writer structure"] -impl crate::Writable for GPIO56_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio56 to value 0x0800"] -impl crate::Resettable for GPIO56_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio6.rs b/esp32p4/src/io_mux/gpio6.rs deleted file mode 100644 index deac9cdfcb..0000000000 --- a/esp32p4/src/io_mux/gpio6.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio6` reader"] -pub type R = crate::R; -#[doc = "Register `gpio6` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO6_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO6_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO6_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO6_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO6_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO6_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO6_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO6_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO6_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO6_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO6_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO6_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO6_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO6_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO6_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO6_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO6_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO6_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO6_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO6_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO6_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO6_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO6_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO6_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO6_FUN_WPD` reader - pull-down enable"] -pub type GPIO6_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO6_FUN_WPD` writer - pull-down enable"] -pub type GPIO6_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO6_FUN_WPU` reader - pull-up enable"] -pub type GPIO6_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO6_FUN_WPU` writer - pull-up enable"] -pub type GPIO6_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO6_FUN_IE` reader - input enable"] -pub type GPIO6_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO6_FUN_IE` writer - input enable"] -pub type GPIO6_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO6_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO6_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO6_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO6_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO6_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO6_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO6_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO6_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO6_FILTER_EN` reader - input filter enable"] -pub type GPIO6_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO6_FILTER_EN` writer - input filter enable"] -pub type GPIO6_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio6_mcu_oe(&self) -> GPIO6_MCU_OE_R { - GPIO6_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio6_slp_sel(&self) -> GPIO6_SLP_SEL_R { - GPIO6_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio6_mcu_wpd(&self) -> GPIO6_MCU_WPD_R { - GPIO6_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio6_mcu_wpu(&self) -> GPIO6_MCU_WPU_R { - GPIO6_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio6_mcu_ie(&self) -> GPIO6_MCU_IE_R { - GPIO6_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio6_mcu_drv(&self) -> GPIO6_MCU_DRV_R { - GPIO6_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio6_fun_wpd(&self) -> GPIO6_FUN_WPD_R { - GPIO6_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio6_fun_wpu(&self) -> GPIO6_FUN_WPU_R { - GPIO6_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio6_fun_ie(&self) -> GPIO6_FUN_IE_R { - GPIO6_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio6_fun_drv(&self) -> GPIO6_FUN_DRV_R { - GPIO6_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio6_mcu_sel(&self) -> GPIO6_MCU_SEL_R { - GPIO6_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio6_filter_en(&self) -> GPIO6_FILTER_EN_R { - GPIO6_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio6") - .field( - "gpio6_mcu_oe", - &format_args!("{}", self.gpio6_mcu_oe().bit()), - ) - .field( - "gpio6_slp_sel", - &format_args!("{}", self.gpio6_slp_sel().bit()), - ) - .field( - "gpio6_mcu_wpd", - &format_args!("{}", self.gpio6_mcu_wpd().bit()), - ) - .field( - "gpio6_mcu_wpu", - &format_args!("{}", self.gpio6_mcu_wpu().bit()), - ) - .field( - "gpio6_mcu_ie", - &format_args!("{}", self.gpio6_mcu_ie().bit()), - ) - .field( - "gpio6_mcu_drv", - &format_args!("{}", self.gpio6_mcu_drv().bits()), - ) - .field( - "gpio6_fun_wpd", - &format_args!("{}", self.gpio6_fun_wpd().bit()), - ) - .field( - "gpio6_fun_wpu", - &format_args!("{}", self.gpio6_fun_wpu().bit()), - ) - .field( - "gpio6_fun_ie", - &format_args!("{}", self.gpio6_fun_ie().bit()), - ) - .field( - "gpio6_fun_drv", - &format_args!("{}", self.gpio6_fun_drv().bits()), - ) - .field( - "gpio6_mcu_sel", - &format_args!("{}", self.gpio6_mcu_sel().bits()), - ) - .field( - "gpio6_filter_en", - &format_args!("{}", self.gpio6_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio6_mcu_oe(&mut self) -> GPIO6_MCU_OE_W { - GPIO6_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio6_slp_sel(&mut self) -> GPIO6_SLP_SEL_W { - GPIO6_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio6_mcu_wpd(&mut self) -> GPIO6_MCU_WPD_W { - GPIO6_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio6_mcu_wpu(&mut self) -> GPIO6_MCU_WPU_W { - GPIO6_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio6_mcu_ie(&mut self) -> GPIO6_MCU_IE_W { - GPIO6_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio6_mcu_drv(&mut self) -> GPIO6_MCU_DRV_W { - GPIO6_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio6_fun_wpd(&mut self) -> GPIO6_FUN_WPD_W { - GPIO6_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio6_fun_wpu(&mut self) -> GPIO6_FUN_WPU_W { - GPIO6_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio6_fun_ie(&mut self) -> GPIO6_FUN_IE_W { - GPIO6_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio6_fun_drv(&mut self) -> GPIO6_FUN_DRV_W { - GPIO6_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio6_mcu_sel(&mut self) -> GPIO6_MCU_SEL_W { - GPIO6_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio6_filter_en(&mut self) -> GPIO6_FILTER_EN_W { - GPIO6_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO6_SPEC; -impl crate::RegisterSpec for GPIO6_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio6::R`](R) reader structure"] -impl crate::Readable for GPIO6_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio6::W`](W) writer structure"] -impl crate::Writable for GPIO6_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio6 to value 0x0800"] -impl crate::Resettable for GPIO6_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio7.rs b/esp32p4/src/io_mux/gpio7.rs deleted file mode 100644 index 6b2e0e04ef..0000000000 --- a/esp32p4/src/io_mux/gpio7.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio7` reader"] -pub type R = crate::R; -#[doc = "Register `gpio7` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO7_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO7_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO7_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO7_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO7_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO7_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO7_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO7_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO7_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO7_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO7_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO7_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO7_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO7_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO7_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO7_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO7_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO7_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO7_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO7_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO7_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO7_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO7_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO7_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO7_FUN_WPD` reader - pull-down enable"] -pub type GPIO7_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO7_FUN_WPD` writer - pull-down enable"] -pub type GPIO7_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO7_FUN_WPU` reader - pull-up enable"] -pub type GPIO7_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO7_FUN_WPU` writer - pull-up enable"] -pub type GPIO7_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO7_FUN_IE` reader - input enable"] -pub type GPIO7_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO7_FUN_IE` writer - input enable"] -pub type GPIO7_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO7_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO7_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO7_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO7_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO7_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO7_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO7_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO7_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO7_FILTER_EN` reader - input filter enable"] -pub type GPIO7_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO7_FILTER_EN` writer - input filter enable"] -pub type GPIO7_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio7_mcu_oe(&self) -> GPIO7_MCU_OE_R { - GPIO7_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio7_slp_sel(&self) -> GPIO7_SLP_SEL_R { - GPIO7_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio7_mcu_wpd(&self) -> GPIO7_MCU_WPD_R { - GPIO7_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio7_mcu_wpu(&self) -> GPIO7_MCU_WPU_R { - GPIO7_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio7_mcu_ie(&self) -> GPIO7_MCU_IE_R { - GPIO7_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio7_mcu_drv(&self) -> GPIO7_MCU_DRV_R { - GPIO7_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio7_fun_wpd(&self) -> GPIO7_FUN_WPD_R { - GPIO7_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio7_fun_wpu(&self) -> GPIO7_FUN_WPU_R { - GPIO7_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio7_fun_ie(&self) -> GPIO7_FUN_IE_R { - GPIO7_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio7_fun_drv(&self) -> GPIO7_FUN_DRV_R { - GPIO7_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio7_mcu_sel(&self) -> GPIO7_MCU_SEL_R { - GPIO7_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio7_filter_en(&self) -> GPIO7_FILTER_EN_R { - GPIO7_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio7") - .field( - "gpio7_mcu_oe", - &format_args!("{}", self.gpio7_mcu_oe().bit()), - ) - .field( - "gpio7_slp_sel", - &format_args!("{}", self.gpio7_slp_sel().bit()), - ) - .field( - "gpio7_mcu_wpd", - &format_args!("{}", self.gpio7_mcu_wpd().bit()), - ) - .field( - "gpio7_mcu_wpu", - &format_args!("{}", self.gpio7_mcu_wpu().bit()), - ) - .field( - "gpio7_mcu_ie", - &format_args!("{}", self.gpio7_mcu_ie().bit()), - ) - .field( - "gpio7_mcu_drv", - &format_args!("{}", self.gpio7_mcu_drv().bits()), - ) - .field( - "gpio7_fun_wpd", - &format_args!("{}", self.gpio7_fun_wpd().bit()), - ) - .field( - "gpio7_fun_wpu", - &format_args!("{}", self.gpio7_fun_wpu().bit()), - ) - .field( - "gpio7_fun_ie", - &format_args!("{}", self.gpio7_fun_ie().bit()), - ) - .field( - "gpio7_fun_drv", - &format_args!("{}", self.gpio7_fun_drv().bits()), - ) - .field( - "gpio7_mcu_sel", - &format_args!("{}", self.gpio7_mcu_sel().bits()), - ) - .field( - "gpio7_filter_en", - &format_args!("{}", self.gpio7_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio7_mcu_oe(&mut self) -> GPIO7_MCU_OE_W { - GPIO7_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio7_slp_sel(&mut self) -> GPIO7_SLP_SEL_W { - GPIO7_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio7_mcu_wpd(&mut self) -> GPIO7_MCU_WPD_W { - GPIO7_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio7_mcu_wpu(&mut self) -> GPIO7_MCU_WPU_W { - GPIO7_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio7_mcu_ie(&mut self) -> GPIO7_MCU_IE_W { - GPIO7_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio7_mcu_drv(&mut self) -> GPIO7_MCU_DRV_W { - GPIO7_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio7_fun_wpd(&mut self) -> GPIO7_FUN_WPD_W { - GPIO7_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio7_fun_wpu(&mut self) -> GPIO7_FUN_WPU_W { - GPIO7_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio7_fun_ie(&mut self) -> GPIO7_FUN_IE_W { - GPIO7_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio7_fun_drv(&mut self) -> GPIO7_FUN_DRV_W { - GPIO7_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio7_mcu_sel(&mut self) -> GPIO7_MCU_SEL_W { - GPIO7_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio7_filter_en(&mut self) -> GPIO7_FILTER_EN_W { - GPIO7_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO7_SPEC; -impl crate::RegisterSpec for GPIO7_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio7::R`](R) reader structure"] -impl crate::Readable for GPIO7_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio7::W`](W) writer structure"] -impl crate::Writable for GPIO7_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio7 to value 0x0800"] -impl crate::Resettable for GPIO7_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio8.rs b/esp32p4/src/io_mux/gpio8.rs deleted file mode 100644 index 1c93f551be..0000000000 --- a/esp32p4/src/io_mux/gpio8.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio8` reader"] -pub type R = crate::R; -#[doc = "Register `gpio8` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO8_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO8_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO8_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO8_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO8_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO8_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO8_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO8_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO8_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO8_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO8_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO8_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO8_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO8_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO8_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO8_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO8_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO8_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO8_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO8_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO8_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO8_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO8_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO8_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO8_FUN_WPD` reader - pull-down enable"] -pub type GPIO8_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO8_FUN_WPD` writer - pull-down enable"] -pub type GPIO8_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO8_FUN_WPU` reader - pull-up enable"] -pub type GPIO8_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO8_FUN_WPU` writer - pull-up enable"] -pub type GPIO8_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO8_FUN_IE` reader - input enable"] -pub type GPIO8_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO8_FUN_IE` writer - input enable"] -pub type GPIO8_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO8_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO8_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO8_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO8_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO8_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO8_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO8_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO8_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO8_FILTER_EN` reader - input filter enable"] -pub type GPIO8_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO8_FILTER_EN` writer - input filter enable"] -pub type GPIO8_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio8_mcu_oe(&self) -> GPIO8_MCU_OE_R { - GPIO8_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio8_slp_sel(&self) -> GPIO8_SLP_SEL_R { - GPIO8_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio8_mcu_wpd(&self) -> GPIO8_MCU_WPD_R { - GPIO8_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio8_mcu_wpu(&self) -> GPIO8_MCU_WPU_R { - GPIO8_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio8_mcu_ie(&self) -> GPIO8_MCU_IE_R { - GPIO8_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio8_mcu_drv(&self) -> GPIO8_MCU_DRV_R { - GPIO8_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio8_fun_wpd(&self) -> GPIO8_FUN_WPD_R { - GPIO8_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio8_fun_wpu(&self) -> GPIO8_FUN_WPU_R { - GPIO8_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio8_fun_ie(&self) -> GPIO8_FUN_IE_R { - GPIO8_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio8_fun_drv(&self) -> GPIO8_FUN_DRV_R { - GPIO8_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio8_mcu_sel(&self) -> GPIO8_MCU_SEL_R { - GPIO8_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio8_filter_en(&self) -> GPIO8_FILTER_EN_R { - GPIO8_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio8") - .field( - "gpio8_mcu_oe", - &format_args!("{}", self.gpio8_mcu_oe().bit()), - ) - .field( - "gpio8_slp_sel", - &format_args!("{}", self.gpio8_slp_sel().bit()), - ) - .field( - "gpio8_mcu_wpd", - &format_args!("{}", self.gpio8_mcu_wpd().bit()), - ) - .field( - "gpio8_mcu_wpu", - &format_args!("{}", self.gpio8_mcu_wpu().bit()), - ) - .field( - "gpio8_mcu_ie", - &format_args!("{}", self.gpio8_mcu_ie().bit()), - ) - .field( - "gpio8_mcu_drv", - &format_args!("{}", self.gpio8_mcu_drv().bits()), - ) - .field( - "gpio8_fun_wpd", - &format_args!("{}", self.gpio8_fun_wpd().bit()), - ) - .field( - "gpio8_fun_wpu", - &format_args!("{}", self.gpio8_fun_wpu().bit()), - ) - .field( - "gpio8_fun_ie", - &format_args!("{}", self.gpio8_fun_ie().bit()), - ) - .field( - "gpio8_fun_drv", - &format_args!("{}", self.gpio8_fun_drv().bits()), - ) - .field( - "gpio8_mcu_sel", - &format_args!("{}", self.gpio8_mcu_sel().bits()), - ) - .field( - "gpio8_filter_en", - &format_args!("{}", self.gpio8_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio8_mcu_oe(&mut self) -> GPIO8_MCU_OE_W { - GPIO8_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio8_slp_sel(&mut self) -> GPIO8_SLP_SEL_W { - GPIO8_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio8_mcu_wpd(&mut self) -> GPIO8_MCU_WPD_W { - GPIO8_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio8_mcu_wpu(&mut self) -> GPIO8_MCU_WPU_W { - GPIO8_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio8_mcu_ie(&mut self) -> GPIO8_MCU_IE_W { - GPIO8_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio8_mcu_drv(&mut self) -> GPIO8_MCU_DRV_W { - GPIO8_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio8_fun_wpd(&mut self) -> GPIO8_FUN_WPD_W { - GPIO8_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio8_fun_wpu(&mut self) -> GPIO8_FUN_WPU_W { - GPIO8_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio8_fun_ie(&mut self) -> GPIO8_FUN_IE_W { - GPIO8_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio8_fun_drv(&mut self) -> GPIO8_FUN_DRV_W { - GPIO8_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio8_mcu_sel(&mut self) -> GPIO8_MCU_SEL_W { - GPIO8_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio8_filter_en(&mut self) -> GPIO8_FILTER_EN_W { - GPIO8_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO8_SPEC; -impl crate::RegisterSpec for GPIO8_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio8::R`](R) reader structure"] -impl crate::Readable for GPIO8_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio8::W`](W) writer structure"] -impl crate::Writable for GPIO8_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio8 to value 0x0800"] -impl crate::Resettable for GPIO8_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/src/io_mux/gpio9.rs b/esp32p4/src/io_mux/gpio9.rs deleted file mode 100644 index dcc4371401..0000000000 --- a/esp32p4/src/io_mux/gpio9.rs +++ /dev/null @@ -1,275 +0,0 @@ -#[doc = "Register `gpio9` reader"] -pub type R = crate::R; -#[doc = "Register `gpio9` writer"] -pub type W = crate::W; -#[doc = "Field `GPIO9_MCU_OE` reader - output enable on sleep mode"] -pub type GPIO9_MCU_OE_R = crate::BitReader; -#[doc = "Field `GPIO9_MCU_OE` writer - output enable on sleep mode"] -pub type GPIO9_MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO9_SLP_SEL` reader - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO9_SLP_SEL_R = crate::BitReader; -#[doc = "Field `GPIO9_SLP_SEL` writer - io sleep mode enable. set 1 to enable sleep mode."] -pub type GPIO9_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO9_MCU_WPD` reader - pull-down enable on sleep mode"] -pub type GPIO9_MCU_WPD_R = crate::BitReader; -#[doc = "Field `GPIO9_MCU_WPD` writer - pull-down enable on sleep mode"] -pub type GPIO9_MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO9_MCU_WPU` reader - pull-up enable on sleep mode"] -pub type GPIO9_MCU_WPU_R = crate::BitReader; -#[doc = "Field `GPIO9_MCU_WPU` writer - pull-up enable on sleep mode"] -pub type GPIO9_MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO9_MCU_IE` reader - input enable on sleep mode"] -pub type GPIO9_MCU_IE_R = crate::BitReader; -#[doc = "Field `GPIO9_MCU_IE` writer - input enable on sleep mode"] -pub type GPIO9_MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO9_MCU_DRV` reader - select drive strenth on sleep mode"] -pub type GPIO9_MCU_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO9_MCU_DRV` writer - select drive strenth on sleep mode"] -pub type GPIO9_MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO9_FUN_WPD` reader - pull-down enable"] -pub type GPIO9_FUN_WPD_R = crate::BitReader; -#[doc = "Field `GPIO9_FUN_WPD` writer - pull-down enable"] -pub type GPIO9_FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO9_FUN_WPU` reader - pull-up enable"] -pub type GPIO9_FUN_WPU_R = crate::BitReader; -#[doc = "Field `GPIO9_FUN_WPU` writer - pull-up enable"] -pub type GPIO9_FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO9_FUN_IE` reader - input enable"] -pub type GPIO9_FUN_IE_R = crate::BitReader; -#[doc = "Field `GPIO9_FUN_IE` writer - input enable"] -pub type GPIO9_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GPIO9_FUN_DRV` reader - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO9_FUN_DRV_R = crate::FieldReader; -#[doc = "Field `GPIO9_FUN_DRV` writer - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] -pub type GPIO9_FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `GPIO9_MCU_SEL` reader - 0:select function0, 1:select function1 ..."] -pub type GPIO9_MCU_SEL_R = crate::FieldReader; -#[doc = "Field `GPIO9_MCU_SEL` writer - 0:select function0, 1:select function1 ..."] -pub type GPIO9_MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `GPIO9_FILTER_EN` reader - input filter enable"] -pub type GPIO9_FILTER_EN_R = crate::BitReader; -#[doc = "Field `GPIO9_FILTER_EN` writer - input filter enable"] -pub type GPIO9_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - pub fn gpio9_mcu_oe(&self) -> GPIO9_MCU_OE_R { - GPIO9_MCU_OE_R::new((self.bits & 1) != 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - pub fn gpio9_slp_sel(&self) -> GPIO9_SLP_SEL_R { - GPIO9_SLP_SEL_R::new(((self.bits >> 1) & 1) != 0) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - pub fn gpio9_mcu_wpd(&self) -> GPIO9_MCU_WPD_R { - GPIO9_MCU_WPD_R::new(((self.bits >> 2) & 1) != 0) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - pub fn gpio9_mcu_wpu(&self) -> GPIO9_MCU_WPU_R { - GPIO9_MCU_WPU_R::new(((self.bits >> 3) & 1) != 0) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - pub fn gpio9_mcu_ie(&self) -> GPIO9_MCU_IE_R { - GPIO9_MCU_IE_R::new(((self.bits >> 4) & 1) != 0) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - pub fn gpio9_mcu_drv(&self) -> GPIO9_MCU_DRV_R { - GPIO9_MCU_DRV_R::new(((self.bits >> 5) & 3) as u8) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - pub fn gpio9_fun_wpd(&self) -> GPIO9_FUN_WPD_R { - GPIO9_FUN_WPD_R::new(((self.bits >> 7) & 1) != 0) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - pub fn gpio9_fun_wpu(&self) -> GPIO9_FUN_WPU_R { - GPIO9_FUN_WPU_R::new(((self.bits >> 8) & 1) != 0) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - pub fn gpio9_fun_ie(&self) -> GPIO9_FUN_IE_R { - GPIO9_FUN_IE_R::new(((self.bits >> 9) & 1) != 0) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - pub fn gpio9_fun_drv(&self) -> GPIO9_FUN_DRV_R { - GPIO9_FUN_DRV_R::new(((self.bits >> 10) & 3) as u8) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - pub fn gpio9_mcu_sel(&self) -> GPIO9_MCU_SEL_R { - GPIO9_MCU_SEL_R::new(((self.bits >> 12) & 7) as u8) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - pub fn gpio9_filter_en(&self) -> GPIO9_FILTER_EN_R { - GPIO9_FILTER_EN_R::new(((self.bits >> 15) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("gpio9") - .field( - "gpio9_mcu_oe", - &format_args!("{}", self.gpio9_mcu_oe().bit()), - ) - .field( - "gpio9_slp_sel", - &format_args!("{}", self.gpio9_slp_sel().bit()), - ) - .field( - "gpio9_mcu_wpd", - &format_args!("{}", self.gpio9_mcu_wpd().bit()), - ) - .field( - "gpio9_mcu_wpu", - &format_args!("{}", self.gpio9_mcu_wpu().bit()), - ) - .field( - "gpio9_mcu_ie", - &format_args!("{}", self.gpio9_mcu_ie().bit()), - ) - .field( - "gpio9_mcu_drv", - &format_args!("{}", self.gpio9_mcu_drv().bits()), - ) - .field( - "gpio9_fun_wpd", - &format_args!("{}", self.gpio9_fun_wpd().bit()), - ) - .field( - "gpio9_fun_wpu", - &format_args!("{}", self.gpio9_fun_wpu().bit()), - ) - .field( - "gpio9_fun_ie", - &format_args!("{}", self.gpio9_fun_ie().bit()), - ) - .field( - "gpio9_fun_drv", - &format_args!("{}", self.gpio9_fun_drv().bits()), - ) - .field( - "gpio9_mcu_sel", - &format_args!("{}", self.gpio9_mcu_sel().bits()), - ) - .field( - "gpio9_filter_en", - &format_args!("{}", self.gpio9_filter_en().bit()), - ) - .finish() - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} -impl W { - #[doc = "Bit 0 - output enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio9_mcu_oe(&mut self) -> GPIO9_MCU_OE_W { - GPIO9_MCU_OE_W::new(self, 0) - } - #[doc = "Bit 1 - io sleep mode enable. set 1 to enable sleep mode."] - #[inline(always)] - #[must_use] - pub fn gpio9_slp_sel(&mut self) -> GPIO9_SLP_SEL_W { - GPIO9_SLP_SEL_W::new(self, 1) - } - #[doc = "Bit 2 - pull-down enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio9_mcu_wpd(&mut self) -> GPIO9_MCU_WPD_W { - GPIO9_MCU_WPD_W::new(self, 2) - } - #[doc = "Bit 3 - pull-up enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio9_mcu_wpu(&mut self) -> GPIO9_MCU_WPU_W { - GPIO9_MCU_WPU_W::new(self, 3) - } - #[doc = "Bit 4 - input enable on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio9_mcu_ie(&mut self) -> GPIO9_MCU_IE_W { - GPIO9_MCU_IE_W::new(self, 4) - } - #[doc = "Bits 5:6 - select drive strenth on sleep mode"] - #[inline(always)] - #[must_use] - pub fn gpio9_mcu_drv(&mut self) -> GPIO9_MCU_DRV_W { - GPIO9_MCU_DRV_W::new(self, 5) - } - #[doc = "Bit 7 - pull-down enable"] - #[inline(always)] - #[must_use] - pub fn gpio9_fun_wpd(&mut self) -> GPIO9_FUN_WPD_W { - GPIO9_FUN_WPD_W::new(self, 7) - } - #[doc = "Bit 8 - pull-up enable"] - #[inline(always)] - #[must_use] - pub fn gpio9_fun_wpu(&mut self) -> GPIO9_FUN_WPU_W { - GPIO9_FUN_WPU_W::new(self, 8) - } - #[doc = "Bit 9 - input enable"] - #[inline(always)] - #[must_use] - pub fn gpio9_fun_ie(&mut self) -> GPIO9_FUN_IE_W { - GPIO9_FUN_IE_W::new(self, 9) - } - #[doc = "Bits 10:11 - select drive strenth, 0:5mA, 1:10mA, 2:20mA, 3:40mA"] - #[inline(always)] - #[must_use] - pub fn gpio9_fun_drv(&mut self) -> GPIO9_FUN_DRV_W { - GPIO9_FUN_DRV_W::new(self, 10) - } - #[doc = "Bits 12:14 - 0:select function0, 1:select function1 ..."] - #[inline(always)] - #[must_use] - pub fn gpio9_mcu_sel(&mut self) -> GPIO9_MCU_SEL_W { - GPIO9_MCU_SEL_W::new(self, 12) - } - #[doc = "Bit 15 - input filter enable"] - #[inline(always)] - #[must_use] - pub fn gpio9_filter_en(&mut self) -> GPIO9_FILTER_EN_W { - GPIO9_FILTER_EN_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } -} -#[doc = "iomux control register for gpio9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPIO9_SPEC; -impl crate::RegisterSpec for GPIO9_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`gpio9::R`](R) reader structure"] -impl crate::Readable for GPIO9_SPEC {} -#[doc = "`write(|w| ..)` method takes [`gpio9::W`](W) writer structure"] -impl crate::Writable for GPIO9_SPEC { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0; -} -#[doc = "`reset()` method sets gpio9 to value 0x0800"] -impl crate::Resettable for GPIO9_SPEC { - const RESET_VALUE: Self::Ux = 0x0800; -} diff --git a/esp32p4/svd/patches/esp32p4.yaml b/esp32p4/svd/patches/esp32p4.yaml index 0280f2103c..ecc9632d35 100644 --- a/esp32p4/svd/patches/esp32p4.yaml +++ b/esp32p4/svd/patches/esp32p4.yaml @@ -172,3 +172,103 @@ SHA: dim: 16 dimIncrement: 0x4 size: 0x20 + +GPIO: + _delete: + - FUNC*_IN_SEL_CFG + _add: + FUNC%s_IN_SEL_CFG: + dim: 254 + dimIncrement: 0x04 + dimIndex: 1-255 + description: GPIO input function configuration register + addressOffset: 0x15c + access: read-write + reset-value: 0x0000003F + size: 0x20 + fields: + IN_SEL: + description: "set this value: s=0-56: connect GPIO[s] to this port. s=0x3F: set this port always high level. s=0x3E: set this port always low level." + bitOffset: 0 + bitWidth: 6 + IN_INV_SEL: + description: "set this bit to invert input signal. 1:invert. 0:not invert." + bitOffset: 6 + bitWidth: 1 + SEL: + description: "set this bit to bypass GPIO. 1:do not bypass GPIO. 0:bypass GPIO." + bitOffset: 7 + bitWidth: 1 + FUNC%s_OUT_SEL_CFG: + _modify: + FUNC_OUT_SEL: + name: OUT_SEL + FUNC_OUT_INV_SEL: + name: INV_SEL + FUNC_OEN_SEL: + name: OEN_SEL + FUNC_OEN_INV_SEL: + name: OEN_INV_SEL + +IO_MUX: + _delete: + - gpio* + _add: + GPIO%s: + dim: 54 + dimIncrement: 0x04 + dimIndex: 0-54 + description: IO_MUX Control Register + addressOffset: 0x4 + access: read-write + reset-value: 0x800 + size: 0x20 + fields: + MCU_OE: + description: "Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable" + bitOffset: 0 + bitWidth: 1 + SLP_SEL: + description: "Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter" + bitOffset: 1 + bitWidth: 1 + MCU_WPD: + description: "Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable" + bitOffset: 2 + bitWidth: 1 + MCU_WPU: + description: "Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable" + bitOffset: 3 + bitWidth: 1 + MCU_IE: + description: "Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable" + bitOffset: 4 + bitWidth: 1 + MCU_DRV: + description: "Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA" + bitOffset: 5 + bitWidth: 2 + FUN_WPD: + description: "Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable" + bitOffset: 7 + bitWidth: 1 + FUN_WPU: + description: "Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable" + bitOffset: 8 + bitWidth: 1 + FUN_IE: + description: "Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable" + bitOffset: 9 + bitWidth: 1 + FUN_DRV: + description: "Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA" + bitOffset: 10 + bitWidth: 2 + MCU_SEL: + description: "Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......" + bitOffset: 12 + bitWidth: 3 + FILTER_EN: + description: "Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable" + bitOffset: 15 + bitWidth: 1