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Add minimal support for Wi-Fi on the ESP32-S2. (#309)
* Added support for the WiFi peripheral. * Added basic crypto and cleaned up filtering. * Added some statistic registers. * Regenerated PAC. * Fixed addressOffset fields for filters. * Revert "Fixed addressOffset fields for filters." This reverts commit 6bc584d. * Added unknown PMD register. * Temporarily removed crypto support * Made Wi-Fi patches relocatable for different chips. * Added more registers to SVD. * Removed CTS_UNKNOWN field. * Declustered TX parameters
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,14 @@ | ||
| WIFI: | ||
| MAC_INTERRUPT: | ||
| _delete: DUMMY | ||
| _add: | ||
| WIFI_INT_STATUS: | ||
| addressOffset: 0x0 | ||
| description: Interrupt status of WIFI peripheral | ||
| access: read | ||
|
|
||
| WIFI_INT_CLEAR: | ||
| addressOffset: 0x4 | ||
| description: Interrupt status clear of WIFI peripheral | ||
| access: write | ||
|
|
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,13 @@ | ||
| WIFI: | ||
| PWR_INTERRUPT: | ||
| _delete: DUMMY | ||
| _add: | ||
| PWR_INT_STATUS: | ||
| addressOffset: 0x0 | ||
| description: Interrupt status for the WIFI_PWR interrupt | ||
| access: read | ||
|
|
||
| PWR_INT_CLEAR: | ||
| addressOffset: 0x4 | ||
| description: Interrupt status clear for the WIFI_PWR interrupt | ||
| access: write |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,31 @@ | ||
| WIFI: | ||
| _modify: | ||
| RX_CTRL: | ||
| description: Controls the reception of frames | ||
| access: read-write | ||
| fields: | ||
| RX_DESCR_RELOAD: | ||
| bitOffset: 0 | ||
| bitWidth: 1 | ||
| description: Instruct the hardware to reload the RX descriptors | ||
| RX_ENABLE: | ||
| bitOffset: 31 | ||
| bitWidth: 1 | ||
| description: Enable frame reception | ||
| RX_DMA_LIST: | ||
| _delete: DUMMY | ||
| _add: | ||
| RX_DESCR_BASE: | ||
| description: base address of the RX DMA list | ||
| addressOffset: 0x0 | ||
| acccess: read-write | ||
|
|
||
| RX_DESCR_NEXT: | ||
| description: next item in the RX DMA list | ||
| addressOffset: 0x4 | ||
| access: read-write | ||
|
|
||
| RX_DESCR_LAST: | ||
| description: last item in RX DMA list | ||
| addressOffset: 0x8 | ||
| access: read-write |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,63 @@ | ||
| WIFI: | ||
| _modify: | ||
| INTERFACE_RX_CONTROL%s: | ||
| acccess: read-write | ||
| description: Controls RX for an interface | ||
| fields: | ||
| BSSID_CHECK: | ||
| bitOffset: 1 | ||
| bitWidth: 1 | ||
| access: read-write | ||
| description: Check BSSID for filtering | ||
| SCAN_MODE: | ||
| bitOffset: 4 | ||
| bitWidth: 1 | ||
| access: read-write | ||
| description: Receive beacon frames | ||
| DATA_AND_MGMT_MODE: | ||
| bitOffset: 8 | ||
| bitWidth: 1 | ||
| access: read-write | ||
| description: Receive everything except control frames | ||
| FILTER_BANK%s: | ||
| _delete: DUMMY | ||
| _add: | ||
| ADDR_LOW%s: | ||
| dim: 4 | ||
| dimIncrement: 0x8 | ||
| description: First 4 bytes of BSSID MAC address filter | ||
| addressOffset: 0x0 | ||
| access: read-write | ||
| ADDR_HIGH%s: | ||
| dim: 4 | ||
| dimIncrement: 0x8 | ||
| description: last 2 bytes of BSSID MAC address filter | ||
| addressOffset: 0x4 | ||
| access: read-write | ||
| fields: | ||
| ADDR: | ||
| bitOffset: 0 | ||
| bitWidth: 16 | ||
| access: read-write | ||
| MASK_LOW%s: | ||
| dim: 4 | ||
| dimIncrement: 0x8 | ||
| description: First 4 bytes of BSSID MAC address filter mask | ||
| addressOffset: 0x20 | ||
| access: read-write | ||
| MASK_HIGH%s: | ||
| dim: 4 | ||
| dimIncrement: 0x8 | ||
| description: last 2 bytes of BSSID MAC address filter mask | ||
| addressOffset: 0x24 | ||
| access: read-write | ||
| fields: | ||
| MASK: | ||
| bitOffset: 0 | ||
| bitWidth: 16 | ||
| access: read-write | ||
| ENABLED: | ||
| bitOffset: 16 | ||
| bitWidth: 1 | ||
| access: read-write | ||
|
|
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,150 @@ | ||
| WIFI: | ||
| TXQ_STATE: | ||
| _delete: DUMMY | ||
| _add: | ||
| TX_ERROR_CLEAR: | ||
| description: Clear the error status of a slot | ||
| addressOffset: 0x0 | ||
| access: write | ||
| fields: | ||
| SLOT_COLLISION: | ||
| bitOffset: 0 | ||
| bitWidth: 5 | ||
| SLOT_TIMEOUT: | ||
| bitOffset: 0x10 | ||
| bitWidth: 5 | ||
|
|
||
| TX_ERROR_STATUS: | ||
| description: Error status of a slot | ||
| addressOffset: 0x4 | ||
| access: read | ||
| fields: | ||
| SLOT_COLLISION: | ||
| bitOffset: 0 | ||
| bitWidth: 5 | ||
| SLOT_TIMEOUT: | ||
| bitOffset: 0x10 | ||
| bitWidth: 5 | ||
|
|
||
| TX_COMPLETE_CLEAR: | ||
| description: Clear the completion status of a slot | ||
| addressOffset: 0x8 | ||
| access: write | ||
| fields: | ||
| SLOTS: | ||
| bitOffset: 0 | ||
| bitWidth: 5 | ||
|
|
||
| TX_COMPLETE_STATUS: | ||
| description: Completion status of a slot | ||
| addressOffset: 0xc | ||
| access: read | ||
| fields: | ||
| SLOTS: | ||
| bitOffset: 0 | ||
| bitWidth: 5 | ||
| TX_SLOT_CONFIG%s: | ||
| _delete: DUMMY | ||
| _add: | ||
| CONFIG: | ||
| description: Config | ||
| addressOffset: 0x0 | ||
| access: read-write | ||
| fields: | ||
| TIMEOUT: | ||
| bitOffset: 0 | ||
| bitWidth: 12 | ||
| access: read-write | ||
| BACKOFF_TIME: | ||
| bitOffset: 12 | ||
| bitWidth: 10 | ||
| access: read-write | ||
| AIFSN: | ||
| bitOffset: 24 | ||
| bitWidth: 4 | ||
| access: read-write | ||
| PLCP0: | ||
| description: PLCP0 | ||
| addressOffset: 0x4 | ||
| access: read-write | ||
| fields: | ||
| DMA_ADDR: | ||
| description: Bottom bits of address of dma_item | ||
| bitOffset: 0 | ||
| bitWidth: 20 | ||
| access: read-write | ||
| WAIT_FOR_ACK: | ||
| description: Enables ACK timeouts | ||
| bitOffset: 28 | ||
| bitWidth: 1 | ||
| access: read-write | ||
| SLOT_VALID: | ||
| description: Marks this slot as valid | ||
| bitOffset: 30 | ||
| bitWidth: 1 | ||
| access: read-write | ||
| SLOT_ENABLED: | ||
| description: Marks this slot as ready for transmission | ||
| bitOffset: 31 | ||
| bitWidth: 1 | ||
| access: read-write | ||
| _modify: | ||
| PLCP1%s: | ||
| description: PLCP1 | ||
| access: read-write | ||
| fields: | ||
| LEN: | ||
| description: Length of packet (in bytes) | ||
| bitOffset: 0 | ||
| bitWidth: 12 | ||
| access: read-write | ||
| RATE: | ||
| description: Packet rate (see wifi_phy_rate_t) | ||
| bitOffset: 12 | ||
| bitWidth: 5 | ||
| access: read-write | ||
| KEY_SLOT_ID: | ||
| description: Key slot to use for encryption | ||
| bitOffset: 17 | ||
| bitWidth: 5 | ||
| access: read-write | ||
| IS_80211_N: | ||
| description: Bit indicating if this is 802.11n | ||
| bitOffset: 25 | ||
| bitWidth: 1 | ||
| access: read-write | ||
| BANDWIDTH: | ||
| description: Zero indicates 20MHz and one indicates 40MHz | ||
| bitOffset: 28 | ||
| bitWidth: 1 | ||
| access: read-write | ||
| INTERFACE_ID: | ||
| description: ID of the interface this transmission is from | ||
| bitOffset: 30 | ||
| bitWidth: 2 | ||
| access: read-write | ||
| PLCP2%s: | ||
| description: PLCP2 | ||
| access: read-write | ||
| fields: | ||
| UNKNOWN: | ||
| description: meaning unknown, set to one for TX | ||
| bitOffset: 5 | ||
| bitWidth: 1 | ||
| HT_SIG%s: | ||
| description: HT-SIG field in HT preamble | ||
| access: read-write | ||
| HT_UNKNOWN%s: | ||
| description: exact meaning and name unknown, related to HT | ||
| access: read-write | ||
| fields: | ||
| LENGTH: | ||
| description: The length of the PPDU | ||
| bitOffset: 0x0 | ||
| bitWidth: 20 | ||
| access: write | ||
| DURATION%s: | ||
| description: duration of the frame exchange | ||
| access: read-write | ||
| PMD%s: | ||
| access: read-write |
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