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Fix esp-lp-hal gpio reading for the esp32s3 and esp32s2 #3191

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merged 4 commits into from
Mar 5, 2025

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4rzael
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@4rzael 4rzael commented Feb 28, 2025

Thank you for your contribution!

We appreciate the time and effort you've put into this pull request.
To help us review it efficiently, please ensure you've gone through the following checklist:

Submission Checklist 📝

  • I have updated existing examples or added new ones (if applicable).
  • I have used cargo xtask fmt-packages command to ensure that all changed code is formatted correctly.
  • My changes were added to the CHANGELOG.md in the proper section.
  • I have added necessary changes to user code to the Migration Guide.
  • My changes are in accordance to the esp-rs API guidelines

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Pull Request Details 📖

Description

This PR fixes GPIO reading for the esp32-s3.
In the current release, the input register (and similarly when reading the output register) is accessed using the raw value. However, on the esp32-s3, there is a 10bit offset.
The lead to a bug where, in order to access a GPIO n from the ULP, you had to use the GPIO n+10.

This PR fixes this by using the higher-level field from the PAC.

For reference:

Testing

Testing was only performed on an esp32-s3, as I don't own other chips.

To test input_state(), I built a ULP firmware that wakes-up the esp when the pin (gpio6 in my case) goes high, then waited a few seconds before triggering the GPIO.
Using the previous release, it only worked if I used GPIO16 in the code.
Using this PR, it works correctly, using GPIO6.

To test output_state(), I built a ULP firmware that sets the GPIO value, then read it, and sends the value to the esp, which prints it.
I got similar results than for input_state().

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@bugadani bugadani left a comment

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Thanks!

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@MabezDev MabezDev left a comment

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Thanks!

@MabezDev MabezDev added this pull request to the merge queue Mar 5, 2025
Merged via the queue into esp-rs:main with commit e657aeb Mar 5, 2025
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3 participants