litex/soc/integration/soc: SoCBusHandler 64bits address width support

enjoy-digital · Nov 30, 2023 · a4ead5c · a4ead5c
1 parent fba581f
commit a4ead5c
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/litex/soc/integration/soc.py b/litex/soc/integration/soc.py
@@ -108,7 +108,7 @@ def __init__(self, origin, busword, obj):
 class SoCBusHandler(LiteXModule):
     supported_standard      = ["wishbone", "axi-lite", "axi"]
     supported_data_width    = [32, 64, 128, 256, 512]
-    supported_address_width = [32]
+    supported_address_width = [32, 64]
 
     # Creation -------------------------------------------------------------------------------------
     def __init__(self, name="SoCBusHandler",