interconnect/wishbone/Remapper: Fix src_adr/dst_adr signal size.

enjoy-digital · Feb 28, 2024 · 4ca66bb · 4ca66bb
1 parent 722b6da
commit 4ca66bb
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/litex/soc/interconnect/wishbone.py b/litex/soc/interconnect/wishbone.py
@@ -168,8 +168,8 @@ def __init__(self, master, slave, origin=0, size=None, src_regions=[], dst_regio
         }[master.addressing]
         # Apply Address Regions Remapping.
         for src_region, dst_region in zip(src_regions, dst_regions):
-            src_adr = Signal.like(master.adr)
-            dst_adr = Signal.like(master.adr)
+            src_adr = Signal.like(master.adr + adr_shift + 1)
+            dst_adr = Signal.like(master.adr + adr_shift + 1)
             active  = Signal()
             self.comb += [
                 src_adr.eq(adr_remap << adr_shift),