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soc: Avoid .upper() on add_config/constant since already done in meth… ci #2775: Commit a59b67e pushed by enjoy-digital
February 1, 2024 07:45 30m 43s master
master
February 1, 2024 07:45 30m 43s
soc/add_spi_flash: Minor integration cleanup and remove PHY_FREQUENCY… ci #2774: Commit e498a56 pushed by enjoy-digital
February 1, 2024 07:42 30m 17s master
master
February 1, 2024 07:42 30m 17s
CHANGES.md: Update. ci #2773: Commit e446312 pushed by enjoy-digital
February 1, 2024 07:34 30m 48s master
master
February 1, 2024 07:34 30m 48s
Merge pull request #1881 from motec-research/spiflash_fixes ci #2772: Commit be23467 pushed by enjoy-digital
February 1, 2024 07:33 30m 26s master
master
February 1, 2024 07:33 30m 26s
Spiflash fixes for issues exposed by sys_clk = 200MHz and L2 cache ci #2771: Pull request #1881 opened by AndrewD
February 1, 2024 05:01 30m 17s motec-research:spiflash_fixes
motec-research:spiflash_fixes
February 1, 2024 05:01 30m 17s
cores/spi/spi_master: Improve documentation, especially on Raw/Aligne… ci #2770: Commit f73fbee pushed by enjoy-digital
January 30, 2024 10:08 28m 6s master
master
January 30, 2024 10:08 28m 6s
CHANGES.md: Update. ci #2769: Commit a3904ac pushed by enjoy-digital
January 30, 2024 08:51 27m 47s master
master
January 30, 2024 08:51 27m 47s
build/efinix/programmer: Define EFXDBG_HOME now required by latest Ef… ci #2768: Commit 488247e pushed by enjoy-digital
January 30, 2024 08:48 27m 57s master
master
January 30, 2024 08:48 27m 57s
soc/cores/clock/efinix: fix input clock code for trion when the input… ci #2765: Commit 245bed7 pushed by trabucayre
January 25, 2024 16:39 26m 8s master
master
January 25, 2024 16:39 26m 8s
soc/integration/soc: add_ethernet/add_ip_constants: cast str to int (… ci #2764: Commit d320955 pushed by trabucayre
January 24, 2024 15:06 26m 17s master
master
January 24, 2024 15:06 26m 17s
soc/add_ethernet: Refactor local/remote_ip configuration and add basi… ci #2763: Commit f543b18 pushed by enjoy-digital
January 24, 2024 14:28 26m 3s master
master
January 24, 2024 14:28 26m 3s
Merge pull request #1877 from trabucayre/ethernet_local_remote_ip ci #2762: Commit 115e87f pushed by enjoy-digital
January 24, 2024 14:15 25m 40s master
master
January 24, 2024 14:15 25m 40s
soc/integration/soc: add_etherbone: allowing to specify local/remote IP ci #2761: Pull request #1877 synchronize by trabucayre
January 24, 2024 14:13 26m 11s trabucayre:ethernet_local_remote_ip
trabucayre:ethernet_local_remote_ip
January 24, 2024 14:13 26m 11s
soc/integration/soc: add_etherbone: allowing to specify local/remote IP ci #2760: Pull request #1877 opened by trabucayre
January 24, 2024 14:03 27m 21s trabucayre:ethernet_local_remote_ip
trabucayre:ethernet_local_remote_ip
January 24, 2024 14:03 27m 21s
Merge pull request #1876 from trabucayre/vexriscv_configurable_clint_… ci #2759: Commit 1be3f02 pushed by enjoy-digital
January 23, 2024 15:27 25m 50s master
master
January 23, 2024 15:27 25m 50s
CHANGES.md: Update. ci #2758: Commit c31ec79 pushed by enjoy-digital
January 23, 2024 15:02 26m 7s master
master
January 23, 2024 15:02 26m 7s
soc/cores/cpu/vexriscv_smp/core: allowing configure CSR/CLINT base address by overriding default value or using args ci #2757: Pull request #1876 synchronize by trabucayre
January 22, 2024 17:37 26m 51s trabucayre:vexriscv_configurable_clint_csr_addr
trabucayre:vexriscv_configurable_clint_csr_addr
January 22, 2024 17:37 26m 51s
soc/cores/cpu/vexriscv_smp/core: allowing configure CSR/CLINT base address by overriding default value or using args ci #2756: Pull request #1876 synchronize by trabucayre
January 22, 2024 17:35 25m 54s trabucayre:vexriscv_configurable_clint_csr_addr
trabucayre:vexriscv_configurable_clint_csr_addr
January 22, 2024 17:35 25m 54s
soc/cores/cpu/vexriscv_smp/core: allowing configure CSR/CLINT base address by overriding default value or using args ci #2755: Pull request #1876 opened by trabucayre
January 22, 2024 17:30 22m 41s trabucayre:vexriscv_configurable_clint_csr_addr
trabucayre:vexriscv_configurable_clint_csr_addr
January 22, 2024 17:30 22m 41s
Merge pull request #1874 from trabucayre/naxriscv_arch ci #2754: Commit 4c07d72 pushed by enjoy-digital
January 19, 2024 09:22 26m 8s master
master
January 19, 2024 09:22 26m 8s
soc/cores/cpu/naxriscv fix arch definition and small adjust ci #2753: Pull request #1874 synchronize by trabucayre
January 19, 2024 06:38 26m 3s trabucayre:naxriscv_arch
trabucayre:naxriscv_arch
January 19, 2024 06:38 26m 3s
soc/cores/cpu/naxriscv fix arch definition and small adjust ci #2752: Pull request #1874 synchronize by trabucayre
January 18, 2024 14:21 26m 7s trabucayre:naxriscv_arch
trabucayre:naxriscv_arch
January 18, 2024 14:21 26m 7s
soc/cores/cpu/naxriscv fix arch definition and small adjust ci #2751: Pull request #1874 opened by trabucayre
January 18, 2024 14:06 28m 15s trabucayre:naxriscv_arch
trabucayre:naxriscv_arch
January 18, 2024 14:06 28m 15s
inteconnect/ahb: Add specific case for 32-bit data width, fix CSR acc… ci #2750: Commit b19d992 pushed by enjoy-digital
January 15, 2024 10:40 26m 4s master
master
January 15, 2024 10:40 26m 4s
litex_sim: add inter-module messaging, external simulation control and controllable GPIO ci #2749: Pull request #1104 synchronize by lschuermann
January 11, 2024 22:07 27m 40s lschuermann:dev/litex-sim-ctrl
lschuermann:dev/litex-sim-ctrl
January 11, 2024 22:07 27m 40s
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