From 6dbd7ec51e840f68d4a30f3d997d98694b48912c Mon Sep 17 00:00:00 2001 From: l_saintgermain_catie Date: Fri, 25 Oct 2024 10:53:29 +0200 Subject: [PATCH 1/4] Fixed ICAPT name --- boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi b/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi index 0458667..e9a3b7e 100644 --- a/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi +++ b/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi @@ -25,7 +25,7 @@ , , , - , + , , , , From cdf6c4150638f5c7f0c5d6cc969c019cf4c0e348 Mon Sep 17 00:00:00 2001 From: l_saintgermain_catie Date: Fri, 25 Oct 2024 10:57:15 +0200 Subject: [PATCH 2/4] Added sixtron-adc nexus mapping --- .../zest_core_stm32l4a6rg/sixtron_connector.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi b/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi index e9a3b7e..b7ed540 100644 --- a/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi +++ b/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi @@ -67,21 +67,29 @@ pwms = <&pwm3 3 1000000 PWM_POLARITY_NORMAL>; }; }; + + sixtron_connector_1_adc: sixtron-connector-1-adc { + compatible = "sixtron-adc"; + #io-channel-cells = <1>; + io-channel-map = , /* ADC1 = PC2 -> ADC1 IN3 */ + , /* ADC2 = PC3 -> ADC1 IN4 */ + , /* ADC3 = PA0 -> ADC1 IN5 */ + ; /* ADC4 = PA1 -> ADC1 IN6 */ + }; }; sixtron_connector_1_i2c: &i2c3 {}; sixtron_connector_1_uart: &usart2 {}; sixtron_connector_1_spi: &spi2 {}; -sixtron_connector_1_adc: &adc1 {}; sixtron_connector_1_dac: &dac1 {}; sixtron_i2c: &sixtron_connector_1_i2c {}; sixtron_uart: &sixtron_connector_1_uart {}; sixtron_spi: &sixtron_connector_1_spi {}; -sixtron_adc: &sixtron_connector_1_adc {}; sixtron_dac: &sixtron_connector_1_dac {}; sixtron_pwm1: &sixtron_connector_1_pwm1 {}; sixtron_pwm2: &sixtron_connector_1_pwm2 {}; sixtron_pwm3: &sixtron_connector_1_pwm3 {}; +sixtron_adc: &sixtron_connector_1_adc {}; sixtron_connector: &sixtron_connector_1 {}; From dc480305181c1b7190d18aec8e117d08cf352df1 Mon Sep 17 00:00:00 2001 From: l_saintgermain_catie Date: Fri, 25 Oct 2024 10:58:01 +0200 Subject: [PATCH 3/4] Added &adc2 and defined adc channels --- .../zest_core_stm32l4a6rg.dts | 78 +++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/boards/catie/zest_core_stm32l4a6rg/zest_core_stm32l4a6rg.dts b/boards/catie/zest_core_stm32l4a6rg/zest_core_stm32l4a6rg.dts index 2bcd4e1..f692fe8 100644 --- a/boards/catie/zest_core_stm32l4a6rg/zest_core_stm32l4a6rg.dts +++ b/boards/catie/zest_core_stm32l4a6rg/zest_core_stm32l4a6rg.dts @@ -121,6 +121,84 @@ st,adc-clock-source = ; st,adc-prescaler = <4>; status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@3 { + reg = <3>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@4 { + reg = <4>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@5 { + reg = <5>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@6 { + reg = <6>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; + +&adc2 { + pinctrl-0 = <&adc2_in3_pc2 &adc2_in4_pc3 &adc2_in5_pa0 &adc2_in6_pa1>; + pinctrl-names = "default"; + st,adc-clock-source = ; + st,adc-prescaler = <4>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@3 { + reg = <3>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@4 { + reg = <4>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@5 { + reg = <5>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@6 { + reg = <6>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; }; &dac1 { From 2f02e492b39da8839b6daed18714248935d76dcd Mon Sep 17 00:00:00 2001 From: l_saintgermain_catie Date: Wed, 30 Oct 2024 11:47:46 +0100 Subject: [PATCH 4/4] Removed comments --- boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi b/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi index b7ed540..ce42db4 100644 --- a/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi +++ b/boards/catie/zest_core_stm32l4a6rg/sixtron_connector.dtsi @@ -71,10 +71,10 @@ sixtron_connector_1_adc: sixtron-connector-1-adc { compatible = "sixtron-adc"; #io-channel-cells = <1>; - io-channel-map = , /* ADC1 = PC2 -> ADC1 IN3 */ - , /* ADC2 = PC3 -> ADC1 IN4 */ - , /* ADC3 = PA0 -> ADC1 IN5 */ - ; /* ADC4 = PA1 -> ADC1 IN6 */ + io-channel-map = , + , + , + ; }; };