Update to hardware model V2

catie-aq · Jul 31, 2024 · 572672f · 572672f
1 parent c50c850
commit 572672f
Show file tree

Hide file tree

Showing 11 changed files with 10 additions and 22 deletions.
diff --git a/boards/arm/zest_core_stm32l4a6rg/Kconfig.board b/boards/arm/zest_core_stm32l4a6rg/Kconfig.board
diff --git a/boards/arm/zest_core_stm32l4a6rg/Kconfig.defconfig b/boards/arm/zest_core_stm32l4a6rg/Kconfig.defconfig
diff --git a/boards/catie/zest_core_stm32l4a6rg/Kconfig.zest_core_stm32l4a6rg b/boards/catie/zest_core_stm32l4a6rg/Kconfig.zest_core_stm32l4a6rg
@@ -0,0 +1,5 @@
+# Copyright (c) 2023 CATIE
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_ZEST_CORE_STM32L4A6RG
+	select SOC_STM32L4A6XX
diff --git a/boards/arm/zest_core_stm32l4a6rg/board.cmake → ...s/catie/zest_core_stm32l4a6rg/board.cmake b/boards/arm/zest_core_stm32l4a6rg/board.cmake → ...s/catie/zest_core_stm32l4a6rg/board.cmake
diff --git a/boards/catie/zest_core_stm32l4a6rg/board.yml b/boards/catie/zest_core_stm32l4a6rg/board.yml
@@ -0,0 +1,5 @@
+board:
+  name: zest_core_stm32l4a6rg
+  vendor: catie
+  socs:
+    - name: stm32l4a6xx
diff --git a/.../arm/zest_core_stm32l4a6rg/revision.cmake → ...atie/zest_core_stm32l4a6rg/revision.cmake b/.../arm/zest_core_stm32l4a6rg/revision.cmake → ...atie/zest_core_stm32l4a6rg/revision.cmake
diff --git a/...t_core_stm32l4a6rg/sixtron_connector.dtsi → ...t_core_stm32l4a6rg/sixtron_connector.dtsi b/...t_core_stm32l4a6rg/sixtron_connector.dtsi → ...t_core_stm32l4a6rg/sixtron_connector.dtsi
diff --git a/...ore_stm32l4a6rg/zest_core_stm32l4a6rg.dts → ...ore_stm32l4a6rg/zest_core_stm32l4a6rg.dts b/...ore_stm32l4a6rg/zest_core_stm32l4a6rg.dts → ...ore_stm32l4a6rg/zest_core_stm32l4a6rg.dts
diff --git a/...re_stm32l4a6rg/zest_core_stm32l4a6rg.yaml → ...re_stm32l4a6rg/zest_core_stm32l4a6rg.yaml b/...re_stm32l4a6rg/zest_core_stm32l4a6rg.yaml → ...re_stm32l4a6rg/zest_core_stm32l4a6rg.yaml
diff --git a/...4a6rg/zest_core_stm32l4a6rg_3_1_0.overlay → ...4a6rg/zest_core_stm32l4a6rg_3_1_0.overlay b/...4a6rg/zest_core_stm32l4a6rg_3_1_0.overlay → ...4a6rg/zest_core_stm32l4a6rg_3_1_0.overlay
diff --git a/...m32l4a6rg/zest_core_stm32l4a6rg_defconfig → ...m32l4a6rg/zest_core_stm32l4a6rg_defconfig b/...m32l4a6rg/zest_core_stm32l4a6rg_defconfig → ...m32l4a6rg/zest_core_stm32l4a6rg_defconfig
@@ -1,9 +1,6 @@
 # Copyright (c) 2023 CATIE
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SOC_SERIES_STM32L4X=y
-CONFIG_SOC_STM32L4A6XX=y
-
 # enable uart driver
 CONFIG_SERIAL=y