diff --git a/library/includes/Makeinclude_axi b/library/includes/Makeinclude_axi new file mode 100644 index 00000000..56637bbb --- /dev/null +++ b/library/includes/Makeinclude_axi @@ -0,0 +1,8 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/vip/amd/m_axi_sequencer.sv +SV_DEPS += $(TB_LIBRARY_PATH)/vip/amd/s_axi_sequencer.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/reg_accessor.sv diff --git a/library/includes/Makeinclude_axis b/library/includes/Makeinclude_axis new file mode 100644 index 00000000..c8996e22 --- /dev/null +++ b/library/includes/Makeinclude_axis @@ -0,0 +1,7 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/vip/amd/m_axis_sequencer.sv +SV_DEPS += $(TB_LIBRARY_PATH)/vip/amd/s_axis_sequencer.sv diff --git a/library/includes/Makeinclude_common b/library/includes/Makeinclude_common new file mode 100644 index 00000000..496e1d71 --- /dev/null +++ b/library/includes/Makeinclude_common @@ -0,0 +1,19 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# Makeincludes +include $(TB_LIBRARY_PATH)/includes/Makeinclude_axi + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/utilities/utils.svh +SV_DEPS += $(TB_LIBRARY_PATH)/utilities/logger_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/utilities/test_harness_env.sv +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/common/watchdog.sv + +SV_DEPS += system_tb.sv + +ENV_DEPS += system_project.tcl +ENV_DEPS += system_bd.tcl +ENV_DEPS += $(ADI_TB_DIR)/scripts/adi_sim.tcl +ENV_DEPS += $(ADI_TB_DIR)/scripts/run_sim.tcl diff --git a/library/includes/Makeinclude_data_offload b/library/includes/Makeinclude_data_offload new file mode 100644 index 00000000..699ed86f --- /dev/null +++ b/library/includes/Makeinclude_data_offload @@ -0,0 +1,10 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# Makeincludes +include $(TB_LIBRARY_PATH)/includes/Makeinclude_regmap + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/data_offload/data_offload_api.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_data_offload_pkg.sv diff --git a/library/includes/Makeinclude_dmac b/library/includes/Makeinclude_dmac new file mode 100644 index 00000000..298a26b1 --- /dev/null +++ b/library/includes/Makeinclude_dmac @@ -0,0 +1,11 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# Makeincludes +include $(TB_LIBRARY_PATH)/includes/Makeinclude_regmap + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/dmac/dma_trans.sv +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/dmac/dmac_api.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_dmac_pkg.sv diff --git a/library/includes/Makeinclude_jesd b/library/includes/Makeinclude_jesd new file mode 100644 index 00000000..176c9ec5 --- /dev/null +++ b/library/includes/Makeinclude_jesd @@ -0,0 +1,14 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# Makeincludes +include $(TB_LIBRARY_PATH)/includes/Makeinclude_regmap + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/jesd/adi_jesd204_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_jesd_rx_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_jesd_tx_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_jesd_tpl_pkg.sv + +ENV_DEPS += $(TB_LIBRARY_PATH)/drivers/jesd/jesd_exerciser.tcl diff --git a/library/includes/Makeinclude_regmap b/library/includes/Makeinclude_regmap new file mode 100644 index 00000000..30977cc9 --- /dev/null +++ b/library/includes/Makeinclude_regmap @@ -0,0 +1,8 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/reg_accessor.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_peripheral_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_pkg.sv diff --git a/library/includes/Makeinclude_scoreboard b/library/includes/Makeinclude_scoreboard new file mode 100644 index 00000000..5a95ba29 --- /dev/null +++ b/library/includes/Makeinclude_scoreboard @@ -0,0 +1,9 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/common/mailbox.sv +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/common/scoreboard.sv +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/common/scoreboard_pack.sv +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/common/x_monitor.sv diff --git a/library/includes/Makeinclude_spi_engine b/library/includes/Makeinclude_spi_engine new file mode 100644 index 00000000..5311f855 --- /dev/null +++ b/library/includes/Makeinclude_spi_engine @@ -0,0 +1,14 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# Makeincludes +include $(TB_LIBRARY_PATH)/includes/Makeinclude_regmap + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/vip/adi/spi_vip/adi_spi_vip_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/vip/adi/spi_vip/s_spi_sequencer.sv +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/spi_engine/spi_engine_instr_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_spi_engine_pkg.sv + +SIM_LIB_DEPS += spi_vip diff --git a/library/includes/Makeinclude_tdd b/library/includes/Makeinclude_tdd new file mode 100644 index 00000000..6285ecb6 --- /dev/null +++ b/library/includes/Makeinclude_tdd @@ -0,0 +1,10 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# Makeincludes +include $(TB_LIBRARY_PATH)/includes/Makeinclude_regmap + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_tdd_gen_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_tdd_trans_pkg.sv diff --git a/library/includes/Makeinclude_xcvr b/library/includes/Makeinclude_xcvr new file mode 100644 index 00000000..bf095110 --- /dev/null +++ b/library/includes/Makeinclude_xcvr @@ -0,0 +1,10 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# Makeincludes +include $(TB_LIBRARY_PATH)/includes/Makeinclude_regmap + +# All test-bench dependencies except test programs +SV_DEPS += $(TB_LIBRARY_PATH)/drivers/xcvr/adi_xcvr_pkg.sv +SV_DEPS += $(TB_LIBRARY_PATH)/regmaps/adi_regmap_xcvr_pkg.sv diff --git a/library/includes/sp_include_axi.tcl b/library/includes/sp_include_axi.tcl new file mode 100644 index 00000000..bff4766c --- /dev/null +++ b/library/includes/sp_include_axi.tcl @@ -0,0 +1,41 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/vip/amd/m_axi_sequencer.sv" \ + "$ad_tb_dir/library/vip/amd/s_axi_sequencer.sv" \ + "$ad_tb_dir/library/regmaps/reg_accessor.sv" \ +] diff --git a/library/includes/sp_include_axis.tcl b/library/includes/sp_include_axis.tcl new file mode 100644 index 00000000..9e4420e0 --- /dev/null +++ b/library/includes/sp_include_axis.tcl @@ -0,0 +1,40 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/vip/amd/m_axis_sequencer.sv" \ + "$ad_tb_dir/library/vip/amd/s_axis_sequencer.sv" \ +] diff --git a/library/includes/sp_include_common.tcl b/library/includes/sp_include_common.tcl new file mode 100644 index 00000000..f97515b3 --- /dev/null +++ b/library/includes/sp_include_common.tcl @@ -0,0 +1,45 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +source $ad_tb_dir/library/includes/sp_include_axi.tcl + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/utilities/utils.svh" \ + "$ad_tb_dir/library/utilities/logger_pkg.sv" \ + "$ad_tb_dir/library/utilities/test_harness_env.sv" \ + "$ad_tb_dir/library/drivers/common/watchdog.sv" \ + "system_tb.sv" \ +] diff --git a/library/includes/sp_include_data_offload.tcl b/library/includes/sp_include_data_offload.tcl new file mode 100644 index 00000000..e1a8c2c2 --- /dev/null +++ b/library/includes/sp_include_data_offload.tcl @@ -0,0 +1,42 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +source $ad_tb_dir/library/includes/sp_include_regmap.tcl + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/drivers/data_offload/data_offload_api.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_data_offload_pkg.sv" \ +] diff --git a/library/includes/sp_include_dmac.tcl b/library/includes/sp_include_dmac.tcl new file mode 100644 index 00000000..511727c1 --- /dev/null +++ b/library/includes/sp_include_dmac.tcl @@ -0,0 +1,43 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +source $ad_tb_dir/library/includes/sp_include_regmap.tcl + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/drivers/dmac/dma_trans.sv" \ + "$ad_tb_dir/library/drivers/dmac/dmac_api.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_dmac_pkg.sv" \ +] diff --git a/library/includes/sp_include_jesd.tcl b/library/includes/sp_include_jesd.tcl new file mode 100644 index 00000000..e768ea17 --- /dev/null +++ b/library/includes/sp_include_jesd.tcl @@ -0,0 +1,44 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +source $ad_tb_dir/library/includes/sp_include_regmap.tcl + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/drivers/jesd/adi_jesd204_pkg.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_jesd_rx_pkg.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_jesd_tx_pkg.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_jesd_tpl_pkg.sv" \ +] diff --git a/library/includes/sp_include_regmap.tcl b/library/includes/sp_include_regmap.tcl new file mode 100644 index 00000000..583fbde0 --- /dev/null +++ b/library/includes/sp_include_regmap.tcl @@ -0,0 +1,41 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/regmaps/reg_accessor.sv" \ + "$ad_tb_dir/library/regmaps/adi_peripheral_pkg.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_pkg.sv" \ +] diff --git a/library/includes/sp_include_scoreboard.tcl b/library/includes/sp_include_scoreboard.tcl new file mode 100644 index 00000000..dba36127 --- /dev/null +++ b/library/includes/sp_include_scoreboard.tcl @@ -0,0 +1,42 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/drivers/common/mailbox.sv" \ + "$ad_tb_dir/library/drivers/common/scoreboard.sv" \ + "$ad_tb_dir/library/drivers/common/scoreboard_pack.sv" \ + "$ad_tb_dir/library/drivers/common/x_monitor.sv" \ +] diff --git a/library/includes/sp_include_spi_engine.tcl b/library/includes/sp_include_spi_engine.tcl new file mode 100644 index 00000000..114a5561 --- /dev/null +++ b/library/includes/sp_include_spi_engine.tcl @@ -0,0 +1,44 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +source $ad_tb_dir/library/includes/sp_include_regmap.tcl + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/vip/adi/spi_vip/adi_spi_vip_pkg.sv" \ + "$ad_tb_dir/library/vip/adi/spi_vip/s_spi_sequencer.sv" \ + "$ad_tb_dir/library/drivers/spi_engine/spi_engine_instr_pkg.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_spi_engine_pkg.sv" \ +] diff --git a/library/includes/sp_include_tdd.tcl b/library/includes/sp_include_tdd.tcl new file mode 100644 index 00000000..38a8b855 --- /dev/null +++ b/library/includes/sp_include_tdd.tcl @@ -0,0 +1,42 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +source $ad_tb_dir/library/includes/sp_include_regmap.tcl + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/regmaps/adi_regmap_tdd_gen_pkg.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_tdd_trans_pkg.sv" \ +] diff --git a/library/includes/sp_include_xcvr.tcl b/library/includes/sp_include_xcvr.tcl new file mode 100644 index 00000000..6e27586a --- /dev/null +++ b/library/includes/sp_include_xcvr.tcl @@ -0,0 +1,42 @@ +# *************************************************************************** +# *************************************************************************** +# Copyright 2024 (c) Analog Devices, Inc. All rights reserved. +# +# In this HDL repository, there are many different and unique modules, consisting +# of various HDL (Verilog or VHDL) components. The individual modules are +# developed independently, and may be accompanied by separate and unique license +# terms. +# +# The user should read each of these license terms, and understand the +# freedoms and responsibilities that he or she has by using this source/core. +# +# This core is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +# A PARTICULAR PURPOSE. +# +# Redistribution and use of source or resulting binaries, with or without modification +# of this file, are permitted under one of the following two license terms: +# +# 1. The GNU General Public License version 2 as published by the +# Free Software Foundation, which can be found in the top level directory +# of this repository (LICENSE_GPL2), and also online at: +# +# +# OR +# +# 2. An ADI specific BSD license, which can be found in the top level directory +# of this repository (LICENSE_ADIBSD), and also on-line at: +# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +# This will allow to generate bit files and not release the source code, +# as long as it attaches to an ADI device. +# +# *************************************************************************** +# *************************************************************************** + +source $ad_tb_dir/library/includes/sp_include_regmap.tcl + +# Add test files to the project +adi_sim_project_files [list \ + "$ad_tb_dir/library/drivers/xcvr/adi_xcvr_pkg.sv" \ + "$ad_tb_dir/library/regmaps/adi_regmap_xcvr_pkg.sv" \ +] diff --git a/library/vip/adi/spi_vip/Makefile b/library/vip/adi/spi_vip/Makefile index 7ff9d0f9..c9f7ea20 100644 --- a/library/vip/adi/spi_vip/Makefile +++ b/library/vip/adi/spi_vip/Makefile @@ -4,13 +4,12 @@ ## Auto-generated, do not modify! #################################################################################### -# Assumes this file is in /testbenches/library/vip/adi/spi_vip/Makefile -ADI_HDL_DIR := $(subst /testbenches/library/vip/adi/spi_vip/Makefile,,$(abspath $(lastword $(MAKEFILE_LIST)))) -HDL_LIBRARY_PATH := $(ADI_HDL_DIR)/library/ +# Makeincludes +include ../../../../scripts/make_tb_path LIBRARY_NAME := adi_spi_vip -GENERIC_DEPS += $(ADI_HDL_DIR)/testbenches/library/utilities/utils.svh +GENERIC_DEPS += $(TB_LIBRARY_PATH)/utilities/utils.svh GENERIC_DEPS += adi_spi_vip_pkg.sv GENERIC_DEPS += spi_vip_if.sv GENERIC_DEPS += adi_spi_vip.sv @@ -20,4 +19,4 @@ XILINX_DEPS += adi_spi_vip_pkg.ttcl #TODO: INTEL_DEPS += adi_spi_vip_hw.tcl -include $(HDL_LIBRARY_PATH)/scripts/library.mk \ No newline at end of file +include $(HDL_LIBRARY_PATH)/scripts/library.mk diff --git a/scripts/adi_sim.tcl b/scripts/adi_sim.tcl index f6b18a03..057901aa 100644 --- a/scripts/adi_sim.tcl +++ b/scripts/adi_sim.tcl @@ -2,6 +2,13 @@ variable adi_sim_defines {} variable design_name "test_harness" +global ad_hdl_dir +global ad_tb_dir + +source ../../../scripts/adi_tb_env.tcl + +source $ad_hdl_dir/projects/scripts/adi_board.tcl + proc adi_sim_add_define {value} { global adi_sim_defines lappend adi_sim_defines $value @@ -12,7 +19,8 @@ proc adi_sim_project_xilinx {project_name {part "xc7vx485tffg1157-1"}} { global ad_project_params global use_smartconnect global ad_hdl_dir - + global ad_tb_dir + # Create project create_project ${project_name} ./runs/${project_name} -part $part -force @@ -21,7 +29,7 @@ proc adi_sim_project_xilinx {project_name {part "xc7vx485tffg1157-1"}} { # Set IP repository paths set lib_dirs $ad_hdl_dir/library - lappend lib_dirs [file normalize "./../../../library"] + lappend lib_dirs "$ad_tb_dir/library" set_property ip_repo_paths $lib_dirs \ [get_filesets sources_1] @@ -35,7 +43,7 @@ proc adi_sim_project_xilinx {project_name {part "xc7vx485tffg1157-1"}} { global sys_zynq set sys_zynq -1 if { ![info exists ad_project_params(CUSTOM_HARNESS)] || !$ad_project_params(CUSTOM_HARNESS) } { - source ../../../library/utilities/test_harness_system_bd.tcl + source $ad_tb_dir/library/utilities/test_harness_system_bd.tcl } # transfer tcl parameters as defines to verilog @@ -75,6 +83,8 @@ proc adi_sim_project_xilinx {project_name {part "xc7vx485tffg1157-1"}} { # Use a define for the top module adi_sim_add_define "TB=system_tb" + + source $ad_tb_dir/library/includes/sp_include_common.tcl } proc adi_sim_project_files {project_files} { diff --git a/scripts/adi_tb_env.tcl b/scripts/adi_tb_env.tcl new file mode 100644 index 00000000..eff40bdd --- /dev/null +++ b/scripts/adi_tb_env.tcl @@ -0,0 +1,9 @@ +############################################################################### +## Copyright (C) 2024 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +############################################################################### + +# environment related stuff +set ad_tb_dir [file normalize [file join [file dirname [info script]] "../"]] + +source $ad_tb_dir/../scripts/adi_env.tcl diff --git a/scripts/make_tb_path b/scripts/make_tb_path new file mode 100644 index 00000000..576f816a --- /dev/null +++ b/scripts/make_tb_path @@ -0,0 +1,9 @@ +## Copyright 2024(c) Analog Devices, Inc. +#################################################################################### +#################################################################################### + +# Assumes this file is in /testbenches/scripts/make_tb_path +ADI_HDL_DIR := $(subst /testbenches/scripts/make_tb_path,,$(abspath $(lastword $(MAKEFILE_LIST)))) +HDL_LIBRARY_PATH := $(ADI_HDL_DIR)/library/ +ADI_TB_DIR := $(ADI_HDL_DIR)/testbenches/ +TB_LIBRARY_PATH := $(ADI_TB_DIR)/library/ diff --git a/scripts/project-sim.mk b/scripts/project-sim.mk index 953773b7..2068bca7 100644 --- a/scripts/project-sim.mk +++ b/scripts/project-sim.mk @@ -4,13 +4,12 @@ #################################################################################### #################################################################################### -# Assumes this file is in /testbenches/scripts/project-sim.mk -ADI_HDL_DIR := $(subst /testbenches/scripts/project-sim.mk,,$(abspath $(lastword $(MAKEFILE_LIST)))) -HDL_LIBRARY_PATH := $(ADI_HDL_DIR)/library/ +include $(ADI_TB_DIR)/library/includes/Makeinclude_common + include $(ADI_HDL_DIR)/quiet.mk ENV_DEPS += $(foreach dep,$(LIB_DEPS),$(HDL_LIBRARY_PATH)$(dep)/component.xml) -ENV_DEPS += $(foreach dep,$(SIM_LIB_DEPS),$(ADI_HDL_DIR)/testbenches/library/vip/adi/$(dep)/component.xml) +ENV_DEPS += $(foreach dep,$(SIM_LIB_DEPS),$(ADI_TB_DIR)/library/vip/adi/$(dep)/component.xml) SHELL:=/bin/bash @@ -71,11 +70,11 @@ endef ifeq ($(OS), Windows_NT) CMD_PRE = cmd /C " CMD_POST = " -RUN_SIM_PATH = $(shell cygpath -m $(ADI_HDL_DIR)/testbenches/scripts/run_sim.tcl) +RUN_SIM_PATH = $(shell cygpath -m $(ADI_TB_DIR)/scripts/run_sim.tcl) else CMD_PRE = CMD_POST = -RUN_SIM_PATH = $(ADI_HDL_DIR)/testbenches/scripts/run_sim.tcl +RUN_SIM_PATH = $(ADI_TB_DIR)/scripts/run_sim.tcl endif # This rule template will build the environment @@ -160,9 +159,9 @@ $(HDL_LIBRARY_PATH)%/component.xml: FORCE "; exit $$? # Create here the targets which build the sim libraries -$(ADI_HDL_DIR)/testbenches/library/vip/adi/%/component.xml: TARGET:=xilinx +$(ADI_TB_DIR)/library/vip/adi/%/component.xml: TARGET:=xilinx FORCE: -$(ADI_HDL_DIR)/testbenches/library/vip/adi/%/component.xml: FORCE +$(ADI_TB_DIR)/library/vip/adi/%/component.xml: FORCE flock $(dir $@).lock -c " \ $(MAKE) -C $(dir $@) xilinx; \ "; exit $$?